Merge branch 'drm-intel-next-queued' into gvt-next

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>

diff --combined drivers/gpu/drm/i915/gvt/cmd_parser.c
index 36c6180e57693d79c0edb39fa1a243d13d9e8912,a294427088d85e75b3b1208c093bfaca047b01a5..718ca08f95751af6303f1eb1b651f14cafe3ddc4
--- 1/drivers/gpu/drm/i915/gvt/cmd_parser.c
--- 2/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@@ -813,31 -813,15 +813,31 @@@ static inline bool is_force_nonpriv_mmi
  }
  
  static int force_nonpriv_reg_handler(struct parser_exec_state *s,
 -                                   unsigned int offset, unsigned int index)
 +              unsigned int offset, unsigned int index, char *cmd)
  {
        struct intel_gvt *gvt = s->vgpu->gvt;
 -      unsigned int data = cmd_val(s, index + 1);
 +      unsigned int data;
 +      u32 ring_base;
 +      u32 nopid;
 +      struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv;
 +
 +      if (!strcmp(cmd, "lri"))
 +              data = cmd_val(s, index + 1);
 +      else {
 +              gvt_err("Unexpected forcenonpriv 0x%x write from cmd %s\n",
 +                      offset, cmd);
 +              return -EINVAL;
 +      }
 +
 +      ring_base = dev_priv->engine[s->ring_id]->mmio_base;
 +      nopid = i915_mmio_reg_offset(RING_NOPID(ring_base));
  
 -      if (!intel_gvt_in_force_nonpriv_whitelist(gvt, data)) {
 +      if (!intel_gvt_in_force_nonpriv_whitelist(gvt, data) &&
 +                      data != nopid) {
                gvt_err("Unexpected forcenonpriv 0x%x LRI write, value=0x%x\n",
                        offset, data);
 -              return -EPERM;
 +              patch_value(s, cmd_ptr(s, index), nopid);
 +              return 0;
        }
        return 0;
  }
@@@ -885,7 -869,7 +885,7 @@@ static int cmd_reg_handler(struct parse
                return -EINVAL;
  
        if (is_force_nonpriv_mmio(offset) &&
 -              force_nonpriv_reg_handler(s, offset, index))
 +              force_nonpriv_reg_handler(s, offset, index, cmd))
                return -EPERM;
  
        if (offset == i915_mmio_reg_offset(DERRMR) ||
@@@ -1096,6 -1080,7 +1096,7 @@@ static int cmd_handler_mi_user_interrup
  {
        set_bit(cmd_interrupt_events[s->ring_id].mi_user_interrupt,
                        s->workload->pending_events);
+       patch_value(s, cmd_ptr(s, 0), MI_NOOP);
        return 0;
  }