arch/powerpc/kernel/dt_cpu_ftrs.c

   1 /*
   2  * Copyright 2017, Nicholas Piggin, IBM Corporation
   3  * Licensed under GPLv2.
   4  */
   5
   6 #define pr_fmt(fmt) "dt-cpu-ftrs: " fmt
   7
   8 #include <linux/export.h>
   9 #include <linux/init.h>
  10 #include <linux/jump_label.h>
  11 #include <linux/libfdt.h>
  12 #include <linux/memblock.h>
  13 #include <linux/printk.h>
  14 #include <linux/sched.h>
  15 #include <linux/string.h>
  16 #include <linux/threads.h>
  17
  18 #include <asm/cputable.h>
  19 #include <asm/dt_cpu_ftrs.h>
  20 #include <asm/mmu.h>
  21 #include <asm/oprofile_impl.h>
  22 #include <asm/prom.h>
  23 #include <asm/setup.h>
  24
  25
  26 /* Device-tree visible constants follow */
  27 #define ISA_V2_07B      2070
  28 #define ISA_V3_0B       3000
  29
  30 #define USABLE_PR               (1U << 0)
  31 #define USABLE_OS               (1U << 1)
  32 #define USABLE_HV               (1U << 2)
  33
  34 #define HV_SUPPORT_HFSCR        (1U << 0)
  35 #define OS_SUPPORT_FSCR         (1U << 0)
  36
  37 /* For parsing, we define all bits set as "NONE" case */
  38 #define HV_SUPPORT_NONE         0xffffffffU
  39 #define OS_SUPPORT_NONE         0xffffffffU
  40
  41 struct dt_cpu_feature {
  42         const char *name;
  43         uint32_t isa;
  44         uint32_t usable_privilege;
  45         uint32_t hv_support;
  46         uint32_t os_support;
  47         uint32_t hfscr_bit_nr;
  48         uint32_t fscr_bit_nr;
  49         uint32_t hwcap_bit_nr;
  50         /* fdt parsing */
  51         unsigned long node;
  52         int enabled;
  53         int disabled;
  54 };
  55
  56 #define MMU_FTRS_HASH_BASE (MMU_FTRS_POWER8)
  57
  58 #define COMMON_USER_BASE        (PPC_FEATURE_32 | PPC_FEATURE_64 | \
  59                                  PPC_FEATURE_ARCH_2_06 |\
  60                                  PPC_FEATURE_ICACHE_SNOOP)
  61 #define COMMON_USER2_BASE       (PPC_FEATURE2_ARCH_2_07 | \
  62                                  PPC_FEATURE2_ISEL)
  63 /*
  64  * Set up the base CPU
  65  */
  66
  67 extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
  68 extern long __machine_check_early_realmode_p9(struct pt_regs *regs);
  69
  70 static int hv_mode;
  71
  72 static struct {
  73         u64     lpcr;
  74         u64     lpcr_clear;
  75         u64     hfscr;
  76         u64     fscr;
  77 } system_registers;
  78
  79 static void (*init_pmu_registers)(void);
  80
  81 static void __restore_cpu_cpufeatures(void)
  82 {
  83         u64 lpcr;
  84
  85         /*
  86          * LPCR is restored by the power on engine already. It can be changed
  87          * after early init e.g., by radix enable, and we have no unified API
  88          * for saving and restoring such SPRs.
  89          *
  90          * This ->restore hook should really be removed from idle and register
  91          * restore moved directly into the idle restore code, because this code
  92          * doesn't know how idle is implemented or what it needs restored here.
  93          *
  94          * The best we can do to accommodate secondary boot and idle restore
  95          * for now is "or" LPCR with existing.
  96          */
  97         lpcr = mfspr(SPRN_LPCR);
  98         lpcr |= system_registers.lpcr;
  99         lpcr &= ~system_registers.lpcr_clear;
 100         mtspr(SPRN_LPCR, lpcr);
 101         if (hv_mode) {
 102                 mtspr(SPRN_LPID, 0);
 103                 mtspr(SPRN_HFSCR, system_registers.hfscr);
 104                 mtspr(SPRN_PCR, 0);
 105         }
 106         mtspr(SPRN_FSCR, system_registers.fscr);
 107
 108         if (init_pmu_registers)
 109                 init_pmu_registers();
 110 }
 111
 112 static char dt_cpu_name[64];
 113
 114 static struct cpu_spec __initdata base_cpu_spec = {
 115         .cpu_name               = NULL,
 116         .cpu_features           = CPU_FTRS_DT_CPU_BASE,
 117         .cpu_user_features      = COMMON_USER_BASE,
 118         .cpu_user_features2     = COMMON_USER2_BASE,
 119         .mmu_features           = 0,
 120         .icache_bsize           = 32, /* minimum block size, fixed by */
 121         .dcache_bsize           = 32, /* cache info init.             */
 122         .num_pmcs               = 0,
 123         .pmc_type               = PPC_PMC_DEFAULT,
 124         .oprofile_cpu_type      = NULL,
 125         .oprofile_type          = PPC_OPROFILE_INVALID,
 126         .cpu_setup              = NULL,
 127         .cpu_restore            = __restore_cpu_cpufeatures,
 128         .machine_check_early    = NULL,
 129         .platform               = NULL,
 130 };
 131
 132 static void __init cpufeatures_setup_cpu(void)
 133 {
 134         set_cur_cpu_spec(&base_cpu_spec);
 135
 136         cur_cpu_spec->pvr_mask = -1;
 137         cur_cpu_spec->pvr_value = mfspr(SPRN_PVR);
 138
 139         /* Initialize the base environment -- clear FSCR/HFSCR.  */
 140         hv_mode = !!(mfmsr() & MSR_HV);
 141         if (hv_mode) {
 142                 /* CPU_FTR_HVMODE is used early in PACA setup */
 143                 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 144                 mtspr(SPRN_HFSCR, 0);
 145         }
 146         mtspr(SPRN_FSCR, 0);
 147
 148         /*
 149          * LPCR does not get cleared, to match behaviour with secondaries
 150          * in __restore_cpu_cpufeatures. Once the idle code is fixed, this
 151          * could clear LPCR too.
 152          */
 153 }
 154
 155 static int __init feat_try_enable_unknown(struct dt_cpu_feature *f)
 156 {
 157         if (f->hv_support == HV_SUPPORT_NONE) {
 158         } else if (f->hv_support & HV_SUPPORT_HFSCR) {
 159                 u64 hfscr = mfspr(SPRN_HFSCR);
 160                 hfscr |= 1UL << f->hfscr_bit_nr;
 161                 mtspr(SPRN_HFSCR, hfscr);
 162         } else {
 163                 /* Does not have a known recipe */
 164                 return 0;
 165         }
 166
 167         if (f->os_support == OS_SUPPORT_NONE) {
 168         } else if (f->os_support & OS_SUPPORT_FSCR) {
 169                 u64 fscr = mfspr(SPRN_FSCR);
 170                 fscr |= 1UL << f->fscr_bit_nr;
 171                 mtspr(SPRN_FSCR, fscr);
 172         } else {
 173                 /* Does not have a known recipe */
 174                 return 0;
 175         }
 176
 177         if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
 178                 uint32_t word = f->hwcap_bit_nr / 32;
 179                 uint32_t bit = f->hwcap_bit_nr % 32;
 180
 181                 if (word == 0)
 182                         cur_cpu_spec->cpu_user_features |= 1U << bit;
 183                 else if (word == 1)
 184                         cur_cpu_spec->cpu_user_features2 |= 1U << bit;
 185                 else
 186                         pr_err("%s could not advertise to user (no hwcap bits)\n", f->name);
 187         }
 188
 189         return 1;
 190 }
 191
 192 static int __init feat_enable(struct dt_cpu_feature *f)
 193 {
 194         if (f->hv_support != HV_SUPPORT_NONE) {
 195                 if (f->hfscr_bit_nr != -1) {
 196                         u64 hfscr = mfspr(SPRN_HFSCR);
 197                         hfscr |= 1UL << f->hfscr_bit_nr;
 198                         mtspr(SPRN_HFSCR, hfscr);
 199                 }
 200         }
 201
 202         if (f->os_support != OS_SUPPORT_NONE) {
 203                 if (f->fscr_bit_nr != -1) {
 204                         u64 fscr = mfspr(SPRN_FSCR);
 205                         fscr |= 1UL << f->fscr_bit_nr;
 206                         mtspr(SPRN_FSCR, fscr);
 207                 }
 208         }
 209
 210         if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
 211                 uint32_t word = f->hwcap_bit_nr / 32;
 212                 uint32_t bit = f->hwcap_bit_nr % 32;
 213
 214                 if (word == 0)
 215                         cur_cpu_spec->cpu_user_features |= 1U << bit;
 216                 else if (word == 1)
 217                         cur_cpu_spec->cpu_user_features2 |= 1U << bit;
 218                 else
 219                         pr_err("CPU feature: %s could not advertise to user (no hwcap bits)\n", f->name);
 220         }
 221
 222         return 1;
 223 }
 224
 225 static int __init feat_disable(struct dt_cpu_feature *f)
 226 {
 227         return 0;
 228 }
 229
 230 static int __init feat_enable_hv(struct dt_cpu_feature *f)
 231 {
 232         u64 lpcr;
 233
 234         if (!hv_mode) {
 235                 pr_err("CPU feature hypervisor present in device tree but HV mode not enabled in the CPU. Ignoring.\n");
 236                 return 0;
 237         }
 238
 239         mtspr(SPRN_LPID, 0);
 240
 241         lpcr = mfspr(SPRN_LPCR);
 242         lpcr &=  ~LPCR_LPES0; /* HV external interrupts */
 243         mtspr(SPRN_LPCR, lpcr);
 244
 245         cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 246
 247         return 1;
 248 }
 249
 250 static int __init feat_enable_le(struct dt_cpu_feature *f)
 251 {
 252         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_TRUE_LE;
 253         return 1;
 254 }
 255
 256 static int __init feat_enable_smt(struct dt_cpu_feature *f)
 257 {
 258         cur_cpu_spec->cpu_features |= CPU_FTR_SMT;
 259         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_SMT;
 260         return 1;
 261 }
 262
 263 static int __init feat_enable_idle_nap(struct dt_cpu_feature *f)
 264 {
 265         u64 lpcr;
 266
 267         /* Set PECE wakeup modes for ISA 207 */
 268         lpcr = mfspr(SPRN_LPCR);
 269         lpcr |=  LPCR_PECE0;
 270         lpcr |=  LPCR_PECE1;
 271         lpcr |=  LPCR_PECE2;
 272         mtspr(SPRN_LPCR, lpcr);
 273
 274         return 1;
 275 }
 276
 277 static int __init feat_enable_align_dsisr(struct dt_cpu_feature *f)
 278 {
 279         cur_cpu_spec->cpu_features &= ~CPU_FTR_NODSISRALIGN;
 280
 281         return 1;
 282 }
 283
 284 static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
 285 {
 286         u64 lpcr;
 287
 288         /* Set PECE wakeup modes for ISAv3.0B */
 289         lpcr = mfspr(SPRN_LPCR);
 290         lpcr |=  LPCR_PECE0;
 291         lpcr |=  LPCR_PECE1;
 292         lpcr |=  LPCR_PECE2;
 293         mtspr(SPRN_LPCR, lpcr);
 294
 295         return 1;
 296 }
 297
 298 static int __init feat_enable_mmu_hash(struct dt_cpu_feature *f)
 299 {
 300         u64 lpcr;
 301
 302         lpcr = mfspr(SPRN_LPCR);
 303         lpcr &= ~LPCR_ISL;
 304
 305         /* VRMASD */
 306         lpcr |= LPCR_VPM0;
 307         lpcr &= ~LPCR_VPM1;
 308         lpcr |= 0x10UL << LPCR_VRMASD_SH; /* L=1 LP=00 */
 309         mtspr(SPRN_LPCR, lpcr);
 310
 311         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 312         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 313
 314         return 1;
 315 }
 316
 317 static int __init feat_enable_mmu_hash_v3(struct dt_cpu_feature *f)
 318 {
 319         u64 lpcr;
 320
 321         system_registers.lpcr_clear |= (LPCR_ISL | LPCR_UPRT | LPCR_HR);
 322         lpcr = mfspr(SPRN_LPCR);
 323         lpcr &= ~(LPCR_ISL | LPCR_UPRT | LPCR_HR);
 324         mtspr(SPRN_LPCR, lpcr);
 325
 326         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 327         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 328
 329         return 1;
 330 }
 331
 332
 333 static int __init feat_enable_mmu_radix(struct dt_cpu_feature *f)
 334 {
 335 #ifdef CONFIG_PPC_RADIX_MMU
 336         cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
 337         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 338         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 339
 340         return 1;
 341 #endif
 342         return 0;
 343 }
 344
 345 static int __init feat_enable_dscr(struct dt_cpu_feature *f)
 346 {
 347         u64 lpcr;
 348
 349         feat_enable(f);
 350
 351         lpcr = mfspr(SPRN_LPCR);
 352         lpcr &= ~LPCR_DPFD;
 353         lpcr |=  (4UL << LPCR_DPFD_SH);
 354         mtspr(SPRN_LPCR, lpcr);
 355
 356         return 1;
 357 }
 358
 359 static void hfscr_pmu_enable(void)
 360 {
 361         u64 hfscr = mfspr(SPRN_HFSCR);
 362         hfscr |= PPC_BIT(60);
 363         mtspr(SPRN_HFSCR, hfscr);
 364 }
 365
 366 static void init_pmu_power8(void)
 367 {
 368         if (hv_mode) {
 369                 mtspr(SPRN_MMCRC, 0);
 370                 mtspr(SPRN_MMCRH, 0);
 371         }
 372
 373         mtspr(SPRN_MMCRA, 0);
 374         mtspr(SPRN_MMCR0, 0);
 375         mtspr(SPRN_MMCR1, 0);
 376         mtspr(SPRN_MMCR2, 0);
 377         mtspr(SPRN_MMCRS, 0);
 378 }
 379
 380 static int __init feat_enable_mce_power8(struct dt_cpu_feature *f)
 381 {
 382         cur_cpu_spec->platform = "power8";
 383         cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p8;
 384
 385         return 1;
 386 }
 387
 388 static int __init feat_enable_pmu_power8(struct dt_cpu_feature *f)
 389 {
 390         hfscr_pmu_enable();
 391
 392         init_pmu_power8();
 393         init_pmu_registers = init_pmu_power8;
 394
 395         cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
 396         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
 397         if (pvr_version_is(PVR_POWER8E))
 398                 cur_cpu_spec->cpu_features |= CPU_FTR_PMAO_BUG;
 399
 400         cur_cpu_spec->num_pmcs          = 6;
 401         cur_cpu_spec->pmc_type          = PPC_PMC_IBM;
 402         cur_cpu_spec->oprofile_cpu_type = "ppc64/power8";
 403
 404         return 1;
 405 }
 406
 407 static void init_pmu_power9(void)
 408 {
 409         if (hv_mode)
 410                 mtspr(SPRN_MMCRC, 0);
 411
 412         mtspr(SPRN_MMCRA, 0);
 413         mtspr(SPRN_MMCR0, 0);
 414         mtspr(SPRN_MMCR1, 0);
 415         mtspr(SPRN_MMCR2, 0);
 416 }
 417
 418 static int __init feat_enable_mce_power9(struct dt_cpu_feature *f)
 419 {
 420         cur_cpu_spec->platform = "power9";
 421         cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p9;
 422
 423         return 1;
 424 }
 425
 426 static int __init feat_enable_pmu_power9(struct dt_cpu_feature *f)
 427 {
 428         hfscr_pmu_enable();
 429
 430         init_pmu_power9();
 431         init_pmu_registers = init_pmu_power9;
 432
 433         cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
 434         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
 435
 436         cur_cpu_spec->num_pmcs          = 6;
 437         cur_cpu_spec->pmc_type          = PPC_PMC_IBM;
 438         cur_cpu_spec->oprofile_cpu_type = "ppc64/power9";
 439
 440         return 1;
 441 }
 442
 443 static int __init feat_enable_tm(struct dt_cpu_feature *f)
 444 {
 445 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 446         feat_enable(f);
 447         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NOSC;
 448         return 1;
 449 #endif
 450         return 0;
 451 }
 452
 453 static int __init feat_enable_fp(struct dt_cpu_feature *f)
 454 {
 455         feat_enable(f);
 456         cur_cpu_spec->cpu_features &= ~CPU_FTR_FPU_UNAVAILABLE;
 457
 458         return 1;
 459 }
 460
 461 static int __init feat_enable_vector(struct dt_cpu_feature *f)
 462 {
 463 #ifdef CONFIG_ALTIVEC
 464         feat_enable(f);
 465         cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
 466         cur_cpu_spec->cpu_features |= CPU_FTR_VMX_COPY;
 467         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
 468
 469         return 1;
 470 #endif
 471         return 0;
 472 }
 473
 474 static int __init feat_enable_vsx(struct dt_cpu_feature *f)
 475 {
 476 #ifdef CONFIG_VSX
 477         feat_enable(f);
 478         cur_cpu_spec->cpu_features |= CPU_FTR_VSX;
 479         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_VSX;
 480
 481         return 1;
 482 #endif
 483         return 0;
 484 }
 485
 486 static int __init feat_enable_purr(struct dt_cpu_feature *f)
 487 {
 488         cur_cpu_spec->cpu_features |= CPU_FTR_PURR | CPU_FTR_SPURR;
 489
 490         return 1;
 491 }
 492
 493 static int __init feat_enable_ebb(struct dt_cpu_feature *f)
 494 {
 495         /*
 496          * PPC_FEATURE2_EBB is enabled in PMU init code because it has
 497          * historically been related to the PMU facility. This may have
 498          * to be decoupled if EBB becomes more generic. For now, follow
 499          * existing convention.
 500          */
 501         f->hwcap_bit_nr = -1;
 502         feat_enable(f);
 503
 504         return 1;
 505 }
 506
 507 static int __init feat_enable_dbell(struct dt_cpu_feature *f)
 508 {
 509         u64 lpcr;
 510
 511         /* P9 has an HFSCR for privileged state */
 512         feat_enable(f);
 513
 514         cur_cpu_spec->cpu_features |= CPU_FTR_DBELL;
 515
 516         lpcr = mfspr(SPRN_LPCR);
 517         lpcr |=  LPCR_PECEDH; /* hyp doorbell wakeup */
 518         mtspr(SPRN_LPCR, lpcr);
 519
 520         return 1;
 521 }
 522
 523 static int __init feat_enable_hvi(struct dt_cpu_feature *f)
 524 {
 525         u64 lpcr;
 526
 527         /*
 528          * POWER9 XIVE interrupts including in OPAL XICS compatibility
 529          * are always delivered as hypervisor virtualization interrupts (HVI)
 530          * rather than EE.
 531          *
 532          * However LPES0 is not set here, in the chance that an EE does get
 533          * delivered to the host somehow, the EE handler would not expect it
 534          * to be delivered in LPES0 mode (e.g., using SRR[01]). This could
 535          * happen if there is a bug in interrupt controller code, or IC is
 536          * misconfigured in systemsim.
 537          */
 538
 539         lpcr = mfspr(SPRN_LPCR);
 540         lpcr |= LPCR_HVICE;     /* enable hvi interrupts */
 541         lpcr |= LPCR_HEIC;      /* disable ee interrupts when MSR_HV */
 542         lpcr |= LPCR_PECE_HVEE; /* hvi can wake from stop */
 543         mtspr(SPRN_LPCR, lpcr);
 544
 545         return 1;
 546 }
 547
 548 static int __init feat_enable_large_ci(struct dt_cpu_feature *f)
 549 {
 550         cur_cpu_spec->mmu_features |= MMU_FTR_CI_LARGE_PAGE;
 551
 552         return 1;
 553 }
 554
 555 struct dt_cpu_feature_match {
 556         const char *name;
 557         int (*enable)(struct dt_cpu_feature *f);
 558         u64 cpu_ftr_bit_mask;
 559 };
 560
 561 static struct dt_cpu_feature_match __initdata
 562                 dt_cpu_feature_match_table[] = {
 563         {"hypervisor", feat_enable_hv, 0},
 564         {"big-endian", feat_enable, 0},
 565         {"little-endian", feat_enable_le, CPU_FTR_REAL_LE},
 566         {"smt", feat_enable_smt, 0},
 567         {"interrupt-facilities", feat_enable, 0},
 568         {"timer-facilities", feat_enable, 0},
 569         {"timer-facilities-v3", feat_enable, 0},
 570         {"debug-facilities", feat_enable, 0},
 571         {"come-from-address-register", feat_enable, CPU_FTR_CFAR},
 572         {"branch-tracing", feat_enable, 0},
 573         {"floating-point", feat_enable_fp, 0},
 574         {"vector", feat_enable_vector, 0},
 575         {"vector-scalar", feat_enable_vsx, 0},
 576         {"vector-scalar-v3", feat_enable, 0},
 577         {"decimal-floating-point", feat_enable, 0},
 578         {"decimal-integer", feat_enable, 0},
 579         {"quadword-load-store", feat_enable, 0},
 580         {"vector-crypto", feat_enable, 0},
 581         {"mmu-hash", feat_enable_mmu_hash, 0},
 582         {"mmu-radix", feat_enable_mmu_radix, 0},
 583         {"mmu-hash-v3", feat_enable_mmu_hash_v3, 0},
 584         {"virtual-page-class-key-protection", feat_enable, 0},
 585         {"transactional-memory", feat_enable_tm, CPU_FTR_TM},
 586         {"transactional-memory-v3", feat_enable_tm, 0},
 587         {"tm-suspend-hypervisor-assist", feat_enable, CPU_FTR_P9_TM_HV_ASSIST},
 588         {"tm-suspend-xer-so-bug", feat_enable, CPU_FTR_P9_TM_XER_SO_BUG},
 589         {"idle-nap", feat_enable_idle_nap, 0},
 590         {"alignment-interrupt-dsisr", feat_enable_align_dsisr, 0},
 591         {"idle-stop", feat_enable_idle_stop, 0},
 592         {"machine-check-power8", feat_enable_mce_power8, 0},
 593         {"performance-monitor-power8", feat_enable_pmu_power8, 0},
 594         {"data-stream-control-register", feat_enable_dscr, CPU_FTR_DSCR},
 595         {"event-based-branch", feat_enable_ebb, 0},
 596         {"target-address-register", feat_enable, 0},
 597         {"branch-history-rolling-buffer", feat_enable, 0},
 598         {"control-register", feat_enable, CPU_FTR_CTRL},
 599         {"processor-control-facility", feat_enable_dbell, CPU_FTR_DBELL},
 600         {"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL},
 601         {"processor-utilization-of-resources-register", feat_enable_purr, 0},
 602         {"no-execute", feat_enable, 0},
 603         {"strong-access-ordering", feat_enable, CPU_FTR_SAO},
 604         {"cache-inhibited-large-page", feat_enable_large_ci, 0},
 605         {"coprocessor-icswx", feat_enable, 0},
 606         {"hypervisor-virtualization-interrupt", feat_enable_hvi, 0},
 607         {"program-priority-register", feat_enable, CPU_FTR_HAS_PPR},
 608         {"wait", feat_enable, 0},
 609         {"atomic-memory-operations", feat_enable, 0},
 610         {"branch-v3", feat_enable, 0},
 611         {"copy-paste", feat_enable, 0},
 612         {"decimal-floating-point-v3", feat_enable, 0},
 613         {"decimal-integer-v3", feat_enable, 0},
 614         {"fixed-point-v3", feat_enable, 0},
 615         {"floating-point-v3", feat_enable, 0},
 616         {"group-start-register", feat_enable, 0},
 617         {"pc-relative-addressing", feat_enable, 0},
 618         {"machine-check-power9", feat_enable_mce_power9, 0},
 619         {"performance-monitor-power9", feat_enable_pmu_power9, 0},
 620         {"event-based-branch-v3", feat_enable, 0},
 621         {"random-number-generator", feat_enable, 0},
 622         {"system-call-vectored", feat_disable, 0},
 623         {"trace-interrupt-v3", feat_enable, 0},
 624         {"vector-v3", feat_enable, 0},
 625         {"vector-binary128", feat_enable, 0},
 626         {"vector-binary16", feat_enable, 0},
 627         {"wait-v3", feat_enable, 0},
 628 };
 629
 630 static bool __initdata using_dt_cpu_ftrs;
 631 static bool __initdata enable_unknown = true;
 632
 633 static int __init dt_cpu_ftrs_parse(char *str)
 634 {
 635         if (!str)
 636                 return 0;
 637
 638         if (!strcmp(str, "off"))
 639                 using_dt_cpu_ftrs = false;
 640         else if (!strcmp(str, "known"))
 641                 enable_unknown = false;
 642         else
 643                 return 1;
 644
 645         return 0;
 646 }
 647 early_param("dt_cpu_ftrs", dt_cpu_ftrs_parse);
 648
 649 static void __init cpufeatures_setup_start(u32 isa)
 650 {
 651         pr_info("setup for ISA %d\n", isa);
 652
 653         if (isa >= 3000) {
 654                 cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_300;
 655                 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_00;
 656         }
 657 }
 658
 659 static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f)
 660 {
 661         const struct dt_cpu_feature_match *m;
 662         bool known = false;
 663         int i;
 664
 665         for (i = 0; i < ARRAY_SIZE(dt_cpu_feature_match_table); i++) {
 666                 m = &dt_cpu_feature_match_table[i];
 667                 if (!strcmp(f->name, m->name)) {
 668                         known = true;
 669                         if (m->enable(f))
 670                                 break;
 671
 672                         pr_info("not enabling: %s (disabled or unsupported by kernel)\n",
 673                                 f->name);
 674                         return false;
 675                 }
 676         }
 677
 678         if (!known && enable_unknown) {
 679                 if (!feat_try_enable_unknown(f)) {
 680                         pr_info("not enabling: %s (unknown and unsupported by kernel)\n",
 681                                 f->name);
 682                         return false;
 683                 }
 684         }
 685
 686         if (m->cpu_ftr_bit_mask)
 687                 cur_cpu_spec->cpu_features |= m->cpu_ftr_bit_mask;
 688
 689         if (known)
 690                 pr_debug("enabling: %s\n", f->name);
 691         else
 692                 pr_debug("enabling: %s (unknown)\n", f->name);
 693
 694         return true;
 695 }
 696
 697 static __init void cpufeatures_cpu_quirks(void)
 698 {
 699         int version = mfspr(SPRN_PVR);
 700
 701         /*
 702          * Not all quirks can be derived from the cpufeatures device tree.
 703          */
 704         if ((version & 0xffffff00) == 0x004e0100)
 705                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD1;
 706         else if ((version & 0xffffefff) == 0x004e0200)
 707                 ; /* DD2.0 has no feature flag */
 708         else if ((version & 0xffffefff) == 0x004e0201)
 709                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
 710         else if ((version & 0xffffefff) == 0x004e0202) {
 711                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST;
 712                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_XER_SO_BUG;
 713                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
 714         } else if ((version & 0xffff0000) == 0x004e0000)
 715                 /* DD2.1 and up have DD2_1 */
 716                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
 717
 718         if ((version & 0xffff0000) == 0x004e0000) {
 719                 cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
 720                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_BUG;
 721                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TIDR;
 722         }
 723
 724         /*
 725          * PKEY was not in the initial base or feature node
 726          * specification, but it should become optional in the next
 727          * cpu feature version sequence.
 728          */
 729         cur_cpu_spec->cpu_features |= CPU_FTR_PKEY;
 730 }
 731
 732 static void __init cpufeatures_setup_finished(void)
 733 {
 734         cpufeatures_cpu_quirks();
 735
 736         if (hv_mode && !(cur_cpu_spec->cpu_features & CPU_FTR_HVMODE)) {
 737                 pr_err("hypervisor not present in device tree but HV mode is enabled in the CPU. Enabling.\n");
 738                 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 739         }
 740
 741         /* Make sure powerpc_base_platform is non-NULL */
 742         powerpc_base_platform = cur_cpu_spec->platform;
 743
 744         system_registers.lpcr = mfspr(SPRN_LPCR);
 745         system_registers.hfscr = mfspr(SPRN_HFSCR);
 746         system_registers.fscr = mfspr(SPRN_FSCR);
 747
 748         pr_info("final cpu/mmu features = 0x%016lx 0x%08x\n",
 749                 cur_cpu_spec->cpu_features, cur_cpu_spec->mmu_features);
 750 }
 751
 752 static int __init disabled_on_cmdline(void)
 753 {
 754         unsigned long root, chosen;
 755         const char *p;
 756
 757         root = of_get_flat_dt_root();
 758         chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
 759         if (chosen == -FDT_ERR_NOTFOUND)
 760                 return false;
 761
 762         p = of_get_flat_dt_prop(chosen, "bootargs", NULL);
 763         if (!p)
 764                 return false;
 765
 766         if (strstr(p, "dt_cpu_ftrs=off"))
 767                 return true;
 768
 769         return false;
 770 }
 771
 772 static int __init fdt_find_cpu_features(unsigned long node, const char *uname,
 773                                         int depth, void *data)
 774 {
 775         if (of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features")
 776             && of_get_flat_dt_prop(node, "isa", NULL))
 777                 return 1;
 778
 779         return 0;
 780 }
 781
 782 bool __init dt_cpu_ftrs_in_use(void)
 783 {
 784         return using_dt_cpu_ftrs;
 785 }
 786
 787 bool __init dt_cpu_ftrs_init(void *fdt)
 788 {
 789         using_dt_cpu_ftrs = false;
 790
 791         /* Setup and verify the FDT, if it fails we just bail */
 792         if (!early_init_dt_verify(fdt))
 793                 return false;
 794
 795         if (!of_scan_flat_dt(fdt_find_cpu_features, NULL))
 796                 return false;
 797
 798         if (disabled_on_cmdline())
 799                 return false;
 800
 801         cpufeatures_setup_cpu();
 802
 803         using_dt_cpu_ftrs = true;
 804         return true;
 805 }
 806
 807 static int nr_dt_cpu_features;
 808 static struct dt_cpu_feature *dt_cpu_features;
 809
 810 static int __init process_cpufeatures_node(unsigned long node,
 811                                           const char *uname, int i)
 812 {
 813         const __be32 *prop;
 814         struct dt_cpu_feature *f;
 815         int len;
 816
 817         f = &dt_cpu_features[i];
 818         memset(f, 0, sizeof(struct dt_cpu_feature));
 819
 820         f->node = node;
 821
 822         f->name = uname;
 823
 824         prop = of_get_flat_dt_prop(node, "isa", &len);
 825         if (!prop) {
 826                 pr_warn("%s: missing isa property\n", uname);
 827                 return 0;
 828         }
 829         f->isa = be32_to_cpup(prop);
 830
 831         prop = of_get_flat_dt_prop(node, "usable-privilege", &len);
 832         if (!prop) {
 833                 pr_warn("%s: missing usable-privilege property", uname);
 834                 return 0;
 835         }
 836         f->usable_privilege = be32_to_cpup(prop);
 837
 838         prop = of_get_flat_dt_prop(node, "hv-support", &len);
 839         if (prop)
 840                 f->hv_support = be32_to_cpup(prop);
 841         else
 842                 f->hv_support = HV_SUPPORT_NONE;
 843
 844         prop = of_get_flat_dt_prop(node, "os-support", &len);
 845         if (prop)
 846                 f->os_support = be32_to_cpup(prop);
 847         else
 848                 f->os_support = OS_SUPPORT_NONE;
 849
 850         prop = of_get_flat_dt_prop(node, "hfscr-bit-nr", &len);
 851         if (prop)
 852                 f->hfscr_bit_nr = be32_to_cpup(prop);
 853         else
 854                 f->hfscr_bit_nr = -1;
 855         prop = of_get_flat_dt_prop(node, "fscr-bit-nr", &len);
 856         if (prop)
 857                 f->fscr_bit_nr = be32_to_cpup(prop);
 858         else
 859                 f->fscr_bit_nr = -1;
 860         prop = of_get_flat_dt_prop(node, "hwcap-bit-nr", &len);
 861         if (prop)
 862                 f->hwcap_bit_nr = be32_to_cpup(prop);
 863         else
 864                 f->hwcap_bit_nr = -1;
 865
 866         if (f->usable_privilege & USABLE_HV) {
 867                 if (!(mfmsr() & MSR_HV)) {
 868                         pr_warn("%s: HV feature passed to guest\n", uname);
 869                         return 0;
 870                 }
 871
 872                 if (f->hv_support == HV_SUPPORT_NONE && f->hfscr_bit_nr != -1) {
 873                         pr_warn("%s: unwanted hfscr_bit_nr\n", uname);
 874                         return 0;
 875                 }
 876
 877                 if (f->hv_support == HV_SUPPORT_HFSCR) {
 878                         if (f->hfscr_bit_nr == -1) {
 879                                 pr_warn("%s: missing hfscr_bit_nr\n", uname);
 880                                 return 0;
 881                         }
 882                 }
 883         } else {
 884                 if (f->hv_support != HV_SUPPORT_NONE || f->hfscr_bit_nr != -1) {
 885                         pr_warn("%s: unwanted hv_support/hfscr_bit_nr\n", uname);
 886                         return 0;
 887                 }
 888         }
 889
 890         if (f->usable_privilege & USABLE_OS) {
 891                 if (f->os_support == OS_SUPPORT_NONE && f->fscr_bit_nr != -1) {
 892                         pr_warn("%s: unwanted fscr_bit_nr\n", uname);
 893                         return 0;
 894                 }
 895
 896                 if (f->os_support == OS_SUPPORT_FSCR) {
 897                         if (f->fscr_bit_nr == -1) {
 898                                 pr_warn("%s: missing fscr_bit_nr\n", uname);
 899                                 return 0;
 900                         }
 901                 }
 902         } else {
 903                 if (f->os_support != OS_SUPPORT_NONE || f->fscr_bit_nr != -1) {
 904                         pr_warn("%s: unwanted os_support/fscr_bit_nr\n", uname);
 905                         return 0;
 906                 }
 907         }
 908
 909         if (!(f->usable_privilege & USABLE_PR)) {
 910                 if (f->hwcap_bit_nr != -1) {
 911                         pr_warn("%s: unwanted hwcap_bit_nr\n", uname);
 912                         return 0;
 913                 }
 914         }
 915
 916         /* Do all the independent features in the first pass */
 917         if (!of_get_flat_dt_prop(node, "dependencies", &len)) {
 918                 if (cpufeatures_process_feature(f))
 919                         f->enabled = 1;
 920                 else
 921                         f->disabled = 1;
 922         }
 923
 924         return 0;
 925 }
 926
 927 static void __init cpufeatures_deps_enable(struct dt_cpu_feature *f)
 928 {
 929         const __be32 *prop;
 930         int len;
 931         int nr_deps;
 932         int i;
 933
 934         if (f->enabled || f->disabled)
 935                 return;
 936
 937         prop = of_get_flat_dt_prop(f->node, "dependencies", &len);
 938         if (!prop) {
 939                 pr_warn("%s: missing dependencies property", f->name);
 940                 return;
 941         }
 942
 943         nr_deps = len / sizeof(int);
 944
 945         for (i = 0; i < nr_deps; i++) {
 946                 unsigned long phandle = be32_to_cpu(prop[i]);
 947                 int j;
 948
 949                 for (j = 0; j < nr_dt_cpu_features; j++) {
 950                         struct dt_cpu_feature *d = &dt_cpu_features[j];
 951
 952                         if (of_get_flat_dt_phandle(d->node) == phandle) {
 953                                 cpufeatures_deps_enable(d);
 954                                 if (d->disabled) {
 955                                         f->disabled = 1;
 956                                         return;
 957                                 }
 958                         }
 959                 }
 960         }
 961
 962         if (cpufeatures_process_feature(f))
 963                 f->enabled = 1;
 964         else
 965                 f->disabled = 1;
 966 }
 967
 968 static int __init scan_cpufeatures_subnodes(unsigned long node,
 969                                           const char *uname,
 970                                           void *data)
 971 {
 972         int *count = data;
 973
 974         process_cpufeatures_node(node, uname, *count);
 975
 976         (*count)++;
 977
 978         return 0;
 979 }
 980
 981 static int __init count_cpufeatures_subnodes(unsigned long node,
 982                                           const char *uname,
 983                                           void *data)
 984 {
 985         int *count = data;
 986
 987         (*count)++;
 988
 989         return 0;
 990 }
 991
 992 static int __init dt_cpu_ftrs_scan_callback(unsigned long node, const char
 993                                             *uname, int depth, void *data)
 994 {
 995         const __be32 *prop;
 996         int count, i;
 997         u32 isa;
 998
 999         /* We are scanning "ibm,powerpc-cpu-features" nodes only */
1000         if (!of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features"))
1001                 return 0;
1002
1003         prop = of_get_flat_dt_prop(node, "isa", NULL);
1004         if (!prop)
1005                 /* We checked before, "can't happen" */
1006                 return 0;
1007
1008         isa = be32_to_cpup(prop);
1009
1010         /* Count and allocate space for cpu features */
1011         of_scan_flat_dt_subnodes(node, count_cpufeatures_subnodes,
1012                                                 &nr_dt_cpu_features);
1013         dt_cpu_features = __va(
1014                 memblock_alloc(sizeof(struct dt_cpu_feature)*
1015                                 nr_dt_cpu_features, PAGE_SIZE));
1016
1017         cpufeatures_setup_start(isa);
1018
1019         /* Scan nodes into dt_cpu_features and enable those without deps  */
1020         count = 0;
1021         of_scan_flat_dt_subnodes(node, scan_cpufeatures_subnodes, &count);
1022
1023         /* Recursive enable remaining features with dependencies */
1024         for (i = 0; i < nr_dt_cpu_features; i++) {
1025                 struct dt_cpu_feature *f = &dt_cpu_features[i];
1026
1027                 cpufeatures_deps_enable(f);
1028         }
1029
1030         prop = of_get_flat_dt_prop(node, "display-name", NULL);
1031         if (prop && strlen((char *)prop) != 0) {
1032                 strlcpy(dt_cpu_name, (char *)prop, sizeof(dt_cpu_name));
1033                 cur_cpu_spec->cpu_name = dt_cpu_name;
1034         }
1035
1036         cpufeatures_setup_finished();
1037
1038         memblock_free(__pa(dt_cpu_features),
1039                         sizeof(struct dt_cpu_feature)*nr_dt_cpu_features);
1040
1041         return 0;
1042 }
1043
1044 void __init dt_cpu_ftrs_scan(void)
1045 {
1046         if (!using_dt_cpu_ftrs)
1047                 return;
1048
1049         of_scan_flat_dt(dt_cpu_ftrs_scan_callback, NULL);
1050 }