1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2017, Nicholas Piggin, IBM Corporation
6 #define pr_fmt(fmt) "dt-cpu-ftrs: " fmt
8 #include <linux/export.h>
9 #include <linux/init.h>
10 #include <linux/jump_label.h>
11 #include <linux/libfdt.h>
12 #include <linux/memblock.h>
13 #include <linux/of_fdt.h>
14 #include <linux/printk.h>
15 #include <linux/sched.h>
16 #include <linux/string.h>
17 #include <linux/threads.h>
19 #include <asm/cputable.h>
20 #include <asm/dt_cpu_ftrs.h>
23 #include <asm/setup.h>
26 /* Device-tree visible constants follow */
27 #define ISA_V3_0B 3000
30 #define USABLE_PR (1U << 0)
31 #define USABLE_OS (1U << 1)
32 #define USABLE_HV (1U << 2)
34 #define HV_SUPPORT_HFSCR (1U << 0)
35 #define OS_SUPPORT_FSCR (1U << 0)
37 /* For parsing, we define all bits set as "NONE" case */
38 #define HV_SUPPORT_NONE 0xffffffffU
39 #define OS_SUPPORT_NONE 0xffffffffU
41 struct dt_cpu_feature {
44 uint32_t usable_privilege;
47 uint32_t hfscr_bit_nr;
49 uint32_t hwcap_bit_nr;
56 #define MMU_FTRS_HASH_BASE (MMU_FTRS_POWER8)
58 #define COMMON_USER_BASE (PPC_FEATURE_32 | PPC_FEATURE_64 | \
59 PPC_FEATURE_ARCH_2_06 |\
60 PPC_FEATURE_ICACHE_SNOOP)
61 #define COMMON_USER2_BASE (PPC_FEATURE2_ARCH_2_07 | \
76 static void (*init_pmu_registers)(void);
78 static void __restore_cpu_cpufeatures(void)
80 mtspr(SPRN_LPCR, system_registers.lpcr);
84 mtspr(SPRN_HFSCR, system_registers.hfscr);
85 mtspr(SPRN_PCR, system_registers.pcr);
87 mtspr(SPRN_FSCR, system_registers.fscr);
89 if (init_pmu_registers)
93 static char dt_cpu_name[64];
95 static struct cpu_spec __initdata base_cpu_spec = {
97 .cpu_features = CPU_FTRS_DT_CPU_BASE,
98 .cpu_user_features = COMMON_USER_BASE,
99 .cpu_user_features2 = COMMON_USER2_BASE,
101 .icache_bsize = 32, /* minimum block size, fixed by */
102 .dcache_bsize = 32, /* cache info init. */
104 .pmc_type = PPC_PMC_DEFAULT,
106 .cpu_restore = __restore_cpu_cpufeatures,
107 .machine_check_early = NULL,
111 static void __init cpufeatures_setup_cpu(void)
113 set_cur_cpu_spec(&base_cpu_spec);
115 cur_cpu_spec->pvr_mask = -1;
116 cur_cpu_spec->pvr_value = mfspr(SPRN_PVR);
118 /* Initialize the base environment -- clear FSCR/HFSCR. */
119 hv_mode = !!(mfmsr() & MSR_HV);
121 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
122 mtspr(SPRN_HFSCR, 0);
125 mtspr(SPRN_PCR, PCR_MASK);
128 * LPCR does not get cleared, to match behaviour with secondaries
129 * in __restore_cpu_cpufeatures. Once the idle code is fixed, this
130 * could clear LPCR too.
134 static int __init feat_try_enable_unknown(struct dt_cpu_feature *f)
136 if (f->hv_support == HV_SUPPORT_NONE) {
137 } else if (f->hv_support & HV_SUPPORT_HFSCR) {
138 u64 hfscr = mfspr(SPRN_HFSCR);
139 hfscr |= 1UL << f->hfscr_bit_nr;
140 mtspr(SPRN_HFSCR, hfscr);
142 /* Does not have a known recipe */
146 if (f->os_support == OS_SUPPORT_NONE) {
147 } else if (f->os_support & OS_SUPPORT_FSCR) {
148 u64 fscr = mfspr(SPRN_FSCR);
149 fscr |= 1UL << f->fscr_bit_nr;
150 mtspr(SPRN_FSCR, fscr);
152 /* Does not have a known recipe */
156 if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
157 uint32_t word = f->hwcap_bit_nr / 32;
158 uint32_t bit = f->hwcap_bit_nr % 32;
161 cur_cpu_spec->cpu_user_features |= 1U << bit;
163 cur_cpu_spec->cpu_user_features2 |= 1U << bit;
165 pr_err("%s could not advertise to user (no hwcap bits)\n", f->name);
171 static int __init feat_enable(struct dt_cpu_feature *f)
173 if (f->hv_support != HV_SUPPORT_NONE) {
174 if (f->hfscr_bit_nr != -1) {
175 u64 hfscr = mfspr(SPRN_HFSCR);
176 hfscr |= 1UL << f->hfscr_bit_nr;
177 mtspr(SPRN_HFSCR, hfscr);
181 if (f->os_support != OS_SUPPORT_NONE) {
182 if (f->fscr_bit_nr != -1) {
183 u64 fscr = mfspr(SPRN_FSCR);
184 fscr |= 1UL << f->fscr_bit_nr;
185 mtspr(SPRN_FSCR, fscr);
189 if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
190 uint32_t word = f->hwcap_bit_nr / 32;
191 uint32_t bit = f->hwcap_bit_nr % 32;
194 cur_cpu_spec->cpu_user_features |= 1U << bit;
196 cur_cpu_spec->cpu_user_features2 |= 1U << bit;
198 pr_err("CPU feature: %s could not advertise to user (no hwcap bits)\n", f->name);
204 static int __init feat_disable(struct dt_cpu_feature *f)
209 static int __init feat_enable_hv(struct dt_cpu_feature *f)
214 pr_err("CPU feature hypervisor present in device tree but HV mode not enabled in the CPU. Ignoring.\n");
219 mtspr(SPRN_AMOR, ~0);
221 lpcr = mfspr(SPRN_LPCR);
222 lpcr &= ~LPCR_LPES0; /* HV external interrupts */
223 mtspr(SPRN_LPCR, lpcr);
225 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
230 static int __init feat_enable_le(struct dt_cpu_feature *f)
232 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_TRUE_LE;
236 static int __init feat_enable_smt(struct dt_cpu_feature *f)
238 cur_cpu_spec->cpu_features |= CPU_FTR_SMT;
239 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_SMT;
243 static int __init feat_enable_idle_nap(struct dt_cpu_feature *f)
247 /* Set PECE wakeup modes for ISA 207 */
248 lpcr = mfspr(SPRN_LPCR);
252 mtspr(SPRN_LPCR, lpcr);
257 static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
261 /* Set PECE wakeup modes for ISAv3.0B */
262 lpcr = mfspr(SPRN_LPCR);
266 mtspr(SPRN_LPCR, lpcr);
271 static int __init feat_enable_mmu_hash(struct dt_cpu_feature *f)
275 if (!IS_ENABLED(CONFIG_PPC_64S_HASH_MMU))
278 lpcr = mfspr(SPRN_LPCR);
284 lpcr |= 0x10UL << LPCR_VRMASD_SH; /* L=1 LP=00 */
285 mtspr(SPRN_LPCR, lpcr);
287 cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
288 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
293 static int __init feat_enable_mmu_hash_v3(struct dt_cpu_feature *f)
297 if (!IS_ENABLED(CONFIG_PPC_64S_HASH_MMU))
300 lpcr = mfspr(SPRN_LPCR);
301 lpcr &= ~(LPCR_ISL | LPCR_UPRT | LPCR_HR);
302 mtspr(SPRN_LPCR, lpcr);
304 cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
305 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
311 static int __init feat_enable_mmu_radix(struct dt_cpu_feature *f)
313 if (!IS_ENABLED(CONFIG_PPC_RADIX_MMU))
316 cur_cpu_spec->mmu_features |= MMU_FTR_KERNEL_RO;
317 cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
318 cur_cpu_spec->mmu_features |= MMU_FTR_GTSE;
319 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
324 static int __init feat_enable_dscr(struct dt_cpu_feature *f)
329 * Linux relies on FSCR[DSCR] being clear, so that we can take the
330 * facility unavailable interrupt and track the task's usage of DSCR.
331 * See facility_unavailable_exception().
332 * Clear the bit here so that feat_enable() doesn't set it.
338 lpcr = mfspr(SPRN_LPCR);
340 lpcr |= (4UL << LPCR_DPFD_SH);
341 mtspr(SPRN_LPCR, lpcr);
346 static void __init hfscr_pmu_enable(void)
348 u64 hfscr = mfspr(SPRN_HFSCR);
349 hfscr |= PPC_BIT(60);
350 mtspr(SPRN_HFSCR, hfscr);
353 static void init_pmu_power8(void)
356 mtspr(SPRN_MMCRC, 0);
357 mtspr(SPRN_MMCRH, 0);
360 mtspr(SPRN_MMCRA, 0);
361 mtspr(SPRN_MMCR0, MMCR0_FC);
362 mtspr(SPRN_MMCR1, 0);
363 mtspr(SPRN_MMCR2, 0);
364 mtspr(SPRN_MMCRS, 0);
367 static int __init feat_enable_mce_power8(struct dt_cpu_feature *f)
369 cur_cpu_spec->platform = "power8";
370 cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p8;
375 static int __init feat_enable_pmu_power8(struct dt_cpu_feature *f)
380 init_pmu_registers = init_pmu_power8;
382 cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
383 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
384 if (pvr_version_is(PVR_POWER8E))
385 cur_cpu_spec->cpu_features |= CPU_FTR_PMAO_BUG;
387 cur_cpu_spec->num_pmcs = 6;
388 cur_cpu_spec->pmc_type = PPC_PMC_IBM;
393 static void init_pmu_power9(void)
396 mtspr(SPRN_MMCRC, 0);
398 mtspr(SPRN_MMCRA, 0);
399 mtspr(SPRN_MMCR0, MMCR0_FC);
400 mtspr(SPRN_MMCR1, 0);
401 mtspr(SPRN_MMCR2, 0);
404 static int __init feat_enable_mce_power9(struct dt_cpu_feature *f)
406 cur_cpu_spec->platform = "power9";
407 cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p9;
412 static int __init feat_enable_pmu_power9(struct dt_cpu_feature *f)
417 init_pmu_registers = init_pmu_power9;
419 cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
420 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
422 cur_cpu_spec->num_pmcs = 6;
423 cur_cpu_spec->pmc_type = PPC_PMC_IBM;
428 static void init_pmu_power10(void)
432 mtspr(SPRN_MMCR3, 0);
433 mtspr(SPRN_MMCRA, MMCRA_BHRB_DISABLE);
434 mtspr(SPRN_MMCR0, MMCR0_FC | MMCR0_PMCCEXT);
437 static int __init feat_enable_pmu_power10(struct dt_cpu_feature *f)
442 init_pmu_registers = init_pmu_power10;
444 cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
445 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
447 cur_cpu_spec->num_pmcs = 6;
448 cur_cpu_spec->pmc_type = PPC_PMC_IBM;
453 static int __init feat_enable_mce_power10(struct dt_cpu_feature *f)
455 cur_cpu_spec->platform = "power10";
456 cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p10;
461 static int __init feat_enable_mce_power11(struct dt_cpu_feature *f)
463 cur_cpu_spec->platform = "power11";
464 cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p10;
469 static int __init feat_enable_tm(struct dt_cpu_feature *f)
471 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
473 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NOSC;
479 static int __init feat_enable_fp(struct dt_cpu_feature *f)
482 cur_cpu_spec->cpu_features &= ~CPU_FTR_FPU_UNAVAILABLE;
487 static int __init feat_enable_vector(struct dt_cpu_feature *f)
489 #ifdef CONFIG_ALTIVEC
491 cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
492 cur_cpu_spec->cpu_features |= CPU_FTR_VMX_COPY;
493 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
500 static int __init feat_enable_vsx(struct dt_cpu_feature *f)
504 cur_cpu_spec->cpu_features |= CPU_FTR_VSX;
505 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_VSX;
512 static int __init feat_enable_purr(struct dt_cpu_feature *f)
514 cur_cpu_spec->cpu_features |= CPU_FTR_PURR | CPU_FTR_SPURR;
519 static int __init feat_enable_ebb(struct dt_cpu_feature *f)
522 * PPC_FEATURE2_EBB is enabled in PMU init code because it has
523 * historically been related to the PMU facility. This may have
524 * to be decoupled if EBB becomes more generic. For now, follow
525 * existing convention.
527 f->hwcap_bit_nr = -1;
533 static int __init feat_enable_dbell(struct dt_cpu_feature *f)
537 /* P9 has an HFSCR for privileged state */
540 cur_cpu_spec->cpu_features |= CPU_FTR_DBELL;
542 lpcr = mfspr(SPRN_LPCR);
543 lpcr |= LPCR_PECEDH; /* hyp doorbell wakeup */
544 mtspr(SPRN_LPCR, lpcr);
549 static int __init feat_enable_hvi(struct dt_cpu_feature *f)
554 * POWER9 XIVE interrupts including in OPAL XICS compatibility
555 * are always delivered as hypervisor virtualization interrupts (HVI)
558 * However LPES0 is not set here, in the chance that an EE does get
559 * delivered to the host somehow, the EE handler would not expect it
560 * to be delivered in LPES0 mode (e.g., using SRR[01]). This could
561 * happen if there is a bug in interrupt controller code, or IC is
562 * misconfigured in systemsim.
565 lpcr = mfspr(SPRN_LPCR);
566 lpcr |= LPCR_HVICE; /* enable hvi interrupts */
567 lpcr |= LPCR_HEIC; /* disable ee interrupts when MSR_HV */
568 lpcr |= LPCR_PECE_HVEE; /* hvi can wake from stop */
569 mtspr(SPRN_LPCR, lpcr);
574 static int __init feat_enable_large_ci(struct dt_cpu_feature *f)
576 cur_cpu_spec->mmu_features |= MMU_FTR_CI_LARGE_PAGE;
581 static int __init feat_enable_mma(struct dt_cpu_feature *f)
586 pcr = mfspr(SPRN_PCR);
588 mtspr(SPRN_PCR, pcr);
593 struct dt_cpu_feature_match {
595 int (*enable)(struct dt_cpu_feature *f);
596 u64 cpu_ftr_bit_mask;
599 static struct dt_cpu_feature_match __initdata
600 dt_cpu_feature_match_table[] = {
601 {"hypervisor", feat_enable_hv, 0},
602 {"big-endian", feat_enable, 0},
603 {"little-endian", feat_enable_le, CPU_FTR_REAL_LE},
604 {"smt", feat_enable_smt, 0},
605 {"interrupt-facilities", feat_enable, 0},
606 {"system-call-vectored", feat_enable, 0},
607 {"timer-facilities", feat_enable, 0},
608 {"timer-facilities-v3", feat_enable, 0},
609 {"debug-facilities", feat_enable, 0},
610 {"come-from-address-register", feat_enable, CPU_FTR_CFAR},
611 {"branch-tracing", feat_enable, 0},
612 {"floating-point", feat_enable_fp, 0},
613 {"vector", feat_enable_vector, 0},
614 {"vector-scalar", feat_enable_vsx, 0},
615 {"vector-scalar-v3", feat_enable, 0},
616 {"decimal-floating-point", feat_enable, 0},
617 {"decimal-integer", feat_enable, 0},
618 {"quadword-load-store", feat_enable, 0},
619 {"vector-crypto", feat_enable, 0},
620 {"mmu-hash", feat_enable_mmu_hash, 0},
621 {"mmu-radix", feat_enable_mmu_radix, 0},
622 {"mmu-hash-v3", feat_enable_mmu_hash_v3, 0},
623 {"virtual-page-class-key-protection", feat_enable, 0},
624 {"transactional-memory", feat_enable_tm, CPU_FTR_TM},
625 {"transactional-memory-v3", feat_enable_tm, 0},
626 {"tm-suspend-hypervisor-assist", feat_enable, CPU_FTR_P9_TM_HV_ASSIST},
627 {"tm-suspend-xer-so-bug", feat_enable, CPU_FTR_P9_TM_XER_SO_BUG},
628 {"idle-nap", feat_enable_idle_nap, 0},
629 /* alignment-interrupt-dsisr ignored */
630 {"idle-stop", feat_enable_idle_stop, 0},
631 {"machine-check-power8", feat_enable_mce_power8, 0},
632 {"performance-monitor-power8", feat_enable_pmu_power8, 0},
633 {"data-stream-control-register", feat_enable_dscr, CPU_FTR_DSCR},
634 {"event-based-branch", feat_enable_ebb, 0},
635 {"target-address-register", feat_enable, 0},
636 {"branch-history-rolling-buffer", feat_enable, 0},
637 {"control-register", feat_enable, CPU_FTR_CTRL},
638 {"processor-control-facility", feat_enable_dbell, CPU_FTR_DBELL},
639 {"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL},
640 {"processor-utilization-of-resources-register", feat_enable_purr, 0},
641 {"no-execute", feat_enable, 0},
642 {"strong-access-ordering", feat_enable, CPU_FTR_SAO},
643 {"cache-inhibited-large-page", feat_enable_large_ci, 0},
644 {"coprocessor-icswx", feat_enable, 0},
645 {"hypervisor-virtualization-interrupt", feat_enable_hvi, 0},
646 {"program-priority-register", feat_enable, CPU_FTR_HAS_PPR},
647 {"wait", feat_enable, 0},
648 {"atomic-memory-operations", feat_enable, 0},
649 {"branch-v3", feat_enable, 0},
650 {"copy-paste", feat_enable, 0},
651 {"decimal-floating-point-v3", feat_enable, 0},
652 {"decimal-integer-v3", feat_enable, 0},
653 {"fixed-point-v3", feat_enable, 0},
654 {"floating-point-v3", feat_enable, 0},
655 {"group-start-register", feat_enable, 0},
656 {"pc-relative-addressing", feat_enable, 0},
657 {"machine-check-power9", feat_enable_mce_power9, 0},
658 {"machine-check-power10", feat_enable_mce_power10, 0},
659 {"machine-check-power11", feat_enable_mce_power11, 0},
660 {"performance-monitor-power9", feat_enable_pmu_power9, 0},
661 {"performance-monitor-power10", feat_enable_pmu_power10, 0},
662 {"performance-monitor-power11", feat_enable_pmu_power10, 0},
663 {"event-based-branch-v3", feat_enable, 0},
664 {"random-number-generator", feat_enable, 0},
665 {"system-call-vectored", feat_disable, 0},
666 {"trace-interrupt-v3", feat_enable, 0},
667 {"vector-v3", feat_enable, 0},
668 {"vector-binary128", feat_enable, 0},
669 {"vector-binary16", feat_enable, 0},
670 {"wait-v3", feat_enable, 0},
671 {"prefix-instructions", feat_enable, 0},
672 {"matrix-multiply-assist", feat_enable_mma, 0},
673 {"debug-facilities-v31", feat_enable, CPU_FTR_DAWR1},
676 static bool __initdata using_dt_cpu_ftrs;
677 static bool __initdata enable_unknown = true;
679 static int __init dt_cpu_ftrs_parse(char *str)
684 if (!strcmp(str, "off"))
685 using_dt_cpu_ftrs = false;
686 else if (!strcmp(str, "known"))
687 enable_unknown = false;
693 early_param("dt_cpu_ftrs", dt_cpu_ftrs_parse);
695 static void __init cpufeatures_setup_start(u32 isa)
697 pr_info("setup for ISA %d\n", isa);
699 if (isa >= ISA_V3_0B) {
700 cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_300;
701 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_00;
704 if (isa >= ISA_V3_1) {
705 cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_31;
706 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_1;
710 static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f)
712 const struct dt_cpu_feature_match *m;
716 for (i = 0; i < ARRAY_SIZE(dt_cpu_feature_match_table); i++) {
717 m = &dt_cpu_feature_match_table[i];
718 if (!strcmp(f->name, m->name)) {
721 cur_cpu_spec->cpu_features |= m->cpu_ftr_bit_mask;
725 pr_info("not enabling: %s (disabled or unsupported by kernel)\n",
731 if (!known && (!enable_unknown || !feat_try_enable_unknown(f))) {
732 pr_info("not enabling: %s (unknown and unsupported by kernel)\n",
738 pr_debug("enabling: %s\n", f->name);
740 pr_debug("enabling: %s (unknown)\n", f->name);
746 * Handle POWER9 broadcast tlbie invalidation issue using
749 static __init void update_tlbie_feature_flag(unsigned long pvr)
751 if (PVR_VER(pvr) == PVR_POWER9) {
753 * Set the tlbie feature flag for anything below
754 * Nimbus DD 2.3 and Cumulus DD 1.3
756 if ((pvr & 0xe000) == 0) {
758 if ((pvr & 0xfff) < 0x203)
759 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
760 } else if ((pvr & 0xc000) == 0) {
762 if ((pvr & 0xfff) < 0x103)
763 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
765 WARN_ONCE(1, "Unknown PVR");
766 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
769 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_ERAT_BUG;
773 static __init void cpufeatures_cpu_quirks(void)
775 unsigned long version = mfspr(SPRN_PVR);
778 * Not all quirks can be derived from the cpufeatures device tree.
780 if ((version & 0xffffefff) == 0x004e0200) {
781 /* DD2.0 has no feature flag */
782 cur_cpu_spec->cpu_features |= CPU_FTR_P9_RADIX_PREFETCH_BUG;
783 cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
784 } else if ((version & 0xffffefff) == 0x004e0201) {
785 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
786 cur_cpu_spec->cpu_features |= CPU_FTR_P9_RADIX_PREFETCH_BUG;
787 cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
788 } else if ((version & 0xffffefff) == 0x004e0202) {
789 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST;
790 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_XER_SO_BUG;
791 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
792 cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
793 } else if ((version & 0xffffefff) == 0x004e0203) {
794 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST;
795 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_XER_SO_BUG;
796 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
797 } else if ((version & 0xffff0000) == 0x004e0000) {
798 /* DD2.1 and up have DD2_1 */
799 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
802 if ((version & 0xffff0000) == 0x004e0000) {
803 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TIDR;
806 update_tlbie_feature_flag(version);
809 static void __init cpufeatures_setup_finished(void)
811 cpufeatures_cpu_quirks();
813 if (hv_mode && !(cur_cpu_spec->cpu_features & CPU_FTR_HVMODE)) {
814 pr_err("hypervisor not present in device tree but HV mode is enabled in the CPU. Enabling.\n");
815 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
818 /* Make sure powerpc_base_platform is non-NULL */
819 powerpc_base_platform = cur_cpu_spec->platform;
821 system_registers.lpcr = mfspr(SPRN_LPCR);
822 system_registers.hfscr = mfspr(SPRN_HFSCR);
823 system_registers.fscr = mfspr(SPRN_FSCR);
824 system_registers.pcr = mfspr(SPRN_PCR);
826 pr_info("final cpu/mmu features = 0x%016lx 0x%08x\n",
827 cur_cpu_spec->cpu_features, cur_cpu_spec->mmu_features);
830 static int __init disabled_on_cmdline(void)
832 unsigned long root, chosen;
835 root = of_get_flat_dt_root();
836 chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
837 if (chosen == -FDT_ERR_NOTFOUND)
840 p = of_get_flat_dt_prop(chosen, "bootargs", NULL);
844 if (strstr(p, "dt_cpu_ftrs=off"))
850 static int __init fdt_find_cpu_features(unsigned long node, const char *uname,
851 int depth, void *data)
853 if (of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features")
854 && of_get_flat_dt_prop(node, "isa", NULL))
860 bool __init dt_cpu_ftrs_in_use(void)
862 return using_dt_cpu_ftrs;
865 bool __init dt_cpu_ftrs_init(void *fdt)
867 using_dt_cpu_ftrs = false;
869 /* Setup and verify the FDT, if it fails we just bail */
870 if (!early_init_dt_verify(fdt))
873 if (!of_scan_flat_dt(fdt_find_cpu_features, NULL))
876 if (disabled_on_cmdline())
879 cpufeatures_setup_cpu();
881 using_dt_cpu_ftrs = true;
885 static int nr_dt_cpu_features;
886 static struct dt_cpu_feature *dt_cpu_features;
888 static int __init process_cpufeatures_node(unsigned long node,
889 const char *uname, int i)
892 struct dt_cpu_feature *f;
895 f = &dt_cpu_features[i];
901 prop = of_get_flat_dt_prop(node, "isa", &len);
903 pr_warn("%s: missing isa property\n", uname);
906 f->isa = be32_to_cpup(prop);
908 prop = of_get_flat_dt_prop(node, "usable-privilege", &len);
910 pr_warn("%s: missing usable-privilege property", uname);
913 f->usable_privilege = be32_to_cpup(prop);
915 prop = of_get_flat_dt_prop(node, "hv-support", &len);
917 f->hv_support = be32_to_cpup(prop);
919 f->hv_support = HV_SUPPORT_NONE;
921 prop = of_get_flat_dt_prop(node, "os-support", &len);
923 f->os_support = be32_to_cpup(prop);
925 f->os_support = OS_SUPPORT_NONE;
927 prop = of_get_flat_dt_prop(node, "hfscr-bit-nr", &len);
929 f->hfscr_bit_nr = be32_to_cpup(prop);
931 f->hfscr_bit_nr = -1;
932 prop = of_get_flat_dt_prop(node, "fscr-bit-nr", &len);
934 f->fscr_bit_nr = be32_to_cpup(prop);
937 prop = of_get_flat_dt_prop(node, "hwcap-bit-nr", &len);
939 f->hwcap_bit_nr = be32_to_cpup(prop);
941 f->hwcap_bit_nr = -1;
943 if (f->usable_privilege & USABLE_HV) {
944 if (!(mfmsr() & MSR_HV)) {
945 pr_warn("%s: HV feature passed to guest\n", uname);
949 if (f->hv_support == HV_SUPPORT_NONE && f->hfscr_bit_nr != -1) {
950 pr_warn("%s: unwanted hfscr_bit_nr\n", uname);
954 if (f->hv_support == HV_SUPPORT_HFSCR) {
955 if (f->hfscr_bit_nr == -1) {
956 pr_warn("%s: missing hfscr_bit_nr\n", uname);
961 if (f->hv_support != HV_SUPPORT_NONE || f->hfscr_bit_nr != -1) {
962 pr_warn("%s: unwanted hv_support/hfscr_bit_nr\n", uname);
967 if (f->usable_privilege & USABLE_OS) {
968 if (f->os_support == OS_SUPPORT_NONE && f->fscr_bit_nr != -1) {
969 pr_warn("%s: unwanted fscr_bit_nr\n", uname);
973 if (f->os_support == OS_SUPPORT_FSCR) {
974 if (f->fscr_bit_nr == -1) {
975 pr_warn("%s: missing fscr_bit_nr\n", uname);
980 if (f->os_support != OS_SUPPORT_NONE || f->fscr_bit_nr != -1) {
981 pr_warn("%s: unwanted os_support/fscr_bit_nr\n", uname);
986 if (!(f->usable_privilege & USABLE_PR)) {
987 if (f->hwcap_bit_nr != -1) {
988 pr_warn("%s: unwanted hwcap_bit_nr\n", uname);
993 /* Do all the independent features in the first pass */
994 if (!of_get_flat_dt_prop(node, "dependencies", &len)) {
995 if (cpufeatures_process_feature(f))
1004 static void __init cpufeatures_deps_enable(struct dt_cpu_feature *f)
1011 if (f->enabled || f->disabled)
1014 prop = of_get_flat_dt_prop(f->node, "dependencies", &len);
1016 pr_warn("%s: missing dependencies property", f->name);
1020 nr_deps = len / sizeof(int);
1022 for (i = 0; i < nr_deps; i++) {
1023 unsigned long phandle = be32_to_cpu(prop[i]);
1026 for (j = 0; j < nr_dt_cpu_features; j++) {
1027 struct dt_cpu_feature *d = &dt_cpu_features[j];
1029 if (of_get_flat_dt_phandle(d->node) == phandle) {
1030 cpufeatures_deps_enable(d);
1039 if (cpufeatures_process_feature(f))
1045 static int __init scan_cpufeatures_subnodes(unsigned long node,
1051 process_cpufeatures_node(node, uname, *count);
1058 static int __init count_cpufeatures_subnodes(unsigned long node,
1069 static int __init dt_cpu_ftrs_scan_callback(unsigned long node, const char
1070 *uname, int depth, void *data)
1076 /* We are scanning "ibm,powerpc-cpu-features" nodes only */
1077 if (!of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features"))
1080 prop = of_get_flat_dt_prop(node, "isa", NULL);
1082 /* We checked before, "can't happen" */
1085 isa = be32_to_cpup(prop);
1087 /* Count and allocate space for cpu features */
1088 of_scan_flat_dt_subnodes(node, count_cpufeatures_subnodes,
1089 &nr_dt_cpu_features);
1090 dt_cpu_features = memblock_alloc(sizeof(struct dt_cpu_feature) * nr_dt_cpu_features, PAGE_SIZE);
1091 if (!dt_cpu_features)
1092 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
1094 sizeof(struct dt_cpu_feature) * nr_dt_cpu_features,
1097 cpufeatures_setup_start(isa);
1099 /* Scan nodes into dt_cpu_features and enable those without deps */
1101 of_scan_flat_dt_subnodes(node, scan_cpufeatures_subnodes, &count);
1103 /* Recursive enable remaining features with dependencies */
1104 for (i = 0; i < nr_dt_cpu_features; i++) {
1105 struct dt_cpu_feature *f = &dt_cpu_features[i];
1107 cpufeatures_deps_enable(f);
1110 prop = of_get_flat_dt_prop(node, "display-name", NULL);
1111 if (prop && strlen((char *)prop) != 0) {
1112 strscpy(dt_cpu_name, (char *)prop, sizeof(dt_cpu_name));
1113 cur_cpu_spec->cpu_name = dt_cpu_name;
1116 cpufeatures_setup_finished();
1118 memblock_free(dt_cpu_features,
1119 sizeof(struct dt_cpu_feature) * nr_dt_cpu_features);
1124 void __init dt_cpu_ftrs_scan(void)
1126 if (!using_dt_cpu_ftrs)
1129 of_scan_flat_dt(dt_cpu_ftrs_scan_callback, NULL);