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drm/i915/cnl: Add missing type case.
2017-07-11 Rodrigo Vividrm/i915/cnl: Add missing type case.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...msgid/20170710205852.28352-1-rodrigo.vivi@intel.com
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2017-07-10 Rodrigo Vividrm/i915/cnl: Add max allowed Cannonlake DC.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1499373908-26761-1-git-send-email-rodrigo.vivi@intel.com
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2017-07-07 Rodrigo Vividrm/i915/cnl: Get DDI clock based on PLLs.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1499374321-31152-1-git-send-email-rodrigo.vivi@intel.com
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2017-07-07 Rodrigo Vividrm/i915/cnl: Inherit RPS stuff from previous platforms.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1499373673-25066-1-git-send-email-rodrigo.vivi@intel.com
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2017-07-07 Rodrigo Vividrm/i915/cnl: Gen10 render context size.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1499375184-5725-1-git-send-email-rodrigo.vivi@intel.com
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2017-07-07 Rodrigo Vividrm/i915/cnl: Don't trust VBT's alternate pin for port...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1499375295-6454-1-git-send-email-rodrigo.vivi@intel.com
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2017-07-06 Rodrigo Vividrm/i915/cnl: Cannonlake color init.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1499374873-2454-1-git-send-email-rodrigo.vivi@intel.com
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2017-07-06 Rodrigo Vividrm/i915/cnl: Add force wake for gen10+.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1499302831-17773-1-git-send-email-rodrigo.vivi@intel.com
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2017-07-06 Paulo Zanonix86/gpu: CNL uses the same GMS values as SKL
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1499302845-17856-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-30 Navare, Manasi Ddrm/i915/cnl: Fix the CURSOR_COEFF_MASK used in DDI...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-06-29 Rodrigo Vividrm/i915/cfl: Fix Workarounds.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-06-19 Rodrigo Vividrm/i915/cnl: Fix RMW on ddi vswing sequence.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497897572-22520-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-16 Rodrigo Vividrm/i915/cfl: Introduce Coffee Lake workarounds.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497653398-15722-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-15 Rodrigo ViviRevert "drm/i915/skl: New ddb allocation algorithm"
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497376350-3400-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915/cfl: Basic DDI plumbing for Coffee Lake.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497045770-21302-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Kahola, Mikadrm/i915/cnl: Enable wrpll computation for CNL
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-18-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915/cnl: LSPCON support is gen9+
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-17-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915/cnl: Enable fifo underrun for Cannonlake.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-16-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915/cnl: Fix Cannonlake scaler mode programing.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-15-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915: Use HAS_CSR instead of gen number on DMC...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-14-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Anusha Srivatsadrm/i915/DMC/CNL: Load DMC on CNL
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-13-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Clint Taylordrm/i915/cnl: Enable loadgen_select bit for vswing...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-12-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915/cnl: Implement voltage swing sequence.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-11-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915/cnl: Add DDI Buffer translation tables for...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-10-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915/cnl: Add registers related to voltage swing...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-9-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915: Add MMIO helper for 6 ports with different...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-8-git-send-email-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-06-12 Rodrigo Vividrm/i915/cnl: Initialize PLLs
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-7-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Kahola, Mikadrm/i915: Configure DPLL's for Cannonlake
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-6-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915/cnl: DDI - PLL mapping
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-5-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Rodrigo Vividrm/i915/cnl: Allow dynamic cdclk changes on CNL
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-4-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Ville Syrjälädrm/i915/cnl: Implement CNL display init/unit sequence
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-3-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Ville Syrjälädrm/i915/cnl: Implement .set_cdclk() for CNL
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-2-git-send-email-rodrigo.vivi@intel.com
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2017-06-12 Ville Syrjälädrm/i915/cnl: Implement .get_display_clock_speed()...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497047175-27250-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-09 Rodrigo Vividrm/i915/cfl: Coffee Lake reuses Kabylake DMC.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1497038550-30910-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-09 Anusha Srivatsadrm/i915/huc: Load HuC on Coffee Lake
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-06-09 Anusha Srivatsadrm/i915/guc: Load GuC on Coffee Lake
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-06-09 Anusha Srivatsadrm/i915/cfl: Add Coffee Lake PCI IDs for U Sku.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-06-09 Anusha Srivatsadrm/i915/cfl: Add Coffee Lake PCI IDs for H Sku.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-06-09 Anusha Srivatsadrm/i915/cfl: Add Coffee Lake PCI IDs for S Skus.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-06-08 Rodrigo Vividrm/i915/cfl: Introduce Display workarounds for Coffee...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496937000-8450-3-git-send-email-rodrigo.vivi@intel.com
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2017-06-08 Rodrigo Vividrm/i915/cfl: Coffee Lake uses CNP PCH.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496937000-8450-2-git-send-email-rodrigo.vivi@intel.com
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2017-06-08 Rodrigo Vividrm/i915/cfl: Introduce Coffee Lake platform definition.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496937000-8450-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Rodrigo Vividrm/i915: Unify GT* and GT3 definitions
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496765166-7068-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Rodrigo Vividrm/i915: Remove unnecessary PORT3 definition.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496700722-13755-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Rodrigo Vividrm/i915/cnl: Also need power well sanitize.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496781040-20888-11-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Ville Syrjälädrm/i915/cnl: Add power wells for CNL
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496781040-20888-10-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Michel Thierrydrm/i915/gen10: Set value of Indirect Context Offset...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496781040-20888-9-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Rodrigo Vividrm/i915/cnl: Cannonlake has same MOCS table than Skylake.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496781040-20888-8-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Rodrigo Vividrm/i915/cnl: Configure EU slice power gating.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496781040-20888-7-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 James Irwindrm/i915/cnl: Cannonlake has 4 planes (3 sprites) per...
...1496781040-20888-6-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Paulo Zanonidrm/i915/cnl: add IS_CNL_REVID macro
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496781040-20888-5-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Rodrigo Vividrm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496781040-20888-4-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Rodrigo Vividrm/i915/cnl: Add Cannonlake PCI IDs for U-skus.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496781040-20888-3-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Rodrigo Vividrm/i915/cnl: Cannonlake uses CNP PCH.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496781040-20888-2-git-send-email-rodrigo.vivi@intel.com
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2017-06-07 Rodrigo Vividrm/i915/cnl: Introduce Cannonlake platform defition.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496781040-20888-1-git-send-email-rodrigo.vivi@intel.com
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2017-06-02 Rodrigo Vividrm/i915/cnp: Panel Power sequence changes for CNP...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496434004-29812-6-git-send-email-rodrigo.vivi@intel.com
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2017-06-02 Rodrigo Vividrm/i915/cnp: add CNP gmbus support
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496434004-29812-5-git-send-email-rodrigo.vivi@intel.com
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2017-06-02 Rodrigo Vividrm/i915/cnp: Backlight support for CNP.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496434004-29812-4-git-send-email-rodrigo.vivi@intel.com
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2017-06-02 Rodrigo Vividrm/i915/cnp: Get/set proper Raw clock frequency on...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496434004-29812-3-git-send-email-rodrigo.vivi@intel.com
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2017-06-02 Dhinakaran Pandiyandrm/i915/cnp: Add PCI ID for Cannonpoint LP PCH
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496434004-29812-2-git-send-email-rodrigo.vivi@intel.com
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2017-06-02 Rodrigo Vividrm/i915/cnp: Introduce Cannonpoint PCH.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1496434004-29812-1-git-send-email-rodrigo.vivi@intel.com
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2017-05-30 Nagaraju, Vathsaladrm/i915/psr: disable psr2 for resolution greater than...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-24 Rodrigo Vividrm/i915: Introduce IS_GEN9_BC for Skylake and Kabylake.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1485196357-30599-2-git-send-email-rodrigo.vivi@intel.com
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2017-01-24 Rodrigo Vividrm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1485196357-30599-1-git-send-email-rodrigo.vivi@intel.com
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2017-01-13 Nagaraju, Vathsaladrm/i915/psr: report live PSR2 State
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-13 Nagaraju, Vathsaladrm/i915/psr: enable psr2 for y cordinate panels
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-13 Nagaraju, Vathsaladrm/i915/psr: set PSR_MASK bits for deep sleep
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-13 Nagaraju, Vathsaladrm/i915/psr: set CHICKEN_TRANS for psr2
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-13 Nagaraju, Vathsaladrm/i915/psr: enable ALPM for psr2
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-13 Nagaraju, Vathsaladrm/i915/psr: disable aux_frame_sync on psr2 exit
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-13 Nagaraju, Vathsaladrm/i915/psr: fix blank screen issue for psr2
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-10 Nagaraju, Vathsaladrm/i915/psr: disable psr2 for resolution greater than...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Suggested-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-10 Nagaraju, Vathsaladrm/i915/psr: program vsc header for psr2
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-10 Nagaraju, Vathsaladrm : adds Y-coordinate and Colorimetry Format
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2017-01-03 Rodrigo Vividrm/i915: Update SKL SRV GT4 pci ids reference.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1483471672-10450-1-git-send-email-rodrigo.vivi@intel.com
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2016-12-20 Rodrigo Vividrm/i915: Remove useless VLV_FEATURE Macro.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1482184508-18346-1-git-send-email-rodrigo.vivi@intel.com
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2016-12-19 Rodrigo Vividrm/i915: Simplify gem stolen initialization.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1482174347-24911-1-git-send-email-rodrigo.vivi@intel.com
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2016-12-19 Rodrigo Vividrm/i915: Rename get stolen functions for LP platforms...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1482096988-400-2-git-send-email-rodrigo.vivi@intel.com
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2016-12-19 Rodrigo Vividrm/i915: Expand is_lp backwards to gen8_lp and gen7_lp.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1482096988-400-1-git-send-email-rodrigo.vivi@intel.com
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2016-12-10 Nagaraju, Vathsaladrm/i915/psr: report psr2 hw enabled from psr2_ctl
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-12-02 Rodrigo Vividrm/i915: Only poll DW3_A when init DDI PHY for ports...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1479410256-25735-1-git-send-email-rodrigo.vivi@intel.com
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2016-10-26 Anusha Srivatsadrm/i915/DMC/KBL: Load DMC on KBL using the no_stepping_info...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-10-20 Rodrigo Vividrm/i915: KBL - Recommended buffer translation programming...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1476806256-13318-1-git-send-email-rodrigo.vivi@intel.com
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2016-10-20 Rodrigo Vividrm/i915: Move down skl/kbl ddi iboost and n_edp_entires...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...1475258757-29540-1-git-send-email-rodrigo.vivi@intel.com
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2016-09-22 Pandiyan, Dhinakarandrm/i915/dp: DP audio API changes for MST
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-21 Libin Yangdrm/i915: start adding dp mst audio
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-21 Pandiyan, Dhinakarandrm/i915: Move audio_connector to intel_encoder
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-21 Pandiyan, Dhinakarandrm/i915: Switch to using port stored in intel_encoder
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-21 Pandiyan, Dhinakarandrm/i915: Store port enum in intel_encoder
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-21 Pandiyan, Dhinakarandrm/i915: Standardize port type for DVO encoders
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-13 Navare, Manasi Ddrm/i915: Add support for Kabylake to function obtaining...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-09 Navare, Manasi Ddrm/i915: Make DP link training channel equalization...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-09 Dhinakaran Pandiyandrm/dp/i915: Make clock recovery in the link training...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-09 Dhinakaran Pandiyandrm/i915/dp: Move max. vswing check to it's own function
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-09 Jim Bridedrm/i915/dp: Add a standalone function to obtain shared...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-07 Carlos Santadrm/i915: Move HAS_GUC definition to platform definition
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-07 Carlos Santadrm/i915: Make HWS_NEEDS_PHYSICAL the exception
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-07 Carlos Santadrm/i915: Move HAS_GMCH_DISPLAY definition to platform
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-07 Carlos Santadrm/i915: Move HAS_L3_DPF definition to platform definition
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2016-09-07 Carlos Santadrm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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