[ARM] 4192/1: AT91: Support for AT91SAM9XE processors.
authorAndrew Victor <andrew@sanpeople.com>
Thu, 15 Feb 2007 07:17:38 +0000 (08:17 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 15 Feb 2007 15:33:31 +0000 (15:33 +0000)
Add support for the Atmel AT91SAM9XE range of processors.  These are
basically AT91SAM9260's with different amounts of internal SRAM and
Flash.

We make use of the existing AT91SAM9260 support, but just perform
run-time detection of the size of the internal SRAM.

Original patch from Nicolas Ferre.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-at91/Kconfig
arch/arm/mach-at91/at91sam9260.c
include/asm-arm/arch-at91/at91_dbgu.h
include/asm-arm/arch-at91/at91sam9260.h
include/asm-arm/arch-at91/cpu.h

index 9313888d77c9b9a5a28a74b553cdf4870dde91a2..bf0d96272e3a01b88063996fad0d4eeedef24afd 100644 (file)
@@ -9,7 +9,7 @@ config ARCH_AT91RM9200
        bool "AT91RM9200"
 
 config ARCH_AT91SAM9260
-       bool "AT91SAM9260"
+       bool "AT91SAM9260 or AT91SAM9XE"
 
 config ARCH_AT91SAM9261
        bool "AT91SAM9261"
@@ -93,13 +93,22 @@ endif
 
 if ARCH_AT91SAM9260
 
-comment "AT91SAM9260 Board Type"
+comment "AT91SAM9260 Variants"
+
+config ARCH_AT91SAM9260_SAM9XE
+       bool "AT91SAM9XE"
+       depends on ARCH_AT91SAM9260
+       help
+         Select this if you are using Atmel's AT91SAM9XE System-on-Chip.
+         They are basicaly AT91SAM9260s with various sizes of embedded Flash.
+
+comment "AT91SAM9260 / AT91SAM9XE Board Type"
 
 config MACH_AT91SAM9260EK
-       bool "Atmel AT91SAM9260-EK Evaluation Kit"
+       bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit"
        depends on ARCH_AT91SAM9260
        help
-         Select this if you are using Atmel's AT91SAM9260-EK Evaluation Kit.
+         Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
 
 endif
index 86e3a4c4655072cf494d3f10b7f5a98480388140..003c27c2ef6555c0bad029241be0756bb4584f74 100644 (file)
@@ -14,6 +14,7 @@
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/at91sam9260.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
@@ -27,7 +28,11 @@ static struct map_desc at91sam9260_io_desc[] __initdata = {
                .pfn            = __phys_to_pfn(AT91_BASE_SYS),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
-       }, {
+       }
+};
+
+static struct map_desc at91sam9260_sram_desc[] __initdata = {
+       {
                .virtual        = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
                .pfn            = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
                .length         = AT91SAM9260_SRAM0_SIZE,
@@ -37,7 +42,14 @@ static struct map_desc at91sam9260_io_desc[] __initdata = {
                .pfn            = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
                .length         = AT91SAM9260_SRAM1_SIZE,
                .type           = MT_DEVICE,
-       },
+       }
+};
+
+static struct map_desc at91sam9xe_sram_desc[] __initdata = {
+       {
+               .pfn            = __phys_to_pfn(AT91SAM9XE_SRAM_BASE),
+               .type           = MT_DEVICE,
+       }
 };
 
 /* --------------------------------------------------------------------
@@ -255,11 +267,37 @@ static void at91sam9260_reset(void)
  *  AT91SAM9260 processor initialization
  * -------------------------------------------------------------------- */
 
+static void __init at91sam9xe_initialize(void)
+{
+       unsigned long cidr, sram_size;
+
+       cidr = at91_sys_read(AT91_DBGU_CIDR);
+
+       switch (cidr & AT91_CIDR_SRAMSIZ) {
+               case AT91_CIDR_SRAMSIZ_32K:
+                       sram_size = 2 * SZ_16K;
+                       break;
+               case AT91_CIDR_SRAMSIZ_16K:
+               default:
+                       sram_size = SZ_16K;
+       }
+
+       at91sam9xe_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
+       at91sam9xe_sram_desc->length = sram_size;
+
+       iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
+}
+
 void __init at91sam9260_initialize(unsigned long main_clock)
 {
        /* Map peripherals */
        iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
 
+       if (cpu_is_at91sam9xe())
+               at91sam9xe_initialize();
+       else
+               iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
+
        at91_arch_reset = at91sam9260_reset;
        at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
                        | (1 << AT91SAM9260_ID_IRQ2);
index 1002a808ad91fbd9c3bcc66c1284e667d15488c9..b0369e176f7bbd95a3fa333498a77a43b5f136dc 100644 (file)
 #define                AT91_CIDR_NVPSIZ        (0xf  << 8)             /* Nonvolatile Program Memory Size */
 #define                AT91_CIDR_NVPSIZ2       (0xf  << 12)            /* Second Nonvolatile Program Memory Size */
 #define                AT91_CIDR_SRAMSIZ       (0xf  << 16)            /* Internal SRAM Size */
+#define                        AT91_CIDR_SRAMSIZ_1K    (1 << 16)
+#define                        AT91_CIDR_SRAMSIZ_2K    (2 << 16)
+#define                        AT91_CIDR_SRAMSIZ_112K  (4 << 16)
+#define                        AT91_CIDR_SRAMSIZ_4K    (5 << 16)
+#define                        AT91_CIDR_SRAMSIZ_80K   (6 << 16)
+#define                        AT91_CIDR_SRAMSIZ_160K  (7 << 16)
+#define                        AT91_CIDR_SRAMSIZ_8K    (8 << 16)
+#define                        AT91_CIDR_SRAMSIZ_16K   (9 << 16)
+#define                        AT91_CIDR_SRAMSIZ_32K   (10 << 16)
+#define                        AT91_CIDR_SRAMSIZ_64K   (11 << 16)
+#define                        AT91_CIDR_SRAMSIZ_128K  (12 << 16)
+#define                        AT91_CIDR_SRAMSIZ_256K  (13 << 16)
+#define                        AT91_CIDR_SRAMSIZ_96K   (14 << 16)
+#define                        AT91_CIDR_SRAMSIZ_512K  (15 << 16)
 #define                AT91_CIDR_ARCH          (0xff << 20)            /* Architecture Identifier */
 #define                AT91_CIDR_NVPTYP        (7    << 28)            /* Nonvolatile Program Memory Type */
 #define                AT91_CIDR_EXT           (1    << 31)            /* Extension Flag */
index 73d93ae9243ed04d14f4f4e48ee5716fc29650eb..2cadebc36af70fc233fa35c143c52167df5d86ec 100644 (file)
 
 #define AT91SAM9260_UHP_BASE   0x00500000      /* USB Host controller */
 
+#define AT91SAM9XE_FLASH_BASE  0x00200000      /* Internal FLASH base address */
+#define AT91SAM9XE_SRAM_BASE   0x00300000      /* Internal SRAM base address */
+
+
 #if 0
 /*
  * PIO pin definitions (peripheral A/B multiplexing).
index 9efde0dad249e92160eaf18abae0233b869ca50d..d464ca58cdbc07e427180d235f590953c13a2fc1 100644 (file)
@@ -22,6 +22,9 @@
 #define ARCH_ID_AT91SAM9261    0x019703a0
 #define ARCH_ID_AT91SAM9263    0x019607a0
 
+#define ARCH_ID_AT91SAM9XE128  0x329973a0
+#define ARCH_ID_AT91SAM9XE256  0x329a93a0
+#define ARCH_ID_AT91SAM9XE512  0x329aa3a0
 
 static inline unsigned long at91_cpu_identify(void)
 {
@@ -29,6 +32,16 @@ static inline unsigned long at91_cpu_identify(void)
 }
 
 
+#define ARCH_FAMILY_AT91X92    0x09200000
+#define ARCH_FAMILY_AT91SAM9   0x01900000
+#define ARCH_FAMILY_AT91SAM9XE 0x02900000
+
+static inline unsigned long at91_arch_identify(void)
+{
+       return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
+}
+
+
 #ifdef CONFIG_ARCH_AT91RM9200
 #define cpu_is_at91rm9200()    (at91_cpu_identify() == ARCH_ID_AT91RM9200)
 #else
@@ -36,8 +49,10 @@ static inline unsigned long at91_cpu_identify(void)
 #endif
 
 #ifdef CONFIG_ARCH_AT91SAM9260
-#define cpu_is_at91sam9260()   (at91_cpu_identify() == ARCH_ID_AT91SAM9260)
+#define cpu_is_at91sam9xe()    (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
+#define cpu_is_at91sam9260()   ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe())
 #else
+#define cpu_is_at91sam9xe()    (0)
 #define cpu_is_at91sam9260()   (0)
 #endif