ARM: dts: pxa: add clocks
authorRobert Jarzmik <robert.jarzmik@free.fr>
Sat, 7 Feb 2015 12:13:24 +0000 (13:13 +0100)
committerRobert Jarzmik <robert.jarzmik@free.fr>
Tue, 12 May 2015 21:14:26 +0000 (23:14 +0200)
Add clocks to the IPs already described in the pxa device-tree
files. There are more clocks in the clock tree than IPs described in the
current pxa device-tree.

This patch ensures that :
 - the current description is correct
 - the clocks are actually claimed, so that clock framework doesn't
   disable them automatically (unused clocks shutdown)

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
arch/arm/boot/dts/pxa27x.dtsi
arch/arm/boot/dts/pxa2xx.dtsi
arch/arm/boot/dts/pxa3xx.dtsi

index 98b560e76314653c9555b12bde0b8f853e7f763d..96967183d1a504210d504dbe9d5ac4f54ffddd70 100644 (file)
@@ -1,6 +1,6 @@
 /* The pxa3xx skeleton simply augments the 2xx version */
 #include "pxa2xx.dtsi"
-#include "dt-bindings/clock/pxa2xx-clock.h"
+#include "dt-bindings/clock/pxa-clock.h"
 
 / {
        model = "Marvell PXA27x familiy SoC";
                        marvell,intc-nr-irqs = <34>;
                };
 
+               gpio: gpio@40e00000 {
+                       compatible = "intel,pxa27x-gpio";
+                       clocks = <&clks CLK_NONE>;
+               };
+
                pwm0: pwm@40b00000 {
                        compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
                        reg = <0x40b00000 0x10>;
                        #pwm-cells = <1>;
+                       clocks = <&clks CLK_PWM0>;
                };
 
                pwm1: pwm@40b00010 {
                        compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
                        reg = <0x40b00010 0x10>;
                        #pwm-cells = <1>;
+                       clocks = <&clks CLK_PWM1>;
                };
 
                pwm2: pwm@40c00000 {
                        compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
                        reg = <0x40c00000 0x10>;
                        #pwm-cells = <1>;
+                       clocks = <&clks CLK_PWM0>;
                };
 
                pwm3: pwm@40c00010 {
                        compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
                        reg = <0x40c00010 0x10>;
                        #pwm-cells = <1>;
+                       clocks = <&clks CLK_PWM1>;
                };
 
                pwri2c: i2c@40f000180 {
                        compatible = "mrvl,pxa-i2c";
                        reg = <0x40f00180 0x24>;
                        interrupts = <6>;
+                       clocks = <&clks CLK_PWRI2C>;
                        status = "disabled";
                };
+
        };
 
        clocks {
                #size-cells = <1>;
                ranges;
 
-               pxa2xx_clks: pxa2xx_clks@41300004 {
-                       compatible = "marvell,pxa-clocks";
+               clks: pxa2xx_clks@41300004 {
+                       compatible = "marvell,pxa270-clocks";
                        #clock-cells = <1>;
                        status = "okay";
                };
        };
-
 };
index c08f84629aa99c68da033838c8e26c04828e150c..71a0cd7388d16f74c9d290e4645deef086997ab1 100644 (file)
@@ -6,7 +6,8 @@
  * Licensed under GPLv2 or later.
  */
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include "dt-bindings/clock/pxa-clock.h"
 
 / {
        model = "Marvell PXA2xx family SoC";
@@ -79,6 +80,7 @@
                        compatible = "mrvl,pxa-uart";
                        reg = <0x40100000 0x30>;
                        interrupts = <22>;
+                       clocks = <&clks CLK_FFUART>;
                        status = "disabled";
                };
 
@@ -86,6 +88,7 @@
                        compatible = "mrvl,pxa-uart";
                        reg = <0x40200000 0x30>;
                        interrupts = <21>;
+                       clocks = <&clks CLK_BTUART>;
                        status = "disabled";
                };
 
@@ -93,6 +96,7 @@
                        compatible = "mrvl,pxa-uart";
                        reg = <0x40700000 0x30>;
                        interrupts = <20>;
+                       clocks = <&clks CLK_STUART>;
                        status = "disabled";
                };
 
                        compatible = "mrvl,pxa-i2c";
                        reg = <0x40301680 0x30>;
                        interrupts = <18>;
+                       clocks = <&clks CLK_I2C>;
                        #address-cells = <0x1>;
                        #size-cells = <0>;
                        status = "disabled";
index 83bb0eff697b8648b347c4fb936101c03dc6d4d5..c7066ebbdbccb95c62def5cf70c3c73a1ef6e409 100644 (file)
@@ -1,5 +1,5 @@
 /* The pxa3xx skeleton simply augments the 2xx version */
-/include/ "pxa2xx.dtsi"
+#include "pxa2xx.dtsi"
 
 / {
        model = "Marvell PXA3xx familiy SoC";
@@ -10,6 +10,7 @@
                        compatible = "mrvl,pwri2c";
                        reg = <0x40f500c0 0x30>;
                        interrupts = <6>;
+                       clocks = <&clks CLK_PWRI2C>;
                        #address-cells = <0x1>;
                        #size-cells = <0>;
                        status = "disabled";
@@ -19,6 +20,7 @@
                        compatible = "marvell,pxa3xx-nand";
                        reg = <0x43100000 90>;
                        interrupts = <45>;
+                       clocks = <&clks CLK_NAND>;
                        #address-cells = <1>;
                        #size-cells = <1>;      
                        status = "disabled";
@@ -32,6 +34,7 @@
                gpio: gpio@40e00000 {
                        compatible = "intel,pxa3xx-gpio";
                        reg = <0x40e00000 0x10000>;
+                       clocks = <&clks CLK_GPIO>;
                        interrupt-names = "gpio0", "gpio1", "gpio_mux";
                        interrupts = <8 9 10>;
                        gpio-controller;
                        #interrupt-cells = <0x2>;
                };
        };
+
+       clocks {
+              /*
+               * The muxing of external clocks/internal dividers for osc* clock
+               * sources has been hidden under the carpet by now.
+               */
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               clks: pxa3xx_clks@41300004 {
+                       compatible = "marvell,pxa300-clocks";
+                       #clock-cells = <1>;
+                       status = "okay";
+               };
+       };
 };