pinctrl: rockchip: Use common interface for recalced iomux
authorDavid Wu <david.wu@rock-chips.com>
Fri, 21 Jul 2017 06:27:14 +0000 (14:27 +0800)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 14 Aug 2017 13:01:02 +0000 (15:01 +0200)
The other Socs also need the feature of recalced iomux, so
make it as a common interface like iomux route feature.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-rockchip.c

index e831647c56a69bea9998bbc36040f7c0e9679558..fd4e491225dfb0f44fbf2e6ab89adc6d50b75edd 100644 (file)
@@ -76,7 +76,6 @@ enum rockchip_pinctrl_type {
 #define IOMUX_SOURCE_PMU       BIT(2)
 #define IOMUX_UNROUTED         BIT(3)
 #define IOMUX_WIDTH_3BIT       BIT(4)
-#define IOMUX_RECALCED         BIT(5)
 
 /**
  * @type: iomux variant using IOMUX_* constants
@@ -166,6 +165,7 @@ struct rockchip_pin_bank {
        struct pinctrl_gpio_range       grange;
        raw_spinlock_t                  slock;
        u32                             toggle_edge_mode;
+       u32                             recalced_mask;
        u32                             route_mask;
 };
 
@@ -289,6 +289,22 @@ struct rockchip_pin_bank {
                .pull_type[3] = pull3,                                  \
        }
 
+/**
+ * struct rockchip_mux_recalced_data: represent a pin iomux data.
+ * @num: bank number.
+ * @pin: pin number.
+ * @bit: index at register.
+ * @reg: register offset.
+ * @mask: mask bit
+ */
+struct rockchip_mux_recalced_data {
+       u8 num;
+       u8 pin;
+       u8 reg;
+       u8 bit;
+       u8 mask;
+};
+
 /**
  * struct rockchip_mux_recalced_data: represent a pin iomux data.
  * @bank_num: bank number.
@@ -317,6 +333,8 @@ struct rockchip_pin_ctrl {
        int                             pmu_mux_offset;
        int                             grf_drv_offset;
        int                             pmu_drv_offset;
+       struct rockchip_mux_recalced_data *iomux_recalced;
+       u32                             niomux_recalced;
        struct rockchip_mux_route_data *iomux_routes;
        u32                             niomux_routes;
 
@@ -326,8 +344,6 @@ struct rockchip_pin_ctrl {
        void    (*drv_calc_reg)(struct rockchip_pin_bank *bank,
                                    int pin_num, struct regmap **regmap,
                                    int *reg, u8 *bit);
-       void    (*iomux_recalc)(u8 bank_num, int pin, int *reg,
-                               u8 *bit, int *mask);
        int     (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
                                    int pin_num, struct regmap **regmap,
                                    int *reg, u8 *bit);
@@ -382,22 +398,6 @@ struct rockchip_pinctrl {
        unsigned int                    nfunctions;
 };
 
-/**
- * struct rockchip_mux_recalced_data: represent a pin iomux data.
- * @num: bank number.
- * @pin: pin number.
- * @bit: index at register.
- * @reg: register offset.
- * @mask: mask bit
- */
-struct rockchip_mux_recalced_data {
-       u8 num;
-       u8 pin;
-       u8 reg;
-       u8 bit;
-       u8 mask;
-};
-
 static struct regmap_config rockchip_regmap_config = {
        .reg_bits = 32,
        .val_bits = 32,
@@ -557,7 +557,7 @@ static const struct pinctrl_ops rockchip_pctrl_ops = {
  * Hardware access
  */
 
-static const struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
+static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
        {
                .num = 2,
                .pin = 12,
@@ -579,20 +579,22 @@ static const struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
        },
 };
 
-static void rk3328_recalc_mux(u8 bank_num, int pin, int *reg,
-                             u8 *bit, int *mask)
+static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
+                                     int *reg, u8 *bit, int *mask)
 {
-       const struct rockchip_mux_recalced_data *data = NULL;
+       struct rockchip_pinctrl *info = bank->drvdata;
+       struct rockchip_pin_ctrl *ctrl = info->ctrl;
+       struct rockchip_mux_recalced_data *data;
        int i;
 
-       for (i = 0; i < ARRAY_SIZE(rk3328_mux_recalced_data); i++)
-               if (rk3328_mux_recalced_data[i].num == bank_num &&
-                   rk3328_mux_recalced_data[i].pin == pin) {
-                       data = &rk3328_mux_recalced_data[i];
+       for (i = 0; i < ctrl->niomux_recalced; i++) {
+               data = &ctrl->iomux_recalced[i];
+               if (data->num == bank->bank_num &&
+                   data->pin == pin)
                        break;
-               }
+       }
 
-       if (!data)
+       if (i >= ctrl->niomux_recalced)
                return;
 
        *reg = data->reg;
@@ -877,7 +879,6 @@ static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
 {
        struct rockchip_pinctrl *info = bank->drvdata;
-       struct rockchip_pin_ctrl *ctrl = info->ctrl;
        int iomux_num = (pin / 8);
        struct regmap *regmap;
        unsigned int val;
@@ -916,8 +917,8 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
                mask = 0x3;
        }
 
-       if (ctrl->iomux_recalc && (mux_type & IOMUX_RECALCED))
-               ctrl->iomux_recalc(bank->bank_num, pin, &reg, &bit, &mask);
+       if (bank->recalced_mask & BIT(pin))
+               rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
 
        ret = regmap_read(regmap, reg, &val);
        if (ret)
@@ -967,7 +968,6 @@ static int rockchip_verify_mux(struct rockchip_pin_bank *bank,
 static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 {
        struct rockchip_pinctrl *info = bank->drvdata;
-       struct rockchip_pin_ctrl *ctrl = info->ctrl;
        int iomux_num = (pin / 8);
        struct regmap *regmap;
        int reg, ret, mask, mux_type;
@@ -1005,8 +1005,8 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
                mask = 0x3;
        }
 
-       if (ctrl->iomux_recalc && (mux_type & IOMUX_RECALCED))
-               ctrl->iomux_recalc(bank->bank_num, pin, &reg, &bit, &mask);
+       if (bank->recalced_mask & BIT(pin))
+               rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
 
        if (bank->route_mask & BIT(pin)) {
                if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
@@ -2853,6 +2853,16 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(
                        bank_pins += 8;
                }
 
+               /* calculate the per-bank recalced_mask */
+               for (j = 0; j < ctrl->niomux_recalced; j++) {
+                       int pin = 0;
+
+                       if (ctrl->iomux_recalced[j].num == bank->bank_num) {
+                               pin = ctrl->iomux_recalced[j].pin;
+                               bank->recalced_mask |= BIT(pin);
+                       }
+               }
+
                /* calculate the per-bank route_mask */
                for (j = 0; j < ctrl->niomux_routes; j++) {
                        int pin = 0;
@@ -3165,12 +3175,12 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = {
        PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
        PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
        PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0,
-                            IOMUX_WIDTH_3BIT | IOMUX_RECALCED,
-                            IOMUX_WIDTH_3BIT | IOMUX_RECALCED,
+                            IOMUX_WIDTH_3BIT,
+                            IOMUX_WIDTH_3BIT,
                             0),
        PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
                             IOMUX_WIDTH_3BIT,
-                            IOMUX_WIDTH_3BIT | IOMUX_RECALCED,
+                            IOMUX_WIDTH_3BIT,
                             0,
                             0),
 };
@@ -3181,11 +3191,12 @@ static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
                .label                  = "RK3328-GPIO",
                .type                   = RK3288,
                .grf_mux_offset         = 0x0,
+               .iomux_recalced         = rk3328_mux_recalced_data,
+               .niomux_recalced        = ARRAY_SIZE(rk3328_mux_recalced_data),
                .iomux_routes           = rk3328_mux_route_data,
                .niomux_routes          = ARRAY_SIZE(rk3328_mux_route_data),
                .pull_calc_reg          = rk3228_calc_pull_reg_and_bit,
                .drv_calc_reg           = rk3228_calc_drv_reg_and_bit,
-               .iomux_recalc           = rk3328_recalc_mux,
                .schmitt_calc_reg       = rk3328_calc_schmitt_reg_and_bit,
 };