Merge tag 'renesas-soc-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel...
authorOlof Johansson <olof@lixom.net>
Sat, 26 May 2018 21:39:14 +0000 (14:39 -0700)
committerOlof Johansson <olof@lixom.net>
Sat, 26 May 2018 21:39:59 +0000 (14:39 -0700)
Renesas ARM Based SoC Updates for v4.18

* SoC
  - Change platform dependency to ARCH_RENESAS
    This will allow to drop ARCH_SHMOBILE on ARM and ARM64 in the near
    future.
  - Add the to Kconfig RZ/N1D (r9a06g032) SoC
  - Identify R-Car E3 (r8a77990) SoC
  - Identify and add minimal support for RZ/G1C (r8a77470) SoC

* R-Car SYSC
  - Add support for R-Car E3 (r8a77990) SoC
  - Remove unused inclusion of <linux/sys_soc.h>,
  - Make r8a77995_areas[] const.

* R-Car Reset
  - Add support for R-Car E3 (r8a77990) SoC

* Debug-LL
  - Add support for RZ/G1C (r8a77470) SoC

* tag 'renesas-soc-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}
  soc: renesas: rcar-sysc: Add support for R-Car E3 power areas
  arm: shmobile: Add the RZ/N1D (R9A06G032) to the shmobile Kconfig
  arm: shmobile: Change platform dependency to ARCH_RENESAS
  soc: renesas: r8a77995-sysc: Cleanups
  soc: renesas: rcar-rst: Add support for R-Car E3
  soc: renesas: Add r8a77990 SYSC PM Domain Binding Definitions
  soc: renesas: identify R-Car E3
  ARM: debug-ll: Add support for r8a77470
  ARM: shmobile: Add the RZ/N1 arch to the shmobile Kconfig
  ARM: shmobile: r8a77470: basic SoC support
  soc: renesas: rcar-sysc: Add r8a77470 support
  soc: renesas: rcar-rst: Add support for RZ/G1C
  soc: renesas: Identify RZ/G1C

Signed-off-by: Olof Johansson <olof@lixom.net>
19 files changed:
Documentation/devicetree/bindings/arm/shmobile.txt
Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
Documentation/devicetree/bindings/reset/renesas,rst.txt
arch/arm/Kconfig
arch/arm/Kconfig.debug
arch/arm/Makefile
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/setup-rcar-gen2.c
drivers/soc/renesas/Kconfig
drivers/soc/renesas/Makefile
drivers/soc/renesas/r8a77470-sysc.c [new file with mode: 0644]
drivers/soc/renesas/r8a77990-sysc.c [new file with mode: 0644]
drivers/soc/renesas/r8a77995-sysc.c
drivers/soc/renesas/rcar-rst.c
drivers/soc/renesas/rcar-sysc.c
drivers/soc/renesas/rcar-sysc.h
drivers/soc/renesas/renesas-soc.c
include/dt-bindings/power/r8a77470-sysc.h [new file with mode: 0644]
include/dt-bindings/power/r8a77990-sysc.h [new file with mode: 0644]

index d3d1df97834f231c98da1e9027337c692bd4158f..86ac320323a7d27b74fbc133b2f343ef98ae1666 100644 (file)
@@ -21,6 +21,8 @@ SoCs:
     compatible = "renesas,r8a7744"
   - RZ/G1E (R8A77450)
     compatible = "renesas,r8a7745"
+  - RZ/G1C (R8A77470)
+    compatible = "renesas,r8a77470"
   - R-Car M1A (R8A77781)
     compatible = "renesas,r8a7778"
   - R-Car H1 (R8A77790)
index ab399e559257a106448f583dbd7275137d4c5bdb..180ae65be753ae43ecc39a294a3a7163bdb517d5 100644 (file)
@@ -9,6 +9,7 @@ Required properties:
   - compatible: Must contain exactly one of the following:
       - "renesas,r8a7743-sysc" (RZ/G1M)
       - "renesas,r8a7745-sysc" (RZ/G1E)
+      - "renesas,r8a77470-sysc" (RZ/G1C)
       - "renesas,r8a7779-sysc" (R-Car H1)
       - "renesas,r8a7790-sysc" (R-Car H2)
       - "renesas,r8a7791-sysc" (R-Car M2-W)
@@ -20,6 +21,7 @@ Required properties:
       - "renesas,r8a77965-sysc" (R-Car M3-N)
       - "renesas,r8a77970-sysc" (R-Car V3M)
       - "renesas,r8a77980-sysc" (R-Car V3H)
+      - "renesas,r8a77990-sysc" (R-Car E3)
       - "renesas,r8a77995-sysc" (R-Car D3)
   - reg: Address start and address range for the device.
   - #power-domain-cells: Must be 1.
index 294a0dae106a2623160b42dd1d947102095e5a37..67e83b02e10b63e33615e7f516618cfe238c84c3 100644 (file)
@@ -17,6 +17,7 @@ Required properties:
                Examples with soctypes are:
                  - "renesas,r8a7743-rst" (RZ/G1M)
                  - "renesas,r8a7745-rst" (RZ/G1E)
+                 - "renesas,r8a77470-rst" (RZ/G1C)
                  - "renesas,r8a7778-reset-wdt" (R-Car M1A)
                  - "renesas,r8a7779-reset-wdt" (R-Car H1)
                  - "renesas,r8a7790-rst" (R-Car H2)
@@ -29,6 +30,7 @@ Required properties:
                  - "renesas,r8a77965-rst" (R-Car M3-N)
                  - "renesas,r8a77970-rst" (R-Car V3M)
                  - "renesas,r8a77980-rst" (R-Car V3H)
+                 - "renesas,r8a77990-rst" (R-Car E3)
                  - "renesas,r8a77995-rst" (R-Car D3)
   - reg: Address start and address range for the device.
 
index a7f8e7f4b88fdd03ddf30870f41e7b24d5c22322..2d34c0a44877e85b178d8b9d2f354029e6d37883 100644 (file)
@@ -1467,7 +1467,7 @@ config ARM_PSCI
 config ARCH_NR_GPIO
        int
        default 2048 if ARCH_SOCFPGA
-       default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \
+       default 1024 if ARCH_BRCMSTB || ARCH_RENESAS || ARCH_TEGRA || \
                ARCH_ZYNQ
        default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
                SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
index 199ebc1c4538e66700c8e8e2f49d0f5fbfb4c44b..693f84392f1ba0170cb8fb870b2ee9b8aa073d88 100644 (file)
@@ -942,6 +942,13 @@ choice
                  via SCIF0 on Renesas RZ/G1M (R8A7743), R-Car H2 (R8A7790),
                  M2-W (R8A7791), V2H (R8A7792), or M2-N (R8A7793).
 
+       config DEBUG_RCAR_GEN2_SCIF1
+               bool "Kernel low-level debugging messages via SCIF1 on R8A77470"
+               depends on ARCH_R8A77470
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 via SCIF1 on Renesas RZ/G1C (R8A77470).
+
        config DEBUG_RCAR_GEN2_SCIF2
                bool "Kernel low-level debugging messages via SCIF2 on R8A7794"
                depends on ARCH_R8A7794
@@ -1495,6 +1502,7 @@ config DEBUG_LL_INCLUDE
        default "debug/renesas-scif.S" if DEBUG_RCAR_GEN1_SCIF0
        default "debug/renesas-scif.S" if DEBUG_RCAR_GEN1_SCIF2
        default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF0
+       default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF1
        default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF2
        default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF4
        default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA0
@@ -1617,6 +1625,7 @@ config DEBUG_UART_PHYS
        default 0xe6c80000 if DEBUG_RMOBILE_SCIFA4
        default 0xe6e58000 if DEBUG_RCAR_GEN2_SCIF2
        default 0xe6e60000 if DEBUG_RCAR_GEN2_SCIF0
+       default 0xe6e68000 if DEBUG_RCAR_GEN2_SCIF1
        default 0xe6ee0000 if DEBUG_RCAR_GEN2_SCIF4
        default 0xe8008000 if DEBUG_R7S72100_SCIF2
        default 0xf0000be0 if ARCH_EBSA110
@@ -1651,8 +1660,8 @@ config DEBUG_UART_PHYS
                DEBUG_NETX_UART || \
                DEBUG_QCOM_UARTDM || DEBUG_R7S72100_SCIF2 || \
                DEBUG_RCAR_GEN1_SCIF0 || DEBUG_RCAR_GEN1_SCIF2 || \
-               DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \
-               DEBUG_RCAR_GEN2_SCIF4 || \
+               DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF1 || \
+               DEBUG_RCAR_GEN2_SCIF2 || DEBUG_RCAR_GEN2_SCIF4 || \
                DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \
                DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
                DEBUG_S3C64XX_UART || \
index e4e537f27339f7a1574104a4b63ca62b1d65004d..a92f5a876d96839dc5690d823e8f1b64066e5cbc 100644 (file)
@@ -212,7 +212,7 @@ machine-$(CONFIG_ARCH_S3C24XX)              += s3c24xx
 machine-$(CONFIG_ARCH_S3C64XX)         += s3c64xx
 machine-$(CONFIG_ARCH_S5PV210)         += s5pv210
 machine-$(CONFIG_ARCH_SA1100)          += sa1100
-machine-$(CONFIG_ARCH_SHMOBILE)        += shmobile
+machine-$(CONFIG_ARCH_RENESAS)         += shmobile
 machine-$(CONFIG_ARCH_SIRF)            += prima2
 machine-$(CONFIG_ARCH_SOCFPGA)         += socfpga
 machine-$(CONFIG_ARCH_STI)             += sti
index 280e7312a9e1b300d07124239118de2735e2df04..fcc273f127bf71c1ae51b22dd0bafc1b2f0a01da 100644 (file)
@@ -75,6 +75,10 @@ config ARCH_R8A7745
        bool "RZ/G1E (R8A77450)"
        select ARCH_RCAR_GEN2
 
+config ARCH_R8A77470
+       bool "RZ/G1C (R8A77470)"
+       select ARCH_RCAR_GEN2
+
 config ARCH_R8A7778
        bool "R-Car M1A (R8A77781)"
        select ARCH_RCAR_GEN1
@@ -110,6 +114,15 @@ config ARCH_R8A7794
        bool "R-Car E2 (R8A77940)"
        select ARCH_RCAR_GEN2
 
+config ARCH_R9A06G032
+       bool "RZ/N1D (R9A06G032)"
+       select ARCH_RZN1
+
+config ARCH_RZN1
+       bool "RZ/N1 (R9A06G0xx) Family"
+       select ARM_AMBA
+       select CPU_V7
+
 config ARCH_SH73A0
        bool "SH-Mobile AG5 (R8A73A00)"
        select ARCH_RMOBILE
index 4a881026d740a8d3ccb8b59a70a495f498630c9a..88fdc1801d90f9a1ecc7e96516f368bc9c9e898b 100644 (file)
@@ -74,6 +74,7 @@ void __init rcar_gen2_timer_init(void)
        secure_cntvoff_init();
 
        if (of_machine_is_compatible("renesas,r8a7745") ||
+           of_machine_is_compatible("renesas,r8a77470") ||
            of_machine_is_compatible("renesas,r8a7792") ||
            of_machine_is_compatible("renesas,r8a7794")) {
                freq = 260000000 / 8;   /* ZS / 8 */
@@ -206,6 +207,7 @@ MACHINE_END
 static const char * const rz_g1_boards_compat_dt[] __initconst = {
        "renesas,r8a7743",
        "renesas,r8a7745",
+       "renesas,r8a77470",
        NULL,
 };
 
index 3bbe6114a42028d14d8bd87bdca87f46cee681b1..1d824cbd462dc2eaf875b3572e07e282e0ee2614 100644 (file)
@@ -4,9 +4,11 @@ config SOC_RENESAS
        select SOC_BUS
        select RST_RCAR if ARCH_RCAR_GEN1 || ARCH_RCAR_GEN2 || \
                           ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77965 || \
-                          ARCH_R8A77970 || ARCH_R8A77980 || ARCH_R8A77995
+                          ARCH_R8A77970 || ARCH_R8A77980 || ARCH_R8A77990 || \
+                          ARCH_R8A77995
        select SYSC_R8A7743 if ARCH_R8A7743
        select SYSC_R8A7745 if ARCH_R8A7745
+       select SYSC_R8A77470 if ARCH_R8A77470
        select SYSC_R8A7779 if ARCH_R8A7779
        select SYSC_R8A7790 if ARCH_R8A7790
        select SYSC_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
@@ -17,6 +19,7 @@ config SOC_RENESAS
        select SYSC_R8A77965 if ARCH_R8A77965
        select SYSC_R8A77970 if ARCH_R8A77970
        select SYSC_R8A77980 if ARCH_R8A77980
+       select SYSC_R8A77990 if ARCH_R8A77990
        select SYSC_R8A77995 if ARCH_R8A77995
 
 if SOC_RENESAS
@@ -30,6 +33,10 @@ config SYSC_R8A7745
        bool "RZ/G1E System Controller support" if COMPILE_TEST
        select SYSC_RCAR
 
+config SYSC_R8A77470
+       bool "RZ/G1C System Controller support" if COMPILE_TEST
+       select SYSC_RCAR
+
 config SYSC_R8A7779
        bool "R-Car H1 System Controller support" if COMPILE_TEST
        select SYSC_RCAR
@@ -70,6 +77,10 @@ config SYSC_R8A77980
        bool "R-Car V3H System Controller support" if COMPILE_TEST
        select SYSC_RCAR
 
+config SYSC_R8A77990
+       bool "R-Car E3 System Controller support" if COMPILE_TEST
+       select SYSC_RCAR
+
 config SYSC_R8A77995
        bool "R-Car D3 System Controller support" if COMPILE_TEST
        select SYSC_RCAR
index ccb5ec57a262f962e731bad381231aaeff8cd724..7dc0f20d79079be51ca7e07ff278b7650360c0ab 100644 (file)
@@ -5,6 +5,7 @@ obj-$(CONFIG_SOC_RENESAS)       += renesas-soc.o
 # SoC
 obj-$(CONFIG_SYSC_R8A7743)     += r8a7743-sysc.o
 obj-$(CONFIG_SYSC_R8A7745)     += r8a7745-sysc.o
+obj-$(CONFIG_SYSC_R8A77470)    += r8a77470-sysc.o
 obj-$(CONFIG_SYSC_R8A7779)     += r8a7779-sysc.o
 obj-$(CONFIG_SYSC_R8A7790)     += r8a7790-sysc.o
 obj-$(CONFIG_SYSC_R8A7791)     += r8a7791-sysc.o
@@ -15,6 +16,7 @@ obj-$(CONFIG_SYSC_R8A7796)    += r8a7796-sysc.o
 obj-$(CONFIG_SYSC_R8A77965)    += r8a77965-sysc.o
 obj-$(CONFIG_SYSC_R8A77970)    += r8a77970-sysc.o
 obj-$(CONFIG_SYSC_R8A77980)    += r8a77980-sysc.o
+obj-$(CONFIG_SYSC_R8A77990)    += r8a77990-sysc.o
 obj-$(CONFIG_SYSC_R8A77995)    += r8a77995-sysc.o
 
 # Family
diff --git a/drivers/soc/renesas/r8a77470-sysc.c b/drivers/soc/renesas/r8a77470-sysc.c
new file mode 100644 (file)
index 0000000..cfa015e
--- /dev/null
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas RZ/G1C System Controller
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include <linux/bug.h>
+#include <linux/kernel.h>
+
+#include <dt-bindings/power/r8a77470-sysc.h>
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a77470_areas[] __initconst = {
+       { "always-on",      0, 0, R8A77470_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+       { "ca7-scu",    0x100, 0, R8A77470_PD_CA7_SCU,  R8A77470_PD_ALWAYS_ON,
+         PD_SCU },
+       { "ca7-cpu0",   0x1c0, 0, R8A77470_PD_CA7_CPU0, R8A77470_PD_CA7_SCU,
+         PD_CPU_NOCR },
+       { "ca7-cpu1",   0x1c0, 1, R8A77470_PD_CA7_CPU1, R8A77470_PD_CA7_SCU,
+         PD_CPU_NOCR },
+       { "sgx",         0xc0, 0, R8A77470_PD_SGX, R8A77470_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a77470_sysc_info __initconst = {
+       .areas = r8a77470_areas,
+       .num_areas = ARRAY_SIZE(r8a77470_areas),
+};
diff --git a/drivers/soc/renesas/r8a77990-sysc.c b/drivers/soc/renesas/r8a77990-sysc.c
new file mode 100644 (file)
index 0000000..15579eb
--- /dev/null
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas R-Car E3 System Controller
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include <linux/bug.h>
+#include <linux/kernel.h>
+#include <linux/sys_soc.h>
+
+#include <dt-bindings/power/r8a77990-sysc.h>
+
+#include "rcar-sysc.h"
+
+static struct rcar_sysc_area r8a77990_areas[] __initdata = {
+       { "always-on",      0, 0, R8A77990_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+       { "ca53-scu",   0x140, 0, R8A77990_PD_CA53_SCU,  R8A77990_PD_ALWAYS_ON,
+         PD_SCU },
+       { "ca53-cpu0",  0x200, 0, R8A77990_PD_CA53_CPU0, R8A77990_PD_CA53_SCU,
+         PD_CPU_NOCR },
+       { "ca53-cpu1",  0x200, 1, R8A77990_PD_CA53_CPU1, R8A77990_PD_CA53_SCU,
+         PD_CPU_NOCR },
+       { "cr7",        0x240, 0, R8A77990_PD_CR7,      R8A77990_PD_ALWAYS_ON },
+       { "a3vc",       0x380, 0, R8A77990_PD_A3VC,     R8A77990_PD_ALWAYS_ON },
+       { "a2vc1",      0x3c0, 1, R8A77990_PD_A2VC1,    R8A77990_PD_A3VC },
+       { "3dg-a",      0x100, 0, R8A77990_PD_3DG_A,    R8A77990_PD_ALWAYS_ON },
+       { "3dg-b",      0x100, 1, R8A77990_PD_3DG_B,    R8A77990_PD_3DG_A },
+};
+
+static void __init rcar_sysc_fix_parent(struct rcar_sysc_area *areas,
+                                       unsigned int num_areas, u8 id,
+                                       int new_parent)
+{
+       unsigned int i;
+
+       for (i = 0; i < num_areas; i++)
+               if (areas[i].isr_bit == id) {
+                       areas[i].parent = new_parent;
+                       return;
+               }
+}
+
+/* Fixups for R-Car E3 ES1.0 revision */
+static const struct soc_device_attribute r8a77990[] __initconst = {
+       { .soc_id = "r8a77990", .revision = "ES1.0" },
+       { /* sentinel */ }
+};
+
+static int __init r8a77990_sysc_init(void)
+{
+       if (soc_device_match(r8a77990)) {
+               rcar_sysc_fix_parent(r8a77990_areas,
+                                    ARRAY_SIZE(r8a77990_areas),
+                                    R8A77990_PD_3DG_A, R8A77990_PD_3DG_B);
+               rcar_sysc_fix_parent(r8a77990_areas,
+                                    ARRAY_SIZE(r8a77990_areas),
+                                    R8A77990_PD_3DG_B, R8A77990_PD_ALWAYS_ON);
+       }
+
+       return 0;
+}
+
+const struct rcar_sysc_info r8a77990_sysc_info __initconst = {
+       .init = r8a77990_sysc_init,
+       .areas = r8a77990_areas,
+       .num_areas = ARRAY_SIZE(r8a77990_areas),
+};
index f718429cab02393d6454befb30df24393e0b30be..1b2ef415bbe1cbf7f6adccdf36a52abce3ad22e4 100644 (file)
 
 #include <linux/bug.h>
 #include <linux/kernel.h>
-#include <linux/sys_soc.h>
 
 #include <dt-bindings/power/r8a77995-sysc.h>
 
 #include "rcar-sysc.h"
 
-static struct rcar_sysc_area r8a77995_areas[] __initdata = {
+static const struct rcar_sysc_area r8a77995_areas[] __initconst = {
        { "always-on",     0, 0, R8A77995_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
        { "ca53-scu",  0x140, 0, R8A77995_PD_CA53_SCU,  R8A77995_PD_ALWAYS_ON,
          PD_SCU },
index 8e9cb7996ab06c01218f4709c1f9290946295e15..d9c1034e70e94d05d4557d98535aeac873aa51a4 100644 (file)
@@ -44,6 +44,7 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
        /* RZ/G is handled like R-Car Gen2 */
        { .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
        { .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
+       { .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
        /* R-Car Gen1 */
        { .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
        { .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
@@ -59,6 +60,7 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
        { .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
        { .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
        { .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
+       { .compatible = "renesas,r8a77990-rst", .data = &rcar_rst_gen3 },
        { .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
        { /* sentinel */ }
 };
index faf20e71936179170a315e4035ade8dda99ca00c..95120acc4d806da630f49737cca1eede3286edae 100644 (file)
@@ -261,6 +261,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
 #ifdef CONFIG_SYSC_R8A7745
        { .compatible = "renesas,r8a7745-sysc", .data = &r8a7745_sysc_info },
 #endif
+#ifdef CONFIG_SYSC_R8A77470
+       { .compatible = "renesas,r8a77470-sysc", .data = &r8a77470_sysc_info },
+#endif
 #ifdef CONFIG_SYSC_R8A7779
        { .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
 #endif
@@ -293,6 +296,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
 #ifdef CONFIG_SYSC_R8A77980
        { .compatible = "renesas,r8a77980-sysc", .data = &r8a77980_sysc_info },
 #endif
+#ifdef CONFIG_SYSC_R8A77990
+       { .compatible = "renesas,r8a77990-sysc", .data = &r8a77990_sysc_info },
+#endif
 #ifdef CONFIG_SYSC_R8A77995
        { .compatible = "renesas,r8a77995-sysc", .data = &r8a77995_sysc_info },
 #endif
index dcdc9ec8eba79dbf21459089a2bebf3133b4d638..a22e7cf25e309bb5a4700b4b840c83d240804798 100644 (file)
@@ -51,6 +51,7 @@ struct rcar_sysc_info {
 
 extern const struct rcar_sysc_info r8a7743_sysc_info;
 extern const struct rcar_sysc_info r8a7745_sysc_info;
+extern const struct rcar_sysc_info r8a77470_sysc_info;
 extern const struct rcar_sysc_info r8a7779_sysc_info;
 extern const struct rcar_sysc_info r8a7790_sysc_info;
 extern const struct rcar_sysc_info r8a7791_sysc_info;
@@ -61,6 +62,7 @@ extern const struct rcar_sysc_info r8a7796_sysc_info;
 extern const struct rcar_sysc_info r8a77965_sysc_info;
 extern const struct rcar_sysc_info r8a77970_sysc_info;
 extern const struct rcar_sysc_info r8a77980_sysc_info;
+extern const struct rcar_sysc_info r8a77990_sysc_info;
 extern const struct rcar_sysc_info r8a77995_sysc_info;
 
 
index ea71c413c9267d94adabe1f3465c0c4cee53b089..d44d0e687ab8adb3bdcf97537d5ac97aade5c6c6 100644 (file)
@@ -100,6 +100,11 @@ static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
        .id     = 0x4c,
 };
 
+static const struct renesas_soc soc_rz_g1c __initconst __maybe_unused = {
+       .family = &fam_rzg,
+       .id     = 0x53,
+};
+
 static const struct renesas_soc soc_rcar_m1a __initconst __maybe_unused = {
        .family = &fam_rcar_gen1,
 };
@@ -159,6 +164,11 @@ static const struct renesas_soc soc_rcar_v3h __initconst __maybe_unused = {
        .id     = 0x56,
 };
 
+static const struct renesas_soc soc_rcar_e3 __initconst __maybe_unused = {
+       .family = &fam_rcar_gen3,
+       .id     = 0x57,
+};
+
 static const struct renesas_soc soc_rcar_d3 __initconst __maybe_unused = {
        .family = &fam_rcar_gen3,
        .id     = 0x58,
@@ -192,6 +202,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
 #ifdef CONFIG_ARCH_R8A7745
        { .compatible = "renesas,r8a7745",      .data = &soc_rz_g1e },
 #endif
+#ifdef CONFIG_ARCH_R8A77470
+       { .compatible = "renesas,r8a77470",     .data = &soc_rz_g1c },
+#endif
 #ifdef CONFIG_ARCH_R8A7778
        { .compatible = "renesas,r8a7778",      .data = &soc_rcar_m1a },
 #endif
@@ -228,6 +241,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
 #ifdef CONFIG_ARCH_R8A77980
        { .compatible = "renesas,r8a77980",     .data = &soc_rcar_v3h },
 #endif
+#ifdef CONFIG_ARCH_R8A77990
+       { .compatible = "renesas,r8a77990",     .data = &soc_rcar_e3 },
+#endif
 #ifdef CONFIG_ARCH_R8A77995
        { .compatible = "renesas,r8a77995",     .data = &soc_rcar_d3 },
 #endif
diff --git a/include/dt-bindings/power/r8a77470-sysc.h b/include/dt-bindings/power/r8a77470-sysc.h
new file mode 100644 (file)
index 0000000..8bf4db1
--- /dev/null
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77470_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77470_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77470_PD_CA7_CPU0            5
+#define R8A77470_PD_CA7_CPU1            6
+#define R8A77470_PD_SGX                        20
+#define R8A77470_PD_CA7_SCU            21
+
+/* Always-on power area */
+#define R8A77470_PD_ALWAYS_ON          32
+
+#endif /* __DT_BINDINGS_POWER_R8A77470_SYSC_H__ */
diff --git a/include/dt-bindings/power/r8a77990-sysc.h b/include/dt-bindings/power/r8a77990-sysc.h
new file mode 100644 (file)
index 0000000..944d85b
--- /dev/null
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77990_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77990_PD_CA53_CPU0          5
+#define R8A77990_PD_CA53_CPU1          6
+#define R8A77990_PD_CR7                        13
+#define R8A77990_PD_A3VC               14
+#define R8A77990_PD_3DG_A              17
+#define R8A77990_PD_3DG_B              18
+#define R8A77990_PD_CA53_SCU           21
+#define R8A77990_PD_A2VC1              26
+
+/* Always-on power area */
+#define R8A77990_PD_ALWAYS_ON          32
+
+#endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */