arm64: dts: sdm845: Add gpu clock controller node

Add the GPU clock controller nodes as per the example.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index f6af1d02c8e3f15e6905d23af1ef431c4b681c5c..7cf3991b9d54619c7fba1e3b5fc3c97f8c2e7b58 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -7,6 +7,7 @@
 
 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
+#include <dt-bindings/clock/qcom,gpucc-sdm845.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/phy/phy-qcom-qusb2.h>
@@ -1457,6 +1458,16 @@
                        };
                };
 
+               gpucc: clock-controller@5090000 {
+                       compatible = "qcom,sdm845-gpucc";
+                       reg = <0x05090000 0x9000>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+                       clocks = <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "xo";
+               };
+
                sdhc_2: sdhci@8804000 {
                        compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5";
                        reg = <0x8804000 0x1000>;