ARM: CSR: call l2x0_of_init to init L2 cache of SiRFprimaII
authorBarry Song <Baohua.Song@csr.com>
Fri, 16 Sep 2011 02:16:28 +0000 (19:16 -0700)
committerBarry Song <Barry.Song@csr.com>
Mon, 24 Oct 2011 09:54:21 +0000 (02:54 -0700)
Cc: Rob Herring <robherring2@gmail.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
arch/arm/boot/dts/prima2-cb.dts
arch/arm/mach-prima2/l2x0.c

index 17b6737c4ee54e4a1bd224637a8382fe086c5987..34ae3a64ba255a871791e48d7d6cf9edc723e0e2 100644 (file)
                ranges = <0x40000000 0x40000000 0x80000000>;
 
                l2-cache-controller@80040000 {
-                       compatible = "arm,pl310-cache";
+                       compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
                        reg = <0x80040000 0x1000>;
                        interrupts = <59>;
+                       arm,tag-latency = <1 1 1>;
+                       arm,data-latency = <1 1 1>;
+                       arm,filter-ranges = <0 0x40000000>;
                };
 
                intc: interrupt-controller@80020000 {
index 9cda2057bcfbd10d19f8f9db364cfa9e3dd49f03..c99837797d76b6fb3d254c8aaa97cd860cd77e4e 100644 (file)
@@ -8,52 +8,24 @@
 
 #include <linux/init.h>
 #include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/errno.h>
 #include <linux/of.h>
-#include <linux/of_address.h>
 #include <asm/hardware/cache-l2x0.h>
-#include <mach/memory.h>
 
-#define L2X0_ADDR_FILTERING_START       0xC00
-#define L2X0_ADDR_FILTERING_END         0xC04
-
-static struct of_device_id l2x_ids[]  = {
-       { .compatible = "arm,pl310-cache" },
+static struct of_device_id prima2_l2x0_ids[]  = {
+       { .compatible = "sirf,prima2-pl310-cache" },
+       {},
 };
 
-static int __init sirfsoc_of_l2x_init(void)
+static int __init sirfsoc_l2x0_init(void)
 {
        struct device_node *np;
-       void __iomem *sirfsoc_l2x_base;
-
-       np = of_find_matching_node(NULL, l2x_ids);
-       if (!np)
-               panic("unable to find compatible l2x node in dtb\n");
-
-       sirfsoc_l2x_base = of_iomap(np, 0);
-       if (!sirfsoc_l2x_base)
-               panic("unable to map l2x cpu registers\n");
-
-       of_node_put(np);
-
-       if (!(readl_relaxed(sirfsoc_l2x_base + L2X0_CTRL) & 1)) {
-               /*
-                * set the physical memory windows L2 cache will cover
-                */
-               writel_relaxed(PLAT_PHYS_OFFSET + 1024 * 1024 * 1024,
-                       sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END);
-               writel_relaxed(PLAT_PHYS_OFFSET | 0x1,
-                       sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START);
 
-               writel_relaxed(0,
-                       sirfsoc_l2x_base + L2X0_TAG_LATENCY_CTRL);
-               writel_relaxed(0,
-                       sirfsoc_l2x_base + L2X0_DATA_LATENCY_CTRL);
+       np = of_find_matching_node(NULL, prima2_l2x0_ids);
+       if (np) {
+               pr_info("Initializing prima2 L2 cache\n");
+               return l2x0_of_init(0x40000, 0);
        }
-       l2x0_init((void __iomem *)sirfsoc_l2x_base, 0x00040000,
-               0x00000000);
 
        return 0;
 }
-early_initcall(sirfsoc_of_l2x_init);
+early_initcall(sirfsoc_l2x0_init);