crypto: mxs-dcp - Add support for dcp clk
authorLeonard Crestez <leonard.crestez@nxp.com>
Wed, 7 Nov 2018 15:33:32 +0000 (15:33 +0000)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 16 Nov 2018 06:11:03 +0000 (14:11 +0800)
On 6ull and 6sll the DCP block has a clock which needs to be explicitly
enabled.

Add minimal handling for this at probe/remove time.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/mxs-dcp.c

index 4e6ff32f8a7e6f7f595780a4d7eb16ce209b3d07..a2105cf33abb42bbf0b53dd1becc54c7c80a6cc5 100644 (file)
@@ -20,6 +20,7 @@
 #include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/stmp_device.h>
+#include <linux/clk.h>
 
 #include <crypto/aes.h>
 #include <crypto/sha.h>
@@ -82,6 +83,7 @@ struct dcp {
        spinlock_t                      lock[DCP_MAX_CHANS];
        struct task_struct              *thread[DCP_MAX_CHANS];
        struct crypto_queue             queue[DCP_MAX_CHANS];
+       struct clk                      *dcp_clk;
 };
 
 enum dcp_chan {
@@ -1053,11 +1055,24 @@ static int mxs_dcp_probe(struct platform_device *pdev)
        /* Re-align the structure so it fits the DCP constraints. */
        sdcp->coh = PTR_ALIGN(sdcp->coh, DCP_ALIGNMENT);
 
-       /* Restart the DCP block. */
-       ret = stmp_reset_block(sdcp->base);
+       /* DCP clock is optional, only used on some SOCs */
+       sdcp->dcp_clk = devm_clk_get(dev, "dcp");
+       if (IS_ERR(sdcp->dcp_clk)) {
+               if (sdcp->dcp_clk != ERR_PTR(-ENOENT))
+                       return PTR_ERR(sdcp->dcp_clk);
+               sdcp->dcp_clk = NULL;
+       }
+       ret = clk_prepare_enable(sdcp->dcp_clk);
        if (ret)
                return ret;
 
+       /* Restart the DCP block. */
+       ret = stmp_reset_block(sdcp->base);
+       if (ret) {
+               dev_err(dev, "Failed reset\n");
+               goto err_disable_unprepare_clk;
+       }
+
        /* Initialize control register. */
        writel(MXS_DCP_CTRL_GATHER_RESIDUAL_WRITES |
               MXS_DCP_CTRL_ENABLE_CONTEXT_CACHING | 0xf,
@@ -1094,7 +1109,8 @@ static int mxs_dcp_probe(struct platform_device *pdev)
                                                      NULL, "mxs_dcp_chan/sha");
        if (IS_ERR(sdcp->thread[DCP_CHAN_HASH_SHA])) {
                dev_err(dev, "Error starting SHA thread!\n");
-               return PTR_ERR(sdcp->thread[DCP_CHAN_HASH_SHA]);
+               ret = PTR_ERR(sdcp->thread[DCP_CHAN_HASH_SHA]);
+               goto err_disable_unprepare_clk;
        }
 
        sdcp->thread[DCP_CHAN_CRYPTO] = kthread_run(dcp_chan_thread_aes,
@@ -1151,6 +1167,10 @@ err_destroy_aes_thread:
 
 err_destroy_sha_thread:
        kthread_stop(sdcp->thread[DCP_CHAN_HASH_SHA]);
+
+err_disable_unprepare_clk:
+       clk_disable_unprepare(sdcp->dcp_clk);
+
        return ret;
 }
 
@@ -1170,6 +1190,8 @@ static int mxs_dcp_remove(struct platform_device *pdev)
        kthread_stop(sdcp->thread[DCP_CHAN_HASH_SHA]);
        kthread_stop(sdcp->thread[DCP_CHAN_CRYPTO]);
 
+       clk_disable_unprepare(sdcp->dcp_clk);
+
        platform_set_drvdata(pdev, NULL);
 
        global_sdcp = NULL;