Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
authorLinus Torvalds <torvalds@linux-foundation.org>
Tue, 5 Apr 2011 19:29:43 +0000 (12:29 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Tue, 5 Apr 2011 19:29:43 +0000 (12:29 -0700)
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc/pseries: Fix build without CONFIG_HOTPLUG_CPU
  powerpc: Set nr_cpu_ids early and use it to free PACAs
  powerpc/pseries: Don't register global initcall
  powerpc/kexec: Fix mismatched ifdefs for PPC64/SMP.
  edac/mpc85xx: Limit setting/clearing of HID1[RFXE] to e500v1/v2 cores
  powerpc/85xx: Update dts for PCIe memory maps to match u-boot of Px020RDB

arch/powerpc/boot/dts/p1020rdb.dts
arch/powerpc/boot/dts/p2020rdb.dts
arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
arch/powerpc/kernel/crash.c
arch/powerpc/kernel/paca.c
arch/powerpc/kernel/setup-common.c
arch/powerpc/platforms/pseries/setup.c
arch/powerpc/platforms/pseries/smp.c
drivers/edac/mpc85xx_edac.c

index 22f64b62d7f64039020013ab317da0429416f9f9..e0668f87779499775df3b9390869233a002563c1 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * P1020 RDB Device Tree Source
  *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
                reg = <0 0xffe09000 0 0x1000>;
                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                         0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
+                         0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <16 2>;
                #address-cells = <3>;
                reg = <0 0xffe0a000 0 0x1000>;
                bus-range = <0 255>;
-               ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
-                         0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+               ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+                         0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <16 2>;
                        #size-cells = <2>;
                        #address-cells = <3>;
                        device_type = "pci";
-                       ranges = <0x2000000 0x0 0xc0000000
-                                 0x2000000 0x0 0xc0000000
+                       ranges = <0x2000000 0x0 0x80000000
+                                 0x2000000 0x0 0x80000000
                                  0x0 0x20000000
 
                                  0x1000000 0x0 0x0
index da4cb0d8d215b9ba7865d9814617d0c4b53623d5..e2d48fd4416ef5a6b9237869fce4db4b3b991388 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * P2020 RDB Device Tree Source
  *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
                reg = <0 0xffe09000 0 0x1000>;
                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                         0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
+                         0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <25 2>;
                #address-cells = <3>;
                reg = <0 0xffe0a000 0 0x1000>;
                bus-range = <0 255>;
-               ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
-                         0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+               ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+                         0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <26 2>;
                        #size-cells = <2>;
                        #address-cells = <3>;
                        device_type = "pci";
-                       ranges = <0x2000000 0x0 0xc0000000
-                                 0x2000000 0x0 0xc0000000
+                       ranges = <0x2000000 0x0 0x80000000
+                                 0x2000000 0x0 0x80000000
                                  0x0 0x20000000
 
                                  0x1000000 0x0 0x0
index 0fe93d0c8b2e853d2a33a51ab3bb8efe05dbfa97..b69c3a5dc8580706e8348d4bc4a33f8b329d9f8f 100644 (file)
@@ -6,7 +6,7 @@
  * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,
  * eth1, eth2, sdhc, crypto, global-util, pci0.
  *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
                reg = <0 0xffe09000 0 0x1000>;
                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                         0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
+                         0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <25 2>;
index e95a51285328706c71621b0fbde402c71f2f83d2..7a31d46c01b011bdee300b3dfe713983db2fe1b9 100644 (file)
@@ -7,7 +7,7 @@
  *
  * Please note to add "-b 1" for core1's dts compiling.
  *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
                #address-cells = <3>;
                reg = <0 0xffe0a000 0 0x1000>;
                bus-range = <0 255>;
-               ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
-                         0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+               ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+                         0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <26 2>;
                        #size-cells = <2>;
                        #address-cells = <3>;
                        device_type = "pci";
-                       ranges = <0x2000000 0x0 0xc0000000
-                                 0x2000000 0x0 0xc0000000
+                       ranges = <0x2000000 0x0 0x80000000
+                                 0x2000000 0x0 0x80000000
                                  0x0 0x20000000
 
                                  0x1000000 0x0 0x0
index 3d569e2aff18ecc3c3998ca2a6a7bf230755d66a..3d3d416339dd1294ae31380ce0c8474c6eaa3b52 100644 (file)
@@ -163,7 +163,7 @@ static void crash_kexec_prepare_cpus(int cpu)
 }
 
 /* wait for all the CPUs to hit real mode but timeout if they don't come in */
-#ifdef CONFIG_PPC_STD_MMU_64
+#if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP)
 static void crash_kexec_wait_realmode(int cpu)
 {
        unsigned int msecs;
@@ -188,6 +188,8 @@ static void crash_kexec_wait_realmode(int cpu)
        }
        mb();
 }
+#else
+static inline void crash_kexec_wait_realmode(int cpu) {}
 #endif
 
 /*
@@ -344,9 +346,7 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
        crash_save_cpu(regs, crashing_cpu);
        crash_kexec_prepare_cpus(crashing_cpu);
        cpu_set(crashing_cpu, cpus_in_crash);
-#if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP)
        crash_kexec_wait_realmode(crashing_cpu);
-#endif
 
        machine_kexec_mask_interrupts();
 
index f4adf89d7614150a73c44ad8251ae13ad7934b16..10f0aadee95b9f8231d8deb8d2f6d996254fc4b4 100644 (file)
@@ -203,7 +203,7 @@ void __init free_unused_pacas(void)
 {
        int new_size;
 
-       new_size = PAGE_ALIGN(sizeof(struct paca_struct) * num_possible_cpus());
+       new_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpu_ids);
 
        if (new_size >= paca_size)
                return;
index 9d4882a466471c5903ce4ff2f065723e0a5b682f..21f30cb68077f6be97daf30ee5c1f7617571036f 100644 (file)
@@ -509,6 +509,9 @@ void __init smp_setup_cpu_maps(void)
         */
        cpu_init_thread_core_maps(nthreads);
 
+       /* Now that possible cpus are set, set nr_cpu_ids for later use */
+       nr_cpu_ids = find_last_bit(cpumask_bits(cpu_possible_mask),NR_CPUS) + 1;
+
        free_unused_pacas();
 }
 #endif /* CONFIG_SMP */
index c319d04aa79992b25344005f02ad103b9e076a01..000724149089c032c45e375b30a0128e449d6e41 100644 (file)
@@ -378,7 +378,7 @@ static int __init pSeries_init_panel(void)
 
        return 0;
 }
-arch_initcall(pSeries_init_panel);
+machine_arch_initcall(pseries, pSeries_init_panel);
 
 static int pseries_set_dabr(unsigned long dabr)
 {
index d6479f9738f07011da9aa9e3fddbe1a864bfcad8..a509c5292a67a1ad1906e765b30137def31afebb 100644 (file)
@@ -112,10 +112,10 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
 
        /* Fixup atomic count: it exited inside IRQ handler. */
        task_thread_info(paca[lcpu].__current)->preempt_count   = 0;
-
+#ifdef CONFIG_HOTPLUG_CPU
        if (get_cpu_current_state(lcpu) == CPU_STATE_INACTIVE)
                goto out;
-
+#endif
        /* 
         * If the RTAS start-cpu token does not exist then presume the
         * cpu is already spinning.
@@ -130,7 +130,9 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
                return 0;
        }
 
+#ifdef CONFIG_HOTPLUG_CPU
 out:
+#endif
        return 1;
 }
 
@@ -144,16 +146,15 @@ static void __devinit smp_xics_setup_cpu(int cpu)
                vpa_init(cpu);
 
        cpumask_clear_cpu(cpu, of_spin_mask);
+#ifdef CONFIG_HOTPLUG_CPU
        set_cpu_current_state(cpu, CPU_STATE_ONLINE);
        set_default_offline_state(cpu);
-
+#endif
 }
 #endif /* CONFIG_XICS */
 
 static void __devinit smp_pSeries_kick_cpu(int nr)
 {
-       long rc;
-       unsigned long hcpuid;
        BUG_ON(nr < 0 || nr >= NR_CPUS);
 
        if (!smp_startup_cpu(nr))
@@ -165,16 +166,20 @@ static void __devinit smp_pSeries_kick_cpu(int nr)
         * the processor will continue on to secondary_start
         */
        paca[nr].cpu_start = 1;
-
+#ifdef CONFIG_HOTPLUG_CPU
        set_preferred_offline_state(nr, CPU_STATE_ONLINE);
 
        if (get_cpu_current_state(nr) == CPU_STATE_INACTIVE) {
+               long rc;
+               unsigned long hcpuid;
+
                hcpuid = get_hard_smp_processor_id(nr);
                rc = plpar_hcall_norets(H_PROD, hcpuid);
                if (rc != H_SUCCESS)
                        printk(KERN_ERR "Error: Prod to wake up processor %d "
                                                "Ret= %ld\n", nr, rc);
        }
+#endif
 }
 
 static int smp_pSeries_cpu_bootable(unsigned int nr)
index ffb5ad080bee81b765992dfd9cc9fd06ebc09b6d..38ab8e2cd7f4f864500aa3cac45dedb76e51d50c 100644 (file)
@@ -1147,13 +1147,14 @@ static struct platform_driver mpc85xx_mc_err_driver = {
 static void __init mpc85xx_mc_clear_rfxe(void *data)
 {
        orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1);
-       mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~0x20000));
+       mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~HID1_RFXE));
 }
 #endif
 
 static int __init mpc85xx_mc_init(void)
 {
        int res = 0;
+       u32 pvr = 0;
 
        printk(KERN_INFO "Freescale(R) MPC85xx EDAC driver, "
               "(C) 2006 Montavista Software\n");
@@ -1183,12 +1184,17 @@ static int __init mpc85xx_mc_init(void)
 #endif
 
 #ifdef CONFIG_FSL_SOC_BOOKE
-       /*
-        * need to clear HID1[RFXE] to disable machine check int
-        * so we can catch it
-        */
-       if (edac_op_state == EDAC_OPSTATE_INT)
-               on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0);
+       pvr = mfspr(SPRN_PVR);
+
+       if ((PVR_VER(pvr) == PVR_VER_E500V1) ||
+           (PVR_VER(pvr) == PVR_VER_E500V2)) {
+               /*
+                * need to clear HID1[RFXE] to disable machine check int
+                * so we can catch it
+                */
+               if (edac_op_state == EDAC_OPSTATE_INT)
+                       on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0);
+       }
 #endif
 
        return 0;
@@ -1206,7 +1212,12 @@ static void __exit mpc85xx_mc_restore_hid1(void *data)
 static void __exit mpc85xx_mc_exit(void)
 {
 #ifdef CONFIG_FSL_SOC_BOOKE
-       on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
+       u32 pvr = mfspr(SPRN_PVR);
+
+       if ((PVR_VER(pvr) == PVR_VER_E500V1) ||
+           (PVR_VER(pvr) == PVR_VER_E500V2)) {
+               on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
+       }
 #endif
 #ifdef CONFIG_PCI
        platform_driver_unregister(&mpc85xx_pci_err_driver);