clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE
authorDavid Lechner <david@lechnology.com>
Fri, 25 May 2018 18:11:48 +0000 (13:11 -0500)
committerMichael Turquette <mturquette@baylibre.com>
Wed, 30 May 2018 19:48:39 +0000 (12:48 -0700)
PLL0 on davinci/da850-type device needs to be registered early in boot
because it is needed for clocksource/clockevent. Change the driver
to use CLK_OF_DECLARE for this special case.

Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20180525181150.17873-8-david@lechnology.com

drivers/clk/davinci/pll-da850.c
drivers/clk/davinci/pll.c
drivers/clk/davinci/pll.h

index 59cc2e3733f9ab36d99d99deb83d4cffa0943b17..0f7198191ea29d53e1d96633a719dc1f7c5b1632 100644 (file)
@@ -13,6 +13,8 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/mfd/da8xx-cfgchip.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of_address.h>
 #include <linux/of.h>
 #include <linux/types.h>
 
@@ -136,11 +138,22 @@ static const struct davinci_pll_sysclk_info *da850_pll0_sysclk_info[] = {
        NULL
 };
 
-int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip)
+void of_da850_pll0_init(struct device_node *node)
 {
-       return of_davinci_pll_init(dev, dev->of_node, &da850_pll0_info,
-                                  &da850_pll0_obsclk_info,
-                                  da850_pll0_sysclk_info, 7, base, cfgchip);
+       void __iomem *base;
+       struct regmap *cfgchip;
+
+       base = of_iomap(node, 0);
+       if (!base) {
+               pr_err("%s: ioremap failed\n", __func__);
+               return;
+       }
+
+       cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip");
+
+       of_davinci_pll_init(NULL, node, &da850_pll0_info,
+                           &da850_pll0_obsclk_info,
+                           da850_pll0_sysclk_info, 7, base, cfgchip);
 }
 
 static const struct davinci_pll_clk_info da850_pll1_info = {
index 2eb981e61185a9b7ed573beb160cee761a8bed4c..84a343060bc8d11590e95cda62b2b7abd1f35bc0 100644 (file)
@@ -859,8 +859,10 @@ static struct davinci_pll_platform_data *davinci_pll_get_pdata(struct device *de
        return pdata;
 }
 
+/* needed in early boot for clocksource/clockevent */
+CLK_OF_DECLARE(da850_pll0, "ti,da850-pll0", of_da850_pll0_init);
+
 static const struct of_device_id davinci_pll_of_match[] = {
-       { .compatible = "ti,da850-pll0", .data = of_da850_pll0_init },
        { .compatible = "ti,da850-pll1", .data = of_da850_pll1_init },
        { }
 };
index 562652fc0759fa0282abd8e5c01f09393803b52d..b2e5c449664541e7af9a64663a9e0599938ae667 100644 (file)
@@ -123,7 +123,7 @@ int of_davinci_pll_init(struct device *dev, struct device_node *node,
 /* Platform-specific callbacks */
 
 int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
-int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
+void of_da850_pll0_init(struct device_node *node);
 int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
 
 int dm355_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);