arm64: Increase ARCH_DMA_MINALIGN to 128

[sfrench/cifs-2.6.git] / arch / arm64 / include / asm / cache.h

diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h
index 1dd2c2db0010cfdf4fc42526f801bf044263c97d..5df5cfe1c1431a763657a19339150b0f5b788159 100644 (file)
--- a/arch/arm64/include/asm/cache.h
+++ b/arch/arm64/include/asm/cache.h
@@ -43,7 +43,7 @@
  * cache before the transfer is done, causing old data to be seen by
  * the CPU.
  */
-#define ARCH_DMA_MINALIGN      L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN      (128)
 
 #ifndef __ASSEMBLY__
 
@@ -77,7 +77,7 @@ static inline u32 cache_type_cwg(void)
 static inline int cache_line_size(void)
 {
        u32 cwg = cache_type_cwg();
-       return cwg ? 4 << cwg : L1_CACHE_BYTES;
+       return cwg ? 4 << cwg : ARCH_DMA_MINALIGN;
 }
 
 #endif /* __ASSEMBLY__ */