Merge branches 'acpi-scan', 'acpi-tables', 'acpi-misc' and 'acpi-pm'
[sfrench/cifs-2.6.git] / tools / power / x86 / turbostat / turbostat.c
1 /*
2  * turbostat -- show CPU frequency and C-state residency
3  * on modern Intel and AMD processors.
4  *
5  * Copyright (c) 2013 Intel Corporation.
6  * Len Brown <len.brown@intel.com>
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms and conditions of the GNU General Public License,
10  * version 2, as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20  */
21
22 #define _GNU_SOURCE
23 #include MSRHEADER
24 #include INTEL_FAMILY_HEADER
25 #include <stdarg.h>
26 #include <stdio.h>
27 #include <err.h>
28 #include <unistd.h>
29 #include <sys/types.h>
30 #include <sys/wait.h>
31 #include <sys/stat.h>
32 #include <sys/select.h>
33 #include <sys/resource.h>
34 #include <fcntl.h>
35 #include <signal.h>
36 #include <sys/time.h>
37 #include <stdlib.h>
38 #include <getopt.h>
39 #include <dirent.h>
40 #include <string.h>
41 #include <ctype.h>
42 #include <sched.h>
43 #include <time.h>
44 #include <cpuid.h>
45 #include <linux/capability.h>
46 #include <errno.h>
47 #include <math.h>
48
49 char *proc_stat = "/proc/stat";
50 FILE *outf;
51 int *fd_percpu;
52 struct timeval interval_tv = {5, 0};
53 struct timespec interval_ts = {5, 0};
54 struct timespec one_msec = {0, 1000000};
55 unsigned int num_iterations;
56 unsigned int debug;
57 unsigned int quiet;
58 unsigned int shown;
59 unsigned int sums_need_wide_columns;
60 unsigned int rapl_joules;
61 unsigned int summary_only;
62 unsigned int list_header_only;
63 unsigned int dump_only;
64 unsigned int do_snb_cstates;
65 unsigned int do_knl_cstates;
66 unsigned int do_slm_cstates;
67 unsigned int use_c1_residency_msr;
68 unsigned int has_aperf;
69 unsigned int has_epb;
70 unsigned int do_irtl_snb;
71 unsigned int do_irtl_hsw;
72 unsigned int units = 1000000;   /* MHz etc */
73 unsigned int genuine_intel;
74 unsigned int authentic_amd;
75 unsigned int max_level, max_extended_level;
76 unsigned int has_invariant_tsc;
77 unsigned int do_nhm_platform_info;
78 unsigned int no_MSR_MISC_PWR_MGMT;
79 unsigned int aperf_mperf_multiplier = 1;
80 double bclk;
81 double base_hz;
82 unsigned int has_base_hz;
83 double tsc_tweak = 1.0;
84 unsigned int show_pkg_only;
85 unsigned int show_core_only;
86 char *output_buffer, *outp;
87 unsigned int do_rapl;
88 unsigned int do_dts;
89 unsigned int do_ptm;
90 unsigned long long  gfx_cur_rc6_ms;
91 unsigned long long cpuidle_cur_cpu_lpi_us;
92 unsigned long long cpuidle_cur_sys_lpi_us;
93 unsigned int gfx_cur_mhz;
94 unsigned int tcc_activation_temp;
95 unsigned int tcc_activation_temp_override;
96 double rapl_power_units, rapl_time_units;
97 double rapl_dram_energy_units, rapl_energy_units;
98 double rapl_joule_counter_range;
99 unsigned int do_core_perf_limit_reasons;
100 unsigned int has_automatic_cstate_conversion;
101 unsigned int do_gfx_perf_limit_reasons;
102 unsigned int do_ring_perf_limit_reasons;
103 unsigned int crystal_hz;
104 unsigned long long tsc_hz;
105 int base_cpu;
106 double discover_bclk(unsigned int family, unsigned int model);
107 unsigned int has_hwp;   /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
108                         /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
109 unsigned int has_hwp_notify;            /* IA32_HWP_INTERRUPT */
110 unsigned int has_hwp_activity_window;   /* IA32_HWP_REQUEST[bits 41:32] */
111 unsigned int has_hwp_epp;               /* IA32_HWP_REQUEST[bits 31:24] */
112 unsigned int has_hwp_pkg;               /* IA32_HWP_REQUEST_PKG */
113 unsigned int has_misc_feature_control;
114 unsigned int first_counter_read = 1;
115
116 #define RAPL_PKG                (1 << 0)
117                                         /* 0x610 MSR_PKG_POWER_LIMIT */
118                                         /* 0x611 MSR_PKG_ENERGY_STATUS */
119 #define RAPL_PKG_PERF_STATUS    (1 << 1)
120                                         /* 0x613 MSR_PKG_PERF_STATUS */
121 #define RAPL_PKG_POWER_INFO     (1 << 2)
122                                         /* 0x614 MSR_PKG_POWER_INFO */
123
124 #define RAPL_DRAM               (1 << 3)
125                                         /* 0x618 MSR_DRAM_POWER_LIMIT */
126                                         /* 0x619 MSR_DRAM_ENERGY_STATUS */
127 #define RAPL_DRAM_PERF_STATUS   (1 << 4)
128                                         /* 0x61b MSR_DRAM_PERF_STATUS */
129 #define RAPL_DRAM_POWER_INFO    (1 << 5)
130                                         /* 0x61c MSR_DRAM_POWER_INFO */
131
132 #define RAPL_CORES_POWER_LIMIT  (1 << 6)
133                                         /* 0x638 MSR_PP0_POWER_LIMIT */
134 #define RAPL_CORE_POLICY        (1 << 7)
135                                         /* 0x63a MSR_PP0_POLICY */
136
137 #define RAPL_GFX                (1 << 8)
138                                         /* 0x640 MSR_PP1_POWER_LIMIT */
139                                         /* 0x641 MSR_PP1_ENERGY_STATUS */
140                                         /* 0x642 MSR_PP1_POLICY */
141
142 #define RAPL_CORES_ENERGY_STATUS        (1 << 9)
143                                         /* 0x639 MSR_PP0_ENERGY_STATUS */
144 #define RAPL_PER_CORE_ENERGY    (1 << 10)
145                                         /* Indicates cores energy collection is per-core,
146                                          * not per-package. */
147 #define RAPL_AMD_F17H           (1 << 11)
148                                         /* 0xc0010299 MSR_RAPL_PWR_UNIT */
149                                         /* 0xc001029a MSR_CORE_ENERGY_STAT */
150                                         /* 0xc001029b MSR_PKG_ENERGY_STAT */
151 #define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
152 #define TJMAX_DEFAULT   100
153
154 /* MSRs that are not yet in the kernel-provided header. */
155 #define MSR_RAPL_PWR_UNIT       0xc0010299
156 #define MSR_CORE_ENERGY_STAT    0xc001029a
157 #define MSR_PKG_ENERGY_STAT     0xc001029b
158
159 #define MAX(a, b) ((a) > (b) ? (a) : (b))
160
161 /*
162  * buffer size used by sscanf() for added column names
163  * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
164  */
165 #define NAME_BYTES 20
166 #define PATH_BYTES 128
167
168 int backwards_count;
169 char *progname;
170
171 #define CPU_SUBSET_MAXCPUS      1024    /* need to use before probe... */
172 cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
173 size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
174 #define MAX_ADDED_COUNTERS 8
175 #define MAX_ADDED_THREAD_COUNTERS 24
176 #define BITMASK_SIZE 32
177
178 struct thread_data {
179         struct timeval tv_begin;
180         struct timeval tv_end;
181         unsigned long long tsc;
182         unsigned long long aperf;
183         unsigned long long mperf;
184         unsigned long long c1;
185         unsigned long long  irq_count;
186         unsigned int smi_count;
187         unsigned int cpu_id;
188         unsigned int apic_id;
189         unsigned int x2apic_id;
190         unsigned int flags;
191 #define CPU_IS_FIRST_THREAD_IN_CORE     0x2
192 #define CPU_IS_FIRST_CORE_IN_PACKAGE    0x4
193         unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
194 } *thread_even, *thread_odd;
195
196 struct core_data {
197         unsigned long long c3;
198         unsigned long long c6;
199         unsigned long long c7;
200         unsigned long long mc6_us;      /* duplicate as per-core for now, even though per module */
201         unsigned int core_temp_c;
202         unsigned int core_energy;       /* MSR_CORE_ENERGY_STAT */
203         unsigned int core_id;
204         unsigned long long counter[MAX_ADDED_COUNTERS];
205 } *core_even, *core_odd;
206
207 struct pkg_data {
208         unsigned long long pc2;
209         unsigned long long pc3;
210         unsigned long long pc6;
211         unsigned long long pc7;
212         unsigned long long pc8;
213         unsigned long long pc9;
214         unsigned long long pc10;
215         unsigned long long cpu_lpi;
216         unsigned long long sys_lpi;
217         unsigned long long pkg_wtd_core_c0;
218         unsigned long long pkg_any_core_c0;
219         unsigned long long pkg_any_gfxe_c0;
220         unsigned long long pkg_both_core_gfxe_c0;
221         long long gfx_rc6_ms;
222         unsigned int gfx_mhz;
223         unsigned int package_id;
224         unsigned int energy_pkg;        /* MSR_PKG_ENERGY_STATUS */
225         unsigned int energy_dram;       /* MSR_DRAM_ENERGY_STATUS */
226         unsigned int energy_cores;      /* MSR_PP0_ENERGY_STATUS */
227         unsigned int energy_gfx;        /* MSR_PP1_ENERGY_STATUS */
228         unsigned int rapl_pkg_perf_status;      /* MSR_PKG_PERF_STATUS */
229         unsigned int rapl_dram_perf_status;     /* MSR_DRAM_PERF_STATUS */
230         unsigned int pkg_temp_c;
231         unsigned long long counter[MAX_ADDED_COUNTERS];
232 } *package_even, *package_odd;
233
234 #define ODD_COUNTERS thread_odd, core_odd, package_odd
235 #define EVEN_COUNTERS thread_even, core_even, package_even
236
237 #define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no)          \
238         ((thread_base) +                                                      \
239          ((pkg_no) *                                                          \
240           topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
241          ((node_no) * topo.cores_per_node * topo.threads_per_core) +          \
242          ((core_no) * topo.threads_per_core) +                                \
243          (thread_no))
244
245 #define GET_CORE(core_base, core_no, node_no, pkg_no)                   \
246         ((core_base) +                                                  \
247          ((pkg_no) *  topo.nodes_per_pkg * topo.cores_per_node) +       \
248          ((node_no) * topo.cores_per_node) +                            \
249          (core_no))
250
251
252 #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
253
254 enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
255 enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
256 enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
257
258 struct msr_counter {
259         unsigned int msr_num;
260         char name[NAME_BYTES];
261         char path[PATH_BYTES];
262         unsigned int width;
263         enum counter_type type;
264         enum counter_format format;
265         struct msr_counter *next;
266         unsigned int flags;
267 #define FLAGS_HIDE      (1 << 0)
268 #define FLAGS_SHOW      (1 << 1)
269 #define SYSFS_PERCPU    (1 << 1)
270 };
271
272 struct sys_counters {
273         unsigned int added_thread_counters;
274         unsigned int added_core_counters;
275         unsigned int added_package_counters;
276         struct msr_counter *tp;
277         struct msr_counter *cp;
278         struct msr_counter *pp;
279 } sys;
280
281 struct system_summary {
282         struct thread_data threads;
283         struct core_data cores;
284         struct pkg_data packages;
285 } average;
286
287 struct cpu_topology {
288         int physical_package_id;
289         int die_id;
290         int logical_cpu_id;
291         int physical_node_id;
292         int logical_node_id;    /* 0-based count within the package */
293         int physical_core_id;
294         int thread_id;
295         cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
296 } *cpus;
297
298 struct topo_params {
299         int num_packages;
300         int num_die;
301         int num_cpus;
302         int num_cores;
303         int max_cpu_num;
304         int max_node_num;
305         int nodes_per_pkg;
306         int cores_per_node;
307         int threads_per_core;
308 } topo;
309
310 struct timeval tv_even, tv_odd, tv_delta;
311
312 int *irq_column_2_cpu;  /* /proc/interrupts column numbers */
313 int *irqs_per_cpu;              /* indexed by cpu_num */
314
315 void setup_all_buffers(void);
316
317 int cpu_is_not_present(int cpu)
318 {
319         return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
320 }
321 /*
322  * run func(thread, core, package) in topology order
323  * skip non-present cpus
324  */
325
326 int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
327         struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
328 {
329         int retval, pkg_no, core_no, thread_no, node_no;
330
331         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
332                 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
333                         for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
334                                 for (thread_no = 0; thread_no <
335                                         topo.threads_per_core; ++thread_no) {
336                                         struct thread_data *t;
337                                         struct core_data *c;
338                                         struct pkg_data *p;
339
340                                         t = GET_THREAD(thread_base, thread_no,
341                                                        core_no, node_no,
342                                                        pkg_no);
343
344                                         if (cpu_is_not_present(t->cpu_id))
345                                                 continue;
346
347                                         c = GET_CORE(core_base, core_no,
348                                                      node_no, pkg_no);
349                                         p = GET_PKG(pkg_base, pkg_no);
350
351                                         retval = func(t, c, p);
352                                         if (retval)
353                                                 return retval;
354                                 }
355                         }
356                 }
357         }
358         return 0;
359 }
360
361 int cpu_migrate(int cpu)
362 {
363         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
364         CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
365         if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
366                 return -1;
367         else
368                 return 0;
369 }
370 int get_msr_fd(int cpu)
371 {
372         char pathname[32];
373         int fd;
374
375         fd = fd_percpu[cpu];
376
377         if (fd)
378                 return fd;
379
380         sprintf(pathname, "/dev/cpu/%d/msr", cpu);
381         fd = open(pathname, O_RDONLY);
382         if (fd < 0)
383                 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
384
385         fd_percpu[cpu] = fd;
386
387         return fd;
388 }
389
390 int get_msr(int cpu, off_t offset, unsigned long long *msr)
391 {
392         ssize_t retval;
393
394         retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
395
396         if (retval != sizeof *msr)
397                 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
398
399         return 0;
400 }
401
402 /*
403  * This list matches the column headers, except
404  * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
405  * 2. Core and CPU are moved to the end, we can't have strings that contain them
406  *    matching on them for --show and --hide.
407  */
408 struct msr_counter bic[] = {
409         { 0x0, "usec" },
410         { 0x0, "Time_Of_Day_Seconds" },
411         { 0x0, "Package" },
412         { 0x0, "Node" },
413         { 0x0, "Avg_MHz" },
414         { 0x0, "Busy%" },
415         { 0x0, "Bzy_MHz" },
416         { 0x0, "TSC_MHz" },
417         { 0x0, "IRQ" },
418         { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
419         { 0x0, "sysfs" },
420         { 0x0, "CPU%c1" },
421         { 0x0, "CPU%c3" },
422         { 0x0, "CPU%c6" },
423         { 0x0, "CPU%c7" },
424         { 0x0, "ThreadC" },
425         { 0x0, "CoreTmp" },
426         { 0x0, "CoreCnt" },
427         { 0x0, "PkgTmp" },
428         { 0x0, "GFX%rc6" },
429         { 0x0, "GFXMHz" },
430         { 0x0, "Pkg%pc2" },
431         { 0x0, "Pkg%pc3" },
432         { 0x0, "Pkg%pc6" },
433         { 0x0, "Pkg%pc7" },
434         { 0x0, "Pkg%pc8" },
435         { 0x0, "Pkg%pc9" },
436         { 0x0, "Pk%pc10" },
437         { 0x0, "CPU%LPI" },
438         { 0x0, "SYS%LPI" },
439         { 0x0, "PkgWatt" },
440         { 0x0, "CorWatt" },
441         { 0x0, "GFXWatt" },
442         { 0x0, "PkgCnt" },
443         { 0x0, "RAMWatt" },
444         { 0x0, "PKG_%" },
445         { 0x0, "RAM_%" },
446         { 0x0, "Pkg_J" },
447         { 0x0, "Cor_J" },
448         { 0x0, "GFX_J" },
449         { 0x0, "RAM_J" },
450         { 0x0, "Mod%c6" },
451         { 0x0, "Totl%C0" },
452         { 0x0, "Any%C0" },
453         { 0x0, "GFX%C0" },
454         { 0x0, "CPUGFX%" },
455         { 0x0, "Core" },
456         { 0x0, "CPU" },
457         { 0x0, "APIC" },
458         { 0x0, "X2APIC" },
459         { 0x0, "Die" },
460 };
461
462 #define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
463 #define BIC_USEC        (1ULL << 0)
464 #define BIC_TOD         (1ULL << 1)
465 #define BIC_Package     (1ULL << 2)
466 #define BIC_Node        (1ULL << 3)
467 #define BIC_Avg_MHz     (1ULL << 4)
468 #define BIC_Busy        (1ULL << 5)
469 #define BIC_Bzy_MHz     (1ULL << 6)
470 #define BIC_TSC_MHz     (1ULL << 7)
471 #define BIC_IRQ         (1ULL << 8)
472 #define BIC_SMI         (1ULL << 9)
473 #define BIC_sysfs       (1ULL << 10)
474 #define BIC_CPU_c1      (1ULL << 11)
475 #define BIC_CPU_c3      (1ULL << 12)
476 #define BIC_CPU_c6      (1ULL << 13)
477 #define BIC_CPU_c7      (1ULL << 14)
478 #define BIC_ThreadC     (1ULL << 15)
479 #define BIC_CoreTmp     (1ULL << 16)
480 #define BIC_CoreCnt     (1ULL << 17)
481 #define BIC_PkgTmp      (1ULL << 18)
482 #define BIC_GFX_rc6     (1ULL << 19)
483 #define BIC_GFXMHz      (1ULL << 20)
484 #define BIC_Pkgpc2      (1ULL << 21)
485 #define BIC_Pkgpc3      (1ULL << 22)
486 #define BIC_Pkgpc6      (1ULL << 23)
487 #define BIC_Pkgpc7      (1ULL << 24)
488 #define BIC_Pkgpc8      (1ULL << 25)
489 #define BIC_Pkgpc9      (1ULL << 26)
490 #define BIC_Pkgpc10     (1ULL << 27)
491 #define BIC_CPU_LPI     (1ULL << 28)
492 #define BIC_SYS_LPI     (1ULL << 29)
493 #define BIC_PkgWatt     (1ULL << 30)
494 #define BIC_CorWatt     (1ULL << 31)
495 #define BIC_GFXWatt     (1ULL << 32)
496 #define BIC_PkgCnt      (1ULL << 33)
497 #define BIC_RAMWatt     (1ULL << 34)
498 #define BIC_PKG__       (1ULL << 35)
499 #define BIC_RAM__       (1ULL << 36)
500 #define BIC_Pkg_J       (1ULL << 37)
501 #define BIC_Cor_J       (1ULL << 38)
502 #define BIC_GFX_J       (1ULL << 39)
503 #define BIC_RAM_J       (1ULL << 40)
504 #define BIC_Mod_c6      (1ULL << 41)
505 #define BIC_Totl_c0     (1ULL << 42)
506 #define BIC_Any_c0      (1ULL << 43)
507 #define BIC_GFX_c0      (1ULL << 44)
508 #define BIC_CPUGFX      (1ULL << 45)
509 #define BIC_Core        (1ULL << 46)
510 #define BIC_CPU         (1ULL << 47)
511 #define BIC_APIC        (1ULL << 48)
512 #define BIC_X2APIC      (1ULL << 49)
513 #define BIC_Die         (1ULL << 50)
514
515 #define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
516
517 unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
518 unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
519
520 #define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
521 #define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
522 #define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
523 #define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
524
525
526 #define MAX_DEFERRED 16
527 char *deferred_skip_names[MAX_DEFERRED];
528 int deferred_skip_index;
529
530 /*
531  * HIDE_LIST - hide this list of counters, show the rest [default]
532  * SHOW_LIST - show this list of counters, hide the rest
533  */
534 enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
535
536 void help(void)
537 {
538         fprintf(outf,
539         "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
540         "\n"
541         "Turbostat forks the specified COMMAND and prints statistics\n"
542         "when COMMAND completes.\n"
543         "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
544         "to print statistics, until interrupted.\n"
545         "  -a, --add    add a counter\n"
546         "                 eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
547         "  -c, --cpu    cpu-set limit output to summary plus cpu-set:\n"
548         "                 {core | package | j,k,l..m,n-p }\n"
549         "  -d, --debug  displays usec, Time_Of_Day_Seconds and more debugging\n"
550         "  -D, --Dump   displays the raw counter values\n"
551         "  -e, --enable [all | column]\n"
552         "               shows all or the specified disabled column\n"
553         "  -H, --hide [column|column,column,...]\n"
554         "               hide the specified column(s)\n"
555         "  -i, --interval sec.subsec\n"
556         "               Override default 5-second measurement interval\n"
557         "  -J, --Joules displays energy in Joules instead of Watts\n"
558         "  -l, --list   list column headers only\n"
559         "  -n, --num_iterations num\n"
560         "               number of the measurement iterations\n"
561         "  -o, --out file\n"
562         "               create or truncate \"file\" for all output\n"
563         "  -q, --quiet  skip decoding system configuration header\n"
564         "  -s, --show [column|column,column,...]\n"
565         "               show only the specified column(s)\n"
566         "  -S, --Summary\n"
567         "               limits output to 1-line system summary per interval\n"
568         "  -T, --TCC temperature\n"
569         "               sets the Thermal Control Circuit temperature in\n"
570         "                 degrees Celsius\n"
571         "  -h, --help   print this help message\n"
572         "  -v, --version        print version information\n"
573         "\n"
574         "For more help, run \"man turbostat\"\n");
575 }
576
577 /*
578  * bic_lookup
579  * for all the strings in comma separate name_list,
580  * set the approprate bit in return value.
581  */
582 unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
583 {
584         int i;
585         unsigned long long retval = 0;
586
587         while (name_list) {
588                 char *comma;
589
590                 comma = strchr(name_list, ',');
591
592                 if (comma)
593                         *comma = '\0';
594
595                 if (!strcmp(name_list, "all"))
596                         return ~0;
597
598                 for (i = 0; i < MAX_BIC; ++i) {
599                         if (!strcmp(name_list, bic[i].name)) {
600                                 retval |= (1ULL << i);
601                                 break;
602                         }
603                 }
604                 if (i == MAX_BIC) {
605                         if (mode == SHOW_LIST) {
606                                 fprintf(stderr, "Invalid counter name: %s\n", name_list);
607                                 exit(-1);
608                         }
609                         deferred_skip_names[deferred_skip_index++] = name_list;
610                         if (debug)
611                                 fprintf(stderr, "deferred \"%s\"\n", name_list);
612                         if (deferred_skip_index >= MAX_DEFERRED) {
613                                 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
614                                         MAX_DEFERRED, name_list);
615                                 help();
616                                 exit(1);
617                         }
618                 }
619
620                 name_list = comma;
621                 if (name_list)
622                         name_list++;
623
624         }
625         return retval;
626 }
627
628
629 void print_header(char *delim)
630 {
631         struct msr_counter *mp;
632         int printed = 0;
633
634         if (DO_BIC(BIC_USEC))
635                 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
636         if (DO_BIC(BIC_TOD))
637                 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
638         if (DO_BIC(BIC_Package))
639                 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
640         if (DO_BIC(BIC_Die))
641                 outp += sprintf(outp, "%sDie", (printed++ ? delim : ""));
642         if (DO_BIC(BIC_Node))
643                 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
644         if (DO_BIC(BIC_Core))
645                 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
646         if (DO_BIC(BIC_CPU))
647                 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
648         if (DO_BIC(BIC_APIC))
649                 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
650         if (DO_BIC(BIC_X2APIC))
651                 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
652         if (DO_BIC(BIC_Avg_MHz))
653                 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
654         if (DO_BIC(BIC_Busy))
655                 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
656         if (DO_BIC(BIC_Bzy_MHz))
657                 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
658         if (DO_BIC(BIC_TSC_MHz))
659                 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
660
661         if (DO_BIC(BIC_IRQ)) {
662                 if (sums_need_wide_columns)
663                         outp += sprintf(outp, "%s     IRQ", (printed++ ? delim : ""));
664                 else
665                         outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
666         }
667
668         if (DO_BIC(BIC_SMI))
669                 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
670
671         for (mp = sys.tp; mp; mp = mp->next) {
672
673                 if (mp->format == FORMAT_RAW) {
674                         if (mp->width == 64)
675                                 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
676                         else
677                                 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
678                 } else {
679                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
680                                 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
681                         else
682                                 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
683                 }
684         }
685
686         if (DO_BIC(BIC_CPU_c1))
687                 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
688         if (DO_BIC(BIC_CPU_c3))
689                 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
690         if (DO_BIC(BIC_CPU_c6))
691                 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
692         if (DO_BIC(BIC_CPU_c7))
693                 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
694
695         if (DO_BIC(BIC_Mod_c6))
696                 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
697
698         if (DO_BIC(BIC_CoreTmp))
699                 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
700
701         if (do_rapl && !rapl_joules) {
702                 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
703                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
704         } else if (do_rapl && rapl_joules) {
705                 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
706                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
707         }
708
709         for (mp = sys.cp; mp; mp = mp->next) {
710                 if (mp->format == FORMAT_RAW) {
711                         if (mp->width == 64)
712                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
713                         else
714                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
715                 } else {
716                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
717                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
718                         else
719                                 outp += sprintf(outp, "%s%s", delim, mp->name);
720                 }
721         }
722
723         if (DO_BIC(BIC_PkgTmp))
724                 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
725
726         if (DO_BIC(BIC_GFX_rc6))
727                 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
728
729         if (DO_BIC(BIC_GFXMHz))
730                 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
731
732         if (DO_BIC(BIC_Totl_c0))
733                 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
734         if (DO_BIC(BIC_Any_c0))
735                 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
736         if (DO_BIC(BIC_GFX_c0))
737                 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
738         if (DO_BIC(BIC_CPUGFX))
739                 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
740
741         if (DO_BIC(BIC_Pkgpc2))
742                 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
743         if (DO_BIC(BIC_Pkgpc3))
744                 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
745         if (DO_BIC(BIC_Pkgpc6))
746                 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
747         if (DO_BIC(BIC_Pkgpc7))
748                 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
749         if (DO_BIC(BIC_Pkgpc8))
750                 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
751         if (DO_BIC(BIC_Pkgpc9))
752                 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
753         if (DO_BIC(BIC_Pkgpc10))
754                 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
755         if (DO_BIC(BIC_CPU_LPI))
756                 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
757         if (DO_BIC(BIC_SYS_LPI))
758                 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
759
760         if (do_rapl && !rapl_joules) {
761                 if (DO_BIC(BIC_PkgWatt))
762                         outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
763                 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
764                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
765                 if (DO_BIC(BIC_GFXWatt))
766                         outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
767                 if (DO_BIC(BIC_RAMWatt))
768                         outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
769                 if (DO_BIC(BIC_PKG__))
770                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
771                 if (DO_BIC(BIC_RAM__))
772                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
773         } else if (do_rapl && rapl_joules) {
774                 if (DO_BIC(BIC_Pkg_J))
775                         outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
776                 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
777                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
778                 if (DO_BIC(BIC_GFX_J))
779                         outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
780                 if (DO_BIC(BIC_RAM_J))
781                         outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
782                 if (DO_BIC(BIC_PKG__))
783                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
784                 if (DO_BIC(BIC_RAM__))
785                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
786         }
787         for (mp = sys.pp; mp; mp = mp->next) {
788                 if (mp->format == FORMAT_RAW) {
789                         if (mp->width == 64)
790                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
791                         else
792                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
793                 } else {
794                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
795                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
796                         else
797                                 outp += sprintf(outp, "%s%s", delim, mp->name);
798                 }
799         }
800
801         outp += sprintf(outp, "\n");
802 }
803
804 int dump_counters(struct thread_data *t, struct core_data *c,
805         struct pkg_data *p)
806 {
807         int i;
808         struct msr_counter *mp;
809
810         outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
811
812         if (t) {
813                 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
814                         t->cpu_id, t->flags);
815                 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
816                 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
817                 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
818                 outp += sprintf(outp, "c1: %016llX\n", t->c1);
819
820                 if (DO_BIC(BIC_IRQ))
821                         outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
822                 if (DO_BIC(BIC_SMI))
823                         outp += sprintf(outp, "SMI: %d\n", t->smi_count);
824
825                 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
826                         outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
827                                 i, mp->msr_num, t->counter[i]);
828                 }
829         }
830
831         if (c) {
832                 outp += sprintf(outp, "core: %d\n", c->core_id);
833                 outp += sprintf(outp, "c3: %016llX\n", c->c3);
834                 outp += sprintf(outp, "c6: %016llX\n", c->c6);
835                 outp += sprintf(outp, "c7: %016llX\n", c->c7);
836                 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
837                 outp += sprintf(outp, "Joules: %0X\n", c->core_energy);
838
839                 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
840                         outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
841                                 i, mp->msr_num, c->counter[i]);
842                 }
843                 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
844         }
845
846         if (p) {
847                 outp += sprintf(outp, "package: %d\n", p->package_id);
848
849                 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
850                 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
851                 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
852                 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
853
854                 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
855                 if (DO_BIC(BIC_Pkgpc3))
856                         outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
857                 if (DO_BIC(BIC_Pkgpc6))
858                         outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
859                 if (DO_BIC(BIC_Pkgpc7))
860                         outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
861                 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
862                 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
863                 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
864                 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
865                 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
866                 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
867                 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
868                 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
869                 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
870                 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
871                 outp += sprintf(outp, "Throttle PKG: %0X\n",
872                         p->rapl_pkg_perf_status);
873                 outp += sprintf(outp, "Throttle RAM: %0X\n",
874                         p->rapl_dram_perf_status);
875                 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
876
877                 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
878                         outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
879                                 i, mp->msr_num, p->counter[i]);
880                 }
881         }
882
883         outp += sprintf(outp, "\n");
884
885         return 0;
886 }
887
888 /*
889  * column formatting convention & formats
890  */
891 int format_counters(struct thread_data *t, struct core_data *c,
892         struct pkg_data *p)
893 {
894         double interval_float, tsc;
895         char *fmt8;
896         int i;
897         struct msr_counter *mp;
898         char *delim = "\t";
899         int printed = 0;
900
901          /* if showing only 1st thread in core and this isn't one, bail out */
902         if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
903                 return 0;
904
905          /* if showing only 1st thread in pkg and this isn't one, bail out */
906         if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
907                 return 0;
908
909         /*if not summary line and --cpu is used */
910         if ((t != &average.threads) &&
911                 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
912                 return 0;
913
914         if (DO_BIC(BIC_USEC)) {
915                 /* on each row, print how many usec each timestamp took to gather */
916                 struct timeval tv;
917
918                 timersub(&t->tv_end, &t->tv_begin, &tv);
919                 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
920         }
921
922         /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
923         if (DO_BIC(BIC_TOD))
924                 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
925
926         interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
927
928         tsc = t->tsc * tsc_tweak;
929
930         /* topo columns, print blanks on 1st (average) line */
931         if (t == &average.threads) {
932                 if (DO_BIC(BIC_Package))
933                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
934                 if (DO_BIC(BIC_Die))
935                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
936                 if (DO_BIC(BIC_Node))
937                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
938                 if (DO_BIC(BIC_Core))
939                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
940                 if (DO_BIC(BIC_CPU))
941                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
942                 if (DO_BIC(BIC_APIC))
943                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
944                 if (DO_BIC(BIC_X2APIC))
945                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
946         } else {
947                 if (DO_BIC(BIC_Package)) {
948                         if (p)
949                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
950                         else
951                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
952                 }
953                 if (DO_BIC(BIC_Die)) {
954                         if (c)
955                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id);
956                         else
957                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
958                 }
959                 if (DO_BIC(BIC_Node)) {
960                         if (t)
961                                 outp += sprintf(outp, "%s%d",
962                                                 (printed++ ? delim : ""),
963                                               cpus[t->cpu_id].physical_node_id);
964                         else
965                                 outp += sprintf(outp, "%s-",
966                                                 (printed++ ? delim : ""));
967                 }
968                 if (DO_BIC(BIC_Core)) {
969                         if (c)
970                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
971                         else
972                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
973                 }
974                 if (DO_BIC(BIC_CPU))
975                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
976                 if (DO_BIC(BIC_APIC))
977                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
978                 if (DO_BIC(BIC_X2APIC))
979                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
980         }
981
982         if (DO_BIC(BIC_Avg_MHz))
983                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
984                         1.0 / units * t->aperf / interval_float);
985
986         if (DO_BIC(BIC_Busy))
987                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
988
989         if (DO_BIC(BIC_Bzy_MHz)) {
990                 if (has_base_hz)
991                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
992                 else
993                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
994                                 tsc / units * t->aperf / t->mperf / interval_float);
995         }
996
997         if (DO_BIC(BIC_TSC_MHz))
998                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
999
1000         /* IRQ */
1001         if (DO_BIC(BIC_IRQ)) {
1002                 if (sums_need_wide_columns)
1003                         outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
1004                 else
1005                         outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
1006         }
1007
1008         /* SMI */
1009         if (DO_BIC(BIC_SMI))
1010                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
1011
1012         /* Added counters */
1013         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1014                 if (mp->format == FORMAT_RAW) {
1015                         if (mp->width == 32)
1016                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
1017                         else
1018                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
1019                 } else if (mp->format == FORMAT_DELTA) {
1020                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1021                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
1022                         else
1023                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
1024                 } else if (mp->format == FORMAT_PERCENT) {
1025                         if (mp->type == COUNTER_USEC)
1026                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
1027                         else
1028                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
1029                 }
1030         }
1031
1032         /* C1 */
1033         if (DO_BIC(BIC_CPU_c1))
1034                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
1035
1036
1037         /* print per-core data only for 1st thread in core */
1038         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1039                 goto done;
1040
1041         if (DO_BIC(BIC_CPU_c3))
1042                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
1043         if (DO_BIC(BIC_CPU_c6))
1044                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
1045         if (DO_BIC(BIC_CPU_c7))
1046                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
1047
1048         /* Mod%c6 */
1049         if (DO_BIC(BIC_Mod_c6))
1050                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
1051
1052         if (DO_BIC(BIC_CoreTmp))
1053                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
1054
1055         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1056                 if (mp->format == FORMAT_RAW) {
1057                         if (mp->width == 32)
1058                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
1059                         else
1060                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
1061                 } else if (mp->format == FORMAT_DELTA) {
1062                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1063                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
1064                         else
1065                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
1066                 } else if (mp->format == FORMAT_PERCENT) {
1067                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
1068                 }
1069         }
1070
1071         /*
1072          * If measurement interval exceeds minimum RAPL Joule Counter range,
1073          * indicate that results are suspect by printing "**" in fraction place.
1074          */
1075         if (interval_float < rapl_joule_counter_range)
1076                 fmt8 = "%s%.2f";
1077         else
1078                 fmt8 = "%6.0f**";
1079
1080         if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
1081                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float);
1082         if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
1083                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units);
1084
1085         /* print per-package data only for 1st core in package */
1086         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1087                 goto done;
1088
1089         /* PkgTmp */
1090         if (DO_BIC(BIC_PkgTmp))
1091                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
1092
1093         /* GFXrc6 */
1094         if (DO_BIC(BIC_GFX_rc6)) {
1095                 if (p->gfx_rc6_ms == -1) {      /* detect GFX counter reset */
1096                         outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
1097                 } else {
1098                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
1099                                 p->gfx_rc6_ms / 10.0 / interval_float);
1100                 }
1101         }
1102
1103         /* GFXMHz */
1104         if (DO_BIC(BIC_GFXMHz))
1105                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
1106
1107         /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
1108         if (DO_BIC(BIC_Totl_c0))
1109                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
1110         if (DO_BIC(BIC_Any_c0))
1111                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
1112         if (DO_BIC(BIC_GFX_c0))
1113                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
1114         if (DO_BIC(BIC_CPUGFX))
1115                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
1116
1117         if (DO_BIC(BIC_Pkgpc2))
1118                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
1119         if (DO_BIC(BIC_Pkgpc3))
1120                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
1121         if (DO_BIC(BIC_Pkgpc6))
1122                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
1123         if (DO_BIC(BIC_Pkgpc7))
1124                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
1125         if (DO_BIC(BIC_Pkgpc8))
1126                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
1127         if (DO_BIC(BIC_Pkgpc9))
1128                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
1129         if (DO_BIC(BIC_Pkgpc10))
1130                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
1131
1132         if (DO_BIC(BIC_CPU_LPI))
1133                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1134         if (DO_BIC(BIC_SYS_LPI))
1135                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1136
1137         if (DO_BIC(BIC_PkgWatt))
1138                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
1139         if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1140                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
1141         if (DO_BIC(BIC_GFXWatt))
1142                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
1143         if (DO_BIC(BIC_RAMWatt))
1144                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
1145         if (DO_BIC(BIC_Pkg_J))
1146                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
1147         if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1148                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
1149         if (DO_BIC(BIC_GFX_J))
1150                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
1151         if (DO_BIC(BIC_RAM_J))
1152                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
1153         if (DO_BIC(BIC_PKG__))
1154                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
1155         if (DO_BIC(BIC_RAM__))
1156                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
1157
1158         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1159                 if (mp->format == FORMAT_RAW) {
1160                         if (mp->width == 32)
1161                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
1162                         else
1163                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
1164                 } else if (mp->format == FORMAT_DELTA) {
1165                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1166                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
1167                         else
1168                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
1169                 } else if (mp->format == FORMAT_PERCENT) {
1170                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
1171                 }
1172         }
1173
1174 done:
1175         if (*(outp - 1) != '\n')
1176                 outp += sprintf(outp, "\n");
1177
1178         return 0;
1179 }
1180
1181 void flush_output_stdout(void)
1182 {
1183         FILE *filep;
1184
1185         if (outf == stderr)
1186                 filep = stdout;
1187         else
1188                 filep = outf;
1189
1190         fputs(output_buffer, filep);
1191         fflush(filep);
1192
1193         outp = output_buffer;
1194 }
1195 void flush_output_stderr(void)
1196 {
1197         fputs(output_buffer, outf);
1198         fflush(outf);
1199         outp = output_buffer;
1200 }
1201 void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1202 {
1203         static int printed;
1204
1205         if (!printed || !summary_only)
1206                 print_header("\t");
1207
1208         format_counters(&average.threads, &average.cores, &average.packages);
1209
1210         printed = 1;
1211
1212         if (summary_only)
1213                 return;
1214
1215         for_all_cpus(format_counters, t, c, p);
1216 }
1217
1218 #define DELTA_WRAP32(new, old)                  \
1219         if (new > old) {                        \
1220                 old = new - old;                \
1221         } else {                                \
1222                 old = 0x100000000 + new - old;  \
1223         }
1224
1225 int
1226 delta_package(struct pkg_data *new, struct pkg_data *old)
1227 {
1228         int i;
1229         struct msr_counter *mp;
1230
1231
1232         if (DO_BIC(BIC_Totl_c0))
1233                 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
1234         if (DO_BIC(BIC_Any_c0))
1235                 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
1236         if (DO_BIC(BIC_GFX_c0))
1237                 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
1238         if (DO_BIC(BIC_CPUGFX))
1239                 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
1240
1241         old->pc2 = new->pc2 - old->pc2;
1242         if (DO_BIC(BIC_Pkgpc3))
1243                 old->pc3 = new->pc3 - old->pc3;
1244         if (DO_BIC(BIC_Pkgpc6))
1245                 old->pc6 = new->pc6 - old->pc6;
1246         if (DO_BIC(BIC_Pkgpc7))
1247                 old->pc7 = new->pc7 - old->pc7;
1248         old->pc8 = new->pc8 - old->pc8;
1249         old->pc9 = new->pc9 - old->pc9;
1250         old->pc10 = new->pc10 - old->pc10;
1251         old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1252         old->sys_lpi = new->sys_lpi - old->sys_lpi;
1253         old->pkg_temp_c = new->pkg_temp_c;
1254
1255         /* flag an error when rc6 counter resets/wraps */
1256         if (old->gfx_rc6_ms >  new->gfx_rc6_ms)
1257                 old->gfx_rc6_ms = -1;
1258         else
1259                 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1260
1261         old->gfx_mhz = new->gfx_mhz;
1262
1263         DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
1264         DELTA_WRAP32(new->energy_cores, old->energy_cores);
1265         DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
1266         DELTA_WRAP32(new->energy_dram, old->energy_dram);
1267         DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
1268         DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
1269
1270         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1271                 if (mp->format == FORMAT_RAW)
1272                         old->counter[i] = new->counter[i];
1273                 else
1274                         old->counter[i] = new->counter[i] - old->counter[i];
1275         }
1276
1277         return 0;
1278 }
1279
1280 void
1281 delta_core(struct core_data *new, struct core_data *old)
1282 {
1283         int i;
1284         struct msr_counter *mp;
1285
1286         old->c3 = new->c3 - old->c3;
1287         old->c6 = new->c6 - old->c6;
1288         old->c7 = new->c7 - old->c7;
1289         old->core_temp_c = new->core_temp_c;
1290         old->mc6_us = new->mc6_us - old->mc6_us;
1291
1292         DELTA_WRAP32(new->core_energy, old->core_energy);
1293
1294         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1295                 if (mp->format == FORMAT_RAW)
1296                         old->counter[i] = new->counter[i];
1297                 else
1298                         old->counter[i] = new->counter[i] - old->counter[i];
1299         }
1300 }
1301
1302 /*
1303  * old = new - old
1304  */
1305 int
1306 delta_thread(struct thread_data *new, struct thread_data *old,
1307         struct core_data *core_delta)
1308 {
1309         int i;
1310         struct msr_counter *mp;
1311
1312         /* we run cpuid just the 1st time, copy the results */
1313         if (DO_BIC(BIC_APIC))
1314                 new->apic_id = old->apic_id;
1315         if (DO_BIC(BIC_X2APIC))
1316                 new->x2apic_id = old->x2apic_id;
1317
1318         /*
1319          * the timestamps from start of measurement interval are in "old"
1320          * the timestamp from end of measurement interval are in "new"
1321          * over-write old w/ new so we can print end of interval values
1322          */
1323
1324         old->tv_begin = new->tv_begin;
1325         old->tv_end = new->tv_end;
1326
1327         old->tsc = new->tsc - old->tsc;
1328
1329         /* check for TSC < 1 Mcycles over interval */
1330         if (old->tsc < (1000 * 1000))
1331                 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1332                      "You can disable all c-states by booting with \"idle=poll\"\n"
1333                      "or just the deep ones with \"processor.max_cstate=1\"");
1334
1335         old->c1 = new->c1 - old->c1;
1336
1337         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
1338                 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1339                         old->aperf = new->aperf - old->aperf;
1340                         old->mperf = new->mperf - old->mperf;
1341                 } else {
1342                         return -1;
1343                 }
1344         }
1345
1346
1347         if (use_c1_residency_msr) {
1348                 /*
1349                  * Some models have a dedicated C1 residency MSR,
1350                  * which should be more accurate than the derivation below.
1351                  */
1352         } else {
1353                 /*
1354                  * As counter collection is not atomic,
1355                  * it is possible for mperf's non-halted cycles + idle states
1356                  * to exceed TSC's all cycles: show c1 = 0% in that case.
1357                  */
1358                 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
1359                         old->c1 = 0;
1360                 else {
1361                         /* normal case, derive c1 */
1362                         old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
1363                                 - core_delta->c6 - core_delta->c7;
1364                 }
1365         }
1366
1367         if (old->mperf == 0) {
1368                 if (debug > 1)
1369                         fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
1370                 old->mperf = 1; /* divide by 0 protection */
1371         }
1372
1373         if (DO_BIC(BIC_IRQ))
1374                 old->irq_count = new->irq_count - old->irq_count;
1375
1376         if (DO_BIC(BIC_SMI))
1377                 old->smi_count = new->smi_count - old->smi_count;
1378
1379         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1380                 if (mp->format == FORMAT_RAW)
1381                         old->counter[i] = new->counter[i];
1382                 else
1383                         old->counter[i] = new->counter[i] - old->counter[i];
1384         }
1385         return 0;
1386 }
1387
1388 int delta_cpu(struct thread_data *t, struct core_data *c,
1389         struct pkg_data *p, struct thread_data *t2,
1390         struct core_data *c2, struct pkg_data *p2)
1391 {
1392         int retval = 0;
1393
1394         /* calculate core delta only for 1st thread in core */
1395         if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1396                 delta_core(c, c2);
1397
1398         /* always calculate thread delta */
1399         retval = delta_thread(t, t2, c2);       /* c2 is core delta */
1400         if (retval)
1401                 return retval;
1402
1403         /* calculate package delta only for 1st core in package */
1404         if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
1405                 retval = delta_package(p, p2);
1406
1407         return retval;
1408 }
1409
1410 void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1411 {
1412         int i;
1413         struct msr_counter  *mp;
1414
1415         t->tv_begin.tv_sec = 0;
1416         t->tv_begin.tv_usec = 0;
1417         t->tv_end.tv_sec = 0;
1418         t->tv_end.tv_usec = 0;
1419
1420         t->tsc = 0;
1421         t->aperf = 0;
1422         t->mperf = 0;
1423         t->c1 = 0;
1424
1425         t->irq_count = 0;
1426         t->smi_count = 0;
1427
1428         /* tells format_counters to dump all fields from this set */
1429         t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1430
1431         c->c3 = 0;
1432         c->c6 = 0;
1433         c->c7 = 0;
1434         c->mc6_us = 0;
1435         c->core_temp_c = 0;
1436         c->core_energy = 0;
1437
1438         p->pkg_wtd_core_c0 = 0;
1439         p->pkg_any_core_c0 = 0;
1440         p->pkg_any_gfxe_c0 = 0;
1441         p->pkg_both_core_gfxe_c0 = 0;
1442
1443         p->pc2 = 0;
1444         if (DO_BIC(BIC_Pkgpc3))
1445                 p->pc3 = 0;
1446         if (DO_BIC(BIC_Pkgpc6))
1447                 p->pc6 = 0;
1448         if (DO_BIC(BIC_Pkgpc7))
1449                 p->pc7 = 0;
1450         p->pc8 = 0;
1451         p->pc9 = 0;
1452         p->pc10 = 0;
1453         p->cpu_lpi = 0;
1454         p->sys_lpi = 0;
1455
1456         p->energy_pkg = 0;
1457         p->energy_dram = 0;
1458         p->energy_cores = 0;
1459         p->energy_gfx = 0;
1460         p->rapl_pkg_perf_status = 0;
1461         p->rapl_dram_perf_status = 0;
1462         p->pkg_temp_c = 0;
1463
1464         p->gfx_rc6_ms = 0;
1465         p->gfx_mhz = 0;
1466         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1467                 t->counter[i] = 0;
1468
1469         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1470                 c->counter[i] = 0;
1471
1472         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1473                 p->counter[i] = 0;
1474 }
1475 int sum_counters(struct thread_data *t, struct core_data *c,
1476         struct pkg_data *p)
1477 {
1478         int i;
1479         struct msr_counter *mp;
1480
1481         /* copy un-changing apic_id's */
1482         if (DO_BIC(BIC_APIC))
1483                 average.threads.apic_id = t->apic_id;
1484         if (DO_BIC(BIC_X2APIC))
1485                 average.threads.x2apic_id = t->x2apic_id;
1486
1487         /* remember first tv_begin */
1488         if (average.threads.tv_begin.tv_sec == 0)
1489                 average.threads.tv_begin = t->tv_begin;
1490
1491         /* remember last tv_end */
1492         average.threads.tv_end = t->tv_end;
1493
1494         average.threads.tsc += t->tsc;
1495         average.threads.aperf += t->aperf;
1496         average.threads.mperf += t->mperf;
1497         average.threads.c1 += t->c1;
1498
1499         average.threads.irq_count += t->irq_count;
1500         average.threads.smi_count += t->smi_count;
1501
1502         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1503                 if (mp->format == FORMAT_RAW)
1504                         continue;
1505                 average.threads.counter[i] += t->counter[i];
1506         }
1507
1508         /* sum per-core values only for 1st thread in core */
1509         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1510                 return 0;
1511
1512         average.cores.c3 += c->c3;
1513         average.cores.c6 += c->c6;
1514         average.cores.c7 += c->c7;
1515         average.cores.mc6_us += c->mc6_us;
1516
1517         average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1518
1519         average.cores.core_energy += c->core_energy;
1520
1521         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1522                 if (mp->format == FORMAT_RAW)
1523                         continue;
1524                 average.cores.counter[i] += c->counter[i];
1525         }
1526
1527         /* sum per-pkg values only for 1st core in pkg */
1528         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1529                 return 0;
1530
1531         if (DO_BIC(BIC_Totl_c0))
1532                 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
1533         if (DO_BIC(BIC_Any_c0))
1534                 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
1535         if (DO_BIC(BIC_GFX_c0))
1536                 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
1537         if (DO_BIC(BIC_CPUGFX))
1538                 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
1539
1540         average.packages.pc2 += p->pc2;
1541         if (DO_BIC(BIC_Pkgpc3))
1542                 average.packages.pc3 += p->pc3;
1543         if (DO_BIC(BIC_Pkgpc6))
1544                 average.packages.pc6 += p->pc6;
1545         if (DO_BIC(BIC_Pkgpc7))
1546                 average.packages.pc7 += p->pc7;
1547         average.packages.pc8 += p->pc8;
1548         average.packages.pc9 += p->pc9;
1549         average.packages.pc10 += p->pc10;
1550
1551         average.packages.cpu_lpi = p->cpu_lpi;
1552         average.packages.sys_lpi = p->sys_lpi;
1553
1554         average.packages.energy_pkg += p->energy_pkg;
1555         average.packages.energy_dram += p->energy_dram;
1556         average.packages.energy_cores += p->energy_cores;
1557         average.packages.energy_gfx += p->energy_gfx;
1558
1559         average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
1560         average.packages.gfx_mhz = p->gfx_mhz;
1561
1562         average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1563
1564         average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1565         average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
1566
1567         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1568                 if (mp->format == FORMAT_RAW)
1569                         continue;
1570                 average.packages.counter[i] += p->counter[i];
1571         }
1572         return 0;
1573 }
1574 /*
1575  * sum the counters for all cpus in the system
1576  * compute the weighted average
1577  */
1578 void compute_average(struct thread_data *t, struct core_data *c,
1579         struct pkg_data *p)
1580 {
1581         int i;
1582         struct msr_counter *mp;
1583
1584         clear_counters(&average.threads, &average.cores, &average.packages);
1585
1586         for_all_cpus(sum_counters, t, c, p);
1587
1588         average.threads.tsc /= topo.num_cpus;
1589         average.threads.aperf /= topo.num_cpus;
1590         average.threads.mperf /= topo.num_cpus;
1591         average.threads.c1 /= topo.num_cpus;
1592
1593         if (average.threads.irq_count > 9999999)
1594                 sums_need_wide_columns = 1;
1595
1596         average.cores.c3 /= topo.num_cores;
1597         average.cores.c6 /= topo.num_cores;
1598         average.cores.c7 /= topo.num_cores;
1599         average.cores.mc6_us /= topo.num_cores;
1600
1601         if (DO_BIC(BIC_Totl_c0))
1602                 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1603         if (DO_BIC(BIC_Any_c0))
1604                 average.packages.pkg_any_core_c0 /= topo.num_packages;
1605         if (DO_BIC(BIC_GFX_c0))
1606                 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1607         if (DO_BIC(BIC_CPUGFX))
1608                 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1609
1610         average.packages.pc2 /= topo.num_packages;
1611         if (DO_BIC(BIC_Pkgpc3))
1612                 average.packages.pc3 /= topo.num_packages;
1613         if (DO_BIC(BIC_Pkgpc6))
1614                 average.packages.pc6 /= topo.num_packages;
1615         if (DO_BIC(BIC_Pkgpc7))
1616                 average.packages.pc7 /= topo.num_packages;
1617
1618         average.packages.pc8 /= topo.num_packages;
1619         average.packages.pc9 /= topo.num_packages;
1620         average.packages.pc10 /= topo.num_packages;
1621
1622         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1623                 if (mp->format == FORMAT_RAW)
1624                         continue;
1625                 if (mp->type == COUNTER_ITEMS) {
1626                         if (average.threads.counter[i] > 9999999)
1627                                 sums_need_wide_columns = 1;
1628                         continue;
1629                 }
1630                 average.threads.counter[i] /= topo.num_cpus;
1631         }
1632         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1633                 if (mp->format == FORMAT_RAW)
1634                         continue;
1635                 if (mp->type == COUNTER_ITEMS) {
1636                         if (average.cores.counter[i] > 9999999)
1637                                 sums_need_wide_columns = 1;
1638                 }
1639                 average.cores.counter[i] /= topo.num_cores;
1640         }
1641         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1642                 if (mp->format == FORMAT_RAW)
1643                         continue;
1644                 if (mp->type == COUNTER_ITEMS) {
1645                         if (average.packages.counter[i] > 9999999)
1646                                 sums_need_wide_columns = 1;
1647                 }
1648                 average.packages.counter[i] /= topo.num_packages;
1649         }
1650 }
1651
1652 static unsigned long long rdtsc(void)
1653 {
1654         unsigned int low, high;
1655
1656         asm volatile("rdtsc" : "=a" (low), "=d" (high));
1657
1658         return low | ((unsigned long long)high) << 32;
1659 }
1660
1661 /*
1662  * Open a file, and exit on failure
1663  */
1664 FILE *fopen_or_die(const char *path, const char *mode)
1665 {
1666         FILE *filep = fopen(path, mode);
1667
1668         if (!filep)
1669                 err(1, "%s: open failed", path);
1670         return filep;
1671 }
1672 /*
1673  * snapshot_sysfs_counter()
1674  *
1675  * return snapshot of given counter
1676  */
1677 unsigned long long snapshot_sysfs_counter(char *path)
1678 {
1679         FILE *fp;
1680         int retval;
1681         unsigned long long counter;
1682
1683         fp = fopen_or_die(path, "r");
1684
1685         retval = fscanf(fp, "%lld", &counter);
1686         if (retval != 1)
1687                 err(1, "snapshot_sysfs_counter(%s)", path);
1688
1689         fclose(fp);
1690
1691         return counter;
1692 }
1693
1694 int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1695 {
1696         if (mp->msr_num != 0) {
1697                 if (get_msr(cpu, mp->msr_num, counterp))
1698                         return -1;
1699         } else {
1700                 char path[128 + PATH_BYTES];
1701
1702                 if (mp->flags & SYSFS_PERCPU) {
1703                         sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1704                                  cpu, mp->path);
1705
1706                         *counterp = snapshot_sysfs_counter(path);
1707                 } else {
1708                         *counterp = snapshot_sysfs_counter(mp->path);
1709                 }
1710         }
1711
1712         return 0;
1713 }
1714
1715 void get_apic_id(struct thread_data *t)
1716 {
1717         unsigned int eax, ebx, ecx, edx;
1718
1719         if (DO_BIC(BIC_APIC)) {
1720                 eax = ebx = ecx = edx = 0;
1721                 __cpuid(1, eax, ebx, ecx, edx);
1722
1723                 t->apic_id = (ebx >> 24) & 0xff;
1724         }
1725
1726         if (!DO_BIC(BIC_X2APIC))
1727                 return;
1728
1729         if (authentic_amd) {
1730                 unsigned int topology_extensions;
1731
1732                 if (max_extended_level < 0x8000001e)
1733                         return;
1734
1735                 eax = ebx = ecx = edx = 0;
1736                 __cpuid(0x80000001, eax, ebx, ecx, edx);
1737                         topology_extensions = ecx & (1 << 22);
1738
1739                 if (topology_extensions == 0)
1740                         return;
1741
1742                 eax = ebx = ecx = edx = 0;
1743                 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1744
1745                 t->x2apic_id = eax;
1746                 return;
1747         }
1748
1749         if (!genuine_intel)
1750                 return;
1751
1752         if (max_level < 0xb)
1753                 return;
1754
1755         ecx = 0;
1756         __cpuid(0xb, eax, ebx, ecx, edx);
1757         t->x2apic_id = edx;
1758
1759         if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1760                 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1761                                 t->cpu_id, t->apic_id, t->x2apic_id);
1762 }
1763
1764 /*
1765  * get_counters(...)
1766  * migrate to cpu
1767  * acquire and record local counters for that cpu
1768  */
1769 int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1770 {
1771         int cpu = t->cpu_id;
1772         unsigned long long msr;
1773         int aperf_mperf_retry_count = 0;
1774         struct msr_counter *mp;
1775         int i;
1776
1777         gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1778
1779         if (cpu_migrate(cpu)) {
1780                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
1781                 return -1;
1782         }
1783
1784         if (first_counter_read)
1785                 get_apic_id(t);
1786 retry:
1787         t->tsc = rdtsc();       /* we are running on local CPU of interest */
1788
1789         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
1790                 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1791
1792                 /*
1793                  * The TSC, APERF and MPERF must be read together for
1794                  * APERF/MPERF and MPERF/TSC to give accurate results.
1795                  *
1796                  * Unfortunately, APERF and MPERF are read by
1797                  * individual system call, so delays may occur
1798                  * between them.  If the time to read them
1799                  * varies by a large amount, we re-read them.
1800                  */
1801
1802                 /*
1803                  * This initial dummy APERF read has been seen to
1804                  * reduce jitter in the subsequent reads.
1805                  */
1806
1807                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1808                         return -3;
1809
1810                 t->tsc = rdtsc();       /* re-read close to APERF */
1811
1812                 tsc_before = t->tsc;
1813
1814                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1815                         return -3;
1816
1817                 tsc_between = rdtsc();
1818
1819                 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
1820                         return -4;
1821
1822                 tsc_after = rdtsc();
1823
1824                 aperf_time = tsc_between - tsc_before;
1825                 mperf_time = tsc_after - tsc_between;
1826
1827                 /*
1828                  * If the system call latency to read APERF and MPERF
1829                  * differ by more than 2x, then try again.
1830                  */
1831                 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1832                         aperf_mperf_retry_count++;
1833                         if (aperf_mperf_retry_count < 5)
1834                                 goto retry;
1835                         else
1836                                 warnx("cpu%d jitter %lld %lld",
1837                                         cpu, aperf_time, mperf_time);
1838                 }
1839                 aperf_mperf_retry_count = 0;
1840
1841                 t->aperf = t->aperf * aperf_mperf_multiplier;
1842                 t->mperf = t->mperf * aperf_mperf_multiplier;
1843         }
1844
1845         if (DO_BIC(BIC_IRQ))
1846                 t->irq_count = irqs_per_cpu[cpu];
1847         if (DO_BIC(BIC_SMI)) {
1848                 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1849                         return -5;
1850                 t->smi_count = msr & 0xFFFFFFFF;
1851         }
1852         if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
1853                 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1854                         return -6;
1855         }
1856
1857         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1858                 if (get_mp(cpu, mp, &t->counter[i]))
1859                         return -10;
1860         }
1861
1862         /* collect core counters only for 1st thread in core */
1863         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1864                 goto done;
1865
1866         if (DO_BIC(BIC_CPU_c3)) {
1867                 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1868                         return -6;
1869         }
1870
1871         if (DO_BIC(BIC_CPU_c6) && !do_knl_cstates) {
1872                 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1873                         return -7;
1874         } else if (do_knl_cstates) {
1875                 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1876                         return -7;
1877         }
1878
1879         if (DO_BIC(BIC_CPU_c7))
1880                 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1881                         return -8;
1882
1883         if (DO_BIC(BIC_Mod_c6))
1884                 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
1885                         return -8;
1886
1887         if (DO_BIC(BIC_CoreTmp)) {
1888                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1889                         return -9;
1890                 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1891         }
1892
1893         if (do_rapl & RAPL_AMD_F17H) {
1894                 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
1895                         return -14;
1896                 c->core_energy = msr & 0xFFFFFFFF;
1897         }
1898
1899         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1900                 if (get_mp(cpu, mp, &c->counter[i]))
1901                         return -10;
1902         }
1903
1904         /* collect package counters only for 1st core in package */
1905         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1906                 goto done;
1907
1908         if (DO_BIC(BIC_Totl_c0)) {
1909                 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1910                         return -10;
1911         }
1912         if (DO_BIC(BIC_Any_c0)) {
1913                 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1914                         return -11;
1915         }
1916         if (DO_BIC(BIC_GFX_c0)) {
1917                 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1918                         return -12;
1919         }
1920         if (DO_BIC(BIC_CPUGFX)) {
1921                 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1922                         return -13;
1923         }
1924         if (DO_BIC(BIC_Pkgpc3))
1925                 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1926                         return -9;
1927         if (DO_BIC(BIC_Pkgpc6)) {
1928                 if (do_slm_cstates) {
1929                         if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
1930                                 return -10;
1931                 } else {
1932                         if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1933                                 return -10;
1934                 }
1935         }
1936
1937         if (DO_BIC(BIC_Pkgpc2))
1938                 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1939                         return -11;
1940         if (DO_BIC(BIC_Pkgpc7))
1941                 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1942                         return -12;
1943         if (DO_BIC(BIC_Pkgpc8))
1944                 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1945                         return -13;
1946         if (DO_BIC(BIC_Pkgpc9))
1947                 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1948                         return -13;
1949         if (DO_BIC(BIC_Pkgpc10))
1950                 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1951                         return -13;
1952
1953         if (DO_BIC(BIC_CPU_LPI))
1954                 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
1955         if (DO_BIC(BIC_SYS_LPI))
1956                 p->sys_lpi = cpuidle_cur_sys_lpi_us;
1957
1958         if (do_rapl & RAPL_PKG) {
1959                 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1960                         return -13;
1961                 p->energy_pkg = msr & 0xFFFFFFFF;
1962         }
1963         if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
1964                 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1965                         return -14;
1966                 p->energy_cores = msr & 0xFFFFFFFF;
1967         }
1968         if (do_rapl & RAPL_DRAM) {
1969                 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1970                         return -15;
1971                 p->energy_dram = msr & 0xFFFFFFFF;
1972         }
1973         if (do_rapl & RAPL_GFX) {
1974                 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1975                         return -16;
1976                 p->energy_gfx = msr & 0xFFFFFFFF;
1977         }
1978         if (do_rapl & RAPL_PKG_PERF_STATUS) {
1979                 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1980                         return -16;
1981                 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1982         }
1983         if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1984                 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1985                         return -16;
1986                 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1987         }
1988         if (do_rapl & RAPL_AMD_F17H) {
1989                 if (get_msr(cpu, MSR_PKG_ENERGY_STAT, &msr))
1990                         return -13;
1991                 p->energy_pkg = msr & 0xFFFFFFFF;
1992         }
1993         if (DO_BIC(BIC_PkgTmp)) {
1994                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1995                         return -17;
1996                 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1997         }
1998
1999         if (DO_BIC(BIC_GFX_rc6))
2000                 p->gfx_rc6_ms = gfx_cur_rc6_ms;
2001
2002         if (DO_BIC(BIC_GFXMHz))
2003                 p->gfx_mhz = gfx_cur_mhz;
2004
2005         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
2006                 if (get_mp(cpu, mp, &p->counter[i]))
2007                         return -10;
2008         }
2009 done:
2010         gettimeofday(&t->tv_end, (struct timezone *)NULL);
2011
2012         return 0;
2013 }
2014
2015 /*
2016  * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
2017  * If you change the values, note they are used both in comparisons
2018  * (>= PCL__7) and to index pkg_cstate_limit_strings[].
2019  */
2020
2021 #define PCLUKN 0 /* Unknown */
2022 #define PCLRSV 1 /* Reserved */
2023 #define PCL__0 2 /* PC0 */
2024 #define PCL__1 3 /* PC1 */
2025 #define PCL__2 4 /* PC2 */
2026 #define PCL__3 5 /* PC3 */
2027 #define PCL__4 6 /* PC4 */
2028 #define PCL__6 7 /* PC6 */
2029 #define PCL_6N 8 /* PC6 No Retention */
2030 #define PCL_6R 9 /* PC6 Retention */
2031 #define PCL__7 10 /* PC7 */
2032 #define PCL_7S 11 /* PC7 Shrink */
2033 #define PCL__8 12 /* PC8 */
2034 #define PCL__9 13 /* PC9 */
2035 #define PCL_10 14 /* PC10 */
2036 #define PCLUNL 15 /* Unlimited */
2037
2038 int pkg_cstate_limit = PCLUKN;
2039 char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
2040         "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
2041
2042 int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2043 int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2044 int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2045 int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
2046 int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2047 int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2048 int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2049 int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2050
2051
2052 static void
2053 calculate_tsc_tweak()
2054 {
2055         tsc_tweak = base_hz / tsc_hz;
2056 }
2057
2058 static void
2059 dump_nhm_platform_info(void)
2060 {
2061         unsigned long long msr;
2062         unsigned int ratio;
2063
2064         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2065
2066         fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
2067
2068         ratio = (msr >> 40) & 0xFF;
2069         fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
2070                 ratio, bclk, ratio * bclk);
2071
2072         ratio = (msr >> 8) & 0xFF;
2073         fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2074                 ratio, bclk, ratio * bclk);
2075
2076         get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
2077         fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
2078                 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
2079
2080         return;
2081 }
2082
2083 static void
2084 dump_hsw_turbo_ratio_limits(void)
2085 {
2086         unsigned long long msr;
2087         unsigned int ratio;
2088
2089         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
2090
2091         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
2092
2093         ratio = (msr >> 8) & 0xFF;
2094         if (ratio)
2095                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
2096                         ratio, bclk, ratio * bclk);
2097
2098         ratio = (msr >> 0) & 0xFF;
2099         if (ratio)
2100                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
2101                         ratio, bclk, ratio * bclk);
2102         return;
2103 }
2104
2105 static void
2106 dump_ivt_turbo_ratio_limits(void)
2107 {
2108         unsigned long long msr;
2109         unsigned int ratio;
2110
2111         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
2112
2113         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
2114
2115         ratio = (msr >> 56) & 0xFF;
2116         if (ratio)
2117                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
2118                         ratio, bclk, ratio * bclk);
2119
2120         ratio = (msr >> 48) & 0xFF;
2121         if (ratio)
2122                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
2123                         ratio, bclk, ratio * bclk);
2124
2125         ratio = (msr >> 40) & 0xFF;
2126         if (ratio)
2127                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
2128                         ratio, bclk, ratio * bclk);
2129
2130         ratio = (msr >> 32) & 0xFF;
2131         if (ratio)
2132                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
2133                         ratio, bclk, ratio * bclk);
2134
2135         ratio = (msr >> 24) & 0xFF;
2136         if (ratio)
2137                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
2138                         ratio, bclk, ratio * bclk);
2139
2140         ratio = (msr >> 16) & 0xFF;
2141         if (ratio)
2142                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
2143                         ratio, bclk, ratio * bclk);
2144
2145         ratio = (msr >> 8) & 0xFF;
2146         if (ratio)
2147                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
2148                         ratio, bclk, ratio * bclk);
2149
2150         ratio = (msr >> 0) & 0xFF;
2151         if (ratio)
2152                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
2153                         ratio, bclk, ratio * bclk);
2154         return;
2155 }
2156 int has_turbo_ratio_group_limits(int family, int model)
2157 {
2158
2159         if (!genuine_intel)
2160                 return 0;
2161
2162         switch (model) {
2163         case INTEL_FAM6_ATOM_GOLDMONT:
2164         case INTEL_FAM6_SKYLAKE_X:
2165         case INTEL_FAM6_ATOM_GOLDMONT_X:
2166                 return 1;
2167         }
2168         return 0;
2169 }
2170
2171 static void
2172 dump_turbo_ratio_limits(int family, int model)
2173 {
2174         unsigned long long msr, core_counts;
2175         unsigned int ratio, group_size;
2176
2177         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2178         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
2179
2180         if (has_turbo_ratio_group_limits(family, model)) {
2181                 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2182                 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2183         } else {
2184                 core_counts = 0x0807060504030201;
2185         }
2186
2187         ratio = (msr >> 56) & 0xFF;
2188         group_size = (core_counts >> 56) & 0xFF;
2189         if (ratio)
2190                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2191                         ratio, bclk, ratio * bclk, group_size);
2192
2193         ratio = (msr >> 48) & 0xFF;
2194         group_size = (core_counts >> 48) & 0xFF;
2195         if (ratio)
2196                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2197                         ratio, bclk, ratio * bclk, group_size);
2198
2199         ratio = (msr >> 40) & 0xFF;
2200         group_size = (core_counts >> 40) & 0xFF;
2201         if (ratio)
2202                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2203                         ratio, bclk, ratio * bclk, group_size);
2204
2205         ratio = (msr >> 32) & 0xFF;
2206         group_size = (core_counts >> 32) & 0xFF;
2207         if (ratio)
2208                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2209                         ratio, bclk, ratio * bclk, group_size);
2210
2211         ratio = (msr >> 24) & 0xFF;
2212         group_size = (core_counts >> 24) & 0xFF;
2213         if (ratio)
2214                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2215                         ratio, bclk, ratio * bclk, group_size);
2216
2217         ratio = (msr >> 16) & 0xFF;
2218         group_size = (core_counts >> 16) & 0xFF;
2219         if (ratio)
2220                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2221                         ratio, bclk, ratio * bclk, group_size);
2222
2223         ratio = (msr >> 8) & 0xFF;
2224         group_size = (core_counts >> 8) & 0xFF;
2225         if (ratio)
2226                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2227                         ratio, bclk, ratio * bclk, group_size);
2228
2229         ratio = (msr >> 0) & 0xFF;
2230         group_size = (core_counts >> 0) & 0xFF;
2231         if (ratio)
2232                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2233                         ratio, bclk, ratio * bclk, group_size);
2234         return;
2235 }
2236
2237 static void
2238 dump_atom_turbo_ratio_limits(void)
2239 {
2240         unsigned long long msr;
2241         unsigned int ratio;
2242
2243         get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2244         fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2245
2246         ratio = (msr >> 0) & 0x3F;
2247         if (ratio)
2248                 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2249                         ratio, bclk, ratio * bclk);
2250
2251         ratio = (msr >> 8) & 0x3F;
2252         if (ratio)
2253                 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2254                         ratio, bclk, ratio * bclk);
2255
2256         ratio = (msr >> 16) & 0x3F;
2257         if (ratio)
2258                 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2259                         ratio, bclk, ratio * bclk);
2260
2261         get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2262         fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2263
2264         ratio = (msr >> 24) & 0x3F;
2265         if (ratio)
2266                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2267                         ratio, bclk, ratio * bclk);
2268
2269         ratio = (msr >> 16) & 0x3F;
2270         if (ratio)
2271                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2272                         ratio, bclk, ratio * bclk);
2273
2274         ratio = (msr >> 8) & 0x3F;
2275         if (ratio)
2276                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2277                         ratio, bclk, ratio * bclk);
2278
2279         ratio = (msr >> 0) & 0x3F;
2280         if (ratio)
2281                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2282                         ratio, bclk, ratio * bclk);
2283 }
2284
2285 static void
2286 dump_knl_turbo_ratio_limits(void)
2287 {
2288         const unsigned int buckets_no = 7;
2289
2290         unsigned long long msr;
2291         int delta_cores, delta_ratio;
2292         int i, b_nr;
2293         unsigned int cores[buckets_no];
2294         unsigned int ratio[buckets_no];
2295
2296         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2297
2298         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
2299                 base_cpu, msr);
2300
2301         /**
2302          * Turbo encoding in KNL is as follows:
2303          * [0] -- Reserved
2304          * [7:1] -- Base value of number of active cores of bucket 1.
2305          * [15:8] -- Base value of freq ratio of bucket 1.
2306          * [20:16] -- +ve delta of number of active cores of bucket 2.
2307          * i.e. active cores of bucket 2 =
2308          * active cores of bucket 1 + delta
2309          * [23:21] -- Negative delta of freq ratio of bucket 2.
2310          * i.e. freq ratio of bucket 2 =
2311          * freq ratio of bucket 1 - delta
2312          * [28:24]-- +ve delta of number of active cores of bucket 3.
2313          * [31:29]-- -ve delta of freq ratio of bucket 3.
2314          * [36:32]-- +ve delta of number of active cores of bucket 4.
2315          * [39:37]-- -ve delta of freq ratio of bucket 4.
2316          * [44:40]-- +ve delta of number of active cores of bucket 5.
2317          * [47:45]-- -ve delta of freq ratio of bucket 5.
2318          * [52:48]-- +ve delta of number of active cores of bucket 6.
2319          * [55:53]-- -ve delta of freq ratio of bucket 6.
2320          * [60:56]-- +ve delta of number of active cores of bucket 7.
2321          * [63:61]-- -ve delta of freq ratio of bucket 7.
2322          */
2323
2324         b_nr = 0;
2325         cores[b_nr] = (msr & 0xFF) >> 1;
2326         ratio[b_nr] = (msr >> 8) & 0xFF;
2327
2328         for (i = 16; i < 64; i += 8) {
2329                 delta_cores = (msr >> i) & 0x1F;
2330                 delta_ratio = (msr >> (i + 5)) & 0x7;
2331
2332                 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2333                 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2334                 b_nr++;
2335         }
2336
2337         for (i = buckets_no - 1; i >= 0; i--)
2338                 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
2339                         fprintf(outf,
2340                                 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2341                                 ratio[i], bclk, ratio[i] * bclk, cores[i]);
2342 }
2343
2344 static void
2345 dump_nhm_cst_cfg(void)
2346 {
2347         unsigned long long msr;
2348
2349         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
2350
2351         fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
2352
2353         fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
2354                 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2355                 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2356                 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2357                 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2358                 (msr & (1 << 15)) ? "" : "UN",
2359                 (unsigned int)msr & 0xF,
2360                 pkg_cstate_limit_strings[pkg_cstate_limit]);
2361
2362 #define AUTOMATIC_CSTATE_CONVERSION             (1UL << 16)
2363         if (has_automatic_cstate_conversion) {
2364                 fprintf(outf, ", automatic c-state conversion=%s",
2365                         (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2366         }
2367
2368         fprintf(outf, ")\n");
2369
2370         return;
2371 }
2372
2373 static void
2374 dump_config_tdp(void)
2375 {
2376         unsigned long long msr;
2377
2378         get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
2379         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
2380         fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
2381
2382         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
2383         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
2384         if (msr) {
2385                 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2386                 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2387                 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2388                 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
2389         }
2390         fprintf(outf, ")\n");
2391
2392         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
2393         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
2394         if (msr) {
2395                 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2396                 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2397                 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2398                 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
2399         }
2400         fprintf(outf, ")\n");
2401
2402         get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
2403         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
2404         if ((msr) & 0x3)
2405                 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2406         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2407         fprintf(outf, ")\n");
2408
2409         get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
2410         fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
2411         fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
2412         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2413         fprintf(outf, ")\n");
2414 }
2415
2416 unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2417
2418 void print_irtl(void)
2419 {
2420         unsigned long long msr;
2421
2422         get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2423         fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2424         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2425                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2426
2427         get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2428         fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2429         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2430                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2431
2432         get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2433         fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2434         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2435                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2436
2437         if (!do_irtl_hsw)
2438                 return;
2439
2440         get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2441         fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2442         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2443                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2444
2445         get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2446         fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2447         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2448                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2449
2450         get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2451         fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2452         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2453                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2454
2455 }
2456 void free_fd_percpu(void)
2457 {
2458         int i;
2459
2460         for (i = 0; i < topo.max_cpu_num + 1; ++i) {
2461                 if (fd_percpu[i] != 0)
2462                         close(fd_percpu[i]);
2463         }
2464
2465         free(fd_percpu);
2466 }
2467
2468 void free_all_buffers(void)
2469 {
2470         int i;
2471
2472         CPU_FREE(cpu_present_set);
2473         cpu_present_set = NULL;
2474         cpu_present_setsize = 0;
2475
2476         CPU_FREE(cpu_affinity_set);
2477         cpu_affinity_set = NULL;
2478         cpu_affinity_setsize = 0;
2479
2480         free(thread_even);
2481         free(core_even);
2482         free(package_even);
2483
2484         thread_even = NULL;
2485         core_even = NULL;
2486         package_even = NULL;
2487
2488         free(thread_odd);
2489         free(core_odd);
2490         free(package_odd);
2491
2492         thread_odd = NULL;
2493         core_odd = NULL;
2494         package_odd = NULL;
2495
2496         free(output_buffer);
2497         output_buffer = NULL;
2498         outp = NULL;
2499
2500         free_fd_percpu();
2501
2502         free(irq_column_2_cpu);
2503         free(irqs_per_cpu);
2504
2505         for (i = 0; i <= topo.max_cpu_num; ++i) {
2506                 if (cpus[i].put_ids)
2507                         CPU_FREE(cpus[i].put_ids);
2508         }
2509         free(cpus);
2510 }
2511
2512
2513 /*
2514  * Parse a file containing a single int.
2515  * Return 0 if file can not be opened
2516  * Exit if file can be opened, but can not be parsed
2517  */
2518 int parse_int_file(const char *fmt, ...)
2519 {
2520         va_list args;
2521         char path[PATH_MAX];
2522         FILE *filep;
2523         int value;
2524
2525         va_start(args, fmt);
2526         vsnprintf(path, sizeof(path), fmt, args);
2527         va_end(args);
2528         filep = fopen(path, "r");
2529         if (!filep)
2530                 return 0;
2531         if (fscanf(filep, "%d", &value) != 1)
2532                 err(1, "%s: failed to parse number from file", path);
2533         fclose(filep);
2534         return value;
2535 }
2536
2537 /*
2538  * cpu_is_first_core_in_package(cpu)
2539  * return 1 if given CPU is 1st core in package
2540  */
2541 int cpu_is_first_core_in_package(int cpu)
2542 {
2543         return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
2544 }
2545
2546 int get_physical_package_id(int cpu)
2547 {
2548         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
2549 }
2550
2551 int get_die_id(int cpu)
2552 {
2553         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu);
2554 }
2555
2556 int get_core_id(int cpu)
2557 {
2558         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
2559 }
2560
2561 void set_node_data(void)
2562 {
2563         int pkg, node, lnode, cpu, cpux;
2564         int cpu_count;
2565
2566         /* initialize logical_node_id */
2567         for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2568                 cpus[cpu].logical_node_id = -1;
2569
2570         cpu_count = 0;
2571         for (pkg = 0; pkg < topo.num_packages; pkg++) {
2572                 lnode = 0;
2573                 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2574                         if (cpus[cpu].physical_package_id != pkg)
2575                                 continue;
2576                         /* find a cpu with an unset logical_node_id */
2577                         if (cpus[cpu].logical_node_id != -1)
2578                                 continue;
2579                         cpus[cpu].logical_node_id = lnode;
2580                         node = cpus[cpu].physical_node_id;
2581                         cpu_count++;
2582                         /*
2583                          * find all matching cpus on this pkg and set
2584                          * the logical_node_id
2585                          */
2586                         for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2587                                 if ((cpus[cpux].physical_package_id == pkg) &&
2588                                    (cpus[cpux].physical_node_id == node)) {
2589                                         cpus[cpux].logical_node_id = lnode;
2590                                         cpu_count++;
2591                                 }
2592                         }
2593                         lnode++;
2594                         if (lnode > topo.nodes_per_pkg)
2595                                 topo.nodes_per_pkg = lnode;
2596                 }
2597                 if (cpu_count >= topo.max_cpu_num)
2598                         break;
2599         }
2600 }
2601
2602 int get_physical_node_id(struct cpu_topology *thiscpu)
2603 {
2604         char path[80];
2605         FILE *filep;
2606         int i;
2607         int cpu = thiscpu->logical_cpu_id;
2608
2609         for (i = 0; i <= topo.max_cpu_num; i++) {
2610                 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2611                         cpu, i);
2612                 filep = fopen(path, "r");
2613                 if (!filep)
2614                         continue;
2615                 fclose(filep);
2616                 return i;
2617         }
2618         return -1;
2619 }
2620
2621 int get_thread_siblings(struct cpu_topology *thiscpu)
2622 {
2623         char path[80], character;
2624         FILE *filep;
2625         unsigned long map;
2626         int so, shift, sib_core;
2627         int cpu = thiscpu->logical_cpu_id;
2628         int offset = topo.max_cpu_num + 1;
2629         size_t size;
2630         int thread_id = 0;
2631
2632         thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
2633         if (thiscpu->thread_id < 0)
2634                 thiscpu->thread_id = thread_id++;
2635         if (!thiscpu->put_ids)
2636                 return -1;
2637
2638         size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2639         CPU_ZERO_S(size, thiscpu->put_ids);
2640
2641         sprintf(path,
2642                 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2643         filep = fopen_or_die(path, "r");
2644         do {
2645                 offset -= BITMASK_SIZE;
2646                 if (fscanf(filep, "%lx%c", &map, &character) != 2)
2647                         err(1, "%s: failed to parse file", path);
2648                 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2649                         if ((map >> shift) & 0x1) {
2650                                 so = shift + offset;
2651                                 sib_core = get_core_id(so);
2652                                 if (sib_core == thiscpu->physical_core_id) {
2653                                         CPU_SET_S(so, size, thiscpu->put_ids);
2654                                         if ((so != cpu) &&
2655                                             (cpus[so].thread_id < 0))
2656                                                 cpus[so].thread_id =
2657                                                                     thread_id++;
2658                                 }
2659                         }
2660                 }
2661         } while (!strncmp(&character, ",", 1));
2662         fclose(filep);
2663
2664         return CPU_COUNT_S(size, thiscpu->put_ids);
2665 }
2666
2667 /*
2668  * run func(thread, core, package) in topology order
2669  * skip non-present cpus
2670  */
2671
2672 int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2673         struct pkg_data *, struct thread_data *, struct core_data *,
2674         struct pkg_data *), struct thread_data *thread_base,
2675         struct core_data *core_base, struct pkg_data *pkg_base,
2676         struct thread_data *thread_base2, struct core_data *core_base2,
2677         struct pkg_data *pkg_base2)
2678 {
2679         int retval, pkg_no, node_no, core_no, thread_no;
2680
2681         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
2682                 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2683                         for (core_no = 0; core_no < topo.cores_per_node;
2684                              ++core_no) {
2685                                 for (thread_no = 0; thread_no <
2686                                         topo.threads_per_core; ++thread_no) {
2687                                         struct thread_data *t, *t2;
2688                                         struct core_data *c, *c2;
2689                                         struct pkg_data *p, *p2;
2690
2691                                         t = GET_THREAD(thread_base, thread_no,
2692                                                        core_no, node_no,
2693                                                        pkg_no);
2694
2695                                         if (cpu_is_not_present(t->cpu_id))
2696                                                 continue;
2697
2698                                         t2 = GET_THREAD(thread_base2, thread_no,
2699                                                         core_no, node_no,
2700                                                         pkg_no);
2701
2702                                         c = GET_CORE(core_base, core_no,
2703                                                      node_no, pkg_no);
2704                                         c2 = GET_CORE(core_base2, core_no,
2705                                                       node_no,
2706                                                       pkg_no);
2707
2708                                         p = GET_PKG(pkg_base, pkg_no);
2709                                         p2 = GET_PKG(pkg_base2, pkg_no);
2710
2711                                         retval = func(t, c, p, t2, c2, p2);
2712                                         if (retval)
2713                                                 return retval;
2714                                 }
2715                         }
2716                 }
2717         }
2718         return 0;
2719 }
2720
2721 /*
2722  * run func(cpu) on every cpu in /proc/stat
2723  * return max_cpu number
2724  */
2725 int for_all_proc_cpus(int (func)(int))
2726 {
2727         FILE *fp;
2728         int cpu_num;
2729         int retval;
2730
2731         fp = fopen_or_die(proc_stat, "r");
2732
2733         retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
2734         if (retval != 0)
2735                 err(1, "%s: failed to parse format", proc_stat);
2736
2737         while (1) {
2738                 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
2739                 if (retval != 1)
2740                         break;
2741
2742                 retval = func(cpu_num);
2743                 if (retval) {
2744                         fclose(fp);
2745                         return(retval);
2746                 }
2747         }
2748         fclose(fp);
2749         return 0;
2750 }
2751
2752 void re_initialize(void)
2753 {
2754         free_all_buffers();
2755         setup_all_buffers();
2756         printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
2757 }
2758
2759 void set_max_cpu_num(void)
2760 {
2761         FILE *filep;
2762         unsigned long dummy;
2763
2764         topo.max_cpu_num = 0;
2765         filep = fopen_or_die(
2766                         "/sys/devices/system/cpu/cpu0/topology/thread_siblings",
2767                         "r");
2768         while (fscanf(filep, "%lx,", &dummy) == 1)
2769                 topo.max_cpu_num += BITMASK_SIZE;
2770         fclose(filep);
2771         topo.max_cpu_num--; /* 0 based */
2772 }
2773
2774 /*
2775  * count_cpus()
2776  * remember the last one seen, it will be the max
2777  */
2778 int count_cpus(int cpu)
2779 {
2780         topo.num_cpus++;
2781         return 0;
2782 }
2783 int mark_cpu_present(int cpu)
2784 {
2785         CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
2786         return 0;
2787 }
2788
2789 int init_thread_id(int cpu)
2790 {
2791         cpus[cpu].thread_id = -1;
2792         return 0;
2793 }
2794
2795 /*
2796  * snapshot_proc_interrupts()
2797  *
2798  * read and record summary of /proc/interrupts
2799  *
2800  * return 1 if config change requires a restart, else return 0
2801  */
2802 int snapshot_proc_interrupts(void)
2803 {
2804         static FILE *fp;
2805         int column, retval;
2806
2807         if (fp == NULL)
2808                 fp = fopen_or_die("/proc/interrupts", "r");
2809         else
2810                 rewind(fp);
2811
2812         /* read 1st line of /proc/interrupts to get cpu* name for each column */
2813         for (column = 0; column < topo.num_cpus; ++column) {
2814                 int cpu_number;
2815
2816                 retval = fscanf(fp, " CPU%d", &cpu_number);
2817                 if (retval != 1)
2818                         break;
2819
2820                 if (cpu_number > topo.max_cpu_num) {
2821                         warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
2822                         return 1;
2823                 }
2824
2825                 irq_column_2_cpu[column] = cpu_number;
2826                 irqs_per_cpu[cpu_number] = 0;
2827         }
2828
2829         /* read /proc/interrupt count lines and sum up irqs per cpu */
2830         while (1) {
2831                 int column;
2832                 char buf[64];
2833
2834                 retval = fscanf(fp, " %s:", buf);       /* flush irq# "N:" */
2835                 if (retval != 1)
2836                         break;
2837
2838                 /* read the count per cpu */
2839                 for (column = 0; column < topo.num_cpus; ++column) {
2840
2841                         int cpu_number, irq_count;
2842
2843                         retval = fscanf(fp, " %d", &irq_count);
2844                         if (retval != 1)
2845                                 break;
2846
2847                         cpu_number = irq_column_2_cpu[column];
2848                         irqs_per_cpu[cpu_number] += irq_count;
2849
2850                 }
2851
2852                 while (getc(fp) != '\n')
2853                         ;       /* flush interrupt description */
2854
2855         }
2856         return 0;
2857 }
2858 /*
2859  * snapshot_gfx_rc6_ms()
2860  *
2861  * record snapshot of
2862  * /sys/class/drm/card0/power/rc6_residency_ms
2863  *
2864  * return 1 if config change requires a restart, else return 0
2865  */
2866 int snapshot_gfx_rc6_ms(void)
2867 {
2868         FILE *fp;
2869         int retval;
2870
2871         fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
2872
2873         retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
2874         if (retval != 1)
2875                 err(1, "GFX rc6");
2876
2877         fclose(fp);
2878
2879         return 0;
2880 }
2881 /*
2882  * snapshot_gfx_mhz()
2883  *
2884  * record snapshot of
2885  * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
2886  *
2887  * return 1 if config change requires a restart, else return 0
2888  */
2889 int snapshot_gfx_mhz(void)
2890 {
2891         static FILE *fp;
2892         int retval;
2893
2894         if (fp == NULL)
2895                 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
2896         else {
2897                 rewind(fp);
2898                 fflush(fp);
2899         }
2900
2901         retval = fscanf(fp, "%d", &gfx_cur_mhz);
2902         if (retval != 1)
2903                 err(1, "GFX MHz");
2904
2905         return 0;
2906 }
2907
2908 /*
2909  * snapshot_cpu_lpi()
2910  *
2911  * record snapshot of
2912  * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
2913  *
2914  * return 1 if config change requires a restart, else return 0
2915  */
2916 int snapshot_cpu_lpi_us(void)
2917 {
2918         FILE *fp;
2919         int retval;
2920
2921         fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
2922
2923         retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
2924         if (retval != 1) {
2925                 fprintf(stderr, "Disabling Low Power Idle CPU output\n");
2926                 BIC_NOT_PRESENT(BIC_CPU_LPI);
2927                 return -1;
2928         }
2929
2930         fclose(fp);
2931
2932         return 0;
2933 }
2934 /*
2935  * snapshot_sys_lpi()
2936  *
2937  * record snapshot of
2938  * /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
2939  *
2940  * return 1 if config change requires a restart, else return 0
2941  */
2942 int snapshot_sys_lpi_us(void)
2943 {
2944         FILE *fp;
2945         int retval;
2946
2947         fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", "r");
2948
2949         retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
2950         if (retval != 1) {
2951                 fprintf(stderr, "Disabling Low Power Idle System output\n");
2952                 BIC_NOT_PRESENT(BIC_SYS_LPI);
2953                 return -1;
2954         }
2955         fclose(fp);
2956
2957         return 0;
2958 }
2959 /*
2960  * snapshot /proc and /sys files
2961  *
2962  * return 1 if configuration restart needed, else return 0
2963  */
2964 int snapshot_proc_sysfs_files(void)
2965 {
2966         if (DO_BIC(BIC_IRQ))
2967                 if (snapshot_proc_interrupts())
2968                         return 1;
2969
2970         if (DO_BIC(BIC_GFX_rc6))
2971                 snapshot_gfx_rc6_ms();
2972
2973         if (DO_BIC(BIC_GFXMHz))
2974                 snapshot_gfx_mhz();
2975
2976         if (DO_BIC(BIC_CPU_LPI))
2977                 snapshot_cpu_lpi_us();
2978
2979         if (DO_BIC(BIC_SYS_LPI))
2980                 snapshot_sys_lpi_us();
2981
2982         return 0;
2983 }
2984
2985 int exit_requested;
2986
2987 static void signal_handler (int signal)
2988 {
2989         switch (signal) {
2990         case SIGINT:
2991                 exit_requested = 1;
2992                 if (debug)
2993                         fprintf(stderr, " SIGINT\n");
2994                 break;
2995         case SIGUSR1:
2996                 if (debug > 1)
2997                         fprintf(stderr, "SIGUSR1\n");
2998                 break;
2999         }
3000         /* make sure this manually-invoked interval is at least 1ms long */
3001         nanosleep(&one_msec, NULL);
3002 }
3003
3004 void setup_signal_handler(void)
3005 {
3006         struct sigaction sa;
3007
3008         memset(&sa, 0, sizeof(sa));
3009
3010         sa.sa_handler = &signal_handler;
3011
3012         if (sigaction(SIGINT, &sa, NULL) < 0)
3013                 err(1, "sigaction SIGINT");
3014         if (sigaction(SIGUSR1, &sa, NULL) < 0)
3015                 err(1, "sigaction SIGUSR1");
3016 }
3017
3018 void do_sleep(void)
3019 {
3020         struct timeval select_timeout;
3021         fd_set readfds;
3022         int retval;
3023
3024         FD_ZERO(&readfds);
3025         FD_SET(0, &readfds);
3026
3027         if (!isatty(fileno(stdin))) {
3028                 nanosleep(&interval_ts, NULL);
3029                 return;
3030         }
3031
3032         select_timeout = interval_tv;
3033         retval = select(1, &readfds, NULL, NULL, &select_timeout);
3034
3035         if (retval == 1) {
3036                 switch (getc(stdin)) {
3037                 case 'q':
3038                         exit_requested = 1;
3039                         break;
3040                 }
3041                 /* make sure this manually-invoked interval is at least 1ms long */
3042                 nanosleep(&one_msec, NULL);
3043         }
3044 }
3045
3046
3047 void turbostat_loop()
3048 {
3049         int retval;
3050         int restarted = 0;
3051         int done_iters = 0;
3052
3053         setup_signal_handler();
3054
3055 restart:
3056         restarted++;
3057
3058         snapshot_proc_sysfs_files();
3059         retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3060         first_counter_read = 0;
3061         if (retval < -1) {
3062                 exit(retval);
3063         } else if (retval == -1) {
3064                 if (restarted > 1) {
3065                         exit(retval);
3066                 }
3067                 re_initialize();
3068                 goto restart;
3069         }
3070         restarted = 0;
3071         done_iters = 0;
3072         gettimeofday(&tv_even, (struct timezone *)NULL);
3073
3074         while (1) {
3075                 if (for_all_proc_cpus(cpu_is_not_present)) {
3076                         re_initialize();
3077                         goto restart;
3078                 }
3079                 do_sleep();
3080                 if (snapshot_proc_sysfs_files())
3081                         goto restart;
3082                 retval = for_all_cpus(get_counters, ODD_COUNTERS);
3083                 if (retval < -1) {
3084                         exit(retval);
3085                 } else if (retval == -1) {
3086                         re_initialize();
3087                         goto restart;
3088                 }
3089                 gettimeofday(&tv_odd, (struct timezone *)NULL);
3090                 timersub(&tv_odd, &tv_even, &tv_delta);
3091                 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3092                         re_initialize();
3093                         goto restart;
3094                 }
3095                 compute_average(EVEN_COUNTERS);
3096                 format_all_counters(EVEN_COUNTERS);
3097                 flush_output_stdout();
3098                 if (exit_requested)
3099                         break;
3100                 if (num_iterations && ++done_iters >= num_iterations)
3101                         break;
3102                 do_sleep();
3103                 if (snapshot_proc_sysfs_files())
3104                         goto restart;
3105                 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3106                 if (retval < -1) {
3107                         exit(retval);
3108                 } else if (retval == -1) {
3109                         re_initialize();
3110                         goto restart;
3111                 }
3112                 gettimeofday(&tv_even, (struct timezone *)NULL);
3113                 timersub(&tv_even, &tv_odd, &tv_delta);
3114                 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3115                         re_initialize();
3116                         goto restart;
3117                 }
3118                 compute_average(ODD_COUNTERS);
3119                 format_all_counters(ODD_COUNTERS);
3120                 flush_output_stdout();
3121                 if (exit_requested)
3122                         break;
3123                 if (num_iterations && ++done_iters >= num_iterations)
3124                         break;
3125         }
3126 }
3127
3128 void check_dev_msr()
3129 {
3130         struct stat sb;
3131         char pathname[32];
3132
3133         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3134         if (stat(pathname, &sb))
3135                 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3136                         err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
3137 }
3138
3139 void check_permissions()
3140 {
3141         struct __user_cap_header_struct cap_header_data;
3142         cap_user_header_t cap_header = &cap_header_data;
3143         struct __user_cap_data_struct cap_data_data;
3144         cap_user_data_t cap_data = &cap_data_data;
3145         extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
3146         int do_exit = 0;
3147         char pathname[32];
3148
3149         /* check for CAP_SYS_RAWIO */
3150         cap_header->pid = getpid();
3151         cap_header->version = _LINUX_CAPABILITY_VERSION;
3152         if (capget(cap_header, cap_data) < 0)
3153                 err(-6, "capget(2) failed");
3154
3155         if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
3156                 do_exit++;
3157                 warnx("capget(CAP_SYS_RAWIO) failed,"
3158                         " try \"# setcap cap_sys_rawio=ep %s\"", progname);
3159         }
3160
3161         /* test file permissions */
3162         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3163         if (euidaccess(pathname, R_OK)) {
3164                 do_exit++;
3165                 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3166         }
3167
3168         /* if all else fails, thell them to be root */
3169         if (do_exit)
3170                 if (getuid() != 0)
3171                         warnx("... or simply run as root");
3172
3173         if (do_exit)
3174                 exit(-6);
3175 }
3176
3177 /*
3178  * NHM adds support for additional MSRs:
3179  *
3180  * MSR_SMI_COUNT                   0x00000034
3181  *
3182  * MSR_PLATFORM_INFO               0x000000ce
3183  * MSR_PKG_CST_CONFIG_CONTROL     0x000000e2
3184  *
3185  * MSR_MISC_PWR_MGMT               0x000001aa
3186  *
3187  * MSR_PKG_C3_RESIDENCY            0x000003f8
3188  * MSR_PKG_C6_RESIDENCY            0x000003f9
3189  * MSR_CORE_C3_RESIDENCY           0x000003fc
3190  * MSR_CORE_C6_RESIDENCY           0x000003fd
3191  *
3192  * Side effect:
3193  * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
3194  * sets has_misc_feature_control
3195  */
3196 int probe_nhm_msrs(unsigned int family, unsigned int model)
3197 {
3198         unsigned long long msr;
3199         unsigned int base_ratio;
3200         int *pkg_cstate_limits;
3201
3202         if (!genuine_intel)
3203                 return 0;
3204
3205         if (family != 6)
3206                 return 0;
3207
3208         bclk = discover_bclk(family, model);
3209
3210         switch (model) {
3211         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
3212         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3213                 pkg_cstate_limits = nhm_pkg_cstate_limits;
3214                 break;
3215         case INTEL_FAM6_SANDYBRIDGE:    /* SNB */
3216         case INTEL_FAM6_SANDYBRIDGE_X:  /* SNB Xeon */
3217         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3218         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3219                 pkg_cstate_limits = snb_pkg_cstate_limits;
3220                 has_misc_feature_control = 1;
3221                 break;
3222         case INTEL_FAM6_HASWELL_CORE:   /* HSW */
3223         case INTEL_FAM6_HASWELL_X:      /* HSX */
3224         case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
3225         case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3226         case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3227         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3228         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3229         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
3230                 pkg_cstate_limits = hsw_pkg_cstate_limits;
3231                 has_misc_feature_control = 1;
3232                 break;
3233         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3234                 pkg_cstate_limits = skx_pkg_cstate_limits;
3235                 has_misc_feature_control = 1;
3236                 break;
3237         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
3238                 no_MSR_MISC_PWR_MGMT = 1;
3239         case INTEL_FAM6_ATOM_SILVERMONT_X:      /* AVN */
3240                 pkg_cstate_limits = slv_pkg_cstate_limits;
3241                 break;
3242         case INTEL_FAM6_ATOM_AIRMONT:   /* AMT */
3243                 pkg_cstate_limits = amt_pkg_cstate_limits;
3244                 no_MSR_MISC_PWR_MGMT = 1;
3245                 break;
3246         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI */
3247                 pkg_cstate_limits = phi_pkg_cstate_limits;
3248                 break;
3249         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
3250         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3251         case INTEL_FAM6_ATOM_GOLDMONT_X:        /* DNV */
3252                 pkg_cstate_limits = glm_pkg_cstate_limits;
3253                 break;
3254         default:
3255                 return 0;
3256         }
3257         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
3258         pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
3259
3260         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
3261         base_ratio = (msr >> 8) & 0xFF;
3262
3263         base_hz = base_ratio * bclk * 1000000;
3264         has_base_hz = 1;
3265         return 1;
3266 }
3267 /*
3268  * SLV client has support for unique MSRs:
3269  *
3270  * MSR_CC6_DEMOTION_POLICY_CONFIG
3271  * MSR_MC6_DEMOTION_POLICY_CONFIG
3272  */
3273
3274 int has_slv_msrs(unsigned int family, unsigned int model)
3275 {
3276         if (!genuine_intel)
3277                 return 0;
3278
3279         switch (model) {
3280         case INTEL_FAM6_ATOM_SILVERMONT:
3281         case INTEL_FAM6_ATOM_SILVERMONT_MID:
3282         case INTEL_FAM6_ATOM_AIRMONT_MID:
3283                 return 1;
3284         }
3285         return 0;
3286 }
3287 int is_dnv(unsigned int family, unsigned int model)
3288 {
3289
3290         if (!genuine_intel)
3291                 return 0;
3292
3293         switch (model) {
3294         case INTEL_FAM6_ATOM_GOLDMONT_X:
3295                 return 1;
3296         }
3297         return 0;
3298 }
3299 int is_bdx(unsigned int family, unsigned int model)
3300 {
3301
3302         if (!genuine_intel)
3303                 return 0;
3304
3305         switch (model) {
3306         case INTEL_FAM6_BROADWELL_X:
3307                 return 1;
3308         }
3309         return 0;
3310 }
3311 int is_skx(unsigned int family, unsigned int model)
3312 {
3313
3314         if (!genuine_intel)
3315                 return 0;
3316
3317         switch (model) {
3318         case INTEL_FAM6_SKYLAKE_X:
3319                 return 1;
3320         }
3321         return 0;
3322 }
3323
3324 int has_turbo_ratio_limit(unsigned int family, unsigned int model)
3325 {
3326         if (has_slv_msrs(family, model))
3327                 return 0;
3328
3329         switch (model) {
3330         /* Nehalem compatible, but do not include turbo-ratio limit support */
3331         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3332         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI - Knights Landing (different MSR definition) */
3333                 return 0;
3334         default:
3335                 return 1;
3336         }
3337 }
3338 int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3339 {
3340         if (has_slv_msrs(family, model))
3341                 return 1;
3342
3343         return 0;
3344 }
3345 int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3346 {
3347         if (!genuine_intel)
3348                 return 0;
3349
3350         if (family != 6)
3351                 return 0;
3352
3353         switch (model) {
3354         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3355         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3356                 return 1;
3357         default:
3358                 return 0;
3359         }
3360 }
3361 int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3362 {
3363         if (!genuine_intel)
3364                 return 0;
3365
3366         if (family != 6)
3367                 return 0;
3368
3369         switch (model) {
3370         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3371                 return 1;
3372         default:
3373                 return 0;
3374         }
3375 }
3376
3377 int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3378 {
3379         if (!genuine_intel)
3380                 return 0;
3381
3382         if (family != 6)
3383                 return 0;
3384
3385         switch (model) {
3386         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3387                 return 1;
3388         default:
3389                 return 0;
3390         }
3391 }
3392 int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3393 {
3394         if (!genuine_intel)
3395                 return 0;
3396
3397         if (family != 6)
3398                 return 0;
3399
3400         switch (model) {
3401         case INTEL_FAM6_ATOM_GOLDMONT:
3402         case INTEL_FAM6_SKYLAKE_X:
3403                 return 1;
3404         default:
3405                 return 0;
3406         }
3407 }
3408 int has_config_tdp(unsigned int family, unsigned int model)
3409 {
3410         if (!genuine_intel)
3411                 return 0;
3412
3413         if (family != 6)
3414                 return 0;
3415
3416         switch (model) {
3417         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3418         case INTEL_FAM6_HASWELL_CORE:   /* HSW */
3419         case INTEL_FAM6_HASWELL_X:      /* HSX */
3420         case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
3421         case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3422         case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3423         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3424         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3425         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
3426         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3427
3428         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3429                 return 1;
3430         default:
3431                 return 0;
3432         }
3433 }
3434
3435 static void
3436 dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
3437 {
3438         if (!do_nhm_platform_info)
3439                 return;
3440
3441         dump_nhm_platform_info();
3442
3443         if (has_hsw_turbo_ratio_limit(family, model))
3444                 dump_hsw_turbo_ratio_limits();
3445
3446         if (has_ivt_turbo_ratio_limit(family, model))
3447                 dump_ivt_turbo_ratio_limits();
3448
3449         if (has_turbo_ratio_limit(family, model))
3450                 dump_turbo_ratio_limits(family, model);
3451
3452         if (has_atom_turbo_ratio_limit(family, model))
3453                 dump_atom_turbo_ratio_limits();
3454
3455         if (has_knl_turbo_ratio_limit(family, model))
3456                 dump_knl_turbo_ratio_limits();
3457
3458         if (has_config_tdp(family, model))
3459                 dump_config_tdp();
3460
3461         dump_nhm_cst_cfg();
3462 }
3463
3464 static void
3465 dump_sysfs_cstate_config(void)
3466 {
3467         char path[64];
3468         char name_buf[16];
3469         char desc[64];
3470         FILE *input;
3471         int state;
3472         char *sp;
3473
3474         if (!DO_BIC(BIC_sysfs))
3475                 return;
3476
3477         for (state = 0; state < 10; ++state) {
3478
3479                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3480                         base_cpu, state);
3481                 input = fopen(path, "r");
3482                 if (input == NULL)
3483                         continue;
3484                 if (!fgets(name_buf, sizeof(name_buf), input))
3485                         err(1, "%s: failed to read file", path);
3486
3487                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3488                 sp = strchr(name_buf, '-');
3489                 if (!sp)
3490                         sp = strchrnul(name_buf, '\n');
3491                 *sp = '\0';
3492                 fclose(input);
3493
3494                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3495                         base_cpu, state);
3496                 input = fopen(path, "r");
3497                 if (input == NULL)
3498                         continue;
3499                 if (!fgets(desc, sizeof(desc), input))
3500                         err(1, "%s: failed to read file", path);
3501
3502                 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3503                 fclose(input);
3504         }
3505 }
3506 static void
3507 dump_sysfs_pstate_config(void)
3508 {
3509         char path[64];
3510         char driver_buf[64];
3511         char governor_buf[64];
3512         FILE *input;
3513         int turbo;
3514
3515         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3516                         base_cpu);
3517         input = fopen(path, "r");
3518         if (input == NULL) {
3519                 fprintf(outf, "NSFOD %s\n", path);
3520                 return;
3521         }
3522         if (!fgets(driver_buf, sizeof(driver_buf), input))
3523                 err(1, "%s: failed to read file", path);
3524         fclose(input);
3525
3526         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3527                         base_cpu);
3528         input = fopen(path, "r");
3529         if (input == NULL) {
3530                 fprintf(outf, "NSFOD %s\n", path);
3531                 return;
3532         }
3533         if (!fgets(governor_buf, sizeof(governor_buf), input))
3534                 err(1, "%s: failed to read file", path);
3535         fclose(input);
3536
3537         fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3538         fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3539
3540         sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3541         input = fopen(path, "r");
3542         if (input != NULL) {
3543                 if (fscanf(input, "%d", &turbo) != 1)
3544                         err(1, "%s: failed to parse number from file", path);
3545                 fprintf(outf, "cpufreq boost: %d\n", turbo);
3546                 fclose(input);
3547         }
3548
3549         sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3550         input = fopen(path, "r");
3551         if (input != NULL) {
3552                 if (fscanf(input, "%d", &turbo) != 1)
3553                         err(1, "%s: failed to parse number from file", path);
3554                 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3555                 fclose(input);
3556         }
3557 }
3558
3559
3560 /*
3561  * print_epb()
3562  * Decode the ENERGY_PERF_BIAS MSR
3563  */
3564 int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3565 {
3566         unsigned long long msr;
3567         char *epb_string;
3568         int cpu;
3569
3570         if (!has_epb)
3571                 return 0;
3572
3573         cpu = t->cpu_id;
3574
3575         /* EPB is per-package */
3576         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3577                 return 0;
3578
3579         if (cpu_migrate(cpu)) {
3580                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3581                 return -1;
3582         }
3583
3584         if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
3585                 return 0;
3586
3587         switch (msr & 0xF) {
3588         case ENERGY_PERF_BIAS_PERFORMANCE:
3589                 epb_string = "performance";
3590                 break;
3591         case ENERGY_PERF_BIAS_NORMAL:
3592                 epb_string = "balanced";
3593                 break;
3594         case ENERGY_PERF_BIAS_POWERSAVE:
3595                 epb_string = "powersave";
3596                 break;
3597         default:
3598                 epb_string = "custom";
3599                 break;
3600         }
3601         fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
3602
3603         return 0;
3604 }
3605 /*
3606  * print_hwp()
3607  * Decode the MSR_HWP_CAPABILITIES
3608  */
3609 int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3610 {
3611         unsigned long long msr;
3612         int cpu;
3613
3614         if (!has_hwp)
3615                 return 0;
3616
3617         cpu = t->cpu_id;
3618
3619         /* MSR_HWP_CAPABILITIES is per-package */
3620         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3621                 return 0;
3622
3623         if (cpu_migrate(cpu)) {
3624                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3625                 return -1;
3626         }
3627
3628         if (get_msr(cpu, MSR_PM_ENABLE, &msr))
3629                 return 0;
3630
3631         fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
3632                 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
3633
3634         /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
3635         if ((msr & (1 << 0)) == 0)
3636                 return 0;
3637
3638         if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
3639                 return 0;
3640
3641         fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
3642                         "(high %d guar %d eff %d low %d)\n",
3643                         cpu, msr,
3644                         (unsigned int)HWP_HIGHEST_PERF(msr),
3645                         (unsigned int)HWP_GUARANTEED_PERF(msr),
3646                         (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
3647                         (unsigned int)HWP_LOWEST_PERF(msr));
3648
3649         if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
3650                 return 0;
3651
3652         fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
3653                         "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
3654                         cpu, msr,
3655                         (unsigned int)(((msr) >> 0) & 0xff),
3656                         (unsigned int)(((msr) >> 8) & 0xff),
3657                         (unsigned int)(((msr) >> 16) & 0xff),
3658                         (unsigned int)(((msr) >> 24) & 0xff),
3659                         (unsigned int)(((msr) >> 32) & 0xff3),
3660                         (unsigned int)(((msr) >> 42) & 0x1));
3661
3662         if (has_hwp_pkg) {
3663                 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
3664                         return 0;
3665
3666                 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
3667                         "(min %d max %d des %d epp 0x%x window 0x%x)\n",
3668                         cpu, msr,
3669                         (unsigned int)(((msr) >> 0) & 0xff),
3670                         (unsigned int)(((msr) >> 8) & 0xff),
3671                         (unsigned int)(((msr) >> 16) & 0xff),
3672                         (unsigned int)(((msr) >> 24) & 0xff),
3673                         (unsigned int)(((msr) >> 32) & 0xff3));
3674         }
3675         if (has_hwp_notify) {
3676                 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
3677                         return 0;
3678
3679                 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
3680                         "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
3681                         cpu, msr,
3682                         ((msr) & 0x1) ? "EN" : "Dis",
3683                         ((msr) & 0x2) ? "EN" : "Dis");
3684         }
3685         if (get_msr(cpu, MSR_HWP_STATUS, &msr))
3686                 return 0;
3687
3688         fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
3689                         "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
3690                         cpu, msr,
3691                         ((msr) & 0x1) ? "" : "No-",
3692                         ((msr) & 0x2) ? "" : "No-");
3693
3694         return 0;
3695 }
3696
3697 /*
3698  * print_perf_limit()
3699  */
3700 int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3701 {
3702         unsigned long long msr;
3703         int cpu;
3704
3705         cpu = t->cpu_id;
3706
3707         /* per-package */
3708         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3709                 return 0;
3710
3711         if (cpu_migrate(cpu)) {
3712                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3713                 return -1;
3714         }
3715
3716         if (do_core_perf_limit_reasons) {
3717                 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
3718                 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3719                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
3720                         (msr & 1 << 15) ? "bit15, " : "",
3721                         (msr & 1 << 14) ? "bit14, " : "",
3722                         (msr & 1 << 13) ? "Transitions, " : "",
3723                         (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
3724                         (msr & 1 << 11) ? "PkgPwrL2, " : "",
3725                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
3726                         (msr & 1 << 9) ? "CorePwr, " : "",
3727                         (msr & 1 << 8) ? "Amps, " : "",
3728                         (msr & 1 << 6) ? "VR-Therm, " : "",
3729                         (msr & 1 << 5) ? "Auto-HWP, " : "",
3730                         (msr & 1 << 4) ? "Graphics, " : "",
3731                         (msr & 1 << 2) ? "bit2, " : "",
3732                         (msr & 1 << 1) ? "ThermStatus, " : "",
3733                         (msr & 1 << 0) ? "PROCHOT, " : "");
3734                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
3735                         (msr & 1 << 31) ? "bit31, " : "",
3736                         (msr & 1 << 30) ? "bit30, " : "",
3737                         (msr & 1 << 29) ? "Transitions, " : "",
3738                         (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
3739                         (msr & 1 << 27) ? "PkgPwrL2, " : "",
3740                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
3741                         (msr & 1 << 25) ? "CorePwr, " : "",
3742                         (msr & 1 << 24) ? "Amps, " : "",
3743                         (msr & 1 << 22) ? "VR-Therm, " : "",
3744                         (msr & 1 << 21) ? "Auto-HWP, " : "",
3745                         (msr & 1 << 20) ? "Graphics, " : "",
3746                         (msr & 1 << 18) ? "bit18, " : "",
3747                         (msr & 1 << 17) ? "ThermStatus, " : "",
3748                         (msr & 1 << 16) ? "PROCHOT, " : "");
3749
3750         }
3751         if (do_gfx_perf_limit_reasons) {
3752                 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
3753                 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3754                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
3755                         (msr & 1 << 0) ? "PROCHOT, " : "",
3756                         (msr & 1 << 1) ? "ThermStatus, " : "",
3757                         (msr & 1 << 4) ? "Graphics, " : "",
3758                         (msr & 1 << 6) ? "VR-Therm, " : "",
3759                         (msr & 1 << 8) ? "Amps, " : "",
3760                         (msr & 1 << 9) ? "GFXPwr, " : "",
3761                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
3762                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
3763                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
3764                         (msr & 1 << 16) ? "PROCHOT, " : "",
3765                         (msr & 1 << 17) ? "ThermStatus, " : "",
3766                         (msr & 1 << 20) ? "Graphics, " : "",
3767                         (msr & 1 << 22) ? "VR-Therm, " : "",
3768                         (msr & 1 << 24) ? "Amps, " : "",
3769                         (msr & 1 << 25) ? "GFXPwr, " : "",
3770                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
3771                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
3772         }
3773         if (do_ring_perf_limit_reasons) {
3774                 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
3775                 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3776                 fprintf(outf, " (Active: %s%s%s%s%s%s)",
3777                         (msr & 1 << 0) ? "PROCHOT, " : "",
3778                         (msr & 1 << 1) ? "ThermStatus, " : "",
3779                         (msr & 1 << 6) ? "VR-Therm, " : "",
3780                         (msr & 1 << 8) ? "Amps, " : "",
3781                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
3782                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
3783                 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
3784                         (msr & 1 << 16) ? "PROCHOT, " : "",
3785                         (msr & 1 << 17) ? "ThermStatus, " : "",
3786                         (msr & 1 << 22) ? "VR-Therm, " : "",
3787                         (msr & 1 << 24) ? "Amps, " : "",
3788                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
3789                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
3790         }
3791         return 0;
3792 }
3793
3794 #define RAPL_POWER_GRANULARITY  0x7FFF  /* 15 bit power granularity */
3795 #define RAPL_TIME_GRANULARITY   0x3F /* 6 bit time granularity */
3796
3797 double get_tdp_intel(unsigned int model)
3798 {
3799         unsigned long long msr;
3800
3801         if (do_rapl & RAPL_PKG_POWER_INFO)
3802                 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
3803                         return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
3804
3805         switch (model) {
3806         case INTEL_FAM6_ATOM_SILVERMONT:
3807         case INTEL_FAM6_ATOM_SILVERMONT_X:
3808                 return 30.0;
3809         default:
3810                 return 135.0;
3811         }
3812 }
3813
3814 double get_tdp_amd(unsigned int family)
3815 {
3816         switch (family) {
3817         case 0x17:
3818         default:
3819                 /* This is the max stock TDP of HEDT/Server Fam17h chips */
3820                 return 250.0;
3821         }
3822 }
3823
3824 /*
3825  * rapl_dram_energy_units_probe()
3826  * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
3827  */
3828 static double
3829 rapl_dram_energy_units_probe(int  model, double rapl_energy_units)
3830 {
3831         /* only called for genuine_intel, family 6 */
3832
3833         switch (model) {
3834         case INTEL_FAM6_HASWELL_X:      /* HSX */
3835         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3836         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
3837                 return (rapl_dram_energy_units = 15.3 / 1000000);
3838         default:
3839                 return (rapl_energy_units);
3840         }
3841 }
3842
3843 void rapl_probe_intel(unsigned int family, unsigned int model)
3844 {
3845         unsigned long long msr;
3846         unsigned int time_unit;
3847         double tdp;
3848
3849         if (family != 6)
3850                 return;
3851
3852         switch (model) {
3853         case INTEL_FAM6_SANDYBRIDGE:
3854         case INTEL_FAM6_IVYBRIDGE:
3855         case INTEL_FAM6_HASWELL_CORE:   /* HSW */
3856         case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
3857         case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3858         case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3859                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
3860                 if (rapl_joules) {
3861                         BIC_PRESENT(BIC_Pkg_J);
3862                         BIC_PRESENT(BIC_Cor_J);
3863                         BIC_PRESENT(BIC_GFX_J);
3864                 } else {
3865                         BIC_PRESENT(BIC_PkgWatt);
3866                         BIC_PRESENT(BIC_CorWatt);
3867                         BIC_PRESENT(BIC_GFXWatt);
3868                 }
3869                 break;
3870         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
3871         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3872                 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
3873                 if (rapl_joules)
3874                         BIC_PRESENT(BIC_Pkg_J);
3875                 else
3876                         BIC_PRESENT(BIC_PkgWatt);
3877                 break;
3878         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3879         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
3880                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
3881                 BIC_PRESENT(BIC_PKG__);
3882                 BIC_PRESENT(BIC_RAM__);
3883                 if (rapl_joules) {
3884                         BIC_PRESENT(BIC_Pkg_J);
3885                         BIC_PRESENT(BIC_Cor_J);
3886                         BIC_PRESENT(BIC_RAM_J);
3887                         BIC_PRESENT(BIC_GFX_J);
3888                 } else {
3889                         BIC_PRESENT(BIC_PkgWatt);
3890                         BIC_PRESENT(BIC_CorWatt);
3891                         BIC_PRESENT(BIC_RAMWatt);
3892                         BIC_PRESENT(BIC_GFXWatt);
3893                 }
3894                 break;
3895         case INTEL_FAM6_HASWELL_X:      /* HSX */
3896         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3897         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3898         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
3899                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
3900                 BIC_PRESENT(BIC_PKG__);
3901                 BIC_PRESENT(BIC_RAM__);
3902                 if (rapl_joules) {
3903                         BIC_PRESENT(BIC_Pkg_J);
3904                         BIC_PRESENT(BIC_RAM_J);
3905                 } else {
3906                         BIC_PRESENT(BIC_PkgWatt);
3907                         BIC_PRESENT(BIC_RAMWatt);
3908                 }
3909                 break;
3910         case INTEL_FAM6_SANDYBRIDGE_X:
3911         case INTEL_FAM6_IVYBRIDGE_X:
3912                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
3913                 BIC_PRESENT(BIC_PKG__);
3914                 BIC_PRESENT(BIC_RAM__);
3915                 if (rapl_joules) {
3916                         BIC_PRESENT(BIC_Pkg_J);
3917                         BIC_PRESENT(BIC_Cor_J);
3918                         BIC_PRESENT(BIC_RAM_J);
3919                 } else {
3920                         BIC_PRESENT(BIC_PkgWatt);
3921                         BIC_PRESENT(BIC_CorWatt);
3922                         BIC_PRESENT(BIC_RAMWatt);
3923                 }
3924                 break;
3925         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
3926         case INTEL_FAM6_ATOM_SILVERMONT_X:      /* AVN */
3927                 do_rapl = RAPL_PKG | RAPL_CORES;
3928                 if (rapl_joules) {
3929                         BIC_PRESENT(BIC_Pkg_J);
3930                         BIC_PRESENT(BIC_Cor_J);
3931                 } else {
3932                         BIC_PRESENT(BIC_PkgWatt);
3933                         BIC_PRESENT(BIC_CorWatt);
3934                 }
3935                 break;
3936         case INTEL_FAM6_ATOM_GOLDMONT_X:        /* DNV */
3937                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
3938                 BIC_PRESENT(BIC_PKG__);
3939                 BIC_PRESENT(BIC_RAM__);
3940                 if (rapl_joules) {
3941                         BIC_PRESENT(BIC_Pkg_J);
3942                         BIC_PRESENT(BIC_Cor_J);
3943                         BIC_PRESENT(BIC_RAM_J);
3944                 } else {
3945                         BIC_PRESENT(BIC_PkgWatt);
3946                         BIC_PRESENT(BIC_CorWatt);
3947                         BIC_PRESENT(BIC_RAMWatt);
3948                 }
3949                 break;
3950         default:
3951                 return;
3952         }
3953
3954         /* units on package 0, verify later other packages match */
3955         if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
3956                 return;
3957
3958         rapl_power_units = 1.0 / (1 << (msr & 0xF));
3959         if (model == INTEL_FAM6_ATOM_SILVERMONT)
3960                 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
3961         else
3962                 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
3963
3964         rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
3965
3966         time_unit = msr >> 16 & 0xF;
3967         if (time_unit == 0)
3968                 time_unit = 0xA;
3969
3970         rapl_time_units = 1.0 / (1 << (time_unit));
3971
3972         tdp = get_tdp_intel(model);
3973
3974         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
3975         if (!quiet)
3976                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
3977 }
3978
3979 void rapl_probe_amd(unsigned int family, unsigned int model)
3980 {
3981         unsigned long long msr;
3982         unsigned int eax, ebx, ecx, edx;
3983         unsigned int has_rapl = 0;
3984         double tdp;
3985
3986         if (max_extended_level >= 0x80000007) {
3987                 __cpuid(0x80000007, eax, ebx, ecx, edx);
3988                 /* RAPL (Fam 17h) */
3989                 has_rapl = edx & (1 << 14);
3990         }
3991
3992         if (!has_rapl)
3993                 return;
3994
3995         switch (family) {
3996         case 0x17: /* Zen, Zen+ */
3997                 do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY;
3998                 if (rapl_joules) {
3999                         BIC_PRESENT(BIC_Pkg_J);
4000                         BIC_PRESENT(BIC_Cor_J);
4001                 } else {
4002                         BIC_PRESENT(BIC_PkgWatt);
4003                         BIC_PRESENT(BIC_CorWatt);
4004                 }
4005                 break;
4006         default:
4007                 return;
4008         }
4009
4010         if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
4011                 return;
4012
4013         rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
4014         rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
4015         rapl_power_units = ldexp(1.0, -(msr & 0xf));
4016
4017         tdp = get_tdp_amd(model);
4018
4019         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4020         if (!quiet)
4021                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4022 }
4023
4024 /*
4025  * rapl_probe()
4026  *
4027  * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
4028  */
4029 void rapl_probe(unsigned int family, unsigned int model)
4030 {
4031         if (genuine_intel)
4032                 rapl_probe_intel(family, model);
4033         if (authentic_amd)
4034                 rapl_probe_amd(family, model);
4035 }
4036
4037 void perf_limit_reasons_probe(unsigned int family, unsigned int model)
4038 {
4039         if (!genuine_intel)
4040                 return;
4041
4042         if (family != 6)
4043                 return;
4044
4045         switch (model) {
4046         case INTEL_FAM6_HASWELL_CORE:   /* HSW */
4047         case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
4048                 do_gfx_perf_limit_reasons = 1;
4049         case INTEL_FAM6_HASWELL_X:      /* HSX */
4050                 do_core_perf_limit_reasons = 1;
4051                 do_ring_perf_limit_reasons = 1;
4052         default:
4053                 return;
4054         }
4055 }
4056
4057 void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
4058 {
4059         if (is_skx(family, model) || is_bdx(family, model))
4060                 has_automatic_cstate_conversion = 1;
4061 }
4062
4063 int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4064 {
4065         unsigned long long msr;
4066         unsigned int dts, dts2;
4067         int cpu;
4068
4069         if (!(do_dts || do_ptm))
4070                 return 0;
4071
4072         cpu = t->cpu_id;
4073
4074         /* DTS is per-core, no need to print for each thread */
4075         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
4076                 return 0;
4077
4078         if (cpu_migrate(cpu)) {
4079                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4080                 return -1;
4081         }
4082
4083         if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4084                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4085                         return 0;
4086
4087                 dts = (msr >> 16) & 0x7F;
4088                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
4089                         cpu, msr, tcc_activation_temp - dts);
4090
4091                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4092                         return 0;
4093
4094                 dts = (msr >> 16) & 0x7F;
4095                 dts2 = (msr >> 8) & 0x7F;
4096                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4097                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4098         }
4099
4100
4101         if (do_dts && debug) {
4102                 unsigned int resolution;
4103
4104                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4105                         return 0;
4106
4107                 dts = (msr >> 16) & 0x7F;
4108                 resolution = (msr >> 27) & 0xF;
4109                 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
4110                         cpu, msr, tcc_activation_temp - dts, resolution);
4111
4112                 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4113                         return 0;
4114
4115                 dts = (msr >> 16) & 0x7F;
4116                 dts2 = (msr >> 8) & 0x7F;
4117                 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4118                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4119         }
4120
4121         return 0;
4122 }
4123
4124 void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4125 {
4126         fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
4127                 cpu, label,
4128                 ((msr >> 15) & 1) ? "EN" : "DIS",
4129                 ((msr >> 0) & 0x7FFF) * rapl_power_units,
4130                 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
4131                 (((msr >> 16) & 1) ? "EN" : "DIS"));
4132
4133         return;
4134 }
4135
4136 int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4137 {
4138         unsigned long long msr;
4139         const char *msr_name;
4140         int cpu;
4141
4142         if (!do_rapl)
4143                 return 0;
4144
4145         /* RAPL counters are per package, so print only for 1st thread/package */
4146         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4147                 return 0;
4148
4149         cpu = t->cpu_id;
4150         if (cpu_migrate(cpu)) {
4151                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4152                 return -1;
4153         }
4154
4155         if (do_rapl & RAPL_AMD_F17H) {
4156                 msr_name = "MSR_RAPL_PWR_UNIT";
4157                 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
4158                         return -1;
4159         } else {
4160                 msr_name = "MSR_RAPL_POWER_UNIT";
4161                 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4162                         return -1;
4163         }
4164
4165         fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
4166                 rapl_power_units, rapl_energy_units, rapl_time_units);
4167
4168         if (do_rapl & RAPL_PKG_POWER_INFO) {
4169
4170                 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4171                         return -5;
4172
4173
4174                 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4175                         cpu, msr,
4176                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4177                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4178                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4179                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4180
4181         }
4182         if (do_rapl & RAPL_PKG) {
4183
4184                 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4185                         return -9;
4186
4187                 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
4188                         cpu, msr, (msr >> 63) & 1 ? "" : "UN");
4189
4190                 print_power_limit_msr(cpu, msr, "PKG Limit #1");
4191                 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
4192                         cpu,
4193                         ((msr >> 47) & 1) ? "EN" : "DIS",
4194                         ((msr >> 32) & 0x7FFF) * rapl_power_units,
4195                         (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4196                         ((msr >> 48) & 1) ? "EN" : "DIS");
4197         }
4198
4199         if (do_rapl & RAPL_DRAM_POWER_INFO) {
4200                 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4201                         return -6;
4202
4203                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4204                         cpu, msr,
4205                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4206                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4207                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4208                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4209         }
4210         if (do_rapl & RAPL_DRAM) {
4211                 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4212                         return -9;
4213                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
4214                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4215
4216                 print_power_limit_msr(cpu, msr, "DRAM Limit");
4217         }
4218         if (do_rapl & RAPL_CORE_POLICY) {
4219                 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4220                         return -7;
4221
4222                 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
4223         }
4224         if (do_rapl & RAPL_CORES_POWER_LIMIT) {
4225                 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4226                         return -9;
4227                 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4228                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4229                 print_power_limit_msr(cpu, msr, "Cores Limit");
4230         }
4231         if (do_rapl & RAPL_GFX) {
4232                 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4233                         return -8;
4234
4235                 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
4236
4237                 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4238                         return -9;
4239                 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4240                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4241                 print_power_limit_msr(cpu, msr, "GFX Limit");
4242         }
4243         return 0;
4244 }
4245
4246 /*
4247  * SNB adds support for additional MSRs:
4248  *
4249  * MSR_PKG_C7_RESIDENCY            0x000003fa
4250  * MSR_CORE_C7_RESIDENCY           0x000003fe
4251  * MSR_PKG_C2_RESIDENCY            0x0000060d
4252  */
4253
4254 int has_snb_msrs(unsigned int family, unsigned int model)
4255 {
4256         if (!genuine_intel)
4257                 return 0;
4258
4259         switch (model) {
4260         case INTEL_FAM6_SANDYBRIDGE:
4261         case INTEL_FAM6_SANDYBRIDGE_X:
4262         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
4263         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
4264         case INTEL_FAM6_HASWELL_CORE:   /* HSW */
4265         case INTEL_FAM6_HASWELL_X:      /* HSW */
4266         case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
4267         case INTEL_FAM6_BROADWELL_CORE: /* BDW */
4268         case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
4269         case INTEL_FAM6_BROADWELL_X:    /* BDX */
4270         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4271         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
4272         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
4273         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4274         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4275         case INTEL_FAM6_ATOM_GOLDMONT_X:        /* DNV */
4276                 return 1;
4277         }
4278         return 0;
4279 }
4280
4281 /*
4282  * HSW adds support for additional MSRs:
4283  *
4284  * MSR_PKG_C8_RESIDENCY         0x00000630
4285  * MSR_PKG_C9_RESIDENCY         0x00000631
4286  * MSR_PKG_C10_RESIDENCY        0x00000632
4287  *
4288  * MSR_PKGC8_IRTL               0x00000633
4289  * MSR_PKGC9_IRTL               0x00000634
4290  * MSR_PKGC10_IRTL              0x00000635
4291  *
4292  */
4293 int has_hsw_msrs(unsigned int family, unsigned int model)
4294 {
4295         if (!genuine_intel)
4296                 return 0;
4297
4298         switch (model) {
4299         case INTEL_FAM6_HASWELL_CORE:
4300         case INTEL_FAM6_BROADWELL_CORE: /* BDW */
4301         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4302         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
4303         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4304         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4305                 return 1;
4306         }
4307         return 0;
4308 }
4309
4310 /*
4311  * SKL adds support for additional MSRS:
4312  *
4313  * MSR_PKG_WEIGHTED_CORE_C0_RES    0x00000658
4314  * MSR_PKG_ANY_CORE_C0_RES         0x00000659
4315  * MSR_PKG_ANY_GFXE_C0_RES         0x0000065A
4316  * MSR_PKG_BOTH_CORE_GFXE_C0_RES   0x0000065B
4317  */
4318 int has_skl_msrs(unsigned int family, unsigned int model)
4319 {
4320         if (!genuine_intel)
4321                 return 0;
4322
4323         switch (model) {
4324         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4325         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
4326                 return 1;
4327         }
4328         return 0;
4329 }
4330
4331 int is_slm(unsigned int family, unsigned int model)
4332 {
4333         if (!genuine_intel)
4334                 return 0;
4335         switch (model) {
4336         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
4337         case INTEL_FAM6_ATOM_SILVERMONT_X:      /* AVN */
4338                 return 1;
4339         }
4340         return 0;
4341 }
4342
4343 int is_knl(unsigned int family, unsigned int model)
4344 {
4345         if (!genuine_intel)
4346                 return 0;
4347         switch (model) {
4348         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4349                 return 1;
4350         }
4351         return 0;
4352 }
4353
4354 int is_cnl(unsigned int family, unsigned int model)
4355 {
4356         if (!genuine_intel)
4357                 return 0;
4358
4359         switch (model) {
4360         case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
4361                 return 1;
4362         }
4363
4364         return 0;
4365 }
4366
4367 unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4368 {
4369         if (is_knl(family, model))
4370                 return 1024;
4371         return 1;
4372 }
4373
4374 #define SLM_BCLK_FREQS 5
4375 double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4376
4377 double slm_bclk(void)
4378 {
4379         unsigned long long msr = 3;
4380         unsigned int i;
4381         double freq;
4382
4383         if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
4384                 fprintf(outf, "SLM BCLK: unknown\n");
4385
4386         i = msr & 0xf;
4387         if (i >= SLM_BCLK_FREQS) {
4388                 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
4389                 i = 3;
4390         }
4391         freq = slm_freq_table[i];
4392
4393         if (!quiet)
4394                 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
4395
4396         return freq;
4397 }
4398
4399 double discover_bclk(unsigned int family, unsigned int model)
4400 {
4401         if (has_snb_msrs(family, model) || is_knl(family, model))
4402                 return 100.00;
4403         else if (is_slm(family, model))
4404                 return slm_bclk();
4405         else
4406                 return 133.33;
4407 }
4408
4409 /*
4410  * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4411  * the Thermal Control Circuit (TCC) activates.
4412  * This is usually equal to tjMax.
4413  *
4414  * Older processors do not have this MSR, so there we guess,
4415  * but also allow cmdline over-ride with -T.
4416  *
4417  * Several MSR temperature values are in units of degrees-C
4418  * below this value, including the Digital Thermal Sensor (DTS),
4419  * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4420  */
4421 int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4422 {
4423         unsigned long long msr;
4424         unsigned int target_c_local;
4425         int cpu;
4426
4427         /* tcc_activation_temp is used only for dts or ptm */
4428         if (!(do_dts || do_ptm))
4429                 return 0;
4430
4431         /* this is a per-package concept */
4432         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4433                 return 0;
4434
4435         cpu = t->cpu_id;
4436         if (cpu_migrate(cpu)) {
4437                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4438                 return -1;
4439         }
4440
4441         if (tcc_activation_temp_override != 0) {
4442                 tcc_activation_temp = tcc_activation_temp_override;
4443                 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
4444                         cpu, tcc_activation_temp);
4445                 return 0;
4446         }
4447
4448         /* Temperature Target MSR is Nehalem and newer only */
4449         if (!do_nhm_platform_info)
4450                 goto guess;
4451
4452         if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
4453                 goto guess;
4454
4455         target_c_local = (msr >> 16) & 0xFF;
4456
4457         if (!quiet)
4458                 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
4459                         cpu, msr, target_c_local);
4460
4461         if (!target_c_local)
4462                 goto guess;
4463
4464         tcc_activation_temp = target_c_local;
4465
4466         return 0;
4467
4468 guess:
4469         tcc_activation_temp = TJMAX_DEFAULT;
4470         fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
4471                 cpu, tcc_activation_temp);
4472
4473         return 0;
4474 }
4475
4476 void decode_feature_control_msr(void)
4477 {
4478         unsigned long long msr;
4479
4480         if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
4481                 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4482                         base_cpu, msr,
4483                         msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
4484                         msr & (1 << 18) ? "SGX" : "");
4485 }
4486
4487 void decode_misc_enable_msr(void)
4488 {
4489         unsigned long long msr;
4490
4491         if (!genuine_intel)
4492                 return;
4493
4494         if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
4495                 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
4496                         base_cpu, msr,
4497                         msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4498                         msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
4499                         msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
4500                         msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4501                         msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
4502 }
4503
4504 void decode_misc_feature_control(void)
4505 {
4506         unsigned long long msr;
4507
4508         if (!has_misc_feature_control)
4509                 return;
4510
4511         if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4512                 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4513                         base_cpu, msr,
4514                         msr & (0 << 0) ? "No-" : "",
4515                         msr & (1 << 0) ? "No-" : "",
4516                         msr & (2 << 0) ? "No-" : "",
4517                         msr & (3 << 0) ? "No-" : "");
4518 }
4519 /*
4520  * Decode MSR_MISC_PWR_MGMT
4521  *
4522  * Decode the bits according to the Nehalem documentation
4523  * bit[0] seems to continue to have same meaning going forward
4524  * bit[1] less so...
4525  */
4526 void decode_misc_pwr_mgmt_msr(void)
4527 {
4528         unsigned long long msr;
4529
4530         if (!do_nhm_platform_info)
4531                 return;
4532
4533         if (no_MSR_MISC_PWR_MGMT)
4534                 return;
4535
4536         if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
4537                 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
4538                         base_cpu, msr,
4539                         msr & (1 << 0) ? "DIS" : "EN",
4540                         msr & (1 << 1) ? "EN" : "DIS",
4541                         msr & (1 << 8) ? "EN" : "DIS");
4542 }
4543 /*
4544  * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
4545  *
4546  * This MSRs are present on Silvermont processors,
4547  * Intel Atom processor E3000 series (Baytrail), and friends.
4548  */
4549 void decode_c6_demotion_policy_msr(void)
4550 {
4551         unsigned long long msr;
4552
4553         if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
4554                 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
4555                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4556
4557         if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
4558                 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
4559                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4560 }
4561
4562 /*
4563  * When models are the same, for the purpose of turbostat, reuse
4564  */
4565 unsigned int intel_model_duplicates(unsigned int model)
4566 {
4567
4568         switch(model) {
4569         case INTEL_FAM6_NEHALEM_EP:     /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
4570         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
4571         case 0x1F:      /* Core i7 and i5 Processor - Nehalem */
4572         case INTEL_FAM6_WESTMERE:       /* Westmere Client - Clarkdale, Arrandale */
4573         case INTEL_FAM6_WESTMERE_EP:    /* Westmere EP - Gulftown */
4574                 return INTEL_FAM6_NEHALEM;
4575
4576         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
4577         case INTEL_FAM6_WESTMERE_EX:    /* Westmere-EX Xeon - Eagleton */
4578                 return INTEL_FAM6_NEHALEM_EX;
4579
4580         case INTEL_FAM6_XEON_PHI_KNM:
4581                 return INTEL_FAM6_XEON_PHI_KNL;
4582
4583         case INTEL_FAM6_HASWELL_ULT:
4584                 return INTEL_FAM6_HASWELL_CORE;
4585
4586         case INTEL_FAM6_BROADWELL_X:
4587         case INTEL_FAM6_BROADWELL_XEON_D:       /* BDX-DE */
4588                 return INTEL_FAM6_BROADWELL_X;
4589
4590         case INTEL_FAM6_SKYLAKE_MOBILE:
4591         case INTEL_FAM6_SKYLAKE_DESKTOP:
4592         case INTEL_FAM6_KABYLAKE_MOBILE:
4593         case INTEL_FAM6_KABYLAKE_DESKTOP:
4594                 return INTEL_FAM6_SKYLAKE_MOBILE;
4595
4596         case INTEL_FAM6_ICELAKE_MOBILE:
4597                 return INTEL_FAM6_CANNONLAKE_MOBILE;
4598         }
4599         return model;
4600 }
4601 void process_cpuid()
4602 {
4603         unsigned int eax, ebx, ecx, edx;
4604         unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
4605         unsigned int has_turbo;
4606
4607         eax = ebx = ecx = edx = 0;
4608
4609         __cpuid(0, max_level, ebx, ecx, edx);
4610
4611         if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
4612                 genuine_intel = 1;
4613         else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
4614                 authentic_amd = 1;
4615
4616         if (!quiet)
4617                 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
4618                         (char *)&ebx, (char *)&edx, (char *)&ecx);
4619
4620         __cpuid(1, fms, ebx, ecx, edx);
4621         family = (fms >> 8) & 0xf;
4622         model = (fms >> 4) & 0xf;
4623         stepping = fms & 0xf;
4624         if (family == 0xf)
4625                 family += (fms >> 20) & 0xff;
4626         if (family >= 6)
4627                 model += ((fms >> 16) & 0xf) << 4;
4628         ecx_flags = ecx;
4629         edx_flags = edx;
4630
4631         /*
4632          * check max extended function levels of CPUID.
4633          * This is needed to check for invariant TSC.
4634          * This check is valid for both Intel and AMD.
4635          */
4636         ebx = ecx = edx = 0;
4637         __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
4638
4639         if (!quiet) {
4640                 fprintf(outf, "0x%x CPUID levels; 0x%x xlevels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
4641                         max_level, max_extended_level, family, model, stepping, family, model, stepping);
4642                 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
4643                         ecx_flags & (1 << 0) ? "SSE3" : "-",
4644                         ecx_flags & (1 << 3) ? "MONITOR" : "-",
4645                         ecx_flags & (1 << 6) ? "SMX" : "-",
4646                         ecx_flags & (1 << 7) ? "EIST" : "-",
4647                         ecx_flags & (1 << 8) ? "TM2" : "-",
4648                         edx_flags & (1 << 4) ? "TSC" : "-",
4649                         edx_flags & (1 << 5) ? "MSR" : "-",
4650                         edx_flags & (1 << 22) ? "ACPI-TM" : "-",
4651                         edx_flags & (1 << 28) ? "HT" : "-",
4652                         edx_flags & (1 << 29) ? "TM" : "-");
4653         }
4654         if (genuine_intel)
4655                 model = intel_model_duplicates(model);
4656
4657         if (!(edx_flags & (1 << 5)))
4658                 errx(1, "CPUID: no MSR");
4659
4660         if (max_extended_level >= 0x80000007) {
4661
4662                 /*
4663                  * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
4664                  * this check is valid for both Intel and AMD
4665                  */
4666                 __cpuid(0x80000007, eax, ebx, ecx, edx);
4667                 has_invariant_tsc = edx & (1 << 8);
4668         }
4669
4670         /*
4671          * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
4672          * this check is valid for both Intel and AMD
4673          */
4674
4675         __cpuid(0x6, eax, ebx, ecx, edx);
4676         has_aperf = ecx & (1 << 0);
4677         if (has_aperf) {
4678                 BIC_PRESENT(BIC_Avg_MHz);
4679                 BIC_PRESENT(BIC_Busy);
4680                 BIC_PRESENT(BIC_Bzy_MHz);
4681         }
4682         do_dts = eax & (1 << 0);
4683         if (do_dts)
4684                 BIC_PRESENT(BIC_CoreTmp);
4685         has_turbo = eax & (1 << 1);
4686         do_ptm = eax & (1 << 6);
4687         if (do_ptm)
4688                 BIC_PRESENT(BIC_PkgTmp);
4689         has_hwp = eax & (1 << 7);
4690         has_hwp_notify = eax & (1 << 8);
4691         has_hwp_activity_window = eax & (1 << 9);
4692         has_hwp_epp = eax & (1 << 10);
4693         has_hwp_pkg = eax & (1 << 11);
4694         has_epb = ecx & (1 << 3);
4695
4696         if (!quiet)
4697                 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
4698                         "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
4699                         has_aperf ? "" : "No-",
4700                         has_turbo ? "" : "No-",
4701                         do_dts ? "" : "No-",
4702                         do_ptm ? "" : "No-",
4703                         has_hwp ? "" : "No-",
4704                         has_hwp_notify ? "" : "No-",
4705                         has_hwp_activity_window ? "" : "No-",
4706                         has_hwp_epp ? "" : "No-",
4707                         has_hwp_pkg ? "" : "No-",
4708                         has_epb ? "" : "No-");
4709
4710         if (!quiet)
4711                 decode_misc_enable_msr();
4712
4713
4714         if (max_level >= 0x7 && !quiet) {
4715                 int has_sgx;
4716
4717                 ecx = 0;
4718
4719                 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
4720
4721                 has_sgx = ebx & (1 << 2);
4722                 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
4723
4724                 if (has_sgx)
4725                         decode_feature_control_msr();
4726         }
4727
4728         if (max_level >= 0x15) {
4729                 unsigned int eax_crystal;
4730                 unsigned int ebx_tsc;
4731
4732                 /*
4733                  * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
4734                  */
4735                 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
4736                 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
4737
4738                 if (ebx_tsc != 0) {
4739
4740                         if (!quiet && (ebx != 0))
4741                                 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
4742                                         eax_crystal, ebx_tsc, crystal_hz);
4743
4744                         if (crystal_hz == 0)
4745                                 switch(model) {
4746                                 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4747                                         crystal_hz = 24000000;  /* 24.0 MHz */
4748                                         break;
4749                                 case INTEL_FAM6_ATOM_GOLDMONT_X:        /* DNV */
4750                                         crystal_hz = 25000000;  /* 25.0 MHz */
4751                                         break;
4752                                 case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4753                                 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4754                                         crystal_hz = 19200000;  /* 19.2 MHz */
4755                                         break;
4756                                 default:
4757                                         crystal_hz = 0;
4758                         }
4759
4760                         if (crystal_hz) {
4761                                 tsc_hz =  (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
4762                                 if (!quiet)
4763                                         fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
4764                                                 tsc_hz / 1000000, crystal_hz, ebx_tsc,  eax_crystal);
4765                         }
4766                 }
4767         }
4768         if (max_level >= 0x16) {
4769                 unsigned int base_mhz, max_mhz, bus_mhz, edx;
4770
4771                 /*
4772                  * CPUID 16H Base MHz, Max MHz, Bus MHz
4773                  */
4774                 base_mhz = max_mhz = bus_mhz = edx = 0;
4775
4776                 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
4777                 if (!quiet)
4778                         fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
4779                                 base_mhz, max_mhz, bus_mhz);
4780         }
4781
4782         if (has_aperf)
4783                 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
4784
4785         BIC_PRESENT(BIC_IRQ);
4786         BIC_PRESENT(BIC_TSC_MHz);
4787
4788         if (probe_nhm_msrs(family, model)) {
4789                 do_nhm_platform_info = 1;
4790                 BIC_PRESENT(BIC_CPU_c1);
4791                 BIC_PRESENT(BIC_CPU_c3);
4792                 BIC_PRESENT(BIC_CPU_c6);
4793                 BIC_PRESENT(BIC_SMI);
4794         }
4795         do_snb_cstates = has_snb_msrs(family, model);
4796
4797         if (do_snb_cstates)
4798                 BIC_PRESENT(BIC_CPU_c7);
4799
4800         do_irtl_snb = has_snb_msrs(family, model);
4801         if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
4802                 BIC_PRESENT(BIC_Pkgpc2);
4803         if (pkg_cstate_limit >= PCL__3)
4804                 BIC_PRESENT(BIC_Pkgpc3);
4805         if (pkg_cstate_limit >= PCL__6)
4806                 BIC_PRESENT(BIC_Pkgpc6);
4807         if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
4808                 BIC_PRESENT(BIC_Pkgpc7);
4809         if (has_slv_msrs(family, model)) {
4810                 BIC_NOT_PRESENT(BIC_Pkgpc2);
4811                 BIC_NOT_PRESENT(BIC_Pkgpc3);
4812                 BIC_PRESENT(BIC_Pkgpc6);
4813                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4814                 BIC_PRESENT(BIC_Mod_c6);
4815                 use_c1_residency_msr = 1;
4816         }
4817         if (is_dnv(family, model)) {
4818                 BIC_PRESENT(BIC_CPU_c1);
4819                 BIC_NOT_PRESENT(BIC_CPU_c3);
4820                 BIC_NOT_PRESENT(BIC_Pkgpc3);
4821                 BIC_NOT_PRESENT(BIC_CPU_c7);
4822                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4823                 use_c1_residency_msr = 1;
4824         }
4825         if (is_skx(family, model)) {
4826                 BIC_NOT_PRESENT(BIC_CPU_c3);
4827                 BIC_NOT_PRESENT(BIC_Pkgpc3);
4828                 BIC_NOT_PRESENT(BIC_CPU_c7);
4829                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4830         }
4831         if (is_bdx(family, model)) {
4832                 BIC_NOT_PRESENT(BIC_CPU_c7);
4833                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4834         }
4835         if (has_hsw_msrs(family, model)) {
4836                 BIC_PRESENT(BIC_Pkgpc8);
4837                 BIC_PRESENT(BIC_Pkgpc9);
4838                 BIC_PRESENT(BIC_Pkgpc10);
4839         }
4840         do_irtl_hsw = has_hsw_msrs(family, model);
4841         if (has_skl_msrs(family, model)) {
4842                 BIC_PRESENT(BIC_Totl_c0);
4843                 BIC_PRESENT(BIC_Any_c0);
4844                 BIC_PRESENT(BIC_GFX_c0);
4845                 BIC_PRESENT(BIC_CPUGFX);
4846         }
4847         do_slm_cstates = is_slm(family, model);
4848         do_knl_cstates  = is_knl(family, model);
4849
4850         if (do_slm_cstates || do_knl_cstates || is_cnl(family, model))
4851                 BIC_NOT_PRESENT(BIC_CPU_c3);
4852
4853         if (!quiet)
4854                 decode_misc_pwr_mgmt_msr();
4855
4856         if (!quiet && has_slv_msrs(family, model))
4857                 decode_c6_demotion_policy_msr();
4858
4859         rapl_probe(family, model);
4860         perf_limit_reasons_probe(family, model);
4861         automatic_cstate_conversion_probe(family, model);
4862
4863         if (!quiet)
4864                 dump_cstate_pstate_config_info(family, model);
4865
4866         if (!quiet)
4867                 dump_sysfs_cstate_config();
4868         if (!quiet)
4869                 dump_sysfs_pstate_config();
4870
4871         if (has_skl_msrs(family, model))
4872                 calculate_tsc_tweak();
4873
4874         if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
4875                 BIC_PRESENT(BIC_GFX_rc6);
4876
4877         if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
4878                 BIC_PRESENT(BIC_GFXMHz);
4879
4880         if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
4881                 BIC_PRESENT(BIC_CPU_LPI);
4882         else
4883                 BIC_NOT_PRESENT(BIC_CPU_LPI);
4884
4885         if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", R_OK))
4886                 BIC_PRESENT(BIC_SYS_LPI);
4887         else
4888                 BIC_NOT_PRESENT(BIC_SYS_LPI);
4889
4890         if (!quiet)
4891                 decode_misc_feature_control();
4892
4893         return;
4894 }
4895
4896 /*
4897  * in /dev/cpu/ return success for names that are numbers
4898  * ie. filter out ".", "..", "microcode".
4899  */
4900 int dir_filter(const struct dirent *dirp)
4901 {
4902         if (isdigit(dirp->d_name[0]))
4903                 return 1;
4904         else
4905                 return 0;
4906 }
4907
4908 int open_dev_cpu_msr(int dummy1)
4909 {
4910         return 0;
4911 }
4912
4913 void topology_probe()
4914 {
4915         int i;
4916         int max_core_id = 0;
4917         int max_package_id = 0;
4918         int max_die_id = 0;
4919         int max_siblings = 0;
4920
4921         /* Initialize num_cpus, max_cpu_num */
4922         set_max_cpu_num();
4923         topo.num_cpus = 0;
4924         for_all_proc_cpus(count_cpus);
4925         if (!summary_only && topo.num_cpus > 1)
4926                 BIC_PRESENT(BIC_CPU);
4927
4928         if (debug > 1)
4929                 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
4930
4931         cpus = calloc(1, (topo.max_cpu_num  + 1) * sizeof(struct cpu_topology));
4932         if (cpus == NULL)
4933                 err(1, "calloc cpus");
4934
4935         /*
4936          * Allocate and initialize cpu_present_set
4937          */
4938         cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
4939         if (cpu_present_set == NULL)
4940                 err(3, "CPU_ALLOC");
4941         cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4942         CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
4943         for_all_proc_cpus(mark_cpu_present);
4944
4945         /*
4946          * Validate that all cpus in cpu_subset are also in cpu_present_set
4947          */
4948         for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
4949                 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
4950                         if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
4951                                 err(1, "cpu%d not present", i);
4952         }
4953
4954         /*
4955          * Allocate and initialize cpu_affinity_set
4956          */
4957         cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
4958         if (cpu_affinity_set == NULL)
4959                 err(3, "CPU_ALLOC");
4960         cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4961         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
4962
4963         for_all_proc_cpus(init_thread_id);
4964
4965         /*
4966          * For online cpus
4967          * find max_core_id, max_package_id
4968          */
4969         for (i = 0; i <= topo.max_cpu_num; ++i) {
4970                 int siblings;
4971
4972                 if (cpu_is_not_present(i)) {
4973                         if (debug > 1)
4974                                 fprintf(outf, "cpu%d NOT PRESENT\n", i);
4975                         continue;
4976                 }
4977
4978                 cpus[i].logical_cpu_id = i;
4979
4980                 /* get package information */
4981                 cpus[i].physical_package_id = get_physical_package_id(i);
4982                 if (cpus[i].physical_package_id > max_package_id)
4983                         max_package_id = cpus[i].physical_package_id;
4984
4985                 /* get die information */
4986                 cpus[i].die_id = get_die_id(i);
4987                 if (cpus[i].die_id > max_die_id)
4988                         max_die_id = cpus[i].die_id;
4989
4990                 /* get numa node information */
4991                 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
4992                 if (cpus[i].physical_node_id > topo.max_node_num)
4993                         topo.max_node_num = cpus[i].physical_node_id;
4994
4995                 /* get core information */
4996                 cpus[i].physical_core_id = get_core_id(i);
4997                 if (cpus[i].physical_core_id > max_core_id)
4998                         max_core_id = cpus[i].physical_core_id;
4999
5000                 /* get thread information */
5001                 siblings = get_thread_siblings(&cpus[i]);
5002                 if (siblings > max_siblings)
5003                         max_siblings = siblings;
5004                 if (cpus[i].thread_id == 0)
5005                         topo.num_cores++;
5006         }
5007
5008         topo.cores_per_node = max_core_id + 1;
5009         if (debug > 1)
5010                 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
5011                         max_core_id, topo.cores_per_node);
5012         if (!summary_only && topo.cores_per_node > 1)
5013                 BIC_PRESENT(BIC_Core);
5014
5015         topo.num_die = max_die_id + 1;
5016         if (debug > 1)
5017                 fprintf(outf, "max_die_id %d, sizing for %d die\n",
5018                                 max_die_id, topo.num_die);
5019         if (!summary_only && topo.num_die > 1)
5020                 BIC_PRESENT(BIC_Die);
5021
5022         topo.num_packages = max_package_id + 1;
5023         if (debug > 1)
5024                 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
5025                         max_package_id, topo.num_packages);
5026         if (!summary_only && topo.num_packages > 1)
5027                 BIC_PRESENT(BIC_Package);
5028
5029         set_node_data();
5030         if (debug > 1)
5031                 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
5032         if (!summary_only && topo.nodes_per_pkg > 1)
5033                 BIC_PRESENT(BIC_Node);
5034
5035         topo.threads_per_core = max_siblings;
5036         if (debug > 1)
5037                 fprintf(outf, "max_siblings %d\n", max_siblings);
5038
5039         if (debug < 1)
5040                 return;
5041
5042         for (i = 0; i <= topo.max_cpu_num; ++i) {
5043                 if (cpu_is_not_present(i))
5044                         continue;
5045                 fprintf(outf,
5046                         "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n",
5047                         i, cpus[i].physical_package_id, cpus[i].die_id,
5048                         cpus[i].physical_node_id,
5049                         cpus[i].logical_node_id,
5050                         cpus[i].physical_core_id,
5051                         cpus[i].thread_id);
5052         }
5053
5054 }
5055
5056 void
5057 allocate_counters(struct thread_data **t, struct core_data **c,
5058                   struct pkg_data **p)
5059 {
5060         int i;
5061         int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
5062                         topo.num_packages;
5063         int num_threads = topo.threads_per_core * num_cores;
5064
5065         *t = calloc(num_threads, sizeof(struct thread_data));
5066         if (*t == NULL)
5067                 goto error;
5068
5069         for (i = 0; i < num_threads; i++)
5070                 (*t)[i].cpu_id = -1;
5071
5072         *c = calloc(num_cores, sizeof(struct core_data));
5073         if (*c == NULL)
5074                 goto error;
5075
5076         for (i = 0; i < num_cores; i++)
5077                 (*c)[i].core_id = -1;
5078
5079         *p = calloc(topo.num_packages, sizeof(struct pkg_data));
5080         if (*p == NULL)
5081                 goto error;
5082
5083         for (i = 0; i < topo.num_packages; i++)
5084                 (*p)[i].package_id = i;
5085
5086         return;
5087 error:
5088         err(1, "calloc counters");
5089 }
5090 /*
5091  * init_counter()
5092  *
5093  * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
5094  */
5095 void init_counter(struct thread_data *thread_base, struct core_data *core_base,
5096         struct pkg_data *pkg_base, int cpu_id)
5097 {
5098         int pkg_id = cpus[cpu_id].physical_package_id;
5099         int node_id = cpus[cpu_id].logical_node_id;
5100         int core_id = cpus[cpu_id].physical_core_id;
5101         int thread_id = cpus[cpu_id].thread_id;
5102         struct thread_data *t;
5103         struct core_data *c;
5104         struct pkg_data *p;
5105
5106
5107         /* Workaround for systems where physical_node_id==-1
5108          * and logical_node_id==(-1 - topo.num_cpus)
5109          */
5110         if (node_id < 0)
5111                 node_id = 0;
5112
5113         t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
5114         c = GET_CORE(core_base, core_id, node_id, pkg_id);
5115         p = GET_PKG(pkg_base, pkg_id);
5116
5117         t->cpu_id = cpu_id;
5118         if (thread_id == 0) {
5119                 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
5120                 if (cpu_is_first_core_in_package(cpu_id))
5121                         t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
5122         }
5123
5124         c->core_id = core_id;
5125         p->package_id = pkg_id;
5126 }
5127
5128
5129 int initialize_counters(int cpu_id)
5130 {
5131         init_counter(EVEN_COUNTERS, cpu_id);
5132         init_counter(ODD_COUNTERS, cpu_id);
5133         return 0;
5134 }
5135
5136 void allocate_output_buffer()
5137 {
5138         output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
5139         outp = output_buffer;
5140         if (outp == NULL)
5141                 err(-1, "calloc output buffer");
5142 }
5143 void allocate_fd_percpu(void)
5144 {
5145         fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5146         if (fd_percpu == NULL)
5147                 err(-1, "calloc fd_percpu");
5148 }
5149 void allocate_irq_buffers(void)
5150 {
5151         irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
5152         if (irq_column_2_cpu == NULL)
5153                 err(-1, "calloc %d", topo.num_cpus);
5154
5155         irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5156         if (irqs_per_cpu == NULL)
5157                 err(-1, "calloc %d", topo.max_cpu_num + 1);
5158 }
5159 void setup_all_buffers(void)
5160 {
5161         topology_probe();
5162         allocate_irq_buffers();
5163         allocate_fd_percpu();
5164         allocate_counters(&thread_even, &core_even, &package_even);
5165         allocate_counters(&thread_odd, &core_odd, &package_odd);
5166         allocate_output_buffer();
5167         for_all_proc_cpus(initialize_counters);
5168 }
5169
5170 void set_base_cpu(void)
5171 {
5172         base_cpu = sched_getcpu();
5173         if (base_cpu < 0)
5174                 err(-ENODEV, "No valid cpus found");
5175
5176         if (debug > 1)
5177                 fprintf(outf, "base_cpu = %d\n", base_cpu);
5178 }
5179
5180 void turbostat_init()
5181 {
5182         setup_all_buffers();
5183         set_base_cpu();
5184         check_dev_msr();
5185         check_permissions();
5186         process_cpuid();
5187
5188
5189         if (!quiet)
5190                 for_all_cpus(print_hwp, ODD_COUNTERS);
5191
5192         if (!quiet)
5193                 for_all_cpus(print_epb, ODD_COUNTERS);
5194
5195         if (!quiet)
5196                 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5197
5198         if (!quiet)
5199                 for_all_cpus(print_rapl, ODD_COUNTERS);
5200
5201         for_all_cpus(set_temperature_target, ODD_COUNTERS);
5202
5203         if (!quiet)
5204                 for_all_cpus(print_thermal, ODD_COUNTERS);
5205
5206         if (!quiet && do_irtl_snb)
5207                 print_irtl();
5208 }
5209
5210 int fork_it(char **argv)
5211 {
5212         pid_t child_pid;
5213         int status;
5214
5215         snapshot_proc_sysfs_files();
5216         status = for_all_cpus(get_counters, EVEN_COUNTERS);
5217         first_counter_read = 0;
5218         if (status)
5219                 exit(status);
5220         /* clear affinity side-effect of get_counters() */
5221         sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
5222         gettimeofday(&tv_even, (struct timezone *)NULL);
5223
5224         child_pid = fork();
5225         if (!child_pid) {
5226                 /* child */
5227                 execvp(argv[0], argv);
5228                 err(errno, "exec %s", argv[0]);
5229         } else {
5230
5231                 /* parent */
5232                 if (child_pid == -1)
5233                         err(1, "fork");
5234
5235                 signal(SIGINT, SIG_IGN);
5236                 signal(SIGQUIT, SIG_IGN);
5237                 if (waitpid(child_pid, &status, 0) == -1)
5238                         err(status, "waitpid");
5239
5240                 if (WIFEXITED(status))
5241                         status = WEXITSTATUS(status);
5242         }
5243         /*
5244          * n.b. fork_it() does not check for errors from for_all_cpus()
5245          * because re-starting is problematic when forking
5246          */
5247         snapshot_proc_sysfs_files();
5248         for_all_cpus(get_counters, ODD_COUNTERS);
5249         gettimeofday(&tv_odd, (struct timezone *)NULL);
5250         timersub(&tv_odd, &tv_even, &tv_delta);
5251         if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5252                 fprintf(outf, "%s: Counter reset detected\n", progname);
5253         else {
5254                 compute_average(EVEN_COUNTERS);
5255                 format_all_counters(EVEN_COUNTERS);
5256         }
5257
5258         fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5259
5260         flush_output_stderr();
5261
5262         return status;
5263 }
5264
5265 int get_and_dump_counters(void)
5266 {
5267         int status;
5268
5269         snapshot_proc_sysfs_files();
5270         status = for_all_cpus(get_counters, ODD_COUNTERS);
5271         if (status)
5272                 return status;
5273
5274         status = for_all_cpus(dump_counters, ODD_COUNTERS);
5275         if (status)
5276                 return status;
5277
5278         flush_output_stdout();
5279
5280         return status;
5281 }
5282
5283 void print_version() {
5284         fprintf(outf, "turbostat version 19.03.20"
5285                 " - Len Brown <lenb@kernel.org>\n");
5286 }
5287
5288 int add_counter(unsigned int msr_num, char *path, char *name,
5289         unsigned int width, enum counter_scope scope,
5290         enum counter_type type, enum counter_format format, int flags)
5291 {
5292         struct msr_counter *msrp;
5293
5294         msrp = calloc(1, sizeof(struct msr_counter));
5295         if (msrp == NULL) {
5296                 perror("calloc");
5297                 exit(1);
5298         }
5299
5300         msrp->msr_num = msr_num;
5301         strncpy(msrp->name, name, NAME_BYTES);
5302         if (path)
5303                 strncpy(msrp->path, path, PATH_BYTES);
5304         msrp->width = width;
5305         msrp->type = type;
5306         msrp->format = format;
5307         msrp->flags = flags;
5308
5309         switch (scope) {
5310
5311         case SCOPE_CPU:
5312                 msrp->next = sys.tp;
5313                 sys.tp = msrp;
5314                 sys.added_thread_counters++;
5315                 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
5316                         fprintf(stderr, "exceeded max %d added thread counters\n",
5317                                 MAX_ADDED_COUNTERS);
5318                         exit(-1);
5319                 }
5320                 break;
5321
5322         case SCOPE_CORE:
5323                 msrp->next = sys.cp;
5324                 sys.cp = msrp;
5325                 sys.added_core_counters++;
5326                 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5327                         fprintf(stderr, "exceeded max %d added core counters\n",
5328                                 MAX_ADDED_COUNTERS);
5329                         exit(-1);
5330                 }
5331                 break;
5332
5333         case SCOPE_PACKAGE:
5334                 msrp->next = sys.pp;
5335                 sys.pp = msrp;
5336                 sys.added_package_counters++;
5337                 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5338                         fprintf(stderr, "exceeded max %d added package counters\n",
5339                                 MAX_ADDED_COUNTERS);
5340                         exit(-1);
5341                 }
5342                 break;
5343         }
5344
5345         return 0;
5346 }
5347
5348 void parse_add_command(char *add_command)
5349 {
5350         int msr_num = 0;
5351         char *path = NULL;
5352         char name_buffer[NAME_BYTES] = "";
5353         int width = 64;
5354         int fail = 0;
5355         enum counter_scope scope = SCOPE_CPU;
5356         enum counter_type type = COUNTER_CYCLES;
5357         enum counter_format format = FORMAT_DELTA;
5358
5359         while (add_command) {
5360
5361                 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5362                         goto next;
5363
5364                 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5365                         goto next;
5366
5367                 if (*add_command == '/') {
5368                         path = add_command;
5369                         goto next;
5370                 }
5371
5372                 if (sscanf(add_command, "u%d", &width) == 1) {
5373                         if ((width == 32) || (width == 64))
5374                                 goto next;
5375                         width = 64;
5376                 }
5377                 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5378                         scope = SCOPE_CPU;
5379                         goto next;
5380                 }
5381                 if (!strncmp(add_command, "core", strlen("core"))) {
5382                         scope = SCOPE_CORE;
5383                         goto next;
5384                 }
5385                 if (!strncmp(add_command, "package", strlen("package"))) {
5386                         scope = SCOPE_PACKAGE;
5387                         goto next;
5388                 }
5389                 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5390                         type = COUNTER_CYCLES;
5391                         goto next;
5392                 }
5393                 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5394                         type = COUNTER_SECONDS;
5395                         goto next;
5396                 }
5397                 if (!strncmp(add_command, "usec", strlen("usec"))) {
5398                         type = COUNTER_USEC;
5399                         goto next;
5400                 }
5401                 if (!strncmp(add_command, "raw", strlen("raw"))) {
5402                         format = FORMAT_RAW;
5403                         goto next;
5404                 }
5405                 if (!strncmp(add_command, "delta", strlen("delta"))) {
5406                         format = FORMAT_DELTA;
5407                         goto next;
5408                 }
5409                 if (!strncmp(add_command, "percent", strlen("percent"))) {
5410                         format = FORMAT_PERCENT;
5411                         goto next;
5412                 }
5413
5414                 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) {        /* 18 < NAME_BYTES */
5415                         char *eos;
5416
5417                         eos = strchr(name_buffer, ',');
5418                         if (eos)
5419                                 *eos = '\0';
5420                         goto next;
5421                 }
5422
5423 next:
5424                 add_command = strchr(add_command, ',');
5425                 if (add_command) {
5426                         *add_command = '\0';
5427                         add_command++;
5428                 }
5429
5430         }
5431         if ((msr_num == 0) && (path == NULL)) {
5432                 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
5433                 fail++;
5434         }
5435
5436         /* generate default column header */
5437         if (*name_buffer == '\0') {
5438                 if (width == 32)
5439                         sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5440                 else
5441                         sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5442         }
5443
5444         if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
5445                 fail++;
5446
5447         if (fail) {
5448                 help();
5449                 exit(1);
5450         }
5451 }
5452
5453 int is_deferred_skip(char *name)
5454 {
5455         int i;
5456
5457         for (i = 0; i < deferred_skip_index; ++i)
5458                 if (!strcmp(name, deferred_skip_names[i]))
5459                         return 1;
5460         return 0;
5461 }
5462
5463 void probe_sysfs(void)
5464 {
5465         char path[64];
5466         char name_buf[16];
5467         FILE *input;
5468         int state;
5469         char *sp;
5470
5471         if (!DO_BIC(BIC_sysfs))
5472                 return;
5473
5474         for (state = 10; state >= 0; --state) {
5475
5476                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5477                         base_cpu, state);
5478                 input = fopen(path, "r");
5479                 if (input == NULL)
5480                         continue;
5481                 if (!fgets(name_buf, sizeof(name_buf), input))
5482                         err(1, "%s: failed to read file", path);
5483
5484                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5485                 sp = strchr(name_buf, '-');
5486                 if (!sp)
5487                         sp = strchrnul(name_buf, '\n');
5488                 *sp = '%';
5489                 *(sp + 1) = '\0';
5490
5491                 fclose(input);
5492
5493                 sprintf(path, "cpuidle/state%d/time", state);
5494
5495                 if (is_deferred_skip(name_buf))
5496                         continue;
5497
5498                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
5499                                 FORMAT_PERCENT, SYSFS_PERCPU);
5500         }
5501
5502         for (state = 10; state >= 0; --state) {
5503
5504                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5505                         base_cpu, state);
5506                 input = fopen(path, "r");
5507                 if (input == NULL)
5508                         continue;
5509                 if (!fgets(name_buf, sizeof(name_buf), input))
5510                         err(1, "%s: failed to read file", path);
5511                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5512                 sp = strchr(name_buf, '-');
5513                 if (!sp)
5514                         sp = strchrnul(name_buf, '\n');
5515                 *sp = '\0';
5516                 fclose(input);
5517
5518                 sprintf(path, "cpuidle/state%d/usage", state);
5519
5520                 if (is_deferred_skip(name_buf))
5521                         continue;
5522
5523                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
5524                                 FORMAT_DELTA, SYSFS_PERCPU);
5525         }
5526
5527 }
5528
5529
5530 /*
5531  * parse cpuset with following syntax
5532  * 1,2,4..6,8-10 and set bits in cpu_subset
5533  */
5534 void parse_cpu_command(char *optarg)
5535 {
5536         unsigned int start, end;
5537         char *next;
5538
5539         if (!strcmp(optarg, "core")) {
5540                 if (cpu_subset)
5541                         goto error;
5542                 show_core_only++;
5543                 return;
5544         }
5545         if (!strcmp(optarg, "package")) {
5546                 if (cpu_subset)
5547                         goto error;
5548                 show_pkg_only++;
5549                 return;
5550         }
5551         if (show_core_only || show_pkg_only)
5552                 goto error;
5553
5554         cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
5555         if (cpu_subset == NULL)
5556                 err(3, "CPU_ALLOC");
5557         cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
5558
5559         CPU_ZERO_S(cpu_subset_size, cpu_subset);
5560
5561         next = optarg;
5562
5563         while (next && *next) {
5564
5565                 if (*next == '-')       /* no negative cpu numbers */
5566                         goto error;
5567
5568                 start = strtoul(next, &next, 10);
5569
5570                 if (start >= CPU_SUBSET_MAXCPUS)
5571                         goto error;
5572                 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5573
5574                 if (*next == '\0')
5575                         break;
5576
5577                 if (*next == ',') {
5578                         next += 1;
5579                         continue;
5580                 }
5581
5582                 if (*next == '-') {
5583                         next += 1;      /* start range */
5584                 } else if (*next == '.') {
5585                         next += 1;
5586                         if (*next == '.')
5587                                 next += 1;      /* start range */
5588                         else
5589                                 goto error;
5590                 }
5591
5592                 end = strtoul(next, &next, 10);
5593                 if (end <= start)
5594                         goto error;
5595
5596                 while (++start <= end) {
5597                         if (start >= CPU_SUBSET_MAXCPUS)
5598                                 goto error;
5599                         CPU_SET_S(start, cpu_subset_size, cpu_subset);
5600                 }
5601
5602                 if (*next == ',')
5603                         next += 1;
5604                 else if (*next != '\0')
5605                         goto error;
5606         }
5607
5608         return;
5609
5610 error:
5611         fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
5612         help();
5613         exit(-1);
5614 }
5615
5616
5617 void cmdline(int argc, char **argv)
5618 {
5619         int opt;
5620         int option_index = 0;
5621         static struct option long_options[] = {
5622                 {"add",         required_argument,      0, 'a'},
5623                 {"cpu",         required_argument,      0, 'c'},
5624                 {"Dump",        no_argument,            0, 'D'},
5625                 {"debug",       no_argument,            0, 'd'},        /* internal, not documented */
5626                 {"enable",      required_argument,      0, 'e'},
5627                 {"interval",    required_argument,      0, 'i'},
5628                 {"num_iterations",      required_argument,      0, 'n'},
5629                 {"help",        no_argument,            0, 'h'},
5630                 {"hide",        required_argument,      0, 'H'},        // meh, -h taken by --help
5631                 {"Joules",      no_argument,            0, 'J'},
5632                 {"list",        no_argument,            0, 'l'},
5633                 {"out",         required_argument,      0, 'o'},
5634                 {"quiet",       no_argument,            0, 'q'},
5635                 {"show",        required_argument,      0, 's'},
5636                 {"Summary",     no_argument,            0, 'S'},
5637                 {"TCC",         required_argument,      0, 'T'},
5638                 {"version",     no_argument,            0, 'v' },
5639                 {0,             0,                      0,  0 }
5640         };
5641
5642         progname = argv[0];
5643
5644         while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
5645                                 long_options, &option_index)) != -1) {
5646                 switch (opt) {
5647                 case 'a':
5648                         parse_add_command(optarg);
5649                         break;
5650                 case 'c':
5651                         parse_cpu_command(optarg);
5652                         break;
5653                 case 'D':
5654                         dump_only++;
5655                         break;
5656                 case 'e':
5657                         /* --enable specified counter */
5658                         bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
5659                         break;
5660                 case 'd':
5661                         debug++;
5662                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
5663                         break;
5664                 case 'H':
5665                         /*
5666                          * --hide: do not show those specified
5667                          *  multiple invocations simply clear more bits in enabled mask
5668                          */
5669                         bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
5670                         break;
5671                 case 'h':
5672                 default:
5673                         help();
5674                         exit(1);
5675                 case 'i':
5676                         {
5677                                 double interval = strtod(optarg, NULL);
5678
5679                                 if (interval < 0.001) {
5680                                         fprintf(outf, "interval %f seconds is too small\n",
5681                                                 interval);
5682                                         exit(2);
5683                                 }
5684
5685                                 interval_tv.tv_sec = interval_ts.tv_sec = interval;
5686                                 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
5687                                 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
5688                         }
5689                         break;
5690                 case 'J':
5691                         rapl_joules++;
5692                         break;
5693                 case 'l':
5694                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
5695                         list_header_only++;
5696                         quiet++;
5697                         break;
5698                 case 'o':
5699                         outf = fopen_or_die(optarg, "w");
5700                         break;
5701                 case 'q':
5702                         quiet = 1;
5703                         break;
5704                 case 'n':
5705                         num_iterations = strtod(optarg, NULL);
5706
5707                         if (num_iterations <= 0) {
5708                                 fprintf(outf, "iterations %d should be positive number\n",
5709                                         num_iterations);
5710                                 exit(2);
5711                         }
5712                         break;
5713                 case 's':
5714                         /*
5715                          * --show: show only those specified
5716                          *  The 1st invocation will clear and replace the enabled mask
5717                          *  subsequent invocations can add to it.
5718                          */
5719                         if (shown == 0)
5720                                 bic_enabled = bic_lookup(optarg, SHOW_LIST);
5721                         else
5722                                 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
5723                         shown = 1;
5724                         break;
5725                 case 'S':
5726                         summary_only++;
5727                         break;
5728                 case 'T':
5729                         tcc_activation_temp_override = atoi(optarg);
5730                         break;
5731                 case 'v':
5732                         print_version();
5733                         exit(0);
5734                         break;
5735                 }
5736         }
5737 }
5738
5739 int main(int argc, char **argv)
5740 {
5741         outf = stderr;
5742         cmdline(argc, argv);
5743
5744         if (!quiet)
5745                 print_version();
5746
5747         probe_sysfs();
5748
5749         turbostat_init();
5750
5751         /* dump counters and exit */
5752         if (dump_only)
5753                 return get_and_dump_counters();
5754
5755         /* list header and exit */
5756         if (list_header_only) {
5757                 print_header(",");
5758                 flush_output_stdout();
5759                 return 0;
5760         }
5761
5762         /*
5763          * if any params left, it must be a command to fork
5764          */
5765         if (argc - optind)
5766                 return fork_it(argv + optind);
5767         else
5768                 turbostat_loop();
5769
5770         return 0;
5771 }