2 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
5 * Copyright (C) 2015 Intel Corp
6 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
7 * Jeeja KP <jeeja.kp@intel.com>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as version 2, as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <uapi/sound/skl-tplg-interface.h>
25 #include "skl-sst-dsp.h"
26 #include "cnl-sst-dsp.h"
27 #include "skl-sst-ipc.h"
29 #include "../common/sst-dsp.h"
30 #include "../common/sst-dsp-priv.h"
31 #include "skl-topology.h"
33 static int skl_alloc_dma_buf(struct device *dev,
34 struct snd_dma_buffer *dmab, size_t size)
36 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
37 struct hdac_bus *bus = ebus_to_hbus(ebus);
42 return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
45 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
47 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
48 struct hdac_bus *bus = ebus_to_hbus(ebus);
53 bus->io_ops->dma_free_pages(bus, dmab);
58 #define SKL_ASTATE_PARAM_ID 4
60 void skl_dsp_set_astate_cfg(struct skl_sst *ctx, u32 cnt, void *data)
62 struct skl_ipc_large_config_msg msg = {0};
64 msg.large_param_id = SKL_ASTATE_PARAM_ID;
65 msg.param_data_size = (cnt * sizeof(struct skl_astate_param) +
68 skl_ipc_set_large_config(&ctx->ipc, &msg, data);
71 #define NOTIFICATION_PARAM_ID 3
72 #define NOTIFICATION_MASK 0xf
74 /* disable notfication for underruns/overruns from firmware module */
75 void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable)
77 struct notification_mask mask;
78 struct skl_ipc_large_config_msg msg = {0};
80 mask.notify = NOTIFICATION_MASK;
83 msg.large_param_id = NOTIFICATION_PARAM_ID;
84 msg.param_data_size = sizeof(mask);
86 skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask);
89 static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
90 int stream_tag, int enable)
92 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
93 struct hdac_bus *bus = ebus_to_hbus(ebus);
94 struct hdac_stream *stream = snd_hdac_get_stream(bus,
95 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
96 struct hdac_ext_stream *estream;
101 estream = stream_to_hdac_ext_stream(stream);
102 /* enable/disable SPIB for this hdac stream */
103 snd_hdac_ext_stream_spbcap_enable(ebus, enable, stream->index);
105 /* set the spib value */
106 snd_hdac_ext_stream_set_spib(ebus, estream, size);
111 static int skl_dsp_prepare(struct device *dev, unsigned int format,
112 unsigned int size, struct snd_dma_buffer *dmab)
114 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
115 struct hdac_bus *bus = ebus_to_hbus(ebus);
116 struct hdac_ext_stream *estream;
117 struct hdac_stream *stream;
118 struct snd_pcm_substream substream;
124 memset(&substream, 0, sizeof(substream));
125 substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
127 estream = snd_hdac_ext_stream_assign(ebus, &substream,
128 HDAC_EXT_STREAM_TYPE_HOST);
132 stream = hdac_stream(estream);
134 /* assign decouple host dma channel */
135 ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
139 skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
141 return stream->stream_tag;
144 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
146 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
147 struct hdac_stream *stream;
148 struct hdac_bus *bus = ebus_to_hbus(ebus);
153 stream = snd_hdac_get_stream(bus,
154 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
158 snd_hdac_dsp_trigger(stream, start);
163 static int skl_dsp_cleanup(struct device *dev,
164 struct snd_dma_buffer *dmab, int stream_tag)
166 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
167 struct hdac_stream *stream;
168 struct hdac_ext_stream *estream;
169 struct hdac_bus *bus = ebus_to_hbus(ebus);
174 stream = snd_hdac_get_stream(bus,
175 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
179 estream = stream_to_hdac_ext_stream(stream);
180 skl_dsp_setup_spib(dev, 0, stream_tag, false);
181 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
183 snd_hdac_dsp_cleanup(stream, dmab);
188 static struct skl_dsp_loader_ops skl_get_loader_ops(void)
190 struct skl_dsp_loader_ops loader_ops;
192 memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops));
194 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
195 loader_ops.free_dma_buf = skl_free_dma_buf;
200 static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
202 struct skl_dsp_loader_ops loader_ops;
204 memset(&loader_ops, 0, sizeof(loader_ops));
206 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
207 loader_ops.free_dma_buf = skl_free_dma_buf;
208 loader_ops.prepare = skl_dsp_prepare;
209 loader_ops.trigger = skl_dsp_trigger;
210 loader_ops.cleanup = skl_dsp_cleanup;
215 static const struct skl_dsp_ops dsp_ops[] = {
219 .loader_ops = skl_get_loader_ops,
220 .init = skl_sst_dsp_init,
221 .init_fw = skl_sst_init_fw,
222 .cleanup = skl_sst_dsp_cleanup
227 .loader_ops = skl_get_loader_ops,
228 .init = skl_sst_dsp_init,
229 .init_fw = skl_sst_init_fw,
230 .cleanup = skl_sst_dsp_cleanup
235 .loader_ops = bxt_get_loader_ops,
236 .init = bxt_sst_dsp_init,
237 .init_fw = bxt_sst_init_fw,
238 .cleanup = bxt_sst_dsp_cleanup
243 .loader_ops = bxt_get_loader_ops,
244 .init = bxt_sst_dsp_init,
245 .init_fw = bxt_sst_init_fw,
246 .cleanup = bxt_sst_dsp_cleanup
251 .loader_ops = bxt_get_loader_ops,
252 .init = cnl_sst_dsp_init,
253 .init_fw = cnl_sst_init_fw,
254 .cleanup = cnl_sst_dsp_cleanup
258 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
262 for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) {
263 if (dsp_ops[i].id == pci_id)
270 int skl_init_dsp(struct skl *skl)
272 void __iomem *mmio_base;
273 struct hdac_ext_bus *ebus = &skl->ebus;
274 struct hdac_bus *bus = ebus_to_hbus(ebus);
275 struct skl_dsp_loader_ops loader_ops;
277 const struct skl_dsp_ops *ops;
278 struct skl_dsp_cores *cores;
281 /* enable ppcap interrupt */
282 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
283 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
285 /* read the BAR of the ADSP MMIO */
286 mmio_base = pci_ioremap_bar(skl->pci, 4);
287 if (mmio_base == NULL) {
288 dev_err(bus->dev, "ioremap error\n");
292 ops = skl_get_dsp_ops(skl->pci->device);
298 loader_ops = ops->loader_ops();
299 ret = ops->init(bus->dev, mmio_base, irq,
300 skl->fw_name, loader_ops,
306 skl->skl_sst->dsp_ops = ops;
307 cores = &skl->skl_sst->cores;
308 cores->count = ops->num_cores;
310 cores->state = kcalloc(cores->count, sizeof(*cores->state), GFP_KERNEL);
316 cores->usage_count = kcalloc(cores->count, sizeof(*cores->usage_count),
318 if (!cores->usage_count) {
320 goto free_core_state;
323 dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
336 int skl_free_dsp(struct skl *skl)
338 struct hdac_ext_bus *ebus = &skl->ebus;
339 struct hdac_bus *bus = ebus_to_hbus(ebus);
340 struct skl_sst *ctx = skl->skl_sst;
342 /* disable ppcap interrupt */
343 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
345 ctx->dsp_ops->cleanup(bus->dev, ctx);
347 kfree(ctx->cores.state);
348 kfree(ctx->cores.usage_count);
350 if (ctx->dsp->addr.lpe)
351 iounmap(ctx->dsp->addr.lpe);
357 * In the case of "suspend_active" i.e, the Audio IP being active
358 * during system suspend, immediately excecute any pending D0i3 work
359 * before suspending. This is needed for the IP to work in low power
360 * mode during system suspend. In the case of normal suspend, cancel
361 * any pending D0i3 work.
363 int skl_suspend_late_dsp(struct skl *skl)
365 struct skl_sst *ctx = skl->skl_sst;
366 struct delayed_work *dwork;
371 dwork = &ctx->d0i3.work;
373 if (dwork->work.func) {
374 if (skl->supend_active)
375 flush_delayed_work(dwork);
377 cancel_delayed_work_sync(dwork);
383 int skl_suspend_dsp(struct skl *skl)
385 struct skl_sst *ctx = skl->skl_sst;
388 /* if ppcap is not supported return 0 */
389 if (!skl->ebus.bus.ppcap)
392 ret = skl_dsp_sleep(ctx->dsp);
396 /* disable ppcap interrupt */
397 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
398 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false);
403 int skl_resume_dsp(struct skl *skl)
405 struct skl_sst *ctx = skl->skl_sst;
408 /* if ppcap is not supported return 0 */
409 if (!skl->ebus.bus.ppcap)
412 /* enable ppcap interrupt */
413 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
414 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
416 /* check if DSP 1st boot is done */
417 if (skl->skl_sst->is_first_boot == true)
421 * Disable dynamic clock and power gating during firmware
422 * and library download
424 ctx->enable_miscbdcge(ctx->dev, false);
425 ctx->clock_power_gating(ctx->dev, false);
427 ret = skl_dsp_wake(ctx->dsp);
428 ctx->enable_miscbdcge(ctx->dev, true);
429 ctx->clock_power_gating(ctx->dev, true);
433 skl_dsp_enable_notification(skl->skl_sst, false);
435 if (skl->cfg.astate_cfg != NULL) {
436 skl_dsp_set_astate_cfg(skl->skl_sst, skl->cfg.astate_cfg->count,
437 skl->cfg.astate_cfg);
442 enum skl_bitdepth skl_get_bit_depth(int params)
446 return SKL_DEPTH_8BIT;
449 return SKL_DEPTH_16BIT;
452 return SKL_DEPTH_24BIT;
455 return SKL_DEPTH_32BIT;
458 return SKL_DEPTH_INVALID;
464 * Each module in DSP expects a base module configuration, which consists of
465 * PCM format information, which we calculate in driver and resource values
466 * which are read from widget information passed through topology binary
467 * This is send when we create a module with INIT_INSTANCE IPC msg
469 static void skl_set_base_module_format(struct skl_sst *ctx,
470 struct skl_module_cfg *mconfig,
471 struct skl_base_cfg *base_cfg)
473 struct skl_module *module = mconfig->module;
474 struct skl_module_res *res = &module->resources[mconfig->res_idx];
475 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
476 struct skl_module_fmt *format = &fmt->inputs[0].fmt;
478 base_cfg->audio_fmt.number_of_channels = format->channels;
480 base_cfg->audio_fmt.s_freq = format->s_freq;
481 base_cfg->audio_fmt.bit_depth = format->bit_depth;
482 base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
483 base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
485 dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
486 format->bit_depth, format->valid_bit_depth,
489 base_cfg->audio_fmt.channel_map = format->ch_map;
491 base_cfg->audio_fmt.interleaving = format->interleaving_style;
493 base_cfg->cps = res->cps;
494 base_cfg->ibs = res->ibs;
495 base_cfg->obs = res->obs;
496 base_cfg->is_pages = res->is_pages;
500 * Copies copier capabilities into copier module and updates copier module
503 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
504 struct skl_cpr_cfg *cpr_mconfig)
506 if (mconfig->formats_config.caps_size == 0)
509 memcpy(cpr_mconfig->gtw_cfg.config_data,
510 mconfig->formats_config.caps,
511 mconfig->formats_config.caps_size);
513 cpr_mconfig->gtw_cfg.config_length =
514 (mconfig->formats_config.caps_size) / 4;
517 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
519 * Calculate the gatewat settings required for copier module, type of
520 * gateway and index of gateway to use
522 static u32 skl_get_node_id(struct skl_sst *ctx,
523 struct skl_module_cfg *mconfig)
525 union skl_connector_node_id node_id = {0};
526 union skl_ssp_dma_node ssp_node = {0};
527 struct skl_pipe_params *params = mconfig->pipe->p_params;
529 switch (mconfig->dev_type) {
531 node_id.node.dma_type =
532 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
533 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
534 SKL_DMA_I2S_LINK_INPUT_CLASS;
535 node_id.node.vindex = params->host_dma_id +
536 (mconfig->vbus_id << 3);
540 node_id.node.dma_type =
541 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
542 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
543 SKL_DMA_I2S_LINK_INPUT_CLASS;
544 ssp_node.dma_node.time_slot_index = mconfig->time_slot;
545 ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
546 node_id.node.vindex = ssp_node.val;
549 case SKL_DEVICE_DMIC:
550 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
551 node_id.node.vindex = mconfig->vbus_id +
552 (mconfig->time_slot);
555 case SKL_DEVICE_HDALINK:
556 node_id.node.dma_type =
557 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
558 SKL_DMA_HDA_LINK_OUTPUT_CLASS :
559 SKL_DMA_HDA_LINK_INPUT_CLASS;
560 node_id.node.vindex = params->link_dma_id;
563 case SKL_DEVICE_HDAHOST:
564 node_id.node.dma_type =
565 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
566 SKL_DMA_HDA_HOST_OUTPUT_CLASS :
567 SKL_DMA_HDA_HOST_INPUT_CLASS;
568 node_id.node.vindex = params->host_dma_id;
572 node_id.val = 0xFFFFFFFF;
579 static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
580 struct skl_module_cfg *mconfig,
581 struct skl_cpr_cfg *cpr_mconfig)
584 struct skl_module_res *res;
585 int res_idx = mconfig->res_idx;
586 struct skl *skl = get_skl_ctx(ctx->dev);
588 cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(ctx, mconfig);
590 if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) {
591 cpr_mconfig->cpr_feature_mask = 0;
595 if (skl->nr_modules) {
596 res = &mconfig->module->resources[mconfig->res_idx];
597 cpr_mconfig->gtw_cfg.dma_buffer_size = res->dma_buffer_size;
598 goto skip_buf_size_calc;
600 res = &mconfig->module->resources[res_idx];
603 switch (mconfig->hw_conn_type) {
604 case SKL_CONN_SOURCE:
605 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
606 dma_io_buf = res->ibs;
608 dma_io_buf = res->obs;
612 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
613 dma_io_buf = res->obs;
615 dma_io_buf = res->ibs;
619 dev_warn(ctx->dev, "wrong connection type: %d\n",
620 mconfig->hw_conn_type);
624 cpr_mconfig->gtw_cfg.dma_buffer_size =
625 mconfig->dma_buffer_size * dma_io_buf;
627 /* fallback to 2ms default value */
628 if (!cpr_mconfig->gtw_cfg.dma_buffer_size) {
629 if (mconfig->hw_conn_type == SKL_CONN_SOURCE)
630 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->obs;
632 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->ibs;
636 cpr_mconfig->cpr_feature_mask = 0;
637 cpr_mconfig->gtw_cfg.config_length = 0;
639 skl_copy_copier_caps(mconfig, cpr_mconfig);
642 #define DMA_CONTROL_ID 5
643 #define DMA_I2S_BLOB_SIZE 21
645 int skl_dsp_set_dma_control(struct skl_sst *ctx, u32 *caps,
646 u32 caps_size, u32 node_id)
648 struct skl_dma_control *dma_ctrl;
649 struct skl_ipc_large_config_msg msg = {0};
654 * if blob size zero, then return
659 msg.large_param_id = DMA_CONTROL_ID;
660 msg.param_data_size = sizeof(struct skl_dma_control) + caps_size;
662 dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL);
663 if (dma_ctrl == NULL)
666 dma_ctrl->node_id = node_id;
669 * NHLT blob may contain additional configs along with i2s blob.
670 * firmware expects only the i2s blob size as the config_length.
671 * So fix to i2s blob size.
674 dma_ctrl->config_length = DMA_I2S_BLOB_SIZE;
676 memcpy(dma_ctrl->config_data, caps, caps_size);
678 err = skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)dma_ctrl);
683 EXPORT_SYMBOL_GPL(skl_dsp_set_dma_control);
685 static void skl_setup_out_format(struct skl_sst *ctx,
686 struct skl_module_cfg *mconfig,
687 struct skl_audio_data_format *out_fmt)
689 struct skl_module *module = mconfig->module;
690 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
691 struct skl_module_fmt *format = &fmt->outputs[0].fmt;
693 out_fmt->number_of_channels = (u8)format->channels;
694 out_fmt->s_freq = format->s_freq;
695 out_fmt->bit_depth = format->bit_depth;
696 out_fmt->valid_bit_depth = format->valid_bit_depth;
697 out_fmt->ch_cfg = format->ch_cfg;
699 out_fmt->channel_map = format->ch_map;
700 out_fmt->interleaving = format->interleaving_style;
701 out_fmt->sample_type = format->sample_type;
703 dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
704 out_fmt->number_of_channels, format->s_freq, format->bit_depth);
708 * DSP needs SRC module for frequency conversion, SRC takes base module
709 * configuration and the target frequency as extra parameter passed as src
712 static void skl_set_src_format(struct skl_sst *ctx,
713 struct skl_module_cfg *mconfig,
714 struct skl_src_module_cfg *src_mconfig)
716 struct skl_module *module = mconfig->module;
717 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
718 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
720 skl_set_base_module_format(ctx, mconfig,
721 (struct skl_base_cfg *)src_mconfig);
723 src_mconfig->src_cfg = fmt->s_freq;
727 * DSP needs updown module to do channel conversion. updown module take base
728 * module configuration and channel configuration
729 * It also take coefficients and now we have defaults applied here
731 static void skl_set_updown_mixer_format(struct skl_sst *ctx,
732 struct skl_module_cfg *mconfig,
733 struct skl_up_down_mixer_cfg *mixer_mconfig)
735 struct skl_module *module = mconfig->module;
736 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
737 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
739 skl_set_base_module_format(ctx, mconfig,
740 (struct skl_base_cfg *)mixer_mconfig);
741 mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
742 mixer_mconfig->ch_map = fmt->ch_map;
746 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
747 * dma) or link (hda link, SSP, PDM)
748 * Here we calculate the copier module parameters, like PCM format, output
749 * format, gateway settings
750 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
752 static void skl_set_copier_format(struct skl_sst *ctx,
753 struct skl_module_cfg *mconfig,
754 struct skl_cpr_cfg *cpr_mconfig)
756 struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
757 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
759 skl_set_base_module_format(ctx, mconfig, base_cfg);
761 skl_setup_out_format(ctx, mconfig, out_fmt);
762 skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
766 * Algo module are DSP pre processing modules. Algo module take base module
767 * configuration and params
770 static void skl_set_algo_format(struct skl_sst *ctx,
771 struct skl_module_cfg *mconfig,
772 struct skl_algo_cfg *algo_mcfg)
774 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)algo_mcfg;
776 skl_set_base_module_format(ctx, mconfig, base_cfg);
778 if (mconfig->formats_config.caps_size == 0)
781 memcpy(algo_mcfg->params,
782 mconfig->formats_config.caps,
783 mconfig->formats_config.caps_size);
788 * Mic select module allows selecting one or many input channels, thus
791 * Mic select module take base module configuration and out-format
794 static void skl_set_base_outfmt_format(struct skl_sst *ctx,
795 struct skl_module_cfg *mconfig,
796 struct skl_base_outfmt_cfg *base_outfmt_mcfg)
798 struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt;
799 struct skl_base_cfg *base_cfg =
800 (struct skl_base_cfg *)base_outfmt_mcfg;
802 skl_set_base_module_format(ctx, mconfig, base_cfg);
803 skl_setup_out_format(ctx, mconfig, out_fmt);
806 static u16 skl_get_module_param_size(struct skl_sst *ctx,
807 struct skl_module_cfg *mconfig)
811 switch (mconfig->m_type) {
812 case SKL_MODULE_TYPE_COPIER:
813 param_size = sizeof(struct skl_cpr_cfg);
814 param_size += mconfig->formats_config.caps_size;
817 case SKL_MODULE_TYPE_SRCINT:
818 return sizeof(struct skl_src_module_cfg);
820 case SKL_MODULE_TYPE_UPDWMIX:
821 return sizeof(struct skl_up_down_mixer_cfg);
823 case SKL_MODULE_TYPE_ALGO:
824 param_size = sizeof(struct skl_base_cfg);
825 param_size += mconfig->formats_config.caps_size;
828 case SKL_MODULE_TYPE_BASE_OUTFMT:
829 case SKL_MODULE_TYPE_MIC_SELECT:
830 case SKL_MODULE_TYPE_KPB:
831 return sizeof(struct skl_base_outfmt_cfg);
835 * return only base cfg when no specific module type is
838 return sizeof(struct skl_base_cfg);
845 * DSP firmware supports various modules like copier, SRC, updown etc.
846 * These modules required various parameters to be calculated and sent for
847 * the module initialization to DSP. By default a generic module needs only
848 * base module format configuration
851 static int skl_set_module_format(struct skl_sst *ctx,
852 struct skl_module_cfg *module_config,
853 u16 *module_config_size,
858 param_size = skl_get_module_param_size(ctx, module_config);
860 *param_data = kzalloc(param_size, GFP_KERNEL);
861 if (NULL == *param_data)
864 *module_config_size = param_size;
866 switch (module_config->m_type) {
867 case SKL_MODULE_TYPE_COPIER:
868 skl_set_copier_format(ctx, module_config, *param_data);
871 case SKL_MODULE_TYPE_SRCINT:
872 skl_set_src_format(ctx, module_config, *param_data);
875 case SKL_MODULE_TYPE_UPDWMIX:
876 skl_set_updown_mixer_format(ctx, module_config, *param_data);
879 case SKL_MODULE_TYPE_ALGO:
880 skl_set_algo_format(ctx, module_config, *param_data);
883 case SKL_MODULE_TYPE_BASE_OUTFMT:
884 case SKL_MODULE_TYPE_MIC_SELECT:
885 case SKL_MODULE_TYPE_KPB:
886 skl_set_base_outfmt_format(ctx, module_config, *param_data);
890 skl_set_base_module_format(ctx, module_config, *param_data);
895 dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
896 module_config->id.module_id, param_size);
897 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4,
898 *param_data, param_size, false);
902 static int skl_get_queue_index(struct skl_module_pin *mpin,
903 struct skl_module_inst_id id, int max)
907 for (i = 0; i < max; i++) {
908 if (mpin[i].id.module_id == id.module_id &&
909 mpin[i].id.instance_id == id.instance_id)
917 * Allocates queue for each module.
918 * if dynamic, the pin_index is allocated 0 to max_pin.
919 * In static, the pin_index is fixed based on module_id and instance id
921 static int skl_alloc_queue(struct skl_module_pin *mpin,
922 struct skl_module_cfg *tgt_cfg, int max)
925 struct skl_module_inst_id id = tgt_cfg->id;
927 * if pin in dynamic, find first free pin
928 * otherwise find match module and instance id pin as topology will
929 * ensure a unique pin is assigned to this so no need to
932 for (i = 0; i < max; i++) {
933 if (mpin[i].is_dynamic) {
934 if (!mpin[i].in_use &&
935 mpin[i].pin_state == SKL_PIN_UNBIND) {
937 mpin[i].in_use = true;
938 mpin[i].id.module_id = id.module_id;
939 mpin[i].id.instance_id = id.instance_id;
940 mpin[i].id.pvt_id = id.pvt_id;
941 mpin[i].tgt_mcfg = tgt_cfg;
945 if (mpin[i].id.module_id == id.module_id &&
946 mpin[i].id.instance_id == id.instance_id &&
947 mpin[i].pin_state == SKL_PIN_UNBIND) {
949 mpin[i].tgt_mcfg = tgt_cfg;
958 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
960 if (mpin[q_index].is_dynamic) {
961 mpin[q_index].in_use = false;
962 mpin[q_index].id.module_id = 0;
963 mpin[q_index].id.instance_id = 0;
964 mpin[q_index].id.pvt_id = 0;
966 mpin[q_index].pin_state = SKL_PIN_UNBIND;
967 mpin[q_index].tgt_mcfg = NULL;
970 /* Module state will be set to unint, if all the out pin state is UNBIND */
972 static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
973 struct skl_module_cfg *mcfg)
978 for (i = 0; i < max; i++) {
979 if (mpin[i].pin_state == SKL_PIN_UNBIND)
986 mcfg->m_state = SKL_MODULE_INIT_DONE;
991 * A module needs to be instanataited in DSP. A mdoule is present in a
992 * collection of module referred as a PIPE.
993 * We first calculate the module format, based on module type and then
994 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
996 int skl_init_module(struct skl_sst *ctx,
997 struct skl_module_cfg *mconfig)
999 u16 module_config_size = 0;
1000 void *param_data = NULL;
1002 struct skl_ipc_init_instance_msg msg;
1004 dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__,
1005 mconfig->id.module_id, mconfig->id.pvt_id);
1007 if (mconfig->pipe->state != SKL_PIPE_CREATED) {
1008 dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n",
1009 mconfig->pipe->state, mconfig->pipe->ppl_id);
1013 ret = skl_set_module_format(ctx, mconfig,
1014 &module_config_size, ¶m_data);
1016 dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret);
1020 msg.module_id = mconfig->id.module_id;
1021 msg.instance_id = mconfig->id.pvt_id;
1022 msg.ppl_instance_id = mconfig->pipe->ppl_id;
1023 msg.param_data_size = module_config_size;
1024 msg.core_id = mconfig->core_id;
1025 msg.domain = mconfig->domain;
1027 ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data);
1029 dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret);
1033 mconfig->m_state = SKL_MODULE_INIT_DONE;
1038 static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg
1039 *src_module, struct skl_module_cfg *dst_module)
1041 dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n",
1042 __func__, src_module->id.module_id, src_module->id.pvt_id);
1043 dev_dbg(ctx->dev, "%s: dst_module=%d dst_instance=%d\n", __func__,
1044 dst_module->id.module_id, dst_module->id.pvt_id);
1046 dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n",
1047 src_module->m_state, dst_module->m_state);
1051 * On module freeup, we need to unbind the module with modules
1052 * it is already bind.
1053 * Find the pin allocated and unbind then using bind_unbind IPC
1055 int skl_unbind_modules(struct skl_sst *ctx,
1056 struct skl_module_cfg *src_mcfg,
1057 struct skl_module_cfg *dst_mcfg)
1060 struct skl_ipc_bind_unbind_msg msg;
1061 struct skl_module_inst_id src_id = src_mcfg->id;
1062 struct skl_module_inst_id dst_id = dst_mcfg->id;
1063 int in_max = dst_mcfg->module->max_input_pins;
1064 int out_max = src_mcfg->module->max_output_pins;
1065 int src_index, dst_index, src_pin_state, dst_pin_state;
1067 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1069 /* get src queue index */
1070 src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
1074 msg.src_queue = src_index;
1076 /* get dst queue index */
1077 dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
1081 msg.dst_queue = dst_index;
1083 src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
1084 dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
1086 if (src_pin_state != SKL_PIN_BIND_DONE ||
1087 dst_pin_state != SKL_PIN_BIND_DONE)
1090 msg.module_id = src_mcfg->id.module_id;
1091 msg.instance_id = src_mcfg->id.pvt_id;
1092 msg.dst_module_id = dst_mcfg->id.module_id;
1093 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1096 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1098 /* free queue only if unbind is success */
1099 skl_free_queue(src_mcfg->m_out_pin, src_index);
1100 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1103 * check only if src module bind state, bind is
1104 * always from src -> sink
1106 skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
1112 static void fill_pin_params(struct skl_audio_data_format *pin_fmt,
1113 struct skl_module_fmt *format)
1115 pin_fmt->number_of_channels = format->channels;
1116 pin_fmt->s_freq = format->s_freq;
1117 pin_fmt->bit_depth = format->bit_depth;
1118 pin_fmt->valid_bit_depth = format->valid_bit_depth;
1119 pin_fmt->ch_cfg = format->ch_cfg;
1120 pin_fmt->sample_type = format->sample_type;
1121 pin_fmt->channel_map = format->ch_map;
1122 pin_fmt->interleaving = format->interleaving_style;
1125 #define CPR_SINK_FMT_PARAM_ID 2
1128 * Once a module is instantiated it need to be 'bind' with other modules in
1129 * the pipeline. For binding we need to find the module pins which are bind
1131 * This function finds the pins and then sends bund_unbind IPC message to
1132 * DSP using IPC helper
1134 int skl_bind_modules(struct skl_sst *ctx,
1135 struct skl_module_cfg *src_mcfg,
1136 struct skl_module_cfg *dst_mcfg)
1139 struct skl_ipc_bind_unbind_msg msg;
1140 int in_max = dst_mcfg->module->max_input_pins;
1141 int out_max = src_mcfg->module->max_output_pins;
1142 int src_index, dst_index;
1143 struct skl_module_fmt *format;
1144 struct skl_cpr_pin_fmt pin_fmt;
1145 struct skl_module *module;
1146 struct skl_module_iface *fmt;
1148 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1150 if (src_mcfg->m_state < SKL_MODULE_INIT_DONE ||
1151 dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
1154 src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
1158 msg.src_queue = src_index;
1159 dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
1160 if (dst_index < 0) {
1161 skl_free_queue(src_mcfg->m_out_pin, src_index);
1166 * Copier module requires the separate large_config_set_ipc to
1167 * configure the pins other than 0
1169 if (src_mcfg->m_type == SKL_MODULE_TYPE_COPIER && src_index > 0) {
1170 pin_fmt.sink_id = src_index;
1171 module = src_mcfg->module;
1172 fmt = &module->formats[src_mcfg->fmt_idx];
1174 /* Input fmt is same as that of src module input cfg */
1175 format = &fmt->inputs[0].fmt;
1176 fill_pin_params(&(pin_fmt.src_fmt), format);
1178 format = &fmt->outputs[src_index].fmt;
1179 fill_pin_params(&(pin_fmt.dst_fmt), format);
1180 ret = skl_set_module_params(ctx, (void *)&pin_fmt,
1181 sizeof(struct skl_cpr_pin_fmt),
1182 CPR_SINK_FMT_PARAM_ID, src_mcfg);
1188 msg.dst_queue = dst_index;
1190 dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n",
1191 msg.src_queue, msg.dst_queue);
1193 msg.module_id = src_mcfg->id.module_id;
1194 msg.instance_id = src_mcfg->id.pvt_id;
1195 msg.dst_module_id = dst_mcfg->id.module_id;
1196 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1199 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1202 src_mcfg->m_state = SKL_MODULE_BIND_DONE;
1203 src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
1204 dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
1208 /* error case , if IPC fails, clear the queue index */
1209 skl_free_queue(src_mcfg->m_out_pin, src_index);
1210 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1215 static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe,
1216 enum skl_ipc_pipeline_state state)
1218 dev_dbg(ctx->dev, "%s: pipe_state = %d\n", __func__, state);
1220 return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state);
1224 * A pipeline is a collection of modules. Before a module in instantiated a
1225 * pipeline needs to be created for it.
1226 * This function creates pipeline, by sending create pipeline IPC messages
1229 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe)
1233 dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
1235 ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages,
1236 pipe->pipe_priority, pipe->ppl_id,
1239 dev_err(ctx->dev, "Failed to create pipeline\n");
1243 pipe->state = SKL_PIPE_CREATED;
1249 * A pipeline needs to be deleted on cleanup. If a pipeline is running, then
1250 * pause the pipeline first and then delete it
1251 * The pipe delete is done by sending delete pipeline IPC. DSP will stop the
1252 * DMA engines and releases resources
1254 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1258 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1260 /* If pipe is started, do stop the pipe in FW. */
1261 if (pipe->state >= SKL_PIPE_STARTED) {
1262 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1264 dev_err(ctx->dev, "Failed to stop pipeline\n");
1268 pipe->state = SKL_PIPE_PAUSED;
1271 /* If pipe was not created in FW, do not try to delete it */
1272 if (pipe->state < SKL_PIPE_CREATED)
1275 ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id);
1277 dev_err(ctx->dev, "Failed to delete pipeline\n");
1281 pipe->state = SKL_PIPE_INVALID;
1287 * A pipeline is also a scheduling entity in DSP which can be run, stopped
1288 * For processing data the pipe need to be run by sending IPC set pipe state
1291 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1295 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1297 /* If pipe was not created in FW, do not try to pause or delete */
1298 if (pipe->state < SKL_PIPE_CREATED)
1301 /* Pipe has to be paused before it is started */
1302 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1304 dev_err(ctx->dev, "Failed to pause pipe\n");
1308 pipe->state = SKL_PIPE_PAUSED;
1310 ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING);
1312 dev_err(ctx->dev, "Failed to start pipe\n");
1316 pipe->state = SKL_PIPE_STARTED;
1322 * Stop the pipeline by sending set pipe state IPC
1323 * DSP doesnt implement stop so we always send pause message
1325 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1329 dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
1331 /* If pipe was not created in FW, do not try to pause or delete */
1332 if (pipe->state < SKL_PIPE_PAUSED)
1335 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1337 dev_dbg(ctx->dev, "Failed to stop pipe\n");
1341 pipe->state = SKL_PIPE_PAUSED;
1347 * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1350 int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1354 /* If pipe was not created in FW, do not try to pause or delete */
1355 if (pipe->state < SKL_PIPE_PAUSED)
1358 ret = skl_set_pipe_state(ctx, pipe, PPL_RESET);
1360 dev_dbg(ctx->dev, "Failed to reset pipe ret=%d\n", ret);
1364 pipe->state = SKL_PIPE_RESET;
1369 /* Algo parameter set helper function */
1370 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
1371 u32 param_id, struct skl_module_cfg *mcfg)
1373 struct skl_ipc_large_config_msg msg;
1375 msg.module_id = mcfg->id.module_id;
1376 msg.instance_id = mcfg->id.pvt_id;
1377 msg.param_data_size = size;
1378 msg.large_param_id = param_id;
1380 return skl_ipc_set_large_config(&ctx->ipc, &msg, params);
1383 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size,
1384 u32 param_id, struct skl_module_cfg *mcfg)
1386 struct skl_ipc_large_config_msg msg;
1388 msg.module_id = mcfg->id.module_id;
1389 msg.instance_id = mcfg->id.pvt_id;
1390 msg.param_data_size = size;
1391 msg.large_param_id = param_id;
1393 return skl_ipc_get_large_config(&ctx->ipc, &msg, params);