sound/soc/codecs/rt298.c

   1 /*
   2  * rt298.c  --  RT298 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2015 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/dmi.h>
  21 #include <linux/acpi.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/soc.h>
  26 #include <sound/soc-dapm.h>
  27 #include <sound/initval.h>
  28 #include <sound/tlv.h>
  29 #include <sound/jack.h>
  30 #include <linux/workqueue.h>
  31 #include <sound/rt298.h>
  32
  33 #include "rl6347a.h"
  34 #include "rt298.h"
  35
  36 #define RT298_VENDOR_ID 0x10ec0298
  37
  38 struct rt298_priv {
  39         struct reg_default *index_cache;
  40         int index_cache_size;
  41         struct regmap *regmap;
  42         struct snd_soc_codec *codec;
  43         struct rt298_platform_data pdata;
  44         struct i2c_client *i2c;
  45         struct snd_soc_jack *jack;
  46         struct delayed_work jack_detect_work;
  47         int sys_clk;
  48         int clk_id;
  49         int is_hp_in;
  50 };
  51
  52 static const struct reg_default rt298_index_def[] = {
  53         { 0x01, 0xa5a8 },
  54         { 0x02, 0x8e95 },
  55         { 0x03, 0x0002 },
  56         { 0x04, 0xaf67 },
  57         { 0x08, 0x200f },
  58         { 0x09, 0xd010 },
  59         { 0x0a, 0x0100 },
  60         { 0x0b, 0x0000 },
  61         { 0x0d, 0x2800 },
  62         { 0x0f, 0x0022 },
  63         { 0x19, 0x0217 },
  64         { 0x20, 0x0020 },
  65         { 0x33, 0x0208 },
  66         { 0x46, 0x0300 },
  67         { 0x49, 0x4004 },
  68         { 0x4f, 0x50c9 },
  69         { 0x50, 0x3000 },
  70         { 0x63, 0x1b02 },
  71         { 0x67, 0x1111 },
  72         { 0x68, 0x1016 },
  73         { 0x69, 0x273f },
  74 };
  75 #define INDEX_CACHE_SIZE ARRAY_SIZE(rt298_index_def)
  76
  77 static const struct reg_default rt298_reg[] = {
  78         { 0x00170500, 0x00000400 },
  79         { 0x00220000, 0x00000031 },
  80         { 0x00239000, 0x0000007f },
  81         { 0x0023a000, 0x0000007f },
  82         { 0x00270500, 0x00000400 },
  83         { 0x00370500, 0x00000400 },
  84         { 0x00870500, 0x00000400 },
  85         { 0x00920000, 0x00000031 },
  86         { 0x00935000, 0x000000c3 },
  87         { 0x00936000, 0x000000c3 },
  88         { 0x00970500, 0x00000400 },
  89         { 0x00b37000, 0x00000097 },
  90         { 0x00b37200, 0x00000097 },
  91         { 0x00b37300, 0x00000097 },
  92         { 0x00c37000, 0x00000000 },
  93         { 0x00c37100, 0x00000080 },
  94         { 0x01270500, 0x00000400 },
  95         { 0x01370500, 0x00000400 },
  96         { 0x01371f00, 0x411111f0 },
  97         { 0x01439000, 0x00000080 },
  98         { 0x0143a000, 0x00000080 },
  99         { 0x01470700, 0x00000000 },
 100         { 0x01470500, 0x00000400 },
 101         { 0x01470c00, 0x00000000 },
 102         { 0x01470100, 0x00000000 },
 103         { 0x01837000, 0x00000000 },
 104         { 0x01870500, 0x00000400 },
 105         { 0x02050000, 0x00000000 },
 106         { 0x02139000, 0x00000080 },
 107         { 0x0213a000, 0x00000080 },
 108         { 0x02170100, 0x00000000 },
 109         { 0x02170500, 0x00000400 },
 110         { 0x02170700, 0x00000000 },
 111         { 0x02270100, 0x00000000 },
 112         { 0x02370100, 0x00000000 },
 113         { 0x01870700, 0x00000020 },
 114         { 0x00830000, 0x000000c3 },
 115         { 0x00930000, 0x000000c3 },
 116         { 0x01270700, 0x00000000 },
 117 };
 118
 119 static bool rt298_volatile_register(struct device *dev, unsigned int reg)
 120 {
 121         switch (reg) {
 122         case 0 ... 0xff:
 123         case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
 124         case RT298_GET_HP_SENSE:
 125         case RT298_GET_MIC1_SENSE:
 126         case RT298_PROC_COEF:
 127         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0):
 128         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0):
 129         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0):
 130                 return true;
 131         default:
 132                 return false;
 133         }
 134
 135
 136 }
 137
 138 static bool rt298_readable_register(struct device *dev, unsigned int reg)
 139 {
 140         switch (reg) {
 141         case 0 ... 0xff:
 142         case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
 143         case RT298_GET_HP_SENSE:
 144         case RT298_GET_MIC1_SENSE:
 145         case RT298_SET_AUDIO_POWER:
 146         case RT298_SET_HPO_POWER:
 147         case RT298_SET_SPK_POWER:
 148         case RT298_SET_DMIC1_POWER:
 149         case RT298_SPK_MUX:
 150         case RT298_HPO_MUX:
 151         case RT298_ADC0_MUX:
 152         case RT298_ADC1_MUX:
 153         case RT298_SET_MIC1:
 154         case RT298_SET_PIN_HPO:
 155         case RT298_SET_PIN_SPK:
 156         case RT298_SET_PIN_DMIC1:
 157         case RT298_SPK_EAPD:
 158         case RT298_SET_AMP_GAIN_HPO:
 159         case RT298_SET_DMIC2_DEFAULT:
 160         case RT298_DACL_GAIN:
 161         case RT298_DACR_GAIN:
 162         case RT298_ADCL_GAIN:
 163         case RT298_ADCR_GAIN:
 164         case RT298_MIC_GAIN:
 165         case RT298_SPOL_GAIN:
 166         case RT298_SPOR_GAIN:
 167         case RT298_HPOL_GAIN:
 168         case RT298_HPOR_GAIN:
 169         case RT298_F_DAC_SWITCH:
 170         case RT298_F_RECMIX_SWITCH:
 171         case RT298_REC_MIC_SWITCH:
 172         case RT298_REC_I2S_SWITCH:
 173         case RT298_REC_LINE_SWITCH:
 174         case RT298_REC_BEEP_SWITCH:
 175         case RT298_DAC_FORMAT:
 176         case RT298_ADC_FORMAT:
 177         case RT298_COEF_INDEX:
 178         case RT298_PROC_COEF:
 179         case RT298_SET_AMP_GAIN_ADC_IN1:
 180         case RT298_SET_AMP_GAIN_ADC_IN2:
 181         case RT298_SET_POWER(RT298_DAC_OUT1):
 182         case RT298_SET_POWER(RT298_DAC_OUT2):
 183         case RT298_SET_POWER(RT298_ADC_IN1):
 184         case RT298_SET_POWER(RT298_ADC_IN2):
 185         case RT298_SET_POWER(RT298_DMIC2):
 186         case RT298_SET_POWER(RT298_MIC1):
 187         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0):
 188         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0):
 189         case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0):
 190                 return true;
 191         default:
 192                 return false;
 193         }
 194 }
 195
 196 #ifdef CONFIG_PM
 197 static void rt298_index_sync(struct snd_soc_codec *codec)
 198 {
 199         struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 200         int i;
 201
 202         for (i = 0; i < INDEX_CACHE_SIZE; i++) {
 203                 snd_soc_write(codec, rt298->index_cache[i].reg,
 204                                   rt298->index_cache[i].def);
 205         }
 206 }
 207 #endif
 208
 209 static int rt298_support_power_controls[] = {
 210         RT298_DAC_OUT1,
 211         RT298_DAC_OUT2,
 212         RT298_ADC_IN1,
 213         RT298_ADC_IN2,
 214         RT298_MIC1,
 215         RT298_DMIC1,
 216         RT298_DMIC2,
 217         RT298_SPK_OUT,
 218         RT298_HP_OUT,
 219 };
 220 #define RT298_POWER_REG_LEN ARRAY_SIZE(rt298_support_power_controls)
 221
 222 static int rt298_jack_detect(struct rt298_priv *rt298, bool *hp, bool *mic)
 223 {
 224         struct snd_soc_dapm_context *dapm;
 225         unsigned int val, buf;
 226
 227         *hp = false;
 228         *mic = false;
 229
 230         if (!rt298->codec)
 231                 return -EINVAL;
 232
 233         dapm = snd_soc_codec_get_dapm(rt298->codec);
 234
 235         if (rt298->pdata.cbj_en) {
 236                 regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf);
 237                 *hp = buf & 0x80000000;
 238                 if (*hp == rt298->is_hp_in)
 239                         return -1;
 240                 rt298->is_hp_in = *hp;
 241                 if (*hp) {
 242                         /* power on HV,VERF */
 243                         regmap_update_bits(rt298->regmap,
 244                                 RT298_DC_GAIN, 0x200, 0x200);
 245
 246                         snd_soc_dapm_force_enable_pin(dapm, "HV");
 247                         snd_soc_dapm_force_enable_pin(dapm, "VREF");
 248                         /* power LDO1 */
 249                         snd_soc_dapm_force_enable_pin(dapm, "LDO1");
 250                         snd_soc_dapm_sync(dapm);
 251
 252                         regmap_update_bits(rt298->regmap,
 253                                 RT298_POWER_CTRL1, 0x1001, 0);
 254                         regmap_update_bits(rt298->regmap,
 255                                 RT298_POWER_CTRL2, 0x4, 0x4);
 256
 257                         regmap_write(rt298->regmap, RT298_SET_MIC1, 0x24);
 258                         msleep(50);
 259
 260                         regmap_update_bits(rt298->regmap,
 261                                 RT298_CBJ_CTRL1, 0xfcc0, 0xd400);
 262                         msleep(300);
 263                         regmap_read(rt298->regmap, RT298_CBJ_CTRL2, &val);
 264
 265                         if (0x0070 == (val & 0x0070)) {
 266                                 *mic = true;
 267                         } else {
 268                                 regmap_update_bits(rt298->regmap,
 269                                         RT298_CBJ_CTRL1, 0xfcc0, 0xe400);
 270                                 msleep(300);
 271                                 regmap_read(rt298->regmap,
 272                                         RT298_CBJ_CTRL2, &val);
 273                                 if (0x0070 == (val & 0x0070))
 274                                         *mic = true;
 275                                 else
 276                                         *mic = false;
 277                         }
 278                         regmap_update_bits(rt298->regmap,
 279                                 RT298_DC_GAIN, 0x200, 0x0);
 280
 281                 } else {
 282                         *mic = false;
 283                         regmap_write(rt298->regmap, RT298_SET_MIC1, 0x20);
 284                         regmap_update_bits(rt298->regmap,
 285                                 RT298_CBJ_CTRL1, 0x0400, 0x0000);
 286                 }
 287         } else {
 288                 regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf);
 289                 *hp = buf & 0x80000000;
 290                 regmap_read(rt298->regmap, RT298_GET_MIC1_SENSE, &buf);
 291                 *mic = buf & 0x80000000;
 292         }
 293
 294         snd_soc_dapm_disable_pin(dapm, "HV");
 295         snd_soc_dapm_disable_pin(dapm, "VREF");
 296         if (!*hp)
 297                 snd_soc_dapm_disable_pin(dapm, "LDO1");
 298         snd_soc_dapm_sync(dapm);
 299
 300         pr_debug("*hp = %d *mic = %d\n", *hp, *mic);
 301
 302         return 0;
 303 }
 304
 305 static void rt298_jack_detect_work(struct work_struct *work)
 306 {
 307         struct rt298_priv *rt298 =
 308                 container_of(work, struct rt298_priv, jack_detect_work.work);
 309         int status = 0;
 310         bool hp = false;
 311         bool mic = false;
 312
 313         if (rt298_jack_detect(rt298, &hp, &mic) < 0)
 314                 return;
 315
 316         if (hp == true)
 317                 status |= SND_JACK_HEADPHONE;
 318
 319         if (mic == true)
 320                 status |= SND_JACK_MICROPHONE;
 321
 322         snd_soc_jack_report(rt298->jack, status,
 323                 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 324 }
 325
 326 int rt298_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
 327 {
 328         struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 329         struct snd_soc_dapm_context *dapm;
 330         bool hp = false;
 331         bool mic = false;
 332         int status = 0;
 333
 334         /* If jack in NULL, disable HS jack */
 335         if (!jack) {
 336                 regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x2, 0x0);
 337                 dapm = snd_soc_codec_get_dapm(codec);
 338                 snd_soc_dapm_disable_pin(dapm, "LDO1");
 339                 snd_soc_dapm_sync(dapm);
 340                 return 0;
 341         }
 342
 343         rt298->jack = jack;
 344         regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x2, 0x2);
 345
 346         rt298_jack_detect(rt298, &hp, &mic);
 347         if (hp == true)
 348                 status |= SND_JACK_HEADPHONE;
 349
 350         if (mic == true)
 351                 status |= SND_JACK_MICROPHONE;
 352
 353         snd_soc_jack_report(rt298->jack, status,
 354                 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 355
 356         return 0;
 357 }
 358 EXPORT_SYMBOL_GPL(rt298_mic_detect);
 359
 360 static int is_mclk_mode(struct snd_soc_dapm_widget *source,
 361                          struct snd_soc_dapm_widget *sink)
 362 {
 363         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 364         struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 365
 366         if (rt298->clk_id == RT298_SCLK_S_MCLK)
 367                 return 1;
 368         else
 369                 return 0;
 370 }
 371
 372 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
 373 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
 374
 375 static const struct snd_kcontrol_new rt298_snd_controls[] = {
 376         SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT298_DACL_GAIN,
 377                             RT298_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv),
 378         SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT298_ADCL_GAIN,
 379                             RT298_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
 380         SOC_SINGLE_TLV("AMIC Volume", RT298_MIC_GAIN,
 381                             0, 0x3, 0, mic_vol_tlv),
 382         SOC_DOUBLE_R("Speaker Playback Switch", RT298_SPOL_GAIN,
 383                             RT298_SPOR_GAIN, RT298_MUTE_SFT, 1, 1),
 384 };
 385
 386 /* Digital Mixer */
 387 static const struct snd_kcontrol_new rt298_front_mix[] = {
 388         SOC_DAPM_SINGLE("DAC Switch",  RT298_F_DAC_SWITCH,
 389                         RT298_MUTE_SFT, 1, 1),
 390         SOC_DAPM_SINGLE("RECMIX Switch", RT298_F_RECMIX_SWITCH,
 391                         RT298_MUTE_SFT, 1, 1),
 392 };
 393
 394 /* Analog Input Mixer */
 395 static const struct snd_kcontrol_new rt298_rec_mix[] = {
 396         SOC_DAPM_SINGLE("Mic1 Switch", RT298_REC_MIC_SWITCH,
 397                         RT298_MUTE_SFT, 1, 1),
 398         SOC_DAPM_SINGLE("I2S Switch", RT298_REC_I2S_SWITCH,
 399                         RT298_MUTE_SFT, 1, 1),
 400         SOC_DAPM_SINGLE("Line1 Switch", RT298_REC_LINE_SWITCH,
 401                         RT298_MUTE_SFT, 1, 1),
 402         SOC_DAPM_SINGLE("Beep Switch", RT298_REC_BEEP_SWITCH,
 403                         RT298_MUTE_SFT, 1, 1),
 404 };
 405
 406 static const struct snd_kcontrol_new spo_enable_control =
 407         SOC_DAPM_SINGLE("Switch", RT298_SET_PIN_SPK,
 408                         RT298_SET_PIN_SFT, 1, 0);
 409
 410 static const struct snd_kcontrol_new hpol_enable_control =
 411         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOL_GAIN,
 412                         RT298_MUTE_SFT, 1, 1);
 413
 414 static const struct snd_kcontrol_new hpor_enable_control =
 415         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOR_GAIN,
 416                         RT298_MUTE_SFT, 1, 1);
 417
 418 /* ADC0 source */
 419 static const char * const rt298_adc_src[] = {
 420         "Mic", "RECMIX", "Dmic"
 421 };
 422
 423 static const int rt298_adc_values[] = {
 424         0, 4, 5,
 425 };
 426
 427 static SOC_VALUE_ENUM_SINGLE_DECL(
 428         rt298_adc0_enum, RT298_ADC0_MUX, RT298_ADC_SEL_SFT,
 429         RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values);
 430
 431 static const struct snd_kcontrol_new rt298_adc0_mux =
 432         SOC_DAPM_ENUM("ADC 0 source", rt298_adc0_enum);
 433
 434 static SOC_VALUE_ENUM_SINGLE_DECL(
 435         rt298_adc1_enum, RT298_ADC1_MUX, RT298_ADC_SEL_SFT,
 436         RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values);
 437
 438 static const struct snd_kcontrol_new rt298_adc1_mux =
 439         SOC_DAPM_ENUM("ADC 1 source", rt298_adc1_enum);
 440
 441 static const char * const rt298_dac_src[] = {
 442         "Front", "Surround"
 443 };
 444 /* HP-OUT source */
 445 static SOC_ENUM_SINGLE_DECL(rt298_hpo_enum, RT298_HPO_MUX,
 446                                 0, rt298_dac_src);
 447
 448 static const struct snd_kcontrol_new rt298_hpo_mux =
 449 SOC_DAPM_ENUM("HPO source", rt298_hpo_enum);
 450
 451 /* SPK-OUT source */
 452 static SOC_ENUM_SINGLE_DECL(rt298_spo_enum, RT298_SPK_MUX,
 453                                 0, rt298_dac_src);
 454
 455 static const struct snd_kcontrol_new rt298_spo_mux =
 456 SOC_DAPM_ENUM("SPO source", rt298_spo_enum);
 457
 458 static int rt298_spk_event(struct snd_soc_dapm_widget *w,
 459                             struct snd_kcontrol *kcontrol, int event)
 460 {
 461         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 462
 463         switch (event) {
 464         case SND_SOC_DAPM_POST_PMU:
 465                 snd_soc_write(codec,
 466                         RT298_SPK_EAPD, RT298_SET_EAPD_HIGH);
 467                 break;
 468         case SND_SOC_DAPM_PRE_PMD:
 469                 snd_soc_write(codec,
 470                         RT298_SPK_EAPD, RT298_SET_EAPD_LOW);
 471                 break;
 472
 473         default:
 474                 return 0;
 475         }
 476
 477         return 0;
 478 }
 479
 480 static int rt298_set_dmic1_event(struct snd_soc_dapm_widget *w,
 481                                   struct snd_kcontrol *kcontrol, int event)
 482 {
 483         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 484
 485         switch (event) {
 486         case SND_SOC_DAPM_POST_PMU:
 487                 snd_soc_write(codec, RT298_SET_PIN_DMIC1, 0x20);
 488                 break;
 489         case SND_SOC_DAPM_PRE_PMD:
 490                 snd_soc_write(codec, RT298_SET_PIN_DMIC1, 0);
 491                 break;
 492         default:
 493                 return 0;
 494         }
 495
 496         return 0;
 497 }
 498
 499 static int rt298_adc_event(struct snd_soc_dapm_widget *w,
 500                              struct snd_kcontrol *kcontrol, int event)
 501 {
 502         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 503         unsigned int nid;
 504
 505         nid = (w->reg >> 20) & 0xff;
 506
 507         switch (event) {
 508         case SND_SOC_DAPM_POST_PMU:
 509                 snd_soc_update_bits(codec,
 510                         VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
 511                         0x7080, 0x7000);
 512                  /* If MCLK doesn't exist, reset AD filter */
 513                 if (!(snd_soc_read(codec, RT298_VAD_CTRL) & 0x200)) {
 514                         pr_info("NO MCLK\n");
 515                         switch (nid) {
 516                         case RT298_ADC_IN1:
 517                                 snd_soc_update_bits(codec,
 518                                         RT298_D_FILTER_CTRL, 0x2, 0x2);
 519                                 mdelay(10);
 520                                 snd_soc_update_bits(codec,
 521                                         RT298_D_FILTER_CTRL, 0x2, 0x0);
 522                                 break;
 523                         case RT298_ADC_IN2:
 524                                 snd_soc_update_bits(codec,
 525                                         RT298_D_FILTER_CTRL, 0x4, 0x4);
 526                                 mdelay(10);
 527                                 snd_soc_update_bits(codec,
 528                                         RT298_D_FILTER_CTRL, 0x4, 0x0);
 529                                 break;
 530                         }
 531                 }
 532                 break;
 533         case SND_SOC_DAPM_PRE_PMD:
 534                 snd_soc_update_bits(codec,
 535                         VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
 536                         0x7080, 0x7080);
 537                 break;
 538         default:
 539                 return 0;
 540         }
 541
 542         return 0;
 543 }
 544
 545 static int rt298_mic1_event(struct snd_soc_dapm_widget *w,
 546                              struct snd_kcontrol *kcontrol, int event)
 547 {
 548         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 549
 550         switch (event) {
 551         case SND_SOC_DAPM_PRE_PMU:
 552                 snd_soc_update_bits(codec,
 553                         RT298_A_BIAS_CTRL3, 0xc000, 0x8000);
 554                 snd_soc_update_bits(codec,
 555                         RT298_A_BIAS_CTRL2, 0xc000, 0x8000);
 556                 break;
 557         case SND_SOC_DAPM_POST_PMD:
 558                 snd_soc_update_bits(codec,
 559                         RT298_A_BIAS_CTRL3, 0xc000, 0x0000);
 560                 snd_soc_update_bits(codec,
 561                         RT298_A_BIAS_CTRL2, 0xc000, 0x0000);
 562                 break;
 563         default:
 564                 return 0;
 565         }
 566
 567         return 0;
 568 }
 569
 570 static const struct snd_soc_dapm_widget rt298_dapm_widgets[] = {
 571
 572         SND_SOC_DAPM_SUPPLY_S("HV", 1, RT298_POWER_CTRL1,
 573                 12, 1, NULL, 0),
 574         SND_SOC_DAPM_SUPPLY("VREF", RT298_POWER_CTRL1,
 575                 0, 1, NULL, 0),
 576         SND_SOC_DAPM_SUPPLY_S("BG_MBIAS", 1, RT298_POWER_CTRL2,
 577                 1, 0, NULL, 0),
 578         SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT298_POWER_CTRL2,
 579                 2, 0, NULL, 0),
 580         SND_SOC_DAPM_SUPPLY_S("LDO2", 1, RT298_POWER_CTRL2,
 581                 3, 0, NULL, 0),
 582         SND_SOC_DAPM_SUPPLY_S("VREF1", 1, RT298_POWER_CTRL2,
 583                 4, 1, NULL, 0),
 584         SND_SOC_DAPM_SUPPLY_S("LV", 2, RT298_POWER_CTRL1,
 585                 13, 1, NULL, 0),
 586
 587
 588         SND_SOC_DAPM_SUPPLY("MCLK MODE", RT298_PLL_CTRL1,
 589                 5, 0, NULL, 0),
 590         SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM,
 591                 0, 0, rt298_mic1_event, SND_SOC_DAPM_PRE_PMU |
 592                 SND_SOC_DAPM_POST_PMD),
 593
 594         /* Input Lines */
 595         SND_SOC_DAPM_INPUT("DMIC1 Pin"),
 596         SND_SOC_DAPM_INPUT("DMIC2 Pin"),
 597         SND_SOC_DAPM_INPUT("MIC1"),
 598         SND_SOC_DAPM_INPUT("LINE1"),
 599         SND_SOC_DAPM_INPUT("Beep"),
 600
 601         /* DMIC */
 602         SND_SOC_DAPM_PGA_E("DMIC1", RT298_SET_POWER(RT298_DMIC1), 0, 1,
 603                 NULL, 0, rt298_set_dmic1_event,
 604                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 605         SND_SOC_DAPM_PGA("DMIC2", RT298_SET_POWER(RT298_DMIC2), 0, 1,
 606                 NULL, 0),
 607         SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM,
 608                 0, 0, NULL, 0),
 609
 610         /* REC Mixer */
 611         SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0,
 612                 rt298_rec_mix, ARRAY_SIZE(rt298_rec_mix)),
 613
 614         /* ADCs */
 615         SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0),
 616         SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
 617
 618         /* ADC Mux */
 619         SND_SOC_DAPM_MUX_E("ADC 0 Mux", RT298_SET_POWER(RT298_ADC_IN1), 0, 1,
 620                 &rt298_adc0_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD |
 621                 SND_SOC_DAPM_POST_PMU),
 622         SND_SOC_DAPM_MUX_E("ADC 1 Mux", RT298_SET_POWER(RT298_ADC_IN2), 0, 1,
 623                 &rt298_adc1_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD |
 624                 SND_SOC_DAPM_POST_PMU),
 625
 626         /* Audio Interface */
 627         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
 628         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
 629         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
 630         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
 631
 632         /* Output Side */
 633         /* DACs */
 634         SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0),
 635         SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0),
 636
 637         /* Output Mux */
 638         SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt298_spo_mux),
 639         SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt298_hpo_mux),
 640
 641         SND_SOC_DAPM_SUPPLY("HP Power", RT298_SET_PIN_HPO,
 642                 RT298_SET_PIN_SFT, 0, NULL, 0),
 643
 644         /* Output Mixer */
 645         SND_SOC_DAPM_MIXER("Front", RT298_SET_POWER(RT298_DAC_OUT1), 0, 1,
 646                         rt298_front_mix, ARRAY_SIZE(rt298_front_mix)),
 647         SND_SOC_DAPM_PGA("Surround", RT298_SET_POWER(RT298_DAC_OUT2), 0, 1,
 648                         NULL, 0),
 649
 650         /* Output Pga */
 651         SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0,
 652                 &spo_enable_control, rt298_spk_event,
 653                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 654         SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
 655                 &hpol_enable_control),
 656         SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
 657                 &hpor_enable_control),
 658
 659         /* Output Lines */
 660         SND_SOC_DAPM_OUTPUT("SPOL"),
 661         SND_SOC_DAPM_OUTPUT("SPOR"),
 662         SND_SOC_DAPM_OUTPUT("HPO Pin"),
 663         SND_SOC_DAPM_OUTPUT("SPDIF"),
 664 };
 665
 666 static const struct snd_soc_dapm_route rt298_dapm_routes[] = {
 667
 668         {"ADC 0", NULL, "MCLK MODE", is_mclk_mode},
 669         {"ADC 1", NULL, "MCLK MODE", is_mclk_mode},
 670         {"Front", NULL, "MCLK MODE", is_mclk_mode},
 671         {"Surround", NULL, "MCLK MODE", is_mclk_mode},
 672
 673         {"HP Power", NULL, "LDO1"},
 674         {"HP Power", NULL, "LDO2"},
 675         {"HP Power", NULL, "LV"},
 676         {"HP Power", NULL, "VREF1"},
 677         {"HP Power", NULL, "BG_MBIAS"},
 678
 679         {"MIC1", NULL, "LDO1"},
 680         {"MIC1", NULL, "LDO2"},
 681         {"MIC1", NULL, "HV"},
 682         {"MIC1", NULL, "LV"},
 683         {"MIC1", NULL, "VREF"},
 684         {"MIC1", NULL, "VREF1"},
 685         {"MIC1", NULL, "BG_MBIAS"},
 686         {"MIC1", NULL, "MIC1 Input Buffer"},
 687
 688         {"SPO", NULL, "LDO1"},
 689         {"SPO", NULL, "LDO2"},
 690         {"SPO", NULL, "HV"},
 691         {"SPO", NULL, "LV"},
 692         {"SPO", NULL, "VREF"},
 693         {"SPO", NULL, "VREF1"},
 694         {"SPO", NULL, "BG_MBIAS"},
 695
 696         {"DMIC1", NULL, "DMIC1 Pin"},
 697         {"DMIC2", NULL, "DMIC2 Pin"},
 698         {"DMIC1", NULL, "DMIC Receiver"},
 699         {"DMIC2", NULL, "DMIC Receiver"},
 700
 701         {"RECMIX", "Beep Switch", "Beep"},
 702         {"RECMIX", "Line1 Switch", "LINE1"},
 703         {"RECMIX", "Mic1 Switch", "MIC1"},
 704
 705         {"ADC 0 Mux", "Dmic", "DMIC1"},
 706         {"ADC 0 Mux", "RECMIX", "RECMIX"},
 707         {"ADC 0 Mux", "Mic", "MIC1"},
 708         {"ADC 1 Mux", "Dmic", "DMIC2"},
 709         {"ADC 1 Mux", "RECMIX", "RECMIX"},
 710         {"ADC 1 Mux", "Mic", "MIC1"},
 711
 712         {"ADC 0", NULL, "ADC 0 Mux"},
 713         {"ADC 1", NULL, "ADC 1 Mux"},
 714
 715         {"AIF1TX", NULL, "ADC 0"},
 716         {"AIF2TX", NULL, "ADC 1"},
 717
 718         {"DAC 0", NULL, "AIF1RX"},
 719         {"DAC 1", NULL, "AIF2RX"},
 720
 721         {"Front", "DAC Switch", "DAC 0"},
 722         {"Front", "RECMIX Switch", "RECMIX"},
 723
 724         {"Surround", NULL, "DAC 1"},
 725
 726         {"SPK Mux", "Front", "Front"},
 727         {"SPK Mux", "Surround", "Surround"},
 728
 729         {"HPO Mux", "Front", "Front"},
 730         {"HPO Mux", "Surround", "Surround"},
 731
 732         {"SPO", "Switch", "SPK Mux"},
 733         {"HPO L", "Switch", "HPO Mux"},
 734         {"HPO R", "Switch", "HPO Mux"},
 735         {"HPO L", NULL, "HP Power"},
 736         {"HPO R", NULL, "HP Power"},
 737
 738         {"SPOL", NULL, "SPO"},
 739         {"SPOR", NULL, "SPO"},
 740         {"HPO Pin", NULL, "HPO L"},
 741         {"HPO Pin", NULL, "HPO R"},
 742 };
 743
 744 static int rt298_hw_params(struct snd_pcm_substream *substream,
 745                             struct snd_pcm_hw_params *params,
 746                             struct snd_soc_dai *dai)
 747 {
 748         struct snd_soc_codec *codec = dai->codec;
 749         struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 750         unsigned int val = 0;
 751         int d_len_code;
 752
 753         switch (params_rate(params)) {
 754         /* bit 14 0:48K 1:44.1K */
 755         case 44100:
 756         case 48000:
 757                 break;
 758         default:
 759                 dev_err(codec->dev, "Unsupported sample rate %d\n",
 760                                         params_rate(params));
 761                 return -EINVAL;
 762         }
 763         switch (rt298->sys_clk) {
 764         case 12288000:
 765         case 24576000:
 766                 if (params_rate(params) != 48000) {
 767                         dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
 768                                         params_rate(params), rt298->sys_clk);
 769                         return -EINVAL;
 770                 }
 771                 break;
 772         case 11289600:
 773         case 22579200:
 774                 if (params_rate(params) != 44100) {
 775                         dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
 776                                         params_rate(params), rt298->sys_clk);
 777                         return -EINVAL;
 778                 }
 779                 break;
 780         }
 781
 782         if (params_channels(params) <= 16) {
 783                 /* bit 3:0 Number of Channel */
 784                 val |= (params_channels(params) - 1);
 785         } else {
 786                 dev_err(codec->dev, "Unsupported channels %d\n",
 787                                         params_channels(params));
 788                 return -EINVAL;
 789         }
 790
 791         d_len_code = 0;
 792         switch (params_width(params)) {
 793         /* bit 6:4 Bits per Sample */
 794         case 16:
 795                 d_len_code = 0;
 796                 val |= (0x1 << 4);
 797                 break;
 798         case 32:
 799                 d_len_code = 2;
 800                 val |= (0x4 << 4);
 801                 break;
 802         case 20:
 803                 d_len_code = 1;
 804                 val |= (0x2 << 4);
 805                 break;
 806         case 24:
 807                 d_len_code = 2;
 808                 val |= (0x3 << 4);
 809                 break;
 810         case 8:
 811                 d_len_code = 3;
 812                 break;
 813         default:
 814                 return -EINVAL;
 815         }
 816
 817         snd_soc_update_bits(codec,
 818                 RT298_I2S_CTRL1, 0x0018, d_len_code << 3);
 819         dev_dbg(codec->dev, "format val = 0x%x\n", val);
 820
 821         snd_soc_update_bits(codec, RT298_DAC_FORMAT, 0x407f, val);
 822         snd_soc_update_bits(codec, RT298_ADC_FORMAT, 0x407f, val);
 823
 824         return 0;
 825 }
 826
 827 static int rt298_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 828 {
 829         struct snd_soc_codec *codec = dai->codec;
 830
 831         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 832         case SND_SOC_DAIFMT_CBM_CFM:
 833                 snd_soc_update_bits(codec,
 834                         RT298_I2S_CTRL1, 0x800, 0x800);
 835                 break;
 836         case SND_SOC_DAIFMT_CBS_CFS:
 837                 snd_soc_update_bits(codec,
 838                         RT298_I2S_CTRL1, 0x800, 0x0);
 839                 break;
 840         default:
 841                 return -EINVAL;
 842         }
 843
 844         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 845         case SND_SOC_DAIFMT_I2S:
 846                 snd_soc_update_bits(codec,
 847                         RT298_I2S_CTRL1, 0x300, 0x0);
 848                 break;
 849         case SND_SOC_DAIFMT_LEFT_J:
 850                 snd_soc_update_bits(codec,
 851                         RT298_I2S_CTRL1, 0x300, 0x1 << 8);
 852                 break;
 853         case SND_SOC_DAIFMT_DSP_A:
 854                 snd_soc_update_bits(codec,
 855                         RT298_I2S_CTRL1, 0x300, 0x2 << 8);
 856                 break;
 857         case SND_SOC_DAIFMT_DSP_B:
 858                 snd_soc_update_bits(codec,
 859                         RT298_I2S_CTRL1, 0x300, 0x3 << 8);
 860                 break;
 861         default:
 862                 return -EINVAL;
 863         }
 864         /* bit 15 Stream Type 0:PCM 1:Non-PCM */
 865         snd_soc_update_bits(codec, RT298_DAC_FORMAT, 0x8000, 0);
 866         snd_soc_update_bits(codec, RT298_ADC_FORMAT, 0x8000, 0);
 867
 868         return 0;
 869 }
 870
 871 static int rt298_set_dai_sysclk(struct snd_soc_dai *dai,
 872                                 int clk_id, unsigned int freq, int dir)
 873 {
 874         struct snd_soc_codec *codec = dai->codec;
 875         struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 876
 877         dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq);
 878
 879         if (RT298_SCLK_S_MCLK == clk_id) {
 880                 snd_soc_update_bits(codec,
 881                         RT298_I2S_CTRL2, 0x0100, 0x0);
 882                 snd_soc_update_bits(codec,
 883                         RT298_PLL_CTRL1, 0x20, 0x20);
 884         } else {
 885                 snd_soc_update_bits(codec,
 886                         RT298_I2S_CTRL2, 0x0100, 0x0100);
 887                 snd_soc_update_bits(codec,
 888                         RT298_PLL_CTRL1, 0x20, 0x0);
 889         }
 890
 891         switch (freq) {
 892         case 19200000:
 893                 if (RT298_SCLK_S_MCLK == clk_id) {
 894                         dev_err(codec->dev, "Should not use MCLK\n");
 895                         return -EINVAL;
 896                 }
 897                 snd_soc_update_bits(codec,
 898                         RT298_I2S_CTRL2, 0x40, 0x40);
 899                 break;
 900         case 24000000:
 901                 if (RT298_SCLK_S_MCLK == clk_id) {
 902                         dev_err(codec->dev, "Should not use MCLK\n");
 903                         return -EINVAL;
 904                 }
 905                 snd_soc_update_bits(codec,
 906                         RT298_I2S_CTRL2, 0x40, 0x0);
 907                 break;
 908         case 12288000:
 909         case 11289600:
 910                 snd_soc_update_bits(codec,
 911                         RT298_I2S_CTRL2, 0x8, 0x0);
 912                 snd_soc_update_bits(codec,
 913                         RT298_CLK_DIV, 0xfc1e, 0x0004);
 914                 break;
 915         case 24576000:
 916         case 22579200:
 917                 snd_soc_update_bits(codec,
 918                         RT298_I2S_CTRL2, 0x8, 0x8);
 919                 snd_soc_update_bits(codec,
 920                         RT298_CLK_DIV, 0xfc1e, 0x5406);
 921                 break;
 922         default:
 923                 dev_err(codec->dev, "Unsupported system clock\n");
 924                 return -EINVAL;
 925         }
 926
 927         rt298->sys_clk = freq;
 928         rt298->clk_id = clk_id;
 929
 930         return 0;
 931 }
 932
 933 static int rt298_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
 934 {
 935         struct snd_soc_codec *codec = dai->codec;
 936
 937         dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio);
 938         if (50 == ratio)
 939                 snd_soc_update_bits(codec,
 940                         RT298_I2S_CTRL1, 0x1000, 0x1000);
 941         else
 942                 snd_soc_update_bits(codec,
 943                         RT298_I2S_CTRL1, 0x1000, 0x0);
 944
 945
 946         return 0;
 947 }
 948
 949 static int rt298_set_bias_level(struct snd_soc_codec *codec,
 950                                  enum snd_soc_bias_level level)
 951 {
 952         switch (level) {
 953         case SND_SOC_BIAS_PREPARE:
 954                 if (SND_SOC_BIAS_STANDBY ==
 955                         snd_soc_codec_get_bias_level(codec)) {
 956                         snd_soc_write(codec,
 957                                 RT298_SET_AUDIO_POWER, AC_PWRST_D0);
 958                         snd_soc_update_bits(codec, 0x0d, 0x200, 0x200);
 959                         snd_soc_update_bits(codec, 0x52, 0x80, 0x0);
 960                         mdelay(20);
 961                         snd_soc_update_bits(codec, 0x0d, 0x200, 0x0);
 962                         snd_soc_update_bits(codec, 0x52, 0x80, 0x80);
 963                 }
 964                 break;
 965
 966         case SND_SOC_BIAS_STANDBY:
 967                 snd_soc_write(codec,
 968                         RT298_SET_AUDIO_POWER, AC_PWRST_D3);
 969                 break;
 970
 971         default:
 972                 break;
 973         }
 974
 975         return 0;
 976 }
 977
 978 static irqreturn_t rt298_irq(int irq, void *data)
 979 {
 980         struct rt298_priv *rt298 = data;
 981         bool hp = false;
 982         bool mic = false;
 983         int ret, status = 0;
 984
 985         ret = rt298_jack_detect(rt298, &hp, &mic);
 986
 987         /* Clear IRQ */
 988         regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x1, 0x1);
 989
 990         if (ret == 0) {
 991                 if (hp == true)
 992                         status |= SND_JACK_HEADPHONE;
 993
 994                 if (mic == true)
 995                         status |= SND_JACK_MICROPHONE;
 996
 997                 snd_soc_jack_report(rt298->jack, status,
 998                         SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 999
1000                 pm_wakeup_event(&rt298->i2c->dev, 300);
1001         }
1002
1003         return IRQ_HANDLED;
1004 }
1005
1006 static int rt298_probe(struct snd_soc_codec *codec)
1007 {
1008         struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1009
1010         rt298->codec = codec;
1011
1012         if (rt298->i2c->irq) {
1013                 regmap_update_bits(rt298->regmap,
1014                                         RT298_IRQ_CTRL, 0x2, 0x2);
1015
1016                 INIT_DELAYED_WORK(&rt298->jack_detect_work,
1017                                         rt298_jack_detect_work);
1018                 schedule_delayed_work(&rt298->jack_detect_work,
1019                                         msecs_to_jiffies(1250));
1020         }
1021
1022         return 0;
1023 }
1024
1025 static int rt298_remove(struct snd_soc_codec *codec)
1026 {
1027         struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1028
1029         cancel_delayed_work_sync(&rt298->jack_detect_work);
1030
1031         return 0;
1032 }
1033
1034 #ifdef CONFIG_PM
1035 static int rt298_suspend(struct snd_soc_codec *codec)
1036 {
1037         struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1038
1039         rt298->is_hp_in = -1;
1040         regcache_cache_only(rt298->regmap, true);
1041         regcache_mark_dirty(rt298->regmap);
1042
1043         return 0;
1044 }
1045
1046 static int rt298_resume(struct snd_soc_codec *codec)
1047 {
1048         struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1049
1050         regcache_cache_only(rt298->regmap, false);
1051         rt298_index_sync(codec);
1052         regcache_sync(rt298->regmap);
1053
1054         return 0;
1055 }
1056 #else
1057 #define rt298_suspend NULL
1058 #define rt298_resume NULL
1059 #endif
1060
1061 #define RT298_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
1062 #define RT298_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1063                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1064
1065 static const struct snd_soc_dai_ops rt298_aif_dai_ops = {
1066         .hw_params = rt298_hw_params,
1067         .set_fmt = rt298_set_dai_fmt,
1068         .set_sysclk = rt298_set_dai_sysclk,
1069         .set_bclk_ratio = rt298_set_bclk_ratio,
1070 };
1071
1072 static struct snd_soc_dai_driver rt298_dai[] = {
1073         {
1074                 .name = "rt298-aif1",
1075                 .id = RT298_AIF1,
1076                 .playback = {
1077                         .stream_name = "AIF1 Playback",
1078                         .channels_min = 1,
1079                         .channels_max = 2,
1080                         .rates = RT298_STEREO_RATES,
1081                         .formats = RT298_FORMATS,
1082                 },
1083                 .capture = {
1084                         .stream_name = "AIF1 Capture",
1085                         .channels_min = 1,
1086                         .channels_max = 2,
1087                         .rates = RT298_STEREO_RATES,
1088                         .formats = RT298_FORMATS,
1089                 },
1090                 .ops = &rt298_aif_dai_ops,
1091                 .symmetric_rates = 1,
1092         },
1093         {
1094                 .name = "rt298-aif2",
1095                 .id = RT298_AIF2,
1096                 .playback = {
1097                         .stream_name = "AIF2 Playback",
1098                         .channels_min = 1,
1099                         .channels_max = 2,
1100                         .rates = RT298_STEREO_RATES,
1101                         .formats = RT298_FORMATS,
1102                 },
1103                 .capture = {
1104                         .stream_name = "AIF2 Capture",
1105                         .channels_min = 1,
1106                         .channels_max = 2,
1107                         .rates = RT298_STEREO_RATES,
1108                         .formats = RT298_FORMATS,
1109                 },
1110                 .ops = &rt298_aif_dai_ops,
1111                 .symmetric_rates = 1,
1112         },
1113
1114 };
1115
1116 static struct snd_soc_codec_driver soc_codec_dev_rt298 = {
1117         .probe = rt298_probe,
1118         .remove = rt298_remove,
1119         .suspend = rt298_suspend,
1120         .resume = rt298_resume,
1121         .set_bias_level = rt298_set_bias_level,
1122         .idle_bias_off = true,
1123         .component_driver = {
1124                 .controls               = rt298_snd_controls,
1125                 .num_controls           = ARRAY_SIZE(rt298_snd_controls),
1126                 .dapm_widgets           = rt298_dapm_widgets,
1127                 .num_dapm_widgets       = ARRAY_SIZE(rt298_dapm_widgets),
1128                 .dapm_routes            = rt298_dapm_routes,
1129                 .num_dapm_routes        = ARRAY_SIZE(rt298_dapm_routes),
1130         },
1131 };
1132
1133 static const struct regmap_config rt298_regmap = {
1134         .reg_bits = 32,
1135         .val_bits = 32,
1136         .max_register = 0x02370100,
1137         .volatile_reg = rt298_volatile_register,
1138         .readable_reg = rt298_readable_register,
1139         .reg_write = rl6347a_hw_write,
1140         .reg_read = rl6347a_hw_read,
1141         .cache_type = REGCACHE_RBTREE,
1142         .reg_defaults = rt298_reg,
1143         .num_reg_defaults = ARRAY_SIZE(rt298_reg),
1144 };
1145
1146 static const struct i2c_device_id rt298_i2c_id[] = {
1147         {"rt298", 0},
1148         {}
1149 };
1150 MODULE_DEVICE_TABLE(i2c, rt298_i2c_id);
1151
1152 static const struct acpi_device_id rt298_acpi_match[] = {
1153         { "INT343A", 0 },
1154         {},
1155 };
1156 MODULE_DEVICE_TABLE(acpi, rt298_acpi_match);
1157
1158 static const struct dmi_system_id force_combo_jack_table[] = {
1159         {
1160                 .ident = "Intel Broxton P",
1161                 .matches = {
1162                         DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp"),
1163                         DMI_MATCH(DMI_PRODUCT_NAME, "Broxton P")
1164                 }
1165         },
1166         {
1167                 .ident = "Intel Gemini Lake",
1168                 .matches = {
1169                         DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp"),
1170                         DMI_MATCH(DMI_PRODUCT_NAME, "Geminilake")
1171                 }
1172         },
1173         { }
1174 };
1175
1176 static int rt298_i2c_probe(struct i2c_client *i2c,
1177                            const struct i2c_device_id *id)
1178 {
1179         struct rt298_platform_data *pdata = dev_get_platdata(&i2c->dev);
1180         struct rt298_priv *rt298;
1181         struct device *dev = &i2c->dev;
1182         const struct acpi_device_id *acpiid;
1183         int i, ret;
1184
1185         rt298 = devm_kzalloc(&i2c->dev, sizeof(*rt298),
1186                                 GFP_KERNEL);
1187         if (NULL == rt298)
1188                 return -ENOMEM;
1189
1190         rt298->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt298_regmap);
1191         if (IS_ERR(rt298->regmap)) {
1192                 ret = PTR_ERR(rt298->regmap);
1193                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1194                         ret);
1195                 return ret;
1196         }
1197
1198         regmap_read(rt298->regmap,
1199                 RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &ret);
1200         if (ret != RT298_VENDOR_ID) {
1201                 dev_err(&i2c->dev,
1202                         "Device with ID register %#x is not rt298\n", ret);
1203                 return -ENODEV;
1204         }
1205
1206         rt298->index_cache = devm_kmemdup(&i2c->dev, rt298_index_def,
1207                                           sizeof(rt298_index_def), GFP_KERNEL);
1208         if (!rt298->index_cache)
1209                 return -ENOMEM;
1210
1211         rt298->index_cache_size = INDEX_CACHE_SIZE;
1212         rt298->i2c = i2c;
1213         i2c_set_clientdata(i2c, rt298);
1214
1215         /* restore codec default */
1216         for (i = 0; i < INDEX_CACHE_SIZE; i++)
1217                 regmap_write(rt298->regmap, rt298->index_cache[i].reg,
1218                                 rt298->index_cache[i].def);
1219         for (i = 0; i < ARRAY_SIZE(rt298_reg); i++)
1220                 regmap_write(rt298->regmap, rt298_reg[i].reg,
1221                                 rt298_reg[i].def);
1222
1223         if (pdata)
1224                 rt298->pdata = *pdata;
1225
1226         /* enable jack combo mode on supported devices */
1227         acpiid = acpi_match_device(dev->driver->acpi_match_table, dev);
1228         if (acpiid && acpiid->driver_data) {
1229                 rt298->pdata = *(struct rt298_platform_data *)
1230                                 acpiid->driver_data;
1231         }
1232
1233         if (dmi_check_system(force_combo_jack_table)) {
1234                 rt298->pdata.cbj_en = true;
1235                 rt298->pdata.gpio2_en = false;
1236         }
1237
1238         /* VREF Charging */
1239         regmap_update_bits(rt298->regmap, 0x04, 0x80, 0x80);
1240         regmap_update_bits(rt298->regmap, 0x1b, 0x860, 0x860);
1241         /* Vref2 */
1242         regmap_update_bits(rt298->regmap, 0x08, 0x20, 0x20);
1243
1244         regmap_write(rt298->regmap, RT298_SET_AUDIO_POWER, AC_PWRST_D3);
1245
1246         for (i = 0; i < RT298_POWER_REG_LEN; i++)
1247                 regmap_write(rt298->regmap,
1248                         RT298_SET_POWER(rt298_support_power_controls[i]),
1249                         AC_PWRST_D1);
1250
1251         if (!rt298->pdata.cbj_en) {
1252                 regmap_write(rt298->regmap, RT298_CBJ_CTRL2, 0x0000);
1253                 regmap_write(rt298->regmap, RT298_MIC1_DET_CTRL, 0x0816);
1254                 regmap_update_bits(rt298->regmap,
1255                                         RT298_CBJ_CTRL1, 0xf000, 0xb000);
1256         } else {
1257                 regmap_update_bits(rt298->regmap,
1258                                         RT298_CBJ_CTRL1, 0xf000, 0x5000);
1259         }
1260
1261         mdelay(10);
1262
1263         if (!rt298->pdata.gpio2_en)
1264                 regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0x40);
1265         else
1266                 regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0);
1267
1268         mdelay(10);
1269
1270         regmap_write(rt298->regmap, RT298_MISC_CTRL1, 0x0000);
1271         regmap_update_bits(rt298->regmap,
1272                                 RT298_WIND_FILTER_CTRL, 0x0082, 0x0082);
1273
1274         regmap_write(rt298->regmap, RT298_UNSOLICITED_INLINE_CMD, 0x81);
1275         regmap_write(rt298->regmap, RT298_UNSOLICITED_HP_OUT, 0x82);
1276         regmap_write(rt298->regmap, RT298_UNSOLICITED_MIC1, 0x84);
1277         regmap_update_bits(rt298->regmap, RT298_IRQ_FLAG_CTRL, 0x2, 0x2);
1278
1279         rt298->is_hp_in = -1;
1280
1281         if (rt298->i2c->irq) {
1282                 ret = request_threaded_irq(rt298->i2c->irq, NULL, rt298_irq,
1283                         IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt298", rt298);
1284                 if (ret != 0) {
1285                         dev_err(&i2c->dev,
1286                                 "Failed to reguest IRQ: %d\n", ret);
1287                         return ret;
1288                 }
1289         }
1290
1291         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt298,
1292                                      rt298_dai, ARRAY_SIZE(rt298_dai));
1293
1294         return ret;
1295 }
1296
1297 static int rt298_i2c_remove(struct i2c_client *i2c)
1298 {
1299         struct rt298_priv *rt298 = i2c_get_clientdata(i2c);
1300
1301         if (i2c->irq)
1302                 free_irq(i2c->irq, rt298);
1303         snd_soc_unregister_codec(&i2c->dev);
1304
1305         return 0;
1306 }
1307
1308
1309 static struct i2c_driver rt298_i2c_driver = {
1310         .driver = {
1311                    .name = "rt298",
1312                    .acpi_match_table = ACPI_PTR(rt298_acpi_match),
1313                    },
1314         .probe = rt298_i2c_probe,
1315         .remove = rt298_i2c_remove,
1316         .id_table = rt298_i2c_id,
1317 };
1318
1319 module_i2c_driver(rt298_i2c_driver);
1320
1321 MODULE_DESCRIPTION("ASoC RT298 driver");
1322 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1323 MODULE_LICENSE("GPL");