1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * da732x_reg.h --- Dialog DA732X ALSA SoC Audio Registers Header File
5 * Copyright (C) 2012 Dialog Semiconductor GmbH
7 * Author: Michal Hajduk <Michal.Hajduk@diasemi.com>
10 #ifndef __DA732X_REG_H_
11 #define __DA732X_REG_H_
13 /* DA732X registers */
14 #define DA732X_REG_STATUS_EXT 0x00
15 #define DA732X_REG_STATUS 0x01
16 #define DA732X_REG_REF1 0x02
17 #define DA732X_REG_BIAS_EN 0x03
18 #define DA732X_REG_BIAS1 0x04
19 #define DA732X_REG_BIAS2 0x05
20 #define DA732X_REG_BIAS3 0x06
21 #define DA732X_REG_BIAS4 0x07
22 #define DA732X_REG_MICBIAS2 0x0F
23 #define DA732X_REG_MICBIAS1 0x10
24 #define DA732X_REG_MICDET 0x11
25 #define DA732X_REG_MIC1_PRE 0x12
26 #define DA732X_REG_MIC1 0x13
27 #define DA732X_REG_MIC2_PRE 0x14
28 #define DA732X_REG_MIC2 0x15
29 #define DA732X_REG_AUX1L 0x16
30 #define DA732X_REG_AUX1R 0x17
31 #define DA732X_REG_MIC3_PRE 0x18
32 #define DA732X_REG_MIC3 0x19
33 #define DA732X_REG_INP_PINBIAS 0x1A
34 #define DA732X_REG_INP_ZC_EN 0x1B
35 #define DA732X_REG_INP_MUX 0x1D
36 #define DA732X_REG_HP_DET 0x20
37 #define DA732X_REG_HPL_DAC_OFFSET 0x21
38 #define DA732X_REG_HPL_DAC_OFF_CNTL 0x22
39 #define DA732X_REG_HPL_OUT_OFFSET 0x23
40 #define DA732X_REG_HPL 0x24
41 #define DA732X_REG_HPL_VOL 0x25
42 #define DA732X_REG_HPR_DAC_OFFSET 0x26
43 #define DA732X_REG_HPR_DAC_OFF_CNTL 0x27
44 #define DA732X_REG_HPR_OUT_OFFSET 0x28
45 #define DA732X_REG_HPR 0x29
46 #define DA732X_REG_HPR_VOL 0x2A
47 #define DA732X_REG_LIN2 0x2B
48 #define DA732X_REG_LIN3 0x2C
49 #define DA732X_REG_LIN4 0x2D
50 #define DA732X_REG_OUT_ZC_EN 0x2E
51 #define DA732X_REG_HP_LIN1_GNDSEL 0x37
52 #define DA732X_REG_CP_HP1 0x3A
53 #define DA732X_REG_CP_HP2 0x3B
54 #define DA732X_REG_CP_CTRL1 0x40
55 #define DA732X_REG_CP_CTRL2 0x41
56 #define DA732X_REG_CP_CTRL3 0x42
57 #define DA732X_REG_CP_LEVEL_MASK 0x43
58 #define DA732X_REG_CP_DET 0x44
59 #define DA732X_REG_CP_STATUS 0x45
60 #define DA732X_REG_CP_THRESH1 0x46
61 #define DA732X_REG_CP_THRESH2 0x47
62 #define DA732X_REG_CP_THRESH3 0x48
63 #define DA732X_REG_CP_THRESH4 0x49
64 #define DA732X_REG_CP_THRESH5 0x4A
65 #define DA732X_REG_CP_THRESH6 0x4B
66 #define DA732X_REG_CP_THRESH7 0x4C
67 #define DA732X_REG_CP_THRESH8 0x4D
68 #define DA732X_REG_PLL_DIV_LO 0x50
69 #define DA732X_REG_PLL_DIV_MID 0x51
70 #define DA732X_REG_PLL_DIV_HI 0x52
71 #define DA732X_REG_PLL_CTRL 0x53
72 #define DA732X_REG_CLK_CTRL 0x54
73 #define DA732X_REG_CLK_DSP 0x5A
74 #define DA732X_REG_CLK_EN1 0x5B
75 #define DA732X_REG_CLK_EN2 0x5C
76 #define DA732X_REG_CLK_EN3 0x5D
77 #define DA732X_REG_CLK_EN4 0x5E
78 #define DA732X_REG_CLK_EN5 0x5F
79 #define DA732X_REG_AIF_MCLK 0x60
80 #define DA732X_REG_AIFA1 0x61
81 #define DA732X_REG_AIFA2 0x62
82 #define DA732X_REG_AIFA3 0x63
83 #define DA732X_REG_AIFB1 0x64
84 #define DA732X_REG_AIFB2 0x65
85 #define DA732X_REG_AIFB3 0x66
86 #define DA732X_REG_PC_CTRL 0x6A
87 #define DA732X_REG_DATA_ROUTE 0x70
88 #define DA732X_REG_DSP_CTRL 0x71
89 #define DA732X_REG_CIF_CTRL2 0x74
90 #define DA732X_REG_HANDSHAKE 0x75
91 #define DA732X_REG_MBOX0 0x76
92 #define DA732X_REG_MBOX1 0x77
93 #define DA732X_REG_MBOX2 0x78
94 #define DA732X_REG_MBOX_STATUS 0x79
95 #define DA732X_REG_SPARE1_OUT 0x7D
96 #define DA732X_REG_SPARE2_OUT 0x7E
97 #define DA732X_REG_SPARE1_IN 0x7F
98 #define DA732X_REG_ID 0x81
99 #define DA732X_REG_ADC1_PD 0x90
100 #define DA732X_REG_ADC1_HPF 0x93
101 #define DA732X_REG_ADC1_SEL 0x94
102 #define DA732X_REG_ADC1_EQ12 0x95
103 #define DA732X_REG_ADC1_EQ34 0x96
104 #define DA732X_REG_ADC1_EQ5 0x97
105 #define DA732X_REG_ADC2_PD 0x98
106 #define DA732X_REG_ADC2_HPF 0x9B
107 #define DA732X_REG_ADC2_SEL 0x9C
108 #define DA732X_REG_ADC2_EQ12 0x9D
109 #define DA732X_REG_ADC2_EQ34 0x9E
110 #define DA732X_REG_ADC2_EQ5 0x9F
111 #define DA732X_REG_DAC1_HPF 0xA0
112 #define DA732X_REG_DAC1_L_VOL 0xA1
113 #define DA732X_REG_DAC1_R_VOL 0xA2
114 #define DA732X_REG_DAC1_SEL 0xA3
115 #define DA732X_REG_DAC1_SOFTMUTE 0xA4
116 #define DA732X_REG_DAC1_EQ12 0xA5
117 #define DA732X_REG_DAC1_EQ34 0xA6
118 #define DA732X_REG_DAC1_EQ5 0xA7
119 #define DA732X_REG_DAC2_HPF 0xB0
120 #define DA732X_REG_DAC2_L_VOL 0xB1
121 #define DA732X_REG_DAC2_R_VOL 0xB2
122 #define DA732X_REG_DAC2_SEL 0xB3
123 #define DA732X_REG_DAC2_SOFTMUTE 0xB4
124 #define DA732X_REG_DAC2_EQ12 0xB5
125 #define DA732X_REG_DAC2_EQ34 0xB6
126 #define DA732X_REG_DAC2_EQ5 0xB7
127 #define DA732X_REG_DAC3_HPF 0xC0
128 #define DA732X_REG_DAC3_VOL 0xC1
129 #define DA732X_REG_DAC3_SEL 0xC3
130 #define DA732X_REG_DAC3_SOFTMUTE 0xC4
131 #define DA732X_REG_DAC3_EQ12 0xC5
132 #define DA732X_REG_DAC3_EQ34 0xC6
133 #define DA732X_REG_DAC3_EQ5 0xC7
134 #define DA732X_REG_BIQ_BYP 0xD2
135 #define DA732X_REG_DMA_CMD 0xD3
136 #define DA732X_REG_DMA_ADDR0 0xD4
137 #define DA732X_REG_DMA_ADDR1 0xD5
138 #define DA732X_REG_DMA_DATA0 0xD6
139 #define DA732X_REG_DMA_DATA1 0xD7
140 #define DA732X_REG_DMA_DATA2 0xD8
141 #define DA732X_REG_DMA_DATA3 0xD9
142 #define DA732X_REG_DMA_STATUS 0xDA
143 #define DA732X_REG_BROWNOUT 0xDF
144 #define DA732X_REG_UNLOCK 0xE0
146 #define DA732X_MAX_REG DA732X_REG_UNLOCK
151 /* DA732X_REG_STATUS_EXT (addr=0x00) */
152 #define DA732X_STATUS_EXT_DSP (1 << 4)
153 #define DA732X_STATUS_EXT_CLEAR (0 << 0)
155 /* DA732X_REG_STATUS (addr=0x01) */
156 #define DA732X_STATUS_PLL_LOCK (1 << 0)
157 #define DA732X_STATUS_PLL_MCLK_DET (1 << 1)
158 #define DA732X_STATUS_HPDET_OUT (1 << 2)
159 #define DA732X_STATUS_INP_MIXDET_1 (1 << 3)
160 #define DA732X_STATUS_INP_MIXDET_2 (1 << 4)
161 #define DA732X_STATUS_BO_STATUS (1 << 5)
163 /* DA732X_REG_REF1 (addr=0x02) */
164 #define DA732X_VMID_FASTCHG (1 << 1)
165 #define DA732X_VMID_FASTDISCHG (1 << 2)
166 #define DA732X_REFBUFX2_EN (1 << 6)
167 #define DA732X_REFBUFX2_DIS (0 << 6)
169 /* DA732X_REG_BIAS_EN (addr=0x03) */
170 #define DA732X_BIAS_BOOST_MASK (3 << 0)
171 #define DA732X_BIAS_BOOST_100PC (0 << 0)
172 #define DA732X_BIAS_BOOST_133PC (1 << 0)
173 #define DA732X_BIAS_BOOST_88PC (2 << 0)
174 #define DA732X_BIAS_BOOST_50PC (3 << 0)
175 #define DA732X_BIAS_EN (1 << 7)
176 #define DA732X_BIAS_DIS (0 << 7)
178 /* DA732X_REG_BIAS1 (addr=0x04) */
179 #define DA732X_BIAS1_HP_DAC_BIAS_MASK (3 << 0)
180 #define DA732X_BIAS1_HP_DAC_BIAS_100PC (0 << 0)
181 #define DA732X_BIAS1_HP_DAC_BIAS_150PC (1 << 0)
182 #define DA732X_BIAS1_HP_DAC_BIAS_50PC (2 << 0)
183 #define DA732X_BIAS1_HP_DAC_BIAS_75PC (3 << 0)
184 #define DA732X_BIAS1_HP_OUT_BIAS_MASK (7 << 4)
185 #define DA732X_BIAS1_HP_OUT_BIAS_100PC (0 << 4)
186 #define DA732X_BIAS1_HP_OUT_BIAS_125PC (1 << 4)
187 #define DA732X_BIAS1_HP_OUT_BIAS_150PC (2 << 4)
188 #define DA732X_BIAS1_HP_OUT_BIAS_175PC (3 << 4)
189 #define DA732X_BIAS1_HP_OUT_BIAS_200PC (4 << 4)
190 #define DA732X_BIAS1_HP_OUT_BIAS_250PC (5 << 4)
191 #define DA732X_BIAS1_HP_OUT_BIAS_300PC (6 << 4)
192 #define DA732X_BIAS1_HP_OUT_BIAS_350PC (7 << 4)
194 /* DA732X_REG_BIAS2 (addr=0x05) */
195 #define DA732X_BIAS2_LINE2_DAC_BIAS_MASK (3 << 0)
196 #define DA732X_BIAS2_LINE2_DAC_BIAS_100PC (0 << 0)
197 #define DA732X_BIAS2_LINE2_DAC_BIAS_150PC (1 << 0)
198 #define DA732X_BIAS2_LINE2_DAC_BIAS_50PC (2 << 0)
199 #define DA732X_BIAS2_LINE2_DAC_BIAS_75PC (3 << 0)
200 #define DA732X_BIAS2_LINE2_OUT_BIAS_MASK (7 << 4)
201 #define DA732X_BIAS2_LINE2_OUT_BIAS_100PC (0 << 4)
202 #define DA732X_BIAS2_LINE2_OUT_BIAS_125PC (1 << 4)
203 #define DA732X_BIAS2_LINE2_OUT_BIAS_150PC (2 << 4)
204 #define DA732X_BIAS2_LINE2_OUT_BIAS_175PC (3 << 4)
205 #define DA732X_BIAS2_LINE2_OUT_BIAS_200PC (4 << 4)
206 #define DA732X_BIAS2_LINE2_OUT_BIAS_250PC (5 << 4)
207 #define DA732X_BIAS2_LINE2_OUT_BIAS_300PC (6 << 4)
208 #define DA732X_BIAS2_LINE2_OUT_BIAS_350PC (7 << 4)
210 /* DA732X_REG_BIAS3 (addr=0x06) */
211 #define DA732X_BIAS3_LINE3_DAC_BIAS_MASK (3 << 0)
212 #define DA732X_BIAS3_LINE3_DAC_BIAS_100PC (0 << 0)
213 #define DA732X_BIAS3_LINE3_DAC_BIAS_150PC (1 << 0)
214 #define DA732X_BIAS3_LINE3_DAC_BIAS_50PC (2 << 0)
215 #define DA732X_BIAS3_LINE3_DAC_BIAS_75PC (3 << 0)
216 #define DA732X_BIAS3_LINE3_OUT_BIAS_MASK (7 << 4)
217 #define DA732X_BIAS3_LINE3_OUT_BIAS_100PC (0 << 4)
218 #define DA732X_BIAS3_LINE3_OUT_BIAS_125PC (1 << 4)
219 #define DA732X_BIAS3_LINE3_OUT_BIAS_150PC (2 << 4)
220 #define DA732X_BIAS3_LINE3_OUT_BIAS_175PC (3 << 4)
221 #define DA732X_BIAS3_LINE3_OUT_BIAS_200PC (4 << 4)
222 #define DA732X_BIAS3_LINE3_OUT_BIAS_250PC (5 << 4)
223 #define DA732X_BIAS3_LINE3_OUT_BIAS_300PC (6 << 4)
224 #define DA732X_BIAS3_LINE3_OUT_BIAS_350PC (7 << 4)
226 /* DA732X_REG_BIAS4 (addr=0x07) */
227 #define DA732X_BIAS4_LINE4_DAC_BIAS_MASK (3 << 0)
228 #define DA732X_BIAS4_LINE4_DAC_BIAS_100PC (0 << 0)
229 #define DA732X_BIAS4_LINE4_DAC_BIAS_150PC (1 << 0)
230 #define DA732X_BIAS4_LINE4_DAC_BIAS_50PC (2 << 0)
231 #define DA732X_BIAS4_LINE4_DAC_BIAS_75PC (3 << 0)
232 #define DA732X_BIAS4_LINE4_OUT_BIAS_MASK (7 << 4)
233 #define DA732X_BIAS4_LINE4_OUT_BIAS_100PC (0 << 4)
234 #define DA732X_BIAS4_LINE4_OUT_BIAS_125PC (1 << 4)
235 #define DA732X_BIAS4_LINE4_OUT_BIAS_150PC (2 << 4)
236 #define DA732X_BIAS4_LINE4_OUT_BIAS_175PC (3 << 4)
237 #define DA732X_BIAS4_LINE4_OUT_BIAS_200PC (4 << 4)
238 #define DA732X_BIAS4_LINE4_OUT_BIAS_250PC (5 << 4)
239 #define DA732X_BIAS4_LINE4_OUT_BIAS_300PC (6 << 4)
240 #define DA732X_BIAS4_LINE4_OUT_BIAS_350PC (7 << 4)
242 /* DA732X_REG_SIF_VDD_SEL (addr=0x08) */
243 #define DA732X_SIF_VDD_SEL_AIFA_VDD2 (1 << 0)
244 #define DA732X_SIF_VDD_SEL_AIFB_VDD2 (1 << 1)
245 #define DA732X_SIF_VDD_SEL_CIFA_VDD2 (1 << 4)
247 /* DA732X_REG_MICBIAS2/1 (addr=0x0F/0x10) */
248 #define DA732X_MICBIAS_VOLTAGE_MASK (0x0F << 0)
249 #define DA732X_MICBIAS_VOLTAGE_2V (0x00 << 0)
250 #define DA732X_MICBIAS_VOLTAGE_2V05 (0x01 << 0)
251 #define DA732X_MICBIAS_VOLTAGE_2V1 (0x02 << 0)
252 #define DA732X_MICBIAS_VOLTAGE_2V15 (0x03 << 0)
253 #define DA732X_MICBIAS_VOLTAGE_2V2 (0x04 << 0)
254 #define DA732X_MICBIAS_VOLTAGE_2V25 (0x05 << 0)
255 #define DA732X_MICBIAS_VOLTAGE_2V3 (0x06 << 0)
256 #define DA732X_MICBIAS_VOLTAGE_2V35 (0x07 << 0)
257 #define DA732X_MICBIAS_VOLTAGE_2V4 (0x08 << 0)
258 #define DA732X_MICBIAS_VOLTAGE_2V45 (0x09 << 0)
259 #define DA732X_MICBIAS_VOLTAGE_2V5 (0x0A << 0)
260 #define DA732X_MICBIAS_EN (1 << 7)
261 #define DA732X_MICBIAS_EN_SHIFT 7
262 #define DA732X_MICBIAS_VOLTAGE_SHIFT 0
263 #define DA732X_MICBIAS_VOLTAGE_MAX 0x0B
265 /* DA732X_REG_MICDET (addr=0x11) */
266 #define DA732X_MICDET_INP_MICRES (1 << 0)
267 #define DA732X_MICDET_INP_MICHOOK (1 << 1)
268 #define DA732X_MICDET_INP_DEBOUNCE_PRD_8MS (0 << 0)
269 #define DA732X_MICDET_INP_DEBOUNCE_PRD_16MS (1 << 0)
270 #define DA732X_MICDET_INP_DEBOUNCE_PRD_32MS (2 << 0)
271 #define DA732X_MICDET_INP_DEBOUNCE_PRD_64MS (3 << 0)
272 #define DA732X_MICDET_INP_MICDET_EN (1 << 7)
274 /* DA732X_REG_MIC1/2/3_PRE (addr=0x11/0x14/0x18) */
275 #define DA732X_MICBOOST_MASK 0x7
276 #define DA732X_MICBOOST_SHIFT 0
277 #define DA732X_MICBOOST_MIN 0x1
278 #define DA732X_MICBOOST_MAX DA732X_MICBOOST_MASK
280 /* DA732X_REG_MIC1/2/3 (addr=0x13/0x15/0x19) */
281 #define DA732X_MIC_VOL_SHIFT 0
282 #define DA732X_MIC_VOL_VAL_MASK 0x1F
283 #define DA732X_MIC_MUTE_SHIFT 6
284 #define DA732X_MIC_EN_SHIFT 7
285 #define DA732X_MIC_VOL_VAL_MIN 0x7
286 #define DA732X_MIC_VOL_VAL_MAX DA732X_MIC_VOL_VAL_MASK
288 /* DA732X_REG_AUX1L/R (addr=0x16/0x17) */
289 #define DA732X_AUX_VOL_SHIFT 0
290 #define DA732X_AUX_VOL_MASK 0x7
291 #define DA732X_AUX_MUTE_SHIFT 6
292 #define DA732X_AUX_EN_SHIFT 7
293 #define DA732X_AUX_VOL_VAL_MAX DA732X_AUX_VOL_MASK
295 /* DA732X_REG_INP_PINBIAS (addr=0x1A) */
296 #define DA732X_INP_MICL_PINBIAS_EN (1 << 0)
297 #define DA732X_INP_MICR_PINBIAS_EN (1 << 1)
298 #define DA732X_INP_AUX1L_PINBIAS_EN (1 << 2)
299 #define DA732X_INP_AUX1R_PINBIAS_EN (1 << 3)
300 #define DA732X_INP_AUX2_PINBIAS_EN (1 << 4)
302 /* DA732X_REG_INP_ZC_EN (addr=0x1B) */
303 #define DA732X_MIC1_PRE_ZC_EN (1 << 0)
304 #define DA732X_MIC1_ZC_EN (1 << 1)
305 #define DA732X_MIC2_PRE_ZC_EN (1 << 2)
306 #define DA732X_MIC2_ZC_EN (1 << 3)
307 #define DA732X_AUXL_ZC_EN (1 << 4)
308 #define DA732X_AUXR_ZC_EN (1 << 5)
309 #define DA732X_MIC3_PRE_ZC_EN (1 << 6)
310 #define DA732X_MIC3_ZC_EN (1 << 7)
312 /* DA732X_REG_INP_MUX (addr=0x1D) */
313 #define DA732X_INP_ADC1L_MUX_SEL_AUX1L (0 << 0)
314 #define DA732X_INP_ADC1L_MUX_SEL_MIC1 (1 << 0)
315 #define DA732X_INP_ADC1R_MUX_SEL_MASK (3 << 2)
316 #define DA732X_INP_ADC1R_MUX_SEL_AUX1R (0 << 2)
317 #define DA732X_INP_ADC1R_MUX_SEL_MIC2 (1 << 2)
318 #define DA732X_INP_ADC1R_MUX_SEL_MIC3 (2 << 2)
319 #define DA732X_INP_ADC2L_MUX_SEL_AUX1L (0 << 4)
320 #define DA732X_INP_ADC2L_MUX_SEL_MICL (1 << 4)
321 #define DA732X_INP_ADC2R_MUX_SEL_MASK (3 << 6)
322 #define DA732X_INP_ADC2R_MUX_SEL_AUX1R (0 << 6)
323 #define DA732X_INP_ADC2R_MUX_SEL_MICR (1 << 6)
324 #define DA732X_INP_ADC2R_MUX_SEL_AUX2 (2 << 6)
325 #define DA732X_ADC1L_MUX_SEL_SHIFT 0
326 #define DA732X_ADC1R_MUX_SEL_SHIFT 2
327 #define DA732X_ADC2L_MUX_SEL_SHIFT 4
328 #define DA732X_ADC2R_MUX_SEL_SHIFT 6
330 /* DA732X_REG_HP_DET (addr=0x20) */
331 #define DA732X_HP_DET_AZ (1 << 0)
332 #define DA732X_HP_DET_SEL1 (1 << 1)
333 #define DA732X_HP_DET_IS_MASK (3 << 2)
334 #define DA732X_HP_DET_IS_0_5UA (0 << 2)
335 #define DA732X_HP_DET_IS_1UA (1 << 2)
336 #define DA732X_HP_DET_IS_2UA (2 << 2)
337 #define DA732X_HP_DET_IS_4UA (3 << 2)
338 #define DA732X_HP_DET_RS_MASK (3 << 4)
339 #define DA732X_HP_DET_RS_INFINITE (0 << 4)
340 #define DA732X_HP_DET_RS_100KOHM (1 << 4)
341 #define DA732X_HP_DET_RS_10KOHM (2 << 4)
342 #define DA732X_HP_DET_RS_1KOHM (3 << 4)
343 #define DA732X_HP_DET_EN (1 << 7)
345 /* DA732X_REG_HPL_DAC_OFFSET (addr=0x21/0x26) */
346 #define DA732X_HP_DAC_OFFSET_TRIM_MASK (0x3F << 0)
347 #define DA732X_HP_DAC_OFFSET_DAC_SIGN (1 << 6)
349 /* DA732X_REG_HPL_DAC_OFF_CNTL (addr=0x22/0x27) */
350 #define DA732X_HP_DAC_OFF_CNTL_CONT_MASK (7 << 0)
351 #define DA732X_HP_DAC_OFF_CNTL_COMPO (1 << 3)
352 #define DA732X_HP_DAC_OFF_CALIBRATION (1 << 0)
353 #define DA732X_HP_DAC_OFF_SCALE_STEPS (1 << 1)
354 #define DA732X_HP_DAC_OFF_MASK 0x7F
355 #define DA732X_HP_DAC_COMPO_SHIFT 3
357 /* DA732X_REG_HPL_OUT_OFFSET (addr=0x23/0x28) */
358 #define DA732X_HP_OUT_OFFSET_MASK (0xFF << 0)
359 #define DA732X_HP_DAC_OFFSET_TRIM_VAL 0x7F
361 /* DA732X_REG_HPL/R (addr=0x24/0x29) */
362 #define DA732X_HP_OUT_SIGN (1 << 0)
363 #define DA732X_HP_OUT_COMP (1 << 1)
364 #define DA732X_HP_OUT_RESERVED (1 << 2)
365 #define DA732X_HP_OUT_COMPO (1 << 3)
366 #define DA732X_HP_OUT_DAC_EN (1 << 4)
367 #define DA732X_HP_OUT_HIZ_EN (1 << 5)
368 #define DA732X_HP_OUT_HIZ_DIS (0 << 5)
369 #define DA732X_HP_OUT_MUTE (1 << 6)
370 #define DA732X_HP_OUT_EN (1 << 7)
371 #define DA732X_HP_OUT_COMPO_SHIFT 3
372 #define DA732X_HP_OUT_DAC_EN_SHIFT 4
373 #define DA732X_HP_HIZ_SHIFT 5
374 #define DA732X_HP_MUTE_SHIFT 6
375 #define DA732X_HP_OUT_EN_SHIFT 7
377 #define DA732X_OUT_HIZ_EN (1 << 5)
378 #define DA732X_OUT_HIZ_DIS (0 << 5)
380 /* DA732X_REG_HPL/R_VOL (addr=0x25/0x2A) */
381 #define DA732X_HP_VOL_VAL_MASK 0xF
382 #define DA732X_HP_VOL_SHIFT 0
383 #define DA732X_HP_VOL_VAL_MAX DA732X_HP_VOL_VAL_MASK
385 /* DA732X_REG_LIN2/3/4 (addr=0x2B/0x2C/0x2D) */
386 #define DA732X_LOUT_VOL_SHIFT 0
387 #define DA732X_LOUT_VOL_MASK 0x0F
388 #define DA732X_LOUT_DAC_OFF (0 << 4)
389 #define DA732X_LOUT_DAC_EN (1 << 4)
390 #define DA732X_LOUT_HIZ_N_DIS (0 << 5)
391 #define DA732X_LOUT_HIZ_N_EN (1 << 5)
392 #define DA732X_LOUT_UNMUTED (0 << 6)
393 #define DA732X_LOUT_MUTED (1 << 6)
394 #define DA732X_LOUT_EN (0 << 7)
395 #define DA732X_LOUT_DIS (1 << 7)
396 #define DA732X_LOUT_DAC_EN_SHIFT 4
397 #define DA732X_LOUT_MUTE_SHIFT 6
398 #define DA732X_LIN_OUT_EN_SHIFT 7
399 #define DA732X_LOUT_VOL_VAL_MAX DA732X_LOUT_VOL_MASK
401 /* DA732X_REG_OUT_ZC_EN (addr=0x2E) */
402 #define DA732X_HPL_ZC_EN_SHIFT 0
403 #define DA732X_HPR_ZC_EN_SHIFT 1
404 #define DA732X_HPL_ZC_EN (1 << 0)
405 #define DA732X_HPL_ZC_DIS (0 << 0)
406 #define DA732X_HPR_ZC_EN (1 << 1)
407 #define DA732X_HPR_ZC_DIS (0 << 1)
408 #define DA732X_LIN2_ZC_EN (1 << 2)
409 #define DA732X_LIN2_ZC_DIS (0 << 2)
410 #define DA732X_LIN3_ZC_EN (1 << 3)
411 #define DA732X_LIN3_ZC_DIS (0 << 3)
412 #define DA732X_LIN4_ZC_EN (1 << 4)
413 #define DA732X_LIN4_ZC_DIS (0 << 4)
415 /* DA732X_REG_HP_LIN1_GNDSEL (addr=0x37) */
416 #define DA732X_HP_OUT_GNDSEL (1 << 0)
418 /* DA732X_REG_CP_HP2 (addr=0x3a) */
419 #define DA732X_HP_CP_PULSESKIP (1 << 0)
420 #define DA732X_HP_CP_REG (1 << 1)
421 #define DA732X_HP_CP_EN (1 << 3)
422 #define DA732X_HP_CP_DIS (0 << 3)
424 /* DA732X_REG_CP_CTRL1 (addr=0x40) */
425 #define DA732X_CP_MODE_MASK (7 << 1)
426 #define DA732X_CP_CTRL_STANDBY (0 << 1)
427 #define DA732X_CP_CTRL_CPVDD6 (2 << 1)
428 #define DA732X_CP_CTRL_CPVDD5 (3 << 1)
429 #define DA732X_CP_CTRL_CPVDD4 (4 << 1)
430 #define DA732X_CP_CTRL_CPVDD3 (5 << 1)
431 #define DA732X_CP_CTRL_CPVDD2 (6 << 1)
432 #define DA732X_CP_CTRL_CPVDD1 (7 << 1)
433 #define DA723X_CP_DIS (0 << 7)
434 #define DA732X_CP_EN (1 << 7)
436 /* DA732X_REG_CP_CTRL2 (addr=0x41) */
437 #define DA732X_CP_BOOST (1 << 0)
438 #define DA732X_CP_MANAGE_MAGNITUDE (2 << 2)
440 /* DA732X_REG_CP_CTRL3 (addr=0x42) */
441 #define DA732X_CP_1MHZ (0 << 0)
442 #define DA732X_CP_500KHZ (1 << 0)
443 #define DA732X_CP_250KHZ (2 << 0)
444 #define DA732X_CP_125KHZ (3 << 0)
445 #define DA732X_CP_63KHZ (4 << 0)
446 #define DA732X_CP_0KHZ (5 << 0)
448 /* DA732X_REG_PLL_CTRL (addr=0x53) */
449 #define DA732X_PLL_INDIV_MASK (3 << 0)
450 #define DA732X_PLL_SRM_EN (1 << 2)
451 #define DA732X_PLL_EN (1 << 7)
452 #define DA732X_PLL_BYPASS (0 << 0)
454 /* DA732X_REG_CLK_CTRL (addr=0x54) */
455 #define DA732X_SR1_MASK (0xF)
456 #define DA732X_SR2_MASK (0xF0)
458 /* DA732X_REG_CLK_DSP (addr=0x5A) */
459 #define DA732X_DSP_FREQ_MASK (7 << 0)
460 #define DA732X_DSP_FREQ_12MHZ (0 << 0)
461 #define DA732X_DSP_FREQ_24MHZ (1 << 0)
462 #define DA732X_DSP_FREQ_36MHZ (2 << 0)
463 #define DA732X_DSP_FREQ_48MHZ (3 << 0)
464 #define DA732X_DSP_FREQ_60MHZ (4 << 0)
465 #define DA732X_DSP_FREQ_72MHZ (5 << 0)
466 #define DA732X_DSP_FREQ_84MHZ (6 << 0)
467 #define DA732X_DSP_FREQ_96MHZ (7 << 0)
469 /* DA732X_REG_CLK_EN1 (addr=0x5B) */
470 #define DA732X_DSP_CLK_EN (1 << 0)
471 #define DA732X_SYS3_CLK_EN (1 << 1)
472 #define DA732X_DSP12_CLK_EN (1 << 2)
473 #define DA732X_PC_CLK_EN (1 << 3)
474 #define DA732X_MCLK_SQR_EN (1 << 7)
476 /* DA732X_REG_CLK_EN2 (addr=0x5C) */
477 #define DA732X_UART_CLK_EN (1 << 1)
478 #define DA732X_CP_CLK_EN (1 << 2)
479 #define DA732X_CP_CLK_DIS (0 << 2)
481 /* DA732X_REG_CLK_EN3 (addr=0x5D) */
482 #define DA732X_ADCA_BB_CLK_EN (1 << 0)
483 #define DA732X_ADCC_BB_CLK_EN (1 << 4)
485 /* DA732X_REG_CLK_EN4 (addr=0x5E) */
486 #define DA732X_DACA_BB_CLK_EN (1 << 0)
487 #define DA732X_DACC_BB_CLK_EN (1 << 4)
488 #define DA732X_DACA_BB_CLK_SHIFT 0
489 #define DA732X_DACC_BB_CLK_SHIFT 4
491 /* DA732X_REG_CLK_EN5 (addr=0x5F) */
492 #define DA732X_DACE_BB_CLK_EN (1 << 0)
493 #define DA732X_DACE_BB_CLK_SHIFT 0
495 /* DA732X_REG_AIF_MCLK (addr=0x60) */
496 #define DA732X_AIFM_FRAME_64 (1 << 2)
497 #define DA732X_AIFM_SRC_SEL_AIFA (1 << 6)
498 #define DA732X_CLK_GENERATION_AIF_A (1 << 4)
499 #define DA732X_NO_CLK_GENERATION 0x0
501 /* DA732X_REG_AIFA1 (addr=0x61) */
502 #define DA732X_AIF_WORD_MASK (0x3 << 0)
503 #define DA732X_AIF_WORD_16 (0 << 0)
504 #define DA732X_AIF_WORD_20 (1 << 0)
505 #define DA732X_AIF_WORD_24 (2 << 0)
506 #define DA732X_AIF_WORD_32 (3 << 0)
507 #define DA732X_AIF_TDM_MONO_SHIFT (1 << 6)
508 #define DA732X_AIF1_CLK_MASK (1 << 7)
509 #define DA732X_AIF_SLAVE (0 << 7)
510 #define DA732X_AIF_CLK_FROM_SRC (1 << 7)
512 /* DA732X_REG_AIFA3 (addr=0x63) */
513 #define DA732X_AIF_MODE_SHIFT 0
514 #define DA732X_AIF_MODE_MASK 0x3
515 #define DA732X_AIF_I2S_MODE (0 << 0)
516 #define DA732X_AIF_LEFT_J_MODE (1 << 0)
517 #define DA732X_AIF_RIGHT_J_MODE (2 << 0)
518 #define DA732X_AIF_DSP_MODE (3 << 0)
519 #define DA732X_AIF_WCLK_INV (1 << 4)
520 #define DA732X_AIF_BCLK_INV (1 << 5)
521 #define DA732X_AIF_EN (1 << 7)
522 #define DA732X_AIF_EN_SHIFT 7
524 /* DA732X_REG_PC_CTRL (addr=0x6a) */
525 #define DA732X_PC_PULSE_AIFA (0 << 0)
526 #define DA732X_PC_PULSE_AIFB (1 << 0)
527 #define DA732X_PC_RESYNC_AUT (1 << 6)
528 #define DA732X_PC_RESYNC_NOT_AUT (0 << 6)
529 #define DA732X_PC_SAME (1 << 7)
531 /* DA732X_REG_DATA_ROUTE (addr=0x70) */
532 #define DA732X_ADC1_TO_AIFA (0 << 0)
533 #define DA732X_DSP_TO_AIFA (1 << 0)
534 #define DA732X_ADC2_TO_AIFB (0 << 1)
535 #define DA732X_DSP_TO_AIFB (1 << 1)
536 #define DA732X_AIFA_TO_DAC1L (0 << 2)
537 #define DA732X_DSP_TO_DAC1L (1 << 2)
538 #define DA732X_AIFA_TO_DAC1R (0 << 3)
539 #define DA732X_DSP_TO_DAC1R (1 << 3)
540 #define DA732X_AIFB_TO_DAC2L (0 << 4)
541 #define DA732X_DSP_TO_DAC2L (1 << 4)
542 #define DA732X_AIFB_TO_DAC2R (0 << 5)
543 #define DA732X_DSP_TO_DAC2R (1 << 5)
544 #define DA732X_AIFB_TO_DAC3 (0 << 6)
545 #define DA732X_DSP_TO_DAC3 (1 << 6)
546 #define DA732X_BYPASS_DSP (0 << 0)
547 #define DA732X_ALL_TO_DSP (0x7F << 0)
549 /* DA732X_REG_DSP_CTRL (addr=0x71) */
550 #define DA732X_DIGITAL_EN (1 << 0)
551 #define DA732X_DIGITAL_RESET (0 << 0)
552 #define DA732X_DSP_CORE_EN (1 << 1)
553 #define DA732X_DSP_CORE_RESET (0 << 1)
555 /* DA732X_REG_SPARE1_OUT (addr=0x7D)*/
556 #define DA732X_HP_DRIVER_EN (1 << 0)
557 #define DA732X_HP_GATE_LOW (1 << 2)
558 #define DA732X_HP_LOOP_GAIN_CTRL (1 << 3)
560 /* DA732X_REG_ID (addr=0x81)*/
561 #define DA732X_ID_MINOR_MASK (0xF << 0)
562 #define DA732X_ID_MAJOR_MASK (0xF << 4)
564 /* DA732X_REG_ADC1/2_PD (addr=0x90/0x98) */
565 #define DA732X_ADC_RST_MASK (0x3 << 0)
566 #define DA732X_ADC_PD_MASK (0x3 << 2)
567 #define DA732X_ADC_SET_ACT (0x3 << 0)
568 #define DA732X_ADC_SET_RST (0x0 << 0)
569 #define DA732X_ADC_ON (0x3 << 2)
570 #define DA732X_ADC_OFF (0x0 << 2)
572 /* DA732X_REG_ADC1/2_SEL (addr=0x94/0x9C) */
573 #define DA732X_ADC_VOL_VAL_MASK 0x7
574 #define DA732X_ADCL_VOL_SHIFT 0
575 #define DA732X_ADCR_VOL_SHIFT 4
576 #define DA732X_ADCL_EN_SHIFT 2
577 #define DA732X_ADCR_EN_SHIFT 3
578 #define DA732X_ADCL_EN (1 << 2)
579 #define DA732X_ADCR_EN (1 << 3)
580 #define DA732X_ADC_VOL_VAL_MAX DA732X_ADC_VOL_VAL_MASK
583 * DA732X_REG_ADC1/2_HPF (addr=0x93/0x9b)
584 * DA732x_REG_DAC1/2/3_HPG (addr=0xA5/0xB5/0xC5)
586 #define DA732X_HPF_MUSIC_EN (1 << 3)
587 #define DA732X_HPF_VOICE_EN ((1 << 3) | (1 << 7))
588 #define DA732X_HPF_MASK ((1 << 3) | (1 << 7))
589 #define DA732X_HPF_DIS ((0 << 3) | (0 << 7))
591 /* DA732X_REG_DAC1/2/3_VOL */
592 #define DA732X_DAC_VOL_VAL_MASK 0x7F
593 #define DA732X_DAC_VOL_SHIFT 0
594 #define DA732X_DAC_VOL_VAL_MAX DA732X_DAC_VOL_VAL_MASK
596 /* DA732X_REG_DAC1/2/3_SEL (addr=0xA3/0xB3/0xC3) */
597 #define DA732X_DACL_EN_SHIFT 3
598 #define DA732X_DACR_EN_SHIFT 7
599 #define DA732X_DACL_MUTE_SHIFT 2
600 #define DA732X_DACR_MUTE_SHIFT 6
601 #define DA732X_DACL_EN (1 << 3)
602 #define DA732X_DACR_EN (1 << 7)
603 #define DA732X_DACL_SDM (1 << 0)
604 #define DA732X_DACR_SDM (1 << 4)
605 #define DA732X_DACL_MUTE (1 << 2)
606 #define DA732X_DACR_MUTE (1 << 6)
608 /* DA732X_REG_DAC_SOFTMUTE (addr=0xA4/0xB4/0xC4) */
609 #define DA732X_SOFTMUTE_EN (1 << 7)
610 #define DA732X_GAIN_RAMPED (1 << 6)
611 #define DA732X_16_SAMPLES (4 << 0)
612 #define DA732X_SOFTMUTE_MASK (1 << 7)
613 #define DA732X_SOFTMUTE_SHIFT 7
616 * DA732x_REG_ADC1/2_EQ12 (addr=0x95/0x9D)
617 * DA732x_REG_ADC1/2_EQ34 (addr=0x96/0x9E)
618 * DA732x_REG_ADC1/2_EQ5 (addr=0x97/0x9F)
619 * DA732x_REG_DAC1/2/3_EQ12 (addr=0xA5/0xB5/0xC5)
620 * DA732x_REG_DAC1/2/3_EQ34 (addr=0xA6/0xB6/0xC6)
621 * DA732x_REG_DAC1/2/3_EQ5 (addr=0xA7/0xB7/0xB7)
623 #define DA732X_EQ_VOL_VAL_MASK 0xF
624 #define DA732X_EQ_BAND1_SHIFT 0
625 #define DA732X_EQ_BAND2_SHIFT 4
626 #define DA732X_EQ_BAND3_SHIFT 0
627 #define DA732X_EQ_BAND4_SHIFT 4
628 #define DA732X_EQ_BAND5_SHIFT 0
629 #define DA732X_EQ_OVERALL_SHIFT 4
630 #define DA732X_EQ_OVERALL_VOL_VAL_MASK 0x3
631 #define DA732X_EQ_DIS (0 << 7)
632 #define DA732X_EQ_EN (1 << 7)
633 #define DA732X_EQ_EN_SHIFT 7
634 #define DA732X_EQ_VOL_VAL_MAX DA732X_EQ_VOL_VAL_MASK
635 #define DA732X_EQ_OVERALL_VOL_VAL_MAX DA732X_EQ_OVERALL_VOL_VAL_MASK
637 /* DA732X_REG_DMA_CMD (addr=0xD3) */
638 #define DA732X_SEL_DSP_DMA_MASK (3 << 0)
639 #define DA732X_SEL_DSP_DMA_DIS (0 << 0)
640 #define DA732X_SEL_DSP_DMA_PMEM (1 << 0)
641 #define DA732X_SEL_DSP_DMA_XMEM (2 << 0)
642 #define DA732X_SEL_DSP_DMA_YMEM (3 << 0)
643 #define DA732X_DSP_RW_MASK (1 << 4)
644 #define DA732X_DSP_DMA_WRITE (0 << 4)
645 #define DA732X_DSP_DMA_READ (1 << 4)
647 /* DA732X_REG_DMA_STATUS (addr=0xDA) */
648 #define DA732X_DSP_DMA_FREE (0 << 0)
649 #define DA732X_DSP_DMA_BUSY (1 << 0)
651 #endif /* __DA732X_REG_H_ */
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