sound/soc/amd/raven/acp3x-pcm-dma.c

   1 /*
   2  * AMD ALSA SoC PCM Driver
   3  *
   4  * Copyright 2016 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  */
  15
  16 #include <linux/platform_device.h>
  17 #include <linux/module.h>
  18 #include <linux/err.h>
  19 #include <linux/io.h>
  20 #include <sound/pcm.h>
  21 #include <sound/pcm_params.h>
  22 #include <sound/soc.h>
  23 #include <sound/soc-dai.h>
  24
  25 #include "acp3x.h"
  26
  27 #define DRV_NAME "acp3x-i2s-audio"
  28
  29 struct i2s_dev_data {
  30         bool tdm_mode;
  31         unsigned int i2s_irq;
  32         u32 tdm_fmt;
  33         void __iomem *acp3x_base;
  34         struct snd_pcm_substream *play_stream;
  35         struct snd_pcm_substream *capture_stream;
  36 };
  37
  38 struct i2s_stream_instance {
  39         u16 num_pages;
  40         u16 channels;
  41         u32 xfer_resolution;
  42         struct page *pg;
  43         void __iomem *acp3x_base;
  44 };
  45
  46 static const struct snd_pcm_hardware acp3x_pcm_hardware_playback = {
  47         .info = SNDRV_PCM_INFO_INTERLEAVED |
  48                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
  49                 SNDRV_PCM_INFO_BATCH |
  50                 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
  51         .formats = SNDRV_PCM_FMTBIT_S16_LE |  SNDRV_PCM_FMTBIT_S8 |
  52                    SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
  53                    SNDRV_PCM_FMTBIT_S32_LE,
  54         .channels_min = 2,
  55         .channels_max = 8,
  56         .rates = SNDRV_PCM_RATE_8000_96000,
  57         .rate_min = 8000,
  58         .rate_max = 96000,
  59         .buffer_bytes_max = PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE,
  60         .period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
  61         .period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
  62         .periods_min = PLAYBACK_MIN_NUM_PERIODS,
  63         .periods_max = PLAYBACK_MAX_NUM_PERIODS,
  64 };
  65
  66 static const struct snd_pcm_hardware acp3x_pcm_hardware_capture = {
  67         .info = SNDRV_PCM_INFO_INTERLEAVED |
  68                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
  69                 SNDRV_PCM_INFO_BATCH |
  70             SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
  71         .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
  72                    SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
  73                    SNDRV_PCM_FMTBIT_S32_LE,
  74         .channels_min = 2,
  75         .channels_max = 2,
  76         .rates = SNDRV_PCM_RATE_8000_48000,
  77         .rate_min = 8000,
  78         .rate_max = 48000,
  79         .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE,
  80         .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
  81         .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
  82         .periods_min = CAPTURE_MIN_NUM_PERIODS,
  83         .periods_max = CAPTURE_MAX_NUM_PERIODS,
  84 };
  85
  86 static int acp3x_power_on(void __iomem *acp3x_base, bool on)
  87 {
  88         u16 val, mask;
  89         u32 timeout;
  90
  91         if (on == true) {
  92                 val = 1;
  93                 mask = ACP3x_POWER_ON;
  94         } else {
  95                 val = 0;
  96                 mask = ACP3x_POWER_OFF;
  97         }
  98
  99         rv_writel(val, acp3x_base + mmACP_PGFSM_CONTROL);
 100         timeout = 0;
 101         while (true) {
 102                 val = rv_readl(acp3x_base + mmACP_PGFSM_STATUS);
 103                 if ((val & ACP3x_POWER_OFF_IN_PROGRESS) == mask)
 104                         break;
 105                 if (timeout > 100) {
 106                         pr_err("ACP3x power state change failure\n");
 107                         return -ENODEV;
 108                 }
 109                 timeout++;
 110                 cpu_relax();
 111         }
 112         return 0;
 113 }
 114
 115 static int acp3x_reset(void __iomem *acp3x_base)
 116 {
 117         u32 val, timeout;
 118
 119         rv_writel(1, acp3x_base + mmACP_SOFT_RESET);
 120         timeout = 0;
 121         while (true) {
 122                 val = rv_readl(acp3x_base + mmACP_SOFT_RESET);
 123                 if ((val & ACP3x_SOFT_RESET__SoftResetAudDone_MASK) ||
 124                      timeout > 100) {
 125                         if (val & ACP3x_SOFT_RESET__SoftResetAudDone_MASK)
 126                                 break;
 127                         return -ENODEV;
 128                 }
 129                 timeout++;
 130                 cpu_relax();
 131         }
 132
 133         rv_writel(0, acp3x_base + mmACP_SOFT_RESET);
 134         timeout = 0;
 135         while (true) {
 136                 val = rv_readl(acp3x_base + mmACP_SOFT_RESET);
 137                 if (!val || timeout > 100) {
 138                         if (!val)
 139                                 break;
 140                         return -ENODEV;
 141                 }
 142                 timeout++;
 143                 cpu_relax();
 144         }
 145         return 0;
 146 }
 147
 148 static int acp3x_init(void __iomem *acp3x_base)
 149 {
 150         int ret;
 151
 152         /* power on */
 153         ret = acp3x_power_on(acp3x_base, true);
 154         if (ret) {
 155                 pr_err("ACP3x power on failed\n");
 156                 return ret;
 157         }
 158         /* Reset */
 159         ret = acp3x_reset(acp3x_base);
 160         if (ret) {
 161                 pr_err("ACP3x reset failed\n");
 162                 return ret;
 163         }
 164         return 0;
 165 }
 166
 167 static int acp3x_deinit(void __iomem *acp3x_base)
 168 {
 169         int ret;
 170
 171         /* Reset */
 172         ret = acp3x_reset(acp3x_base);
 173         if (ret) {
 174                 pr_err("ACP3x reset failed\n");
 175                 return ret;
 176         }
 177         /* power off */
 178         ret = acp3x_power_on(acp3x_base, false);
 179         if (ret) {
 180                 pr_err("ACP3x power off failed\n");
 181                 return ret;
 182         }
 183         return 0;
 184 }
 185
 186 static irqreturn_t i2s_irq_handler(int irq, void *dev_id)
 187 {
 188         u16 play_flag, cap_flag;
 189         u32 val;
 190         struct i2s_dev_data *rv_i2s_data = dev_id;
 191
 192         if (!rv_i2s_data)
 193                 return IRQ_NONE;
 194
 195         play_flag = 0;
 196         cap_flag = 0;
 197         val = rv_readl(rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
 198         if ((val & BIT(BT_TX_THRESHOLD)) && rv_i2s_data->play_stream) {
 199                 rv_writel(BIT(BT_TX_THRESHOLD), rv_i2s_data->acp3x_base +
 200                           mmACP_EXTERNAL_INTR_STAT);
 201                 snd_pcm_period_elapsed(rv_i2s_data->play_stream);
 202                 play_flag = 1;
 203         }
 204
 205         if ((val & BIT(BT_RX_THRESHOLD)) && rv_i2s_data->capture_stream) {
 206                 rv_writel(BIT(BT_RX_THRESHOLD), rv_i2s_data->acp3x_base +
 207                           mmACP_EXTERNAL_INTR_STAT);
 208                 snd_pcm_period_elapsed(rv_i2s_data->capture_stream);
 209                 cap_flag = 1;
 210         }
 211
 212         if (play_flag | cap_flag)
 213                 return IRQ_HANDLED;
 214         else
 215                 return IRQ_NONE;
 216 }
 217
 218 static void config_acp3x_dma(struct i2s_stream_instance *rtd, int direction)
 219 {
 220         u16 page_idx;
 221         u64 addr;
 222         u32 low, high, val, acp_fifo_addr;
 223         struct page *pg = rtd->pg;
 224
 225         /* 8 scratch registers used to map one 64 bit address */
 226         if (direction == SNDRV_PCM_STREAM_PLAYBACK)
 227                 val = 0;
 228         else
 229                 val = rtd->num_pages * 8;
 230
 231         /* Group Enable */
 232         rv_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp3x_base +
 233                   mmACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
 234         rv_writel(PAGE_SIZE_4K_ENABLE, rtd->acp3x_base +
 235                   mmACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
 236
 237         for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) {
 238                 /* Load the low address of page int ACP SRAM through SRBM */
 239                 addr = page_to_phys(pg);
 240                 low = lower_32_bits(addr);
 241                 high = upper_32_bits(addr);
 242
 243                 rv_writel(low, rtd->acp3x_base + mmACP_SCRATCH_REG_0 + val);
 244                 high |= BIT(31);
 245                 rv_writel(high, rtd->acp3x_base + mmACP_SCRATCH_REG_0 + val
 246                                 + 4);
 247                 /* Move to next physically contiguos page */
 248                 val += 8;
 249                 pg++;
 250         }
 251
 252         if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
 253                 /* Config ringbuffer */
 254                 rv_writel(MEM_WINDOW_START, rtd->acp3x_base +
 255                           mmACP_BT_TX_RINGBUFADDR);
 256                 rv_writel(MAX_BUFFER, rtd->acp3x_base +
 257                           mmACP_BT_TX_RINGBUFSIZE);
 258                 rv_writel(DMA_SIZE, rtd->acp3x_base + mmACP_BT_TX_DMA_SIZE);
 259
 260                 /* Config audio fifo */
 261                 acp_fifo_addr = ACP_SRAM_PTE_OFFSET + (rtd->num_pages * 8)
 262                                 + PLAYBACK_FIFO_ADDR_OFFSET;
 263                 rv_writel(acp_fifo_addr, rtd->acp3x_base +
 264                           mmACP_BT_TX_FIFOADDR);
 265                 rv_writel(FIFO_SIZE, rtd->acp3x_base + mmACP_BT_TX_FIFOSIZE);
 266         } else {
 267                 /* Config ringbuffer */
 268                 rv_writel(MEM_WINDOW_START + MAX_BUFFER, rtd->acp3x_base +
 269                           mmACP_BT_RX_RINGBUFADDR);
 270                 rv_writel(MAX_BUFFER, rtd->acp3x_base +
 271                           mmACP_BT_RX_RINGBUFSIZE);
 272                 rv_writel(DMA_SIZE, rtd->acp3x_base + mmACP_BT_RX_DMA_SIZE);
 273
 274                 /* Config audio fifo */
 275                 acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
 276                                 (rtd->num_pages * 8) + CAPTURE_FIFO_ADDR_OFFSET;
 277                 rv_writel(acp_fifo_addr, rtd->acp3x_base +
 278                           mmACP_BT_RX_FIFOADDR);
 279                 rv_writel(FIFO_SIZE, rtd->acp3x_base + mmACP_BT_RX_FIFOSIZE);
 280         }
 281
 282         /* Enable  watermark/period interrupt to host */
 283         rv_writel(BIT(BT_TX_THRESHOLD) | BIT(BT_RX_THRESHOLD),
 284                   rtd->acp3x_base + mmACP_EXTERNAL_INTR_CNTL);
 285 }
 286
 287 static int acp3x_dma_open(struct snd_pcm_substream *substream)
 288 {
 289         int ret = 0;
 290
 291         struct snd_pcm_runtime *runtime = substream->runtime;
 292         struct snd_soc_pcm_runtime *prtd = substream->private_data;
 293         struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd,
 294                                                                     DRV_NAME);
 295         struct i2s_dev_data *adata = dev_get_drvdata(component->dev);
 296
 297         struct i2s_stream_instance *i2s_data = kzalloc(sizeof(struct i2s_stream_instance),
 298                                                        GFP_KERNEL);
 299         if (!i2s_data)
 300                 return -EINVAL;
 301
 302         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 303                 runtime->hw = acp3x_pcm_hardware_playback;
 304         else
 305                 runtime->hw = acp3x_pcm_hardware_capture;
 306
 307         ret = snd_pcm_hw_constraint_integer(runtime,
 308                                             SNDRV_PCM_HW_PARAM_PERIODS);
 309         if (ret < 0) {
 310                 dev_err(component->dev, "set integer constraint failed\n");
 311                 return ret;
 312         }
 313
 314         if (!adata->play_stream && !adata->capture_stream)
 315                 rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
 316
 317         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 318                 adata->play_stream = substream;
 319         else
 320                 adata->capture_stream = substream;
 321
 322         i2s_data->acp3x_base = adata->acp3x_base;
 323         runtime->private_data = i2s_data;
 324         return 0;
 325 }
 326
 327 static int acp3x_dma_hw_params(struct snd_pcm_substream *substream,
 328                                struct snd_pcm_hw_params *params)
 329 {
 330         int status;
 331         u64 size;
 332         struct snd_dma_buffer *dma_buffer;
 333         struct page *pg;
 334         struct snd_pcm_runtime *runtime = substream->runtime;
 335         struct i2s_stream_instance *rtd = runtime->private_data;
 336
 337         if (!rtd)
 338                 return -EINVAL;
 339
 340         dma_buffer = &substream->dma_buffer;
 341         size = params_buffer_bytes(params);
 342         status = snd_pcm_lib_malloc_pages(substream, size);
 343         if (status < 0)
 344                 return status;
 345
 346         memset(substream->runtime->dma_area, 0, params_buffer_bytes(params));
 347         pg = virt_to_page(substream->dma_buffer.area);
 348         if (pg) {
 349                 rtd->pg = pg;
 350                 rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT);
 351                 config_acp3x_dma(rtd, substream->stream);
 352                 status = 0;
 353         } else {
 354                 status = -ENOMEM;
 355         }
 356         return status;
 357 }
 358
 359 static snd_pcm_uframes_t acp3x_dma_pointer(struct snd_pcm_substream *substream)
 360 {
 361         u32 pos = 0;
 362         struct i2s_stream_instance *rtd = substream->runtime->private_data;
 363
 364         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 365                 pos = rv_readl(rtd->acp3x_base +
 366                                mmACP_BT_TX_LINKPOSITIONCNTR);
 367         else
 368                 pos = rv_readl(rtd->acp3x_base +
 369                                mmACP_BT_RX_LINKPOSITIONCNTR);
 370
 371         if (pos >= MAX_BUFFER)
 372                 pos = 0;
 373
 374         return bytes_to_frames(substream->runtime, pos);
 375 }
 376
 377 static int acp3x_dma_new(struct snd_soc_pcm_runtime *rtd)
 378 {
 379         return snd_pcm_lib_preallocate_pages_for_all(rtd->pcm,
 380                                                      SNDRV_DMA_TYPE_DEV,
 381                                                      NULL, MIN_BUFFER,
 382                                                      MAX_BUFFER);
 383 }
 384
 385 static int acp3x_dma_hw_free(struct snd_pcm_substream *substream)
 386 {
 387         return snd_pcm_lib_free_pages(substream);
 388 }
 389
 390 static int acp3x_dma_mmap(struct snd_pcm_substream *substream,
 391                           struct vm_area_struct *vma)
 392 {
 393         return snd_pcm_lib_default_mmap(substream, vma);
 394 }
 395
 396 static int acp3x_dma_close(struct snd_pcm_substream *substream)
 397 {
 398         struct snd_soc_pcm_runtime *prtd = substream->private_data;
 399         struct i2s_stream_instance *rtd = substream->runtime->private_data;
 400         struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd,
 401                                                                     DRV_NAME);
 402         struct i2s_dev_data *adata = dev_get_drvdata(component->dev);
 403
 404         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 405                 adata->play_stream = NULL;
 406         else
 407                 adata->capture_stream = NULL;
 408
 409         /* Disable ACP irq, when the current stream is being closed and
 410          * another stream is also not active.
 411          */
 412         if (!adata->play_stream && !adata->capture_stream)
 413                 rv_writel(0, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
 414         kfree(rtd);
 415         return 0;
 416 }
 417
 418 static struct snd_pcm_ops acp3x_dma_ops = {
 419         .open = acp3x_dma_open,
 420         .close = acp3x_dma_close,
 421         .ioctl = snd_pcm_lib_ioctl,
 422         .hw_params = acp3x_dma_hw_params,
 423         .hw_free = acp3x_dma_hw_free,
 424         .pointer = acp3x_dma_pointer,
 425         .mmap = acp3x_dma_mmap,
 426 };
 427
 428
 429 static int acp3x_dai_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
 430 {
 431
 432         struct i2s_dev_data *adata = snd_soc_dai_get_drvdata(cpu_dai);
 433
 434         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 435         case SND_SOC_DAIFMT_I2S:
 436                 adata->tdm_mode = false;
 437                 break;
 438         case SND_SOC_DAIFMT_DSP_A:
 439                 adata->tdm_mode = true;
 440                 break;
 441         default:
 442                 return -EINVAL;
 443         }
 444
 445         return 0;
 446 }
 447
 448 static int acp3x_dai_set_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask,
 449                                   u32 rx_mask, int slots, int slot_width)
 450 {
 451         u32 val = 0;
 452         u16 slot_len;
 453
 454         struct i2s_dev_data *adata = snd_soc_dai_get_drvdata(cpu_dai);
 455
 456         switch (slot_width) {
 457         case SLOT_WIDTH_8:
 458                 slot_len = 8;
 459                 break;
 460         case SLOT_WIDTH_16:
 461                 slot_len = 16;
 462                 break;
 463         case SLOT_WIDTH_24:
 464                 slot_len = 24;
 465                 break;
 466         case SLOT_WIDTH_32:
 467                 slot_len = 0;
 468                 break;
 469         default:
 470                 return -EINVAL;
 471         }
 472
 473         val = rv_readl(adata->acp3x_base + mmACP_BTTDM_ITER);
 474         rv_writel((val | 0x2), adata->acp3x_base + mmACP_BTTDM_ITER);
 475         val = rv_readl(adata->acp3x_base + mmACP_BTTDM_IRER);
 476         rv_writel((val | 0x2), adata->acp3x_base + mmACP_BTTDM_IRER);
 477
 478         val = (FRM_LEN | (slots << 15) | (slot_len << 18));
 479         rv_writel(val, adata->acp3x_base + mmACP_BTTDM_TXFRMT);
 480         rv_writel(val, adata->acp3x_base + mmACP_BTTDM_RXFRMT);
 481
 482         adata->tdm_fmt = val;
 483         return 0;
 484 }
 485
 486 static int acp3x_dai_i2s_hwparams(struct snd_pcm_substream *substream,
 487                                   struct snd_pcm_hw_params *params,
 488                                   struct snd_soc_dai *dai)
 489 {
 490         u32 val = 0;
 491         struct i2s_stream_instance *rtd = substream->runtime->private_data;
 492
 493         switch (params_format(params)) {
 494         case SNDRV_PCM_FORMAT_U8:
 495         case SNDRV_PCM_FORMAT_S8:
 496                 rtd->xfer_resolution = 0x0;
 497                 break;
 498         case SNDRV_PCM_FORMAT_S16_LE:
 499                 rtd->xfer_resolution = 0x02;
 500                 break;
 501         case SNDRV_PCM_FORMAT_S24_LE:
 502                 rtd->xfer_resolution = 0x04;
 503                 break;
 504         case SNDRV_PCM_FORMAT_S32_LE:
 505                 rtd->xfer_resolution = 0x05;
 506                 break;
 507         default:
 508                 return -EINVAL;
 509         }
 510         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
 511         val = val | (rtd->xfer_resolution  << 3);
 512         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 513                 rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
 514         else
 515                 rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
 516
 517         return 0;
 518 }
 519
 520 static int acp3x_dai_i2s_trigger(struct snd_pcm_substream *substream,
 521                                  int cmd, struct snd_soc_dai *dai)
 522 {
 523         int ret = 0;
 524         struct i2s_stream_instance *rtd = substream->runtime->private_data;
 525         u32 val, period_bytes;
 526
 527         period_bytes = frames_to_bytes(substream->runtime,
 528                                        substream->runtime->period_size);
 529         switch (cmd) {
 530         case SNDRV_PCM_TRIGGER_START:
 531         case SNDRV_PCM_TRIGGER_RESUME:
 532         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 533                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 534                         rv_writel(period_bytes, rtd->acp3x_base +
 535                                   mmACP_BT_TX_INTR_WATERMARK_SIZE);
 536                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
 537                         val = val | BIT(0);
 538                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
 539                 } else {
 540                         rv_writel(period_bytes, rtd->acp3x_base +
 541                                   mmACP_BT_RX_INTR_WATERMARK_SIZE);
 542                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER);
 543                         val = val | BIT(0);
 544                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
 545                 }
 546                 rv_writel(1, rtd->acp3x_base + mmACP_BTTDM_IER);
 547                 break;
 548         case SNDRV_PCM_TRIGGER_STOP:
 549         case SNDRV_PCM_TRIGGER_SUSPEND:
 550         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 551                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 552                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
 553                         val = val & ~BIT(0);
 554                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
 555                 } else {
 556                         val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER);
 557                         val = val & ~BIT(0);
 558                         rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
 559                 }
 560                 rv_writel(0, rtd->acp3x_base + mmACP_BTTDM_IER);
 561                 break;
 562         default:
 563                 ret = -EINVAL;
 564                 break;
 565         }
 566
 567         return ret;
 568 }
 569
 570 struct snd_soc_dai_ops acp3x_dai_i2s_ops = {
 571         .hw_params = acp3x_dai_i2s_hwparams,
 572         .trigger   = acp3x_dai_i2s_trigger,
 573         .set_fmt = acp3x_dai_i2s_set_fmt,
 574         .set_tdm_slot = acp3x_dai_set_tdm_slot,
 575 };
 576
 577 static struct snd_soc_dai_driver acp3x_i2s_dai_driver = {
 578         .playback = {
 579                 .rates = SNDRV_PCM_RATE_8000_96000,
 580                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
 581                                         SNDRV_PCM_FMTBIT_U8 |
 582                                         SNDRV_PCM_FMTBIT_S24_LE |
 583                                         SNDRV_PCM_FMTBIT_S32_LE,
 584                 .channels_min = 2,
 585                 .channels_max = 8,
 586
 587                 .rate_min = 8000,
 588                 .rate_max = 96000,
 589         },
 590         .capture = {
 591                 .rates = SNDRV_PCM_RATE_8000_48000,
 592                 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
 593                                         SNDRV_PCM_FMTBIT_U8 |
 594                                         SNDRV_PCM_FMTBIT_S24_LE |
 595                                         SNDRV_PCM_FMTBIT_S32_LE,
 596                 .channels_min = 2,
 597                 .channels_max = 2,
 598                 .rate_min = 8000,
 599                 .rate_max = 48000,
 600         },
 601         .ops = &acp3x_dai_i2s_ops,
 602 };
 603
 604 static const struct snd_soc_component_driver acp3x_i2s_component = {
 605         .name           = DRV_NAME,
 606         .ops            = &acp3x_dma_ops,
 607         .pcm_new        = acp3x_dma_new,
 608 };
 609
 610 static int acp3x_audio_probe(struct platform_device *pdev)
 611 {
 612         int status;
 613         struct resource *res;
 614         struct i2s_dev_data *adata;
 615         unsigned int irqflags;
 616
 617         if (!pdev->dev.platform_data) {
 618                 dev_err(&pdev->dev, "platform_data not retrieved\n");
 619                 return -ENODEV;
 620         }
 621         irqflags = *((unsigned int *)(pdev->dev.platform_data));
 622
 623         adata = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dev_data),
 624                              GFP_KERNEL);
 625         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 626         if (!res) {
 627                 dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
 628                         return -ENODEV;
 629         }
 630
 631         adata->acp3x_base = devm_ioremap(&pdev->dev, res->start,
 632                                          resource_size(res));
 633
 634         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 635         if (!res) {
 636                 dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
 637                 return -ENODEV;
 638         }
 639
 640         adata->i2s_irq = res->start;
 641         adata->play_stream = NULL;
 642         adata->capture_stream = NULL;
 643
 644         dev_set_drvdata(&pdev->dev, adata);
 645         /* Initialize ACP */
 646         status = acp3x_init(adata->acp3x_base);
 647         if (status)
 648                 return -ENODEV;
 649         status = devm_snd_soc_register_component(&pdev->dev,
 650                                                  &acp3x_i2s_component,
 651                                                  &acp3x_i2s_dai_driver, 1);
 652         if (status) {
 653                 dev_err(&pdev->dev, "Fail to register acp i2s dai\n");
 654                 goto dev_err;
 655         }
 656         status = devm_request_irq(&pdev->dev, adata->i2s_irq, i2s_irq_handler,
 657                                   irqflags, "ACP3x_I2S_IRQ", adata);
 658         if (status) {
 659                 dev_err(&pdev->dev, "ACP3x I2S IRQ request failed\n");
 660                 goto dev_err;
 661         }
 662
 663         return 0;
 664 dev_err:
 665         status = acp3x_deinit(adata->acp3x_base);
 666         if (status)
 667                 dev_err(&pdev->dev, "ACP de-init failed\n");
 668         else
 669                 dev_info(&pdev->dev, "ACP de-initialized\n");
 670         /*ignore device status and return driver probe error*/
 671         return -ENODEV;
 672 }
 673
 674 static int acp3x_audio_remove(struct platform_device *pdev)
 675 {
 676         int ret;
 677         struct i2s_dev_data *adata = dev_get_drvdata(&pdev->dev);
 678
 679         ret = acp3x_deinit(adata->acp3x_base);
 680         if (ret)
 681                 dev_err(&pdev->dev, "ACP de-init failed\n");
 682         else
 683                 dev_info(&pdev->dev, "ACP de-initialized\n");
 684
 685         return 0;
 686 }
 687
 688 static struct platform_driver acp3x_dma_driver = {
 689         .probe = acp3x_audio_probe,
 690         .remove = acp3x_audio_remove,
 691         .driver = {
 692                 .name = "acp3x_rv_i2s",
 693         },
 694 };
 695
 696 module_platform_driver(acp3x_dma_driver);
 697
 698 MODULE_AUTHOR("Maruthi.Bayyavarapu@amd.com");
 699 MODULE_AUTHOR("Vijendar.Mukunda@amd.com");
 700 MODULE_DESCRIPTION("AMD ACP 3.x PCM Driver");
 701 MODULE_LICENSE("GPL v2");
 702 MODULE_ALIAS("platform:" DRV_NAME);