sound/pci/cs46xx/dsp_spos.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  15  *
  16  */
  17
  18 /*
  19  * 2002-07 Benny Sjostrand benny@hostmobility.com
  20  */
  21
  22
  23 #include <sound/driver.h>
  24 #include <asm/io.h>
  25 #include <linux/delay.h>
  26 #include <linux/pm.h>
  27 #include <linux/init.h>
  28 #include <linux/slab.h>
  29 #include <linux/vmalloc.h>
  30 #include <linux/mutex.h>
  31
  32 #include <sound/core.h>
  33 #include <sound/control.h>
  34 #include <sound/info.h>
  35 #include <sound/asoundef.h>
  36 #include <sound/cs46xx.h>
  37
  38 #include "cs46xx_lib.h"
  39 #include "dsp_spos.h"
  40
  41 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
  42                                   struct dsp_scb_descriptor * fg_entry);
  43
  44 static enum wide_opcode wide_opcodes[] = {
  45         WIDE_FOR_BEGIN_LOOP,
  46         WIDE_FOR_BEGIN_LOOP2,
  47         WIDE_COND_GOTO_ADDR,
  48         WIDE_COND_GOTO_CALL,
  49         WIDE_TBEQ_COND_GOTO_ADDR,
  50         WIDE_TBEQ_COND_CALL_ADDR,
  51         WIDE_TBEQ_NCOND_GOTO_ADDR,
  52         WIDE_TBEQ_NCOND_CALL_ADDR,
  53         WIDE_TBEQ_COND_GOTO1_ADDR,
  54         WIDE_TBEQ_COND_CALL1_ADDR,
  55         WIDE_TBEQ_NCOND_GOTOI_ADDR,
  56         WIDE_TBEQ_NCOND_CALL1_ADDR
  57 };
  58
  59 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
  60                                        u32 overlay_begin_address)
  61 {
  62         unsigned int i = 0, j, nreallocated = 0;
  63         u32 hival,loval,address;
  64         u32 mop_operands,mop_type,wide_op;
  65         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
  66
  67         snd_assert( ((size % 2) == 0), return -EINVAL);
  68
  69         while (i < size) {
  70                 loval = data[i++];
  71                 hival = data[i++];
  72
  73                 if (ins->code.offset > 0) {
  74                         mop_operands = (hival >> 6) & 0x03fff;
  75                         mop_type = mop_operands >> 10;
  76
  77                         /* check for wide type instruction */
  78                         if (mop_type == 0 &&
  79                             (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
  80                             (mop_operands & WIDE_INSTR_MASK) != 0) {
  81                                 wide_op = loval & 0x7f;
  82                                 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
  83                                         if (wide_opcodes[j] == wide_op) {
  84                                                 /* need to reallocate instruction */
  85                                                 address  = (hival & 0x00FFF) << 5;
  86                                                 address |=  loval >> 15;
  87
  88                                                 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
  89
  90                                                 if ( !(address & 0x8000) ) {
  91                                                         address += (ins->code.offset / 2) - overlay_begin_address;
  92                                                 } else {
  93                                                         snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
  94                                                 }
  95
  96                                                 hival &= 0xFF000;
  97                                                 loval &= 0x07FFF;
  98
  99                                                 hival |= ( (address >> 5)  & 0x00FFF);
 100                                                 loval |= ( (address << 15) & 0xF8000);
 101
 102                                                 address  = (hival & 0x00FFF) << 5;
 103                                                 address |=  loval >> 15;
 104
 105                                                 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);
 106                                                 nreallocated ++;
 107                                         } /* wide_opcodes[j] == wide_op */
 108                                 } /* for */
 109                         } /* mod_type == 0 ... */
 110                 } /* ins->code.offset > 0 */
 111
 112                 ins->code.data[ins->code.size++] = loval;
 113                 ins->code.data[ins->code.size++] = hival;
 114         }
 115
 116         snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
 117         return nreallocated;
 118 }
 119
 120 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
 121 {
 122         int i;
 123         for (i = 0;i < module->nsegments; ++i) {
 124                 if (module->segments[i].segment_type == seg_type) {
 125                         return (module->segments + i);
 126                 }
 127         }
 128
 129         return NULL;
 130 };
 131
 132 static int find_free_symbol_index (struct dsp_spos_instance * ins)
 133 {
 134         int index = ins->symbol_table.nsymbols,i;
 135
 136         for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
 137                 if (ins->symbol_table.symbols[i].deleted) {
 138                         index = i;
 139                         break;
 140                 }
 141         }
 142
 143         return index;
 144 }
 145
 146 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 147 {
 148         int i;
 149         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 150
 151         if (module->symbol_table.nsymbols > 0) {
 152                 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
 153                     module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
 154                         module->overlay_begin_address = module->symbol_table.symbols[0].address;
 155                 }
 156         }
 157
 158         for (i = 0;i < module->symbol_table.nsymbols; ++i) {
 159                 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 160                         snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 161                         return -ENOMEM;
 162                 }
 163
 164
 165                 if (cs46xx_dsp_lookup_symbol(chip,
 166                                              module->symbol_table.symbols[i].symbol_name,
 167                                              module->symbol_table.symbols[i].symbol_type) == NULL) {
 168
 169                         ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
 170                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
 171                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
 172                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
 173
 174                         if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
 175                                 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
 176
 177                         ins->symbol_table.nsymbols++;
 178                 } else {
 179           /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
 180                              module->symbol_table.symbols[i].symbol_name); */
 181                 }
 182         }
 183
 184         return 0;
 185 }
 186
 187 static struct dsp_symbol_entry *
 188 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
 189 {
 190         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 191         struct dsp_symbol_entry * symbol = NULL;
 192         int index;
 193
 194         if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 195                 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 196                 return NULL;
 197         }
 198
 199         if (cs46xx_dsp_lookup_symbol(chip,
 200                                      symbol_name,
 201                                      type) != NULL) {
 202                 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
 203                 return NULL;
 204         }
 205
 206         index = find_free_symbol_index (ins);
 207
 208         strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
 209         ins->symbol_table.symbols[index].address = address;
 210         ins->symbol_table.symbols[index].symbol_type = type;
 211         ins->symbol_table.symbols[index].module = NULL;
 212         ins->symbol_table.symbols[index].deleted = 0;
 213         symbol = (ins->symbol_table.symbols + index);
 214
 215         if (index > ins->symbol_table.highest_frag_index)
 216                 ins->symbol_table.highest_frag_index = index;
 217
 218         if (index == ins->symbol_table.nsymbols)
 219                 ins->symbol_table.nsymbols++; /* no frag. in list */
 220
 221         return symbol;
 222 }
 223
 224 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
 225 {
 226         struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
 227
 228         if (ins == NULL)
 229                 return NULL;
 230
 231         /* better to use vmalloc for this big table */
 232         ins->symbol_table.nsymbols = 0;
 233         ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
 234                                             DSP_MAX_SYMBOLS);
 235         ins->symbol_table.highest_frag_index = 0;
 236
 237         if (ins->symbol_table.symbols == NULL) {
 238                 cs46xx_dsp_spos_destroy(chip);
 239                 goto error;
 240         }
 241
 242         ins->code.offset = 0;
 243         ins->code.size = 0;
 244         ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
 245
 246         if (ins->code.data == NULL) {
 247                 cs46xx_dsp_spos_destroy(chip);
 248                 goto error;
 249         }
 250
 251         ins->nscb = 0;
 252         ins->ntask = 0;
 253
 254         ins->nmodules = 0;
 255         ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
 256
 257         if (ins->modules == NULL) {
 258                 cs46xx_dsp_spos_destroy(chip);
 259                 goto error;
 260         }
 261
 262         /* default SPDIF input sample rate
 263            to 48000 khz */
 264         ins->spdif_in_sample_rate = 48000;
 265
 266         /* maximize volume */
 267         ins->dac_volume_right = 0x8000;
 268         ins->dac_volume_left = 0x8000;
 269         ins->spdif_input_volume_right = 0x8000;
 270         ins->spdif_input_volume_left = 0x8000;
 271
 272         /* set left and right validity bits and
 273            default channel status */
 274         ins->spdif_csuv_default =
 275                 ins->spdif_csuv_stream =
 276          /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
 277          /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
 278          /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
 279          /* left and right validity bits */ (1 << 13) | (1 << 12);
 280
 281         return ins;
 282
 283 error:
 284         kfree(ins);
 285         return NULL;
 286 }
 287
 288 void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
 289 {
 290         int i;
 291         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 292
 293         snd_assert(ins != NULL, return);
 294
 295         mutex_lock(&chip->spos_mutex);
 296         for (i = 0; i < ins->nscb; ++i) {
 297                 if (ins->scbs[i].deleted) continue;
 298
 299                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 300         }
 301
 302         kfree(ins->code.data);
 303         vfree(ins->symbol_table.symbols);
 304         kfree(ins->modules);
 305         kfree(ins);
 306         mutex_unlock(&chip->spos_mutex);
 307 }
 308
 309 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 310 {
 311         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 312         struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
 313         struct dsp_segment_desc * parameter = get_segment_desc (module,SEGTYPE_SP_PARAMETER);
 314         struct dsp_segment_desc * sample = get_segment_desc (module,SEGTYPE_SP_SAMPLE);
 315         u32 doffset, dsize;
 316
 317         if (ins->nmodules == DSP_MAX_MODULES - 1) {
 318                 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
 319                 return -ENOMEM;
 320         }
 321
 322         snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
 323
 324         if (ins->nmodules == 0) {
 325                 snd_printdd("dsp_spos: clearing parameter area\n");
 326                 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
 327         }
 328
 329         if (parameter == NULL) {
 330                 snd_printdd("dsp_spos: module got no parameter segment\n");
 331         } else {
 332                 if (ins->nmodules > 0) {
 333                         snd_printk(KERN_WARNING "dsp_spos: WARNING current parameter data may be overwriten!\n");
 334                 }
 335
 336                 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
 337                 dsize   = parameter->size * 4;
 338
 339                 snd_printdd("dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
 340                             doffset,doffset + dsize);
 341
 342                 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
 343                         snd_printk(KERN_ERR "dsp_spos: failed to download parameter data to DSP\n");
 344                         return -EINVAL;
 345                 }
 346         }
 347
 348         if (ins->nmodules == 0) {
 349                 snd_printdd("dsp_spos: clearing sample area\n");
 350                 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
 351         }
 352
 353         if (sample == NULL) {
 354                 snd_printdd("dsp_spos: module got no sample segment\n");
 355         } else {
 356                 if (ins->nmodules > 0) {
 357                         snd_printk(KERN_WARNING "dsp_spos: WARNING current sample data may be overwriten\n");
 358                 }
 359
 360                 doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
 361                 dsize   =  sample->size * 4;
 362
 363                 snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
 364                             doffset,doffset + dsize);
 365
 366                 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
 367                         snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
 368                         return -EINVAL;
 369                 }
 370         }
 371
 372
 373         if (ins->nmodules == 0) {
 374                 snd_printdd("dsp_spos: clearing code area\n");
 375                 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
 376         }
 377
 378         if (code == NULL) {
 379                 snd_printdd("dsp_spos: module got no code segment\n");
 380         } else {
 381                 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
 382                         snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
 383                         return -ENOMEM;
 384                 }
 385
 386                 module->load_address = ins->code.offset;
 387                 module->overlay_begin_address = 0x000;
 388
 389                 /* if module has a code segment it must have
 390                    symbol table */
 391                 snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM);
 392                 if (add_symbols(chip,module)) {
 393                         snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
 394                         return -ENOMEM;
 395                 }
 396
 397                 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
 398                 dsize   = code->size * 4;
 399                 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
 400                             doffset,doffset + dsize);
 401
 402                 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
 403
 404                 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
 405                         snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
 406                         return -EINVAL;
 407                 }
 408
 409                 ins->code.offset += code->size;
 410         }
 411
 412         /* NOTE: module segments and symbol table must be
 413            statically allocated. Case that module data is
 414            not generated by the ospparser */
 415         ins->modules[ins->nmodules] = *module;
 416         ins->nmodules++;
 417
 418         return 0;
 419 }
 420
 421 struct dsp_symbol_entry *
 422 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
 423 {
 424         int i;
 425         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 426
 427         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 428
 429                 if (ins->symbol_table.symbols[i].deleted)
 430                         continue;
 431
 432                 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
 433                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 434                         return (ins->symbol_table.symbols + i);
 435                 }
 436         }
 437
 438 #if 0
 439         printk ("dsp_spos: symbol <%s> type %02x not found\n",
 440                 symbol_name,symbol_type);
 441 #endif
 442
 443         return NULL;
 444 }
 445
 446
 447 #ifdef CONFIG_PROC_FS
 448 static struct dsp_symbol_entry *
 449 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
 450 {
 451         int i;
 452         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 453
 454         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 455
 456                 if (ins->symbol_table.symbols[i].deleted)
 457                         continue;
 458
 459                 if (ins->symbol_table.symbols[i].address == address &&
 460                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 461                         return (ins->symbol_table.symbols + i);
 462                 }
 463         }
 464
 465
 466         return NULL;
 467 }
 468
 469
 470 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
 471                                                struct snd_info_buffer *buffer)
 472 {
 473         struct snd_cs46xx *chip = entry->private_data;
 474         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 475         int i;
 476
 477         snd_iprintf(buffer, "SYMBOLS:\n");
 478         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 479                 char *module_str = "system";
 480
 481                 if (ins->symbol_table.symbols[i].deleted)
 482                         continue;
 483
 484                 if (ins->symbol_table.symbols[i].module != NULL) {
 485                         module_str = ins->symbol_table.symbols[i].module->module_name;
 486                 }
 487
 488
 489                 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
 490                             ins->symbol_table.symbols[i].address,
 491                             ins->symbol_table.symbols[i].symbol_type,
 492                             ins->symbol_table.symbols[i].symbol_name,
 493                             module_str);
 494         }
 495 }
 496
 497
 498 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
 499                                           struct snd_info_buffer *buffer)
 500 {
 501         struct snd_cs46xx *chip = entry->private_data;
 502         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 503         int i,j;
 504
 505         mutex_lock(&chip->spos_mutex);
 506         snd_iprintf(buffer, "MODULES:\n");
 507         for ( i = 0; i < ins->nmodules; ++i ) {
 508                 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
 509                 snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
 510                 snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
 511
 512                 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
 513                         struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
 514                         snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
 515                                     desc->segment_type,desc->offset, desc->size);
 516                 }
 517         }
 518         mutex_unlock(&chip->spos_mutex);
 519 }
 520
 521 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
 522                                             struct snd_info_buffer *buffer)
 523 {
 524         struct snd_cs46xx *chip = entry->private_data;
 525         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 526         int i, j, col;
 527         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 528
 529         mutex_lock(&chip->spos_mutex);
 530         snd_iprintf(buffer, "TASK TREES:\n");
 531         for ( i = 0; i < ins->ntask; ++i) {
 532                 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
 533
 534                 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
 535                         u32 val;
 536                         if (col == 4) {
 537                                 snd_iprintf(buffer,"\n");
 538                                 col = 0;
 539                         }
 540                         val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
 541                         snd_iprintf(buffer,"%08x ",val);
 542                 }
 543         }
 544
 545         snd_iprintf(buffer,"\n");
 546         mutex_unlock(&chip->spos_mutex);
 547 }
 548
 549 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
 550                                       struct snd_info_buffer *buffer)
 551 {
 552         struct snd_cs46xx *chip = entry->private_data;
 553         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 554         int i;
 555
 556         mutex_lock(&chip->spos_mutex);
 557         snd_iprintf(buffer, "SCB's:\n");
 558         for ( i = 0; i < ins->nscb; ++i) {
 559                 if (ins->scbs[i].deleted)
 560                         continue;
 561                 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
 562
 563                 if (ins->scbs[i].parent_scb_ptr != NULL) {
 564                         snd_iprintf(buffer,"parent [%s:%04x] ",
 565                                     ins->scbs[i].parent_scb_ptr->scb_name,
 566                                     ins->scbs[i].parent_scb_ptr->address);
 567                 } else snd_iprintf(buffer,"parent [none] ");
 568
 569                 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
 570                             ins->scbs[i].sub_list_ptr->scb_name,
 571                             ins->scbs[i].sub_list_ptr->address,
 572                             ins->scbs[i].next_scb_ptr->scb_name,
 573                             ins->scbs[i].next_scb_ptr->address,
 574                             ins->scbs[i].task_entry->symbol_name,
 575                             ins->scbs[i].task_entry->address);
 576         }
 577
 578         snd_iprintf(buffer,"\n");
 579         mutex_unlock(&chip->spos_mutex);
 580 }
 581
 582 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
 583                                                  struct snd_info_buffer *buffer)
 584 {
 585         struct snd_cs46xx *chip = entry->private_data;
 586         /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
 587         unsigned int i, col = 0;
 588         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 589         struct dsp_symbol_entry * symbol;
 590
 591         for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
 592                 if (col == 4) {
 593                         snd_iprintf(buffer,"\n");
 594                         col = 0;
 595                 }
 596
 597                 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
 598                         col = 0;
 599                         snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
 600                 }
 601
 602                 if (col == 0) {
 603                         snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
 604                 }
 605
 606                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 607         }
 608 }
 609
 610 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
 611                                               struct snd_info_buffer *buffer)
 612 {
 613         struct snd_cs46xx *chip = entry->private_data;
 614         int i,col = 0;
 615         void __iomem *dst = chip->region.idx[2].remap_addr;
 616
 617         snd_iprintf(buffer,"PCMREADER:\n");
 618         for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
 619                 if (col == 4) {
 620                         snd_iprintf(buffer,"\n");
 621                         col = 0;
 622                 }
 623
 624                 if (col == 0) {
 625                         snd_iprintf(buffer, "%04X ",i);
 626                 }
 627
 628                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 629         }
 630
 631         snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
 632
 633         col = 0;
 634         for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
 635                 if (col == 4) {
 636                         snd_iprintf(buffer,"\n");
 637                         col = 0;
 638                 }
 639
 640                 if (col == 0) {
 641                         snd_iprintf(buffer, "%04X ",i);
 642                 }
 643
 644                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 645         }
 646
 647         snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
 648         col = 0;
 649         for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
 650                 if (col == 4) {
 651                         snd_iprintf(buffer,"\n");
 652                         col = 0;
 653                 }
 654
 655                 if (col == 0) {
 656                         snd_iprintf(buffer, "%04X ",i);
 657                 }
 658
 659                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 660         }
 661
 662
 663         snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
 664         col = 0;
 665         for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
 666                 if (col == 4) {
 667                         snd_iprintf(buffer,"\n");
 668                         col = 0;
 669                 }
 670
 671                 if (col == 0) {
 672                         snd_iprintf(buffer, "%04X ",i);
 673                 }
 674
 675                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 676         }
 677
 678         snd_iprintf(buffer,"\n...\n");
 679         col = 0;
 680
 681         for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
 682                 if (col == 4) {
 683                         snd_iprintf(buffer,"\n");
 684                         col = 0;
 685                 }
 686
 687                 if (col == 0) {
 688                         snd_iprintf(buffer, "%04X ",i);
 689                 }
 690
 691                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 692         }
 693
 694
 695         snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
 696         col = 0;
 697         for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
 698                 if (col == 4) {
 699                         snd_iprintf(buffer,"\n");
 700                         col = 0;
 701                 }
 702
 703                 if (col == 0) {
 704                         snd_iprintf(buffer, "%04X ",i);
 705                 }
 706
 707                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 708         }
 709
 710         snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
 711         col = 0;
 712         for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
 713                 if (col == 4) {
 714                         snd_iprintf(buffer,"\n");
 715                         col = 0;
 716                 }
 717
 718                 if (col == 0) {
 719                         snd_iprintf(buffer, "%04X ",i);
 720                 }
 721
 722                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 723         }
 724 #if 0
 725         snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
 726         col = 0;
 727         for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
 728                 if (col == 4) {
 729                         snd_iprintf(buffer,"\n");
 730                         col = 0;
 731                 }
 732
 733                 if (col == 0) {
 734                         snd_iprintf(buffer, "%04X ",i);
 735                 }
 736
 737                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 738         }
 739 #endif
 740
 741         snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
 742         col = 0;
 743         for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
 744                 if (col == 4) {
 745                         snd_iprintf(buffer,"\n");
 746                         col = 0;
 747                 }
 748
 749                 if (col == 0) {
 750                         snd_iprintf(buffer, "%04X ",i);
 751                 }
 752
 753                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 754         }
 755         snd_iprintf(buffer,"\n");
 756 }
 757
 758 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
 759 {
 760         struct snd_info_entry *entry;
 761         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 762         int i;
 763
 764         ins->snd_card = card;
 765
 766         if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
 767                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 768                 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
 769
 770                 if (snd_info_register(entry) < 0) {
 771                         snd_info_free_entry(entry);
 772                         entry = NULL;
 773                 }
 774         }
 775
 776         ins->proc_dsp_dir = entry;
 777
 778         if (!ins->proc_dsp_dir)
 779                 return -ENOMEM;
 780
 781         if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
 782                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 783                 entry->private_data = chip;
 784                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 785                 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
 786                 if (snd_info_register(entry) < 0) {
 787                         snd_info_free_entry(entry);
 788                         entry = NULL;
 789                 }
 790         }
 791         ins->proc_sym_info_entry = entry;
 792
 793         if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
 794                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 795                 entry->private_data = chip;
 796                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 797                 entry->c.text.read = cs46xx_dsp_proc_modules_read;
 798                 if (snd_info_register(entry) < 0) {
 799                         snd_info_free_entry(entry);
 800                         entry = NULL;
 801                 }
 802         }
 803         ins->proc_modules_info_entry = entry;
 804
 805         if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
 806                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 807                 entry->private_data = chip;
 808                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 809                 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
 810                 if (snd_info_register(entry) < 0) {
 811                         snd_info_free_entry(entry);
 812                         entry = NULL;
 813                 }
 814         }
 815         ins->proc_parameter_dump_info_entry = entry;
 816
 817         if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
 818                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 819                 entry->private_data = chip;
 820                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 821                 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
 822                 if (snd_info_register(entry) < 0) {
 823                         snd_info_free_entry(entry);
 824                         entry = NULL;
 825                 }
 826         }
 827         ins->proc_sample_dump_info_entry = entry;
 828
 829         if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
 830                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 831                 entry->private_data = chip;
 832                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 833                 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
 834                 if (snd_info_register(entry) < 0) {
 835                         snd_info_free_entry(entry);
 836                         entry = NULL;
 837                 }
 838         }
 839         ins->proc_task_info_entry = entry;
 840
 841         if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
 842                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 843                 entry->private_data = chip;
 844                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 845                 entry->c.text.read = cs46xx_dsp_proc_scb_read;
 846                 if (snd_info_register(entry) < 0) {
 847                         snd_info_free_entry(entry);
 848                         entry = NULL;
 849                 }
 850         }
 851         ins->proc_scb_info_entry = entry;
 852
 853         mutex_lock(&chip->spos_mutex);
 854         /* register/update SCB's entries on proc */
 855         for (i = 0; i < ins->nscb; ++i) {
 856                 if (ins->scbs[i].deleted) continue;
 857
 858                 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
 859         }
 860         mutex_unlock(&chip->spos_mutex);
 861
 862         return 0;
 863 }
 864
 865 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
 866 {
 867         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 868         int i;
 869
 870         snd_info_free_entry(ins->proc_sym_info_entry);
 871         ins->proc_sym_info_entry = NULL;
 872
 873         snd_info_free_entry(ins->proc_modules_info_entry);
 874         ins->proc_modules_info_entry = NULL;
 875
 876         snd_info_free_entry(ins->proc_parameter_dump_info_entry);
 877         ins->proc_parameter_dump_info_entry = NULL;
 878
 879         snd_info_free_entry(ins->proc_sample_dump_info_entry);
 880         ins->proc_sample_dump_info_entry = NULL;
 881
 882         snd_info_free_entry(ins->proc_scb_info_entry);
 883         ins->proc_scb_info_entry = NULL;
 884
 885         snd_info_free_entry(ins->proc_task_info_entry);
 886         ins->proc_task_info_entry = NULL;
 887
 888         mutex_lock(&chip->spos_mutex);
 889         for (i = 0; i < ins->nscb; ++i) {
 890                 if (ins->scbs[i].deleted) continue;
 891                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 892         }
 893         mutex_unlock(&chip->spos_mutex);
 894
 895         snd_info_free_entry(ins->proc_dsp_dir);
 896         ins->proc_dsp_dir = NULL;
 897
 898         return 0;
 899 }
 900 #endif /* CONFIG_PROC_FS */
 901
 902 static int debug_tree;
 903 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
 904                                    u32  dest, int size)
 905 {
 906         void __iomem *spdst = chip->region.idx[1].remap_addr +
 907                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 908         int i;
 909
 910         for (i = 0; i < size; ++i) {
 911                 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
 912                 writel(task_data[i],spdst);
 913                 spdst += sizeof(u32);
 914         }
 915 }
 916
 917 static int debug_scb;
 918 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
 919 {
 920         void __iomem *spdst = chip->region.idx[1].remap_addr +
 921                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 922         int i;
 923
 924         for (i = 0; i < 0x10; ++i) {
 925                 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
 926                 writel(scb_data[i],spdst);
 927                 spdst += sizeof(u32);
 928         }
 929 }
 930
 931 static int find_free_scb_index (struct dsp_spos_instance * ins)
 932 {
 933         int index = ins->nscb, i;
 934
 935         for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
 936                 if (ins->scbs[i].deleted) {
 937                         index = i;
 938                         break;
 939                 }
 940         }
 941
 942         return index;
 943 }
 944
 945 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
 946 {
 947         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 948         struct dsp_scb_descriptor * desc = NULL;
 949         int index;
 950
 951         if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
 952                 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
 953                 return NULL;
 954         }
 955
 956         index = find_free_scb_index (ins);
 957
 958         strcpy(ins->scbs[index].scb_name, name);
 959         ins->scbs[index].address = dest;
 960         ins->scbs[index].index = index;
 961         ins->scbs[index].proc_info = NULL;
 962         ins->scbs[index].ref_count = 1;
 963         ins->scbs[index].deleted = 0;
 964         spin_lock_init(&ins->scbs[index].lock);
 965
 966         desc = (ins->scbs + index);
 967         ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
 968
 969         if (index > ins->scb_highest_frag_index)
 970                 ins->scb_highest_frag_index = index;
 971
 972         if (index == ins->nscb)
 973                 ins->nscb++;
 974
 975         return desc;
 976 }
 977
 978 static struct dsp_task_descriptor *
 979 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
 980 {
 981         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 982         struct dsp_task_descriptor * desc = NULL;
 983
 984         if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
 985                 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
 986                 return NULL;
 987         }
 988
 989         strcpy(ins->tasks[ins->ntask].task_name,name);
 990         ins->tasks[ins->ntask].address = dest;
 991         ins->tasks[ins->ntask].size = size;
 992
 993         /* quick find in list */
 994         ins->tasks[ins->ntask].index = ins->ntask;
 995         desc = (ins->tasks + ins->ntask);
 996         ins->ntask++;
 997
 998         add_symbol (chip,name,dest,SYMBOL_PARAMETER);
 999         return desc;
1000 }
1001
1002 struct dsp_scb_descriptor *
1003 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1004 {
1005         struct dsp_scb_descriptor * desc;
1006
1007         desc = _map_scb (chip,name,dest);
1008         if (desc) {
1009                 _dsp_create_scb(chip,scb_data,dest);
1010         } else {
1011                 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
1012         }
1013
1014         return desc;
1015 }
1016
1017
1018 static struct dsp_task_descriptor *
1019 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1020                              u32 dest, int size)
1021 {
1022         struct dsp_task_descriptor * desc;
1023
1024         desc = _map_task_tree (chip,name,dest,size);
1025         if (desc) {
1026                 _dsp_create_task_tree(chip,task_data,dest,size);
1027         } else {
1028                 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
1029         }
1030
1031         return desc;
1032 }
1033
1034 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1035 {
1036         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1037         struct dsp_symbol_entry * fg_task_tree_header_code;
1038         struct dsp_symbol_entry * task_tree_header_code;
1039         struct dsp_symbol_entry * task_tree_thread;
1040         struct dsp_symbol_entry * null_algorithm;
1041         struct dsp_symbol_entry * magic_snoop_task;
1042
1043         struct dsp_scb_descriptor * timing_master_scb;
1044         struct dsp_scb_descriptor * codec_out_scb;
1045         struct dsp_scb_descriptor * codec_in_scb;
1046         struct dsp_scb_descriptor * src_task_scb;
1047         struct dsp_scb_descriptor * master_mix_scb;
1048         struct dsp_scb_descriptor * rear_mix_scb;
1049         struct dsp_scb_descriptor * record_mix_scb;
1050         struct dsp_scb_descriptor * write_back_scb;
1051         struct dsp_scb_descriptor * vari_decimate_scb;
1052         struct dsp_scb_descriptor * rear_codec_out_scb;
1053         struct dsp_scb_descriptor * clfe_codec_out_scb;
1054         struct dsp_scb_descriptor * magic_snoop_scb;
1055
1056         int fifo_addr, fifo_span, valid_slots;
1057
1058         static struct dsp_spos_control_block sposcb = {
1059                 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1060                 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1061                 /* 2 */ DSP_SPOS_DC,0,
1062                 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1063                 /* 4 */ 0,0,
1064                 /* 5 */ DSP_SPOS_UU,0,
1065                 /* 6 */ FG_TASK_HEADER_ADDR,0,
1066                 /* 7 */ 0,0,
1067                 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1068                 /* 9 */ 0,
1069                 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1070                 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1071                 /* C */ DSP_SPOS_DC_DC,
1072                 /* D */ DSP_SPOS_DC_DC,
1073                 /* E */ DSP_SPOS_DC_DC,
1074                 /* F */ DSP_SPOS_DC_DC
1075         };
1076
1077         cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1078
1079         null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1080         if (null_algorithm == NULL) {
1081                 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
1082                 return -EIO;
1083         }
1084
1085         fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1086         if (fg_task_tree_header_code == NULL) {
1087                 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1088                 return -EIO;
1089         }
1090
1091         task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1092         if (task_tree_header_code == NULL) {
1093                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1094                 return -EIO;
1095         }
1096
1097         task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1098         if (task_tree_thread == NULL) {
1099                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
1100                 return -EIO;
1101         }
1102
1103         magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1104         if (magic_snoop_task == NULL) {
1105                 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1106                 return -EIO;
1107         }
1108
1109         {
1110                 /* create the null SCB */
1111                 static struct dsp_generic_scb null_scb = {
1112                         { 0, 0, 0, 0 },
1113                         { 0, 0, 0, 0, 0 },
1114                         NULL_SCB_ADDR, NULL_SCB_ADDR,
1115                         0, 0, 0, 0, 0,
1116                         {
1117                                 0,0,
1118                                 0,0,
1119                         }
1120                 };
1121
1122                 null_scb.entry_point = null_algorithm->address;
1123                 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1124                 ins->the_null_scb->task_entry = null_algorithm;
1125                 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1126                 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1127                 ins->the_null_scb->parent_scb_ptr = NULL;
1128                 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1129         }
1130
1131         {
1132                 /* setup foreground task tree */
1133                 static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
1134                         { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1135                           DSP_SPOS_DC_DC,
1136                           DSP_SPOS_DC_DC,
1137                           0x0000,DSP_SPOS_DC,
1138                           DSP_SPOS_DC, DSP_SPOS_DC,
1139                           DSP_SPOS_DC_DC,
1140                           DSP_SPOS_DC_DC,
1141                           DSP_SPOS_DC_DC,
1142                           DSP_SPOS_DC,DSP_SPOS_DC },
1143
1144                         {
1145                                 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1146                                 0,
1147                                 FG_TASK_HEADER_ADDR + TCBData,
1148                         },
1149
1150                         {
1151                                 4,0,
1152                                 1,0,
1153                                 2,SPOSCB_ADDR + HFGFlags,
1154                                 0,0,
1155                                 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1156                         },
1157
1158                         {
1159                                 DSP_SPOS_DC,0,
1160                                 DSP_SPOS_DC,DSP_SPOS_DC,
1161                                 DSP_SPOS_DC,DSP_SPOS_DC,
1162                                 DSP_SPOS_DC,DSP_SPOS_DC,
1163                                 DSP_SPOS_DC,DSP_SPOS_DC,
1164                                 DSP_SPOS_DCDC,
1165                                 DSP_SPOS_UU,1,
1166                                 DSP_SPOS_DCDC,
1167                                 DSP_SPOS_DCDC,
1168                                 DSP_SPOS_DCDC,
1169                                 DSP_SPOS_DCDC,
1170                                 DSP_SPOS_DCDC,
1171                                 DSP_SPOS_DCDC,
1172                                 DSP_SPOS_DCDC,
1173                                 DSP_SPOS_DCDC,
1174                                 DSP_SPOS_DCDC,
1175                                 DSP_SPOS_DCDC,
1176                                 DSP_SPOS_DCDC,
1177                                 DSP_SPOS_DCDC,
1178                                 DSP_SPOS_DCDC,
1179                                 DSP_SPOS_DCDC,
1180                                 DSP_SPOS_DCDC,
1181                                 DSP_SPOS_DCDC,
1182                                 DSP_SPOS_DCDC,
1183                                 DSP_SPOS_DCDC,
1184                                 DSP_SPOS_DCDC,
1185                                 DSP_SPOS_DCDC,
1186                                 DSP_SPOS_DCDC,
1187                                 DSP_SPOS_DCDC,
1188                                 DSP_SPOS_DCDC,
1189                                 DSP_SPOS_DCDC,
1190                                 DSP_SPOS_DCDC,
1191                                 DSP_SPOS_DCDC,
1192                                 DSP_SPOS_DCDC,
1193                                 DSP_SPOS_DCDC
1194                         },
1195                         {
1196                                 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1197                                 0,0
1198                         }
1199                 };
1200
1201                 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1202                 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1203                 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1204         }
1205
1206
1207         {
1208                 /* setup foreground task tree */
1209                 static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
1210                         { DSP_SPOS_DC_DC,
1211                           DSP_SPOS_DC_DC,
1212                           DSP_SPOS_DC_DC,
1213                           DSP_SPOS_DC, DSP_SPOS_DC,
1214                           DSP_SPOS_DC, DSP_SPOS_DC,
1215                           DSP_SPOS_DC_DC,
1216                           DSP_SPOS_DC_DC,
1217                           DSP_SPOS_DC_DC,
1218                           DSP_SPOS_DC,DSP_SPOS_DC },
1219
1220                         {
1221                                 NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
1222                                 0,
1223                                 BG_TREE_SCB_ADDR + TCBData,
1224                         },
1225
1226                         {
1227                                 9999,0,
1228                                 0,1,
1229                                 0,SPOSCB_ADDR + HFGFlags,
1230                                 0,0,
1231                                 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1232                         },
1233
1234                         {
1235                                 DSP_SPOS_DC,0,
1236                                 DSP_SPOS_DC,DSP_SPOS_DC,
1237                                 DSP_SPOS_DC,DSP_SPOS_DC,
1238                                 DSP_SPOS_DC,DSP_SPOS_DC,
1239                                 DSP_SPOS_DC,DSP_SPOS_DC,
1240                                 DSP_SPOS_DCDC,
1241                                 DSP_SPOS_UU,1,
1242                                 DSP_SPOS_DCDC,
1243                                 DSP_SPOS_DCDC,
1244                                 DSP_SPOS_DCDC,
1245                                 DSP_SPOS_DCDC,
1246                                 DSP_SPOS_DCDC,
1247                                 DSP_SPOS_DCDC,
1248                                 DSP_SPOS_DCDC,
1249                                 DSP_SPOS_DCDC,
1250                                 DSP_SPOS_DCDC,
1251                                 DSP_SPOS_DCDC,
1252                                 DSP_SPOS_DCDC,
1253                                 DSP_SPOS_DCDC,
1254                                 DSP_SPOS_DCDC,
1255                                 DSP_SPOS_DCDC,
1256                                 DSP_SPOS_DCDC,
1257                                 DSP_SPOS_DCDC,
1258                                 DSP_SPOS_DCDC,
1259                                 DSP_SPOS_DCDC,
1260                                 DSP_SPOS_DCDC,
1261                                 DSP_SPOS_DCDC,
1262                                 DSP_SPOS_DCDC,
1263                                 DSP_SPOS_DCDC,
1264                                 DSP_SPOS_DCDC,
1265                                 DSP_SPOS_DCDC,
1266                                 DSP_SPOS_DCDC,
1267                                 DSP_SPOS_DCDC,
1268                                 DSP_SPOS_DCDC,
1269                                 DSP_SPOS_DCDC
1270                         },
1271                         {
1272                                 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1273                                 0,0
1274                         }
1275                 };
1276
1277                 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1278                 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1279                 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1280         }
1281
1282         /* create timing master SCB */
1283         timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1284
1285         /* create the CODEC output task */
1286         codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1287                                                         MASTERMIX_SCB_ADDR,
1288                                                         CODECOUT_SCB_ADDR,timing_master_scb,
1289                                                         SCB_ON_PARENT_SUBLIST_SCB);
1290
1291         if (!codec_out_scb) goto _fail_end;
1292         /* create the master mix SCB */
1293         master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1294                                                         MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1295                                                         codec_out_scb,
1296                                                         SCB_ON_PARENT_SUBLIST_SCB);
1297         ins->master_mix_scb = master_mix_scb;
1298
1299         if (!master_mix_scb) goto _fail_end;
1300
1301         /* create codec in */
1302         codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1303                                                       CODEC_INPUT_BUF1,
1304                                                       CODECIN_SCB_ADDR,codec_out_scb,
1305                                                       SCB_ON_PARENT_NEXT_SCB);
1306         if (!codec_in_scb) goto _fail_end;
1307         ins->codec_in_scb = codec_in_scb;
1308
1309         /* create write back scb */
1310         write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1311                                                               WRITE_BACK_BUF1,WRITE_BACK_SPB,
1312                                                               WRITEBACK_SCB_ADDR,
1313                                                               timing_master_scb,
1314                                                               SCB_ON_PARENT_NEXT_SCB);
1315         if (!write_back_scb) goto _fail_end;
1316
1317         {
1318                 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1319                         0x00020000,
1320                         0x0000ffff
1321                 };
1322
1323                 /* dirty hack ... */
1324                 _dsp_create_task_tree (chip,(u32 *)&mix2_ostream_spb,WRITE_BACK_SPB,2);
1325         }
1326
1327         /* input sample converter */
1328         vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1329                                                                 VARI_DECIMATE_BUF0,
1330                                                                 VARI_DECIMATE_BUF1,
1331                                                                 VARIDECIMATE_SCB_ADDR,
1332                                                                 write_back_scb,
1333                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1334         if (!vari_decimate_scb) goto _fail_end;
1335
1336         /* create the record mixer SCB */
1337         record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1338                                                         MIX_SAMPLE_BUF2,
1339                                                         RECORD_MIXER_SCB_ADDR,
1340                                                         vari_decimate_scb,
1341                                                         SCB_ON_PARENT_SUBLIST_SCB);
1342         ins->record_mixer_scb = record_mix_scb;
1343
1344         if (!record_mix_scb) goto _fail_end;
1345
1346         valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1347
1348         snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2);
1349
1350         if (chip->nr_ac97_codecs == 1) {
1351                 /* output on slot 5 and 11
1352                    on primary CODEC */
1353                 fifo_addr = 0x20;
1354                 fifo_span = 0x60;
1355
1356                 /* enable slot 5 and 11 */
1357                 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1358         } else {
1359                 /* output on slot 7 and 8
1360                    on secondary CODEC */
1361                 fifo_addr = 0x40;
1362                 fifo_span = 0x10;
1363
1364                 /* enable slot 7 and 8 */
1365                 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1366         }
1367         /* create CODEC tasklet for rear speakers output*/
1368         rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1369                                                              REAR_MIXER_SCB_ADDR,
1370                                                              REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1371                                                              SCB_ON_PARENT_NEXT_SCB);
1372         if (!rear_codec_out_scb) goto _fail_end;
1373
1374
1375         /* create the rear PCM channel  mixer SCB */
1376         rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1377                                                       MIX_SAMPLE_BUF3,
1378                                                       REAR_MIXER_SCB_ADDR,
1379                                                       rear_codec_out_scb,
1380                                                       SCB_ON_PARENT_SUBLIST_SCB);
1381         ins->rear_mix_scb = rear_mix_scb;
1382         if (!rear_mix_scb) goto _fail_end;
1383
1384         if (chip->nr_ac97_codecs == 2) {
1385                 /* create CODEC tasklet for rear Center/LFE output
1386                    slot 6 and 9 on seconadry CODEC */
1387                 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1388                                                                      CLFE_MIXER_SCB_ADDR,
1389                                                                      CLFE_CODEC_SCB_ADDR,
1390                                                                      rear_codec_out_scb,
1391                                                                      SCB_ON_PARENT_NEXT_SCB);
1392                 if (!clfe_codec_out_scb) goto _fail_end;
1393
1394
1395                 /* create the rear PCM channel  mixer SCB */
1396                 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1397                                                                          MIX_SAMPLE_BUF4,
1398                                                                          CLFE_MIXER_SCB_ADDR,
1399                                                                          clfe_codec_out_scb,
1400                                                                          SCB_ON_PARENT_SUBLIST_SCB);
1401                 if (!ins->center_lfe_mix_scb) goto _fail_end;
1402
1403                 /* enable slot 6 and 9 */
1404                 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1405         } else {
1406                 clfe_codec_out_scb = rear_codec_out_scb;
1407                 ins->center_lfe_mix_scb = rear_mix_scb;
1408         }
1409
1410         /* enable slots depending on CODEC configuration */
1411         snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1412
1413         /* the magic snooper */
1414         magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1415                                                              OUTPUT_SNOOP_BUFFER,
1416                                                              codec_out_scb,
1417                                                              clfe_codec_out_scb,
1418                                                              SCB_ON_PARENT_NEXT_SCB);
1419
1420
1421         if (!magic_snoop_scb) goto _fail_end;
1422         ins->ref_snoop_scb = magic_snoop_scb;
1423
1424         /* SP IO access */
1425         if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1426                                               magic_snoop_scb,
1427                                               SCB_ON_PARENT_NEXT_SCB))
1428                 goto _fail_end;
1429
1430         /* SPDIF input sampel rate converter */
1431         src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1432                                                       ins->spdif_in_sample_rate,
1433                                                       SRC_OUTPUT_BUF1,
1434                                                       SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1435                                                       master_mix_scb,
1436                                                       SCB_ON_PARENT_SUBLIST_SCB,1);
1437
1438         if (!src_task_scb) goto _fail_end;
1439         cs46xx_src_unlink(chip,src_task_scb);
1440
1441         /* NOTE: when we now how to detect the SPDIF input
1442            sample rate we will use this SRC to adjust it */
1443         ins->spdif_in_src = src_task_scb;
1444
1445         cs46xx_dsp_async_init(chip,timing_master_scb);
1446         return 0;
1447
1448  _fail_end:
1449         snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
1450         return -EINVAL;
1451 }
1452
1453 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1454                                   struct dsp_scb_descriptor * fg_entry)
1455 {
1456         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1457         struct dsp_symbol_entry * s16_async_codec_input_task;
1458         struct dsp_symbol_entry * spdifo_task;
1459         struct dsp_symbol_entry * spdifi_task;
1460         struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1461
1462         s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1463         if (s16_async_codec_input_task == NULL) {
1464                 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1465                 return -EIO;
1466         }
1467         spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1468         if (spdifo_task == NULL) {
1469                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
1470                 return -EIO;
1471         }
1472
1473         spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1474         if (spdifi_task == NULL) {
1475                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
1476                 return -EIO;
1477         }
1478
1479         {
1480                 /* 0xBC0 */
1481                 struct dsp_spdifoscb spdifo_scb = {
1482                         /* 0 */ DSP_SPOS_UUUU,
1483                         {
1484                                 /* 1 */ 0xb0,
1485                                 /* 2 */ 0,
1486                                 /* 3 */ 0,
1487                                 /* 4 */ 0,
1488                         },
1489                         /* NOTE: the SPDIF output task read samples in mono
1490                            format, the AsynchFGTxSCB task writes to buffer
1491                            in stereo format
1492                         */
1493                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1494                         /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
1495                         /* 7 */ 0,0,
1496                         /* 8 */ 0,
1497                         /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1498                         /* A */ spdifo_task->address,
1499                         SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1500                         {
1501                                 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1502                                 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1503                         },
1504                         /* D */ 0x804c,0,                                                         /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1505                         /* E */ 0x0108,0x0001,                                    /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1506                         /* F */ DSP_SPOS_UUUU                                     /* SPDIFOFree; */
1507                 };
1508
1509                 /* 0xBB0 */
1510                 struct dsp_spdifiscb spdifi_scb = {
1511                         /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1512                         /* 1 */ 0,
1513                         /* 2 */ 0,
1514                         /* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */
1515                         /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1516                         /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1517                         /* 6 */ DSP_SPOS_UUUU,  /* Free3 */
1518                         /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
1519                         /* 8 */ DSP_SPOS_UUUU,  /* TempStatus */
1520                         /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1521                         /* A */ spdifi_task->address,
1522                         SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1523                         /* NOTE: The SPDIF input task write the sample in mono
1524                            format from the HW FIFO, the AsynchFGRxSCB task  reads
1525                            them in stereo
1526                         */
1527                         /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1528                         /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1529                         /* D */ 0x8048,0,
1530                         /* E */ 0x01f0,0x0001,
1531                         /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1532                 };
1533
1534                 /* 0xBA0 */
1535                 struct dsp_async_codec_input_scb async_codec_input_scb = {
1536                         /* 0 */ DSP_SPOS_UUUU,
1537                         /* 1 */ 0,
1538                         /* 2 */ 0,
1539                         /* 3 */ 1,4000,
1540                         /* 4 */ 0x0118,0x0001,
1541                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1542                         /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1543                         /* 7 */ DSP_SPOS_UU,0x3,
1544                         /* 8 */ DSP_SPOS_UUUU,
1545                         /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1546                         /* A */ s16_async_codec_input_task->address,
1547                         HFG_TREE_SCB + AsyncCIOFIFOPointer,
1548
1549                         /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1550                         /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1551
1552 #ifdef UseASER1Input
1553                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1554                            Init. 0000:8042: for ASER1
1555                            0000:8044: for ASER2 */
1556                         /* D */ 0x8042,0,
1557
1558                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1559                            Init 1 stero:8050 ASER1
1560                            Init 0  mono:8070 ASER2
1561                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1562                         /* E */ 0x0100,0x0001,
1563
1564 #endif
1565
1566 #ifdef UseASER2Input
1567                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1568                            Init. 0000:8042: for ASER1
1569                            0000:8044: for ASER2 */
1570                         /* D */ 0x8044,0,
1571
1572                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1573                            Init 1 stero:8050 ASER1
1574                            Init 0  mono:8070 ASER2
1575                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1576                         /* E */ 0x0110,0x0001,
1577
1578 #endif
1579
1580                         /* short AsyncCIOutputBufModulo:AsyncCIFree;
1581                            AsyncCIOutputBufModulo: The modulo size for
1582                            the output buffer of this task */
1583                         /* F */ 0, /* DSP_SPOS_UUUU */
1584                 };
1585
1586                 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1587
1588                 snd_assert(spdifo_scb_desc, return -EIO);
1589                 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1590                 snd_assert(spdifi_scb_desc, return -EIO);
1591                 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1592                 snd_assert(async_codec_scb_desc, return -EIO);
1593
1594                 async_codec_scb_desc->parent_scb_ptr = NULL;
1595                 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1596                 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1597                 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1598
1599                 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1600                 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1601                 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1602                 spdifi_scb_desc->task_entry = spdifi_task;
1603
1604                 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1605                 spdifo_scb_desc->next_scb_ptr = fg_entry;
1606                 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1607                 spdifo_scb_desc->task_entry = spdifo_task;
1608
1609                 /* this one is faked, as the parnet of SPDIFO task
1610                    is the FG task tree */
1611                 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1612
1613                 /* for proc fs */
1614                 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1615                 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1616                 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1617
1618                 /* Async MASTER ENABLE, affects both SPDIF input and output */
1619                 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1620         }
1621
1622         return 0;
1623 }
1624
1625
1626 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1627 {
1628         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1629
1630         /* set SPDIF output FIFO slot */
1631         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1632
1633         /* SPDIF output MASTER ENABLE */
1634         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1635
1636         /* right and left validate bit */
1637         /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1638         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1639
1640         /* clear fifo pointer */
1641         cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1642
1643         /* monitor state */
1644         ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1645 }
1646
1647 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1648 {
1649         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1650
1651         /* if hw-ctrl already enabled, turn off to reset logic ... */
1652         cs46xx_dsp_disable_spdif_hw (chip);
1653         udelay(50);
1654
1655         /* set SPDIF output FIFO slot */
1656         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1657
1658         /* SPDIF output MASTER ENABLE */
1659         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1660
1661         /* right and left validate bit */
1662         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1663
1664         /* monitor state */
1665         ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1666
1667         return 0;
1668 }
1669
1670 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1671 {
1672         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1673
1674         /* turn on amplifier */
1675         chip->active_ctrl(chip, 1);
1676         chip->amplifier_ctrl(chip, 1);
1677
1678         snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL);
1679         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1680
1681         mutex_lock(&chip->spos_mutex);
1682
1683         if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1684                 /* time countdown enable */
1685                 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1686                 /* NOTE: 80000005 value is just magic. With all values
1687                    that I've tested this one seem to give the best result.
1688                    Got no explication why. (Benny) */
1689
1690                 /* SPDIF input MASTER ENABLE */
1691                 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1692
1693                 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1694         }
1695
1696         /* create and start the asynchronous receiver SCB */
1697         ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1698                                                                 ASYNCRX_SCB_ADDR,
1699                                                                 SPDIFI_SCB_INST,
1700                                                                 SPDIFI_IP_OUTPUT_BUFFER1,
1701                                                                 ins->spdif_in_src,
1702                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1703
1704         spin_lock_irq(&chip->reg_lock);
1705
1706         /* reset SPDIF input sample buffer pointer */
1707         /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1708           (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1709
1710         /* reset FIFO ptr */
1711         /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1712         cs46xx_src_link(chip,ins->spdif_in_src);
1713
1714         /* unmute SRC volume */
1715         cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1716
1717         spin_unlock_irq(&chip->reg_lock);
1718
1719         /* set SPDIF input sample rate and unmute
1720            NOTE: only 48khz support for SPDIF input this time */
1721         /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1722
1723         /* monitor state */
1724         ins->spdif_status_in = 1;
1725         mutex_unlock(&chip->spos_mutex);
1726
1727         return 0;
1728 }
1729
1730 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1731 {
1732         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1733
1734         snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL);
1735         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1736
1737         mutex_lock(&chip->spos_mutex);
1738
1739         /* Remove the asynchronous receiver SCB */
1740         cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1741         ins->asynch_rx_scb = NULL;
1742
1743         cs46xx_src_unlink(chip,ins->spdif_in_src);
1744
1745         /* monitor state */
1746         ins->spdif_status_in = 0;
1747         mutex_unlock(&chip->spos_mutex);
1748
1749         /* restore amplifier */
1750         chip->active_ctrl(chip, -1);
1751         chip->amplifier_ctrl(chip, -1);
1752
1753         return 0;
1754 }
1755
1756 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1757 {
1758         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1759
1760         snd_assert (ins->pcm_input == NULL,return -EINVAL);
1761         snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL);
1762
1763         mutex_lock(&chip->spos_mutex);
1764         ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1765                                                   "PCMSerialInput_Wave");
1766         mutex_unlock(&chip->spos_mutex);
1767
1768         return 0;
1769 }
1770
1771 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1772 {
1773         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1774
1775         snd_assert (ins->pcm_input != NULL,return -EINVAL);
1776
1777         mutex_lock(&chip->spos_mutex);
1778         cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1779         ins->pcm_input = NULL;
1780         mutex_unlock(&chip->spos_mutex);
1781
1782         return 0;
1783 }
1784
1785 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1786 {
1787         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1788
1789         snd_assert (ins->adc_input == NULL,return -EINVAL);
1790         snd_assert (ins->codec_in_scb != NULL,return -EINVAL);
1791
1792         mutex_lock(&chip->spos_mutex);
1793         ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1794                                                   "PCMSerialInput_ADC");
1795         mutex_unlock(&chip->spos_mutex);
1796
1797         return 0;
1798 }
1799
1800 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1801 {
1802         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1803
1804         snd_assert (ins->adc_input != NULL,return -EINVAL);
1805
1806         mutex_lock(&chip->spos_mutex);
1807         cs46xx_dsp_remove_scb (chip,ins->adc_input);
1808         ins->adc_input = NULL;
1809         mutex_unlock(&chip->spos_mutex);
1810
1811         return 0;
1812 }
1813
1814 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1815 {
1816         u32 temp;
1817         int  i;
1818
1819         /* santiy check the parameters.  (These numbers are not 100% correct.  They are
1820            a rough guess from looking at the controller spec.) */
1821         if (address < 0x8000 || address >= 0x9000)
1822                 return -EINVAL;
1823
1824         /* initialize the SP_IO_WRITE SCB with the data. */
1825         temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
1826
1827         snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
1828         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1829         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1830
1831         /* Poke this location to tell the task to start */
1832         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1833
1834         /* Verify that the task ran */
1835         for (i=0; i<25; i++) {
1836                 udelay(125);
1837
1838                 temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1839                 if (temp == 0x00000000)
1840                         break;
1841         }
1842
1843         if (i == 25) {
1844                 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
1845                 return -EBUSY;
1846         }
1847
1848         return 0;
1849 }
1850
1851 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1852 {
1853         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1854         struct dsp_scb_descriptor * scb;
1855
1856         mutex_lock(&chip->spos_mutex);
1857
1858         /* main output */
1859         scb = ins->master_mix_scb->sub_list_ptr;
1860         while (scb != ins->the_null_scb) {
1861                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1862                 scb = scb->next_scb_ptr;
1863         }
1864
1865         /* rear output */
1866         scb = ins->rear_mix_scb->sub_list_ptr;
1867         while (scb != ins->the_null_scb) {
1868                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1869                 scb = scb->next_scb_ptr;
1870         }
1871
1872         ins->dac_volume_left = left;
1873         ins->dac_volume_right = right;
1874
1875         mutex_unlock(&chip->spos_mutex);
1876
1877         return 0;
1878 }
1879
1880 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1881 {
1882         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1883
1884         mutex_lock(&chip->spos_mutex);
1885
1886         if (ins->asynch_rx_scb != NULL)
1887                 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1888                                            left,right);
1889
1890         ins->spdif_input_volume_left = left;
1891         ins->spdif_input_volume_right = right;
1892
1893         mutex_unlock(&chip->spos_mutex);
1894
1895         return 0;
1896 }