sound/atmel/ac97c.c

   1 /*
   2  * Driver for Atmel AC97C
   3  *
   4  * Copyright (C) 2005-2009 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 as published by
   8  * the Free Software Foundation.
   9  */
  10 #include <linux/clk.h>
  11 #include <linux/delay.h>
  12 #include <linux/bitmap.h>
  13 #include <linux/device.h>
  14 #include <linux/dmaengine.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/atmel_pdc.h>
  17 #include <linux/init.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/module.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/mutex.h>
  22 #include <linux/gpio.h>
  23 #include <linux/types.h>
  24 #include <linux/io.h>
  25
  26 #include <sound/core.h>
  27 #include <sound/initval.h>
  28 #include <sound/pcm.h>
  29 #include <sound/pcm_params.h>
  30 #include <sound/ac97_codec.h>
  31 #include <sound/atmel-ac97c.h>
  32 #include <sound/memalloc.h>
  33
  34 #include <linux/dw_dmac.h>
  35
  36 #include <mach/cpu.h>
  37
  38 #ifdef CONFIG_ARCH_AT91
  39 #include <mach/hardware.h>
  40 #endif
  41
  42 #include "ac97c.h"
  43
  44 enum {
  45         DMA_TX_READY = 0,
  46         DMA_RX_READY,
  47         DMA_TX_CHAN_PRESENT,
  48         DMA_RX_CHAN_PRESENT,
  49 };
  50
  51 /* Serialize access to opened variable */
  52 static DEFINE_MUTEX(opened_mutex);
  53
  54 struct atmel_ac97c_dma {
  55         struct dma_chan                 *rx_chan;
  56         struct dma_chan                 *tx_chan;
  57 };
  58
  59 struct atmel_ac97c {
  60         struct clk                      *pclk;
  61         struct platform_device          *pdev;
  62         struct atmel_ac97c_dma          dma;
  63
  64         struct snd_pcm_substream        *playback_substream;
  65         struct snd_pcm_substream        *capture_substream;
  66         struct snd_card                 *card;
  67         struct snd_pcm                  *pcm;
  68         struct snd_ac97                 *ac97;
  69         struct snd_ac97_bus             *ac97_bus;
  70
  71         u64                             cur_format;
  72         unsigned int                    cur_rate;
  73         unsigned long                   flags;
  74         int                             playback_period, capture_period;
  75         /* Serialize access to opened variable */
  76         spinlock_t                      lock;
  77         void __iomem                    *regs;
  78         int                             irq;
  79         int                             opened;
  80         int                             reset_pin;
  81 };
  82
  83 #define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
  84
  85 #define ac97c_writel(chip, reg, val)                    \
  86         __raw_writel((val), (chip)->regs + AC97C_##reg)
  87 #define ac97c_readl(chip, reg)                          \
  88         __raw_readl((chip)->regs + AC97C_##reg)
  89
  90 /* This function is called by the DMA driver. */
  91 static void atmel_ac97c_dma_playback_period_done(void *arg)
  92 {
  93         struct atmel_ac97c *chip = arg;
  94         snd_pcm_period_elapsed(chip->playback_substream);
  95 }
  96
  97 static void atmel_ac97c_dma_capture_period_done(void *arg)
  98 {
  99         struct atmel_ac97c *chip = arg;
 100         snd_pcm_period_elapsed(chip->capture_substream);
 101 }
 102
 103 static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip,
 104                 struct snd_pcm_substream *substream,
 105                 enum dma_transfer_direction direction)
 106 {
 107         struct dma_chan                 *chan;
 108         struct dw_cyclic_desc           *cdesc;
 109         struct snd_pcm_runtime          *runtime = substream->runtime;
 110         unsigned long                   buffer_len, period_len;
 111
 112         /*
 113          * We don't do DMA on "complex" transfers, i.e. with
 114          * non-halfword-aligned buffers or lengths.
 115          */
 116         if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
 117                 dev_dbg(&chip->pdev->dev, "too complex transfer\n");
 118                 return -EINVAL;
 119         }
 120
 121         if (direction == DMA_MEM_TO_DEV)
 122                 chan = chip->dma.tx_chan;
 123         else
 124                 chan = chip->dma.rx_chan;
 125
 126         buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
 127         period_len = frames_to_bytes(runtime, runtime->period_size);
 128
 129         cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
 130                         period_len, direction);
 131         if (IS_ERR(cdesc)) {
 132                 dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n");
 133                 return PTR_ERR(cdesc);
 134         }
 135
 136         if (direction == DMA_MEM_TO_DEV) {
 137                 cdesc->period_callback = atmel_ac97c_dma_playback_period_done;
 138                 set_bit(DMA_TX_READY, &chip->flags);
 139         } else {
 140                 cdesc->period_callback = atmel_ac97c_dma_capture_period_done;
 141                 set_bit(DMA_RX_READY, &chip->flags);
 142         }
 143
 144         cdesc->period_callback_param = chip;
 145
 146         return 0;
 147 }
 148
 149 static struct snd_pcm_hardware atmel_ac97c_hw = {
 150         .info                   = (SNDRV_PCM_INFO_MMAP
 151                                   | SNDRV_PCM_INFO_MMAP_VALID
 152                                   | SNDRV_PCM_INFO_INTERLEAVED
 153                                   | SNDRV_PCM_INFO_BLOCK_TRANSFER
 154                                   | SNDRV_PCM_INFO_JOINT_DUPLEX
 155                                   | SNDRV_PCM_INFO_RESUME
 156                                   | SNDRV_PCM_INFO_PAUSE),
 157         .formats                = (SNDRV_PCM_FMTBIT_S16_BE
 158                                   | SNDRV_PCM_FMTBIT_S16_LE),
 159         .rates                  = (SNDRV_PCM_RATE_CONTINUOUS),
 160         .rate_min               = 4000,
 161         .rate_max               = 48000,
 162         .channels_min           = 1,
 163         .channels_max           = 2,
 164         .buffer_bytes_max       = 2 * 2 * 64 * 2048,
 165         .period_bytes_min       = 4096,
 166         .period_bytes_max       = 4096,
 167         .periods_min            = 6,
 168         .periods_max            = 64,
 169 };
 170
 171 static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
 172 {
 173         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 174         struct snd_pcm_runtime *runtime = substream->runtime;
 175
 176         mutex_lock(&opened_mutex);
 177         chip->opened++;
 178         runtime->hw = atmel_ac97c_hw;
 179         if (chip->cur_rate) {
 180                 runtime->hw.rate_min = chip->cur_rate;
 181                 runtime->hw.rate_max = chip->cur_rate;
 182         }
 183         if (chip->cur_format)
 184                 runtime->hw.formats = pcm_format_to_bits(chip->cur_format);
 185         mutex_unlock(&opened_mutex);
 186         chip->playback_substream = substream;
 187         return 0;
 188 }
 189
 190 static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
 191 {
 192         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 193         struct snd_pcm_runtime *runtime = substream->runtime;
 194
 195         mutex_lock(&opened_mutex);
 196         chip->opened++;
 197         runtime->hw = atmel_ac97c_hw;
 198         if (chip->cur_rate) {
 199                 runtime->hw.rate_min = chip->cur_rate;
 200                 runtime->hw.rate_max = chip->cur_rate;
 201         }
 202         if (chip->cur_format)
 203                 runtime->hw.formats = pcm_format_to_bits(chip->cur_format);
 204         mutex_unlock(&opened_mutex);
 205         chip->capture_substream = substream;
 206         return 0;
 207 }
 208
 209 static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
 210 {
 211         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 212
 213         mutex_lock(&opened_mutex);
 214         chip->opened--;
 215         if (!chip->opened) {
 216                 chip->cur_rate = 0;
 217                 chip->cur_format = 0;
 218         }
 219         mutex_unlock(&opened_mutex);
 220
 221         chip->playback_substream = NULL;
 222
 223         return 0;
 224 }
 225
 226 static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
 227 {
 228         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 229
 230         mutex_lock(&opened_mutex);
 231         chip->opened--;
 232         if (!chip->opened) {
 233                 chip->cur_rate = 0;
 234                 chip->cur_format = 0;
 235         }
 236         mutex_unlock(&opened_mutex);
 237
 238         chip->capture_substream = NULL;
 239
 240         return 0;
 241 }
 242
 243 static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
 244                 struct snd_pcm_hw_params *hw_params)
 245 {
 246         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 247         int retval;
 248
 249         retval = snd_pcm_lib_malloc_pages(substream,
 250                                         params_buffer_bytes(hw_params));
 251         if (retval < 0)
 252                 return retval;
 253         /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
 254         if (cpu_is_at32ap7000()) {
 255                 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
 256                 if (retval == 1)
 257                         if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
 258                                 dw_dma_cyclic_free(chip->dma.tx_chan);
 259         }
 260         /* Set restrictions to params. */
 261         mutex_lock(&opened_mutex);
 262         chip->cur_rate = params_rate(hw_params);
 263         chip->cur_format = params_format(hw_params);
 264         mutex_unlock(&opened_mutex);
 265
 266         return retval;
 267 }
 268
 269 static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
 270                 struct snd_pcm_hw_params *hw_params)
 271 {
 272         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 273         int retval;
 274
 275         retval = snd_pcm_lib_malloc_pages(substream,
 276                                         params_buffer_bytes(hw_params));
 277         if (retval < 0)
 278                 return retval;
 279         /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
 280         if (cpu_is_at32ap7000() && retval == 1)
 281                 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
 282                         dw_dma_cyclic_free(chip->dma.rx_chan);
 283
 284         /* Set restrictions to params. */
 285         mutex_lock(&opened_mutex);
 286         chip->cur_rate = params_rate(hw_params);
 287         chip->cur_format = params_format(hw_params);
 288         mutex_unlock(&opened_mutex);
 289
 290         return retval;
 291 }
 292
 293 static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream)
 294 {
 295         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 296         if (cpu_is_at32ap7000()) {
 297                 if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
 298                         dw_dma_cyclic_free(chip->dma.tx_chan);
 299         }
 300         return snd_pcm_lib_free_pages(substream);
 301 }
 302
 303 static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream)
 304 {
 305         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 306         if (cpu_is_at32ap7000()) {
 307                 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
 308                         dw_dma_cyclic_free(chip->dma.rx_chan);
 309         }
 310         return snd_pcm_lib_free_pages(substream);
 311 }
 312
 313 static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
 314 {
 315         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 316         struct snd_pcm_runtime *runtime = substream->runtime;
 317         int block_size = frames_to_bytes(runtime, runtime->period_size);
 318         unsigned long word = ac97c_readl(chip, OCA);
 319         int retval;
 320
 321         chip->playback_period = 0;
 322         word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
 323
 324         /* assign channels to AC97C channel A */
 325         switch (runtime->channels) {
 326         case 1:
 327                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
 328                 break;
 329         case 2:
 330                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
 331                         | AC97C_CH_ASSIGN(PCM_RIGHT, A);
 332                 break;
 333         default:
 334                 /* TODO: support more than two channels */
 335                 return -EINVAL;
 336         }
 337         ac97c_writel(chip, OCA, word);
 338
 339         /* configure sample format and size */
 340         word = ac97c_readl(chip, CAMR);
 341         if (chip->opened <= 1)
 342                 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
 343         else
 344                 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
 345
 346         switch (runtime->format) {
 347         case SNDRV_PCM_FORMAT_S16_LE:
 348                 if (cpu_is_at32ap7000())
 349                         word |= AC97C_CMR_CEM_LITTLE;
 350                 break;
 351         case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
 352                 word &= ~(AC97C_CMR_CEM_LITTLE);
 353                 break;
 354         default:
 355                 word = ac97c_readl(chip, OCA);
 356                 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
 357                 ac97c_writel(chip, OCA, word);
 358                 return -EINVAL;
 359         }
 360
 361         /* Enable underrun interrupt on channel A */
 362         word |= AC97C_CSR_UNRUN;
 363
 364         ac97c_writel(chip, CAMR, word);
 365
 366         /* Enable channel A event interrupt */
 367         word = ac97c_readl(chip, IMR);
 368         word |= AC97C_SR_CAEVT;
 369         ac97c_writel(chip, IER, word);
 370
 371         /* set variable rate if needed */
 372         if (runtime->rate != 48000) {
 373                 word = ac97c_readl(chip, MR);
 374                 word |= AC97C_MR_VRA;
 375                 ac97c_writel(chip, MR, word);
 376         } else {
 377                 word = ac97c_readl(chip, MR);
 378                 word &= ~(AC97C_MR_VRA);
 379                 ac97c_writel(chip, MR, word);
 380         }
 381
 382         retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
 383                         runtime->rate);
 384         if (retval)
 385                 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
 386                                 runtime->rate);
 387
 388         if (cpu_is_at32ap7000()) {
 389                 if (!test_bit(DMA_TX_READY, &chip->flags))
 390                         retval = atmel_ac97c_prepare_dma(chip, substream,
 391                                         DMA_MEM_TO_DEV);
 392         } else {
 393                 /* Initialize and start the PDC */
 394                 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
 395                 writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
 396                 writel(runtime->dma_addr + block_size,
 397                                 chip->regs + ATMEL_PDC_TNPR);
 398                 writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
 399         }
 400
 401         return retval;
 402 }
 403
 404 static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
 405 {
 406         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 407         struct snd_pcm_runtime *runtime = substream->runtime;
 408         int block_size = frames_to_bytes(runtime, runtime->period_size);
 409         unsigned long word = ac97c_readl(chip, ICA);
 410         int retval;
 411
 412         chip->capture_period = 0;
 413         word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
 414
 415         /* assign channels to AC97C channel A */
 416         switch (runtime->channels) {
 417         case 1:
 418                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
 419                 break;
 420         case 2:
 421                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
 422                         | AC97C_CH_ASSIGN(PCM_RIGHT, A);
 423                 break;
 424         default:
 425                 /* TODO: support more than two channels */
 426                 return -EINVAL;
 427         }
 428         ac97c_writel(chip, ICA, word);
 429
 430         /* configure sample format and size */
 431         word = ac97c_readl(chip, CAMR);
 432         if (chip->opened <= 1)
 433                 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
 434         else
 435                 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
 436
 437         switch (runtime->format) {
 438         case SNDRV_PCM_FORMAT_S16_LE:
 439                 if (cpu_is_at32ap7000())
 440                         word |= AC97C_CMR_CEM_LITTLE;
 441                 break;
 442         case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
 443                 word &= ~(AC97C_CMR_CEM_LITTLE);
 444                 break;
 445         default:
 446                 word = ac97c_readl(chip, ICA);
 447                 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
 448                 ac97c_writel(chip, ICA, word);
 449                 return -EINVAL;
 450         }
 451
 452         /* Enable overrun interrupt on channel A */
 453         word |= AC97C_CSR_OVRUN;
 454
 455         ac97c_writel(chip, CAMR, word);
 456
 457         /* Enable channel A event interrupt */
 458         word = ac97c_readl(chip, IMR);
 459         word |= AC97C_SR_CAEVT;
 460         ac97c_writel(chip, IER, word);
 461
 462         /* set variable rate if needed */
 463         if (runtime->rate != 48000) {
 464                 word = ac97c_readl(chip, MR);
 465                 word |= AC97C_MR_VRA;
 466                 ac97c_writel(chip, MR, word);
 467         } else {
 468                 word = ac97c_readl(chip, MR);
 469                 word &= ~(AC97C_MR_VRA);
 470                 ac97c_writel(chip, MR, word);
 471         }
 472
 473         retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
 474                         runtime->rate);
 475         if (retval)
 476                 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
 477                                 runtime->rate);
 478
 479         if (cpu_is_at32ap7000()) {
 480                 if (!test_bit(DMA_RX_READY, &chip->flags))
 481                         retval = atmel_ac97c_prepare_dma(chip, substream,
 482                                         DMA_DEV_TO_MEM);
 483         } else {
 484                 /* Initialize and start the PDC */
 485                 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
 486                 writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
 487                 writel(runtime->dma_addr + block_size,
 488                                 chip->regs + ATMEL_PDC_RNPR);
 489                 writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
 490         }
 491
 492         return retval;
 493 }
 494
 495 static int
 496 atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
 497 {
 498         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 499         unsigned long camr, ptcr = 0;
 500         int retval = 0;
 501
 502         camr = ac97c_readl(chip, CAMR);
 503
 504         switch (cmd) {
 505         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
 506         case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
 507         case SNDRV_PCM_TRIGGER_START:
 508                 if (cpu_is_at32ap7000()) {
 509                         retval = dw_dma_cyclic_start(chip->dma.tx_chan);
 510                         if (retval)
 511                                 goto out;
 512                 } else {
 513                         ptcr = ATMEL_PDC_TXTEN;
 514                 }
 515                 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX;
 516                 break;
 517         case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
 518         case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
 519         case SNDRV_PCM_TRIGGER_STOP:
 520                 if (cpu_is_at32ap7000())
 521                         dw_dma_cyclic_stop(chip->dma.tx_chan);
 522                 else
 523                         ptcr |= ATMEL_PDC_TXTDIS;
 524                 if (chip->opened <= 1)
 525                         camr &= ~AC97C_CMR_CENA;
 526                 break;
 527         default:
 528                 retval = -EINVAL;
 529                 goto out;
 530         }
 531
 532         ac97c_writel(chip, CAMR, camr);
 533         if (!cpu_is_at32ap7000())
 534                 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
 535 out:
 536         return retval;
 537 }
 538
 539 static int
 540 atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
 541 {
 542         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 543         unsigned long camr, ptcr = 0;
 544         int retval = 0;
 545
 546         camr = ac97c_readl(chip, CAMR);
 547         ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
 548
 549         switch (cmd) {
 550         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
 551         case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
 552         case SNDRV_PCM_TRIGGER_START:
 553                 if (cpu_is_at32ap7000()) {
 554                         retval = dw_dma_cyclic_start(chip->dma.rx_chan);
 555                         if (retval)
 556                                 goto out;
 557                 } else {
 558                         ptcr = ATMEL_PDC_RXTEN;
 559                 }
 560                 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX;
 561                 break;
 562         case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
 563         case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
 564         case SNDRV_PCM_TRIGGER_STOP:
 565                 if (cpu_is_at32ap7000())
 566                         dw_dma_cyclic_stop(chip->dma.rx_chan);
 567                 else
 568                         ptcr |= (ATMEL_PDC_RXTDIS);
 569                 if (chip->opened <= 1)
 570                         camr &= ~AC97C_CMR_CENA;
 571                 break;
 572         default:
 573                 retval = -EINVAL;
 574                 break;
 575         }
 576
 577         ac97c_writel(chip, CAMR, camr);
 578         if (!cpu_is_at32ap7000())
 579                 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
 580 out:
 581         return retval;
 582 }
 583
 584 static snd_pcm_uframes_t
 585 atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
 586 {
 587         struct atmel_ac97c      *chip = snd_pcm_substream_chip(substream);
 588         struct snd_pcm_runtime  *runtime = substream->runtime;
 589         snd_pcm_uframes_t       frames;
 590         unsigned long           bytes;
 591
 592         if (cpu_is_at32ap7000())
 593                 bytes = dw_dma_get_src_addr(chip->dma.tx_chan);
 594         else
 595                 bytes = readl(chip->regs + ATMEL_PDC_TPR);
 596         bytes -= runtime->dma_addr;
 597
 598         frames = bytes_to_frames(runtime, bytes);
 599         if (frames >= runtime->buffer_size)
 600                 frames -= runtime->buffer_size;
 601         return frames;
 602 }
 603
 604 static snd_pcm_uframes_t
 605 atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
 606 {
 607         struct atmel_ac97c      *chip = snd_pcm_substream_chip(substream);
 608         struct snd_pcm_runtime  *runtime = substream->runtime;
 609         snd_pcm_uframes_t       frames;
 610         unsigned long           bytes;
 611
 612         if (cpu_is_at32ap7000())
 613                 bytes = dw_dma_get_dst_addr(chip->dma.rx_chan);
 614         else
 615                 bytes = readl(chip->regs + ATMEL_PDC_RPR);
 616         bytes -= runtime->dma_addr;
 617
 618         frames = bytes_to_frames(runtime, bytes);
 619         if (frames >= runtime->buffer_size)
 620                 frames -= runtime->buffer_size;
 621         return frames;
 622 }
 623
 624 static struct snd_pcm_ops atmel_ac97_playback_ops = {
 625         .open           = atmel_ac97c_playback_open,
 626         .close          = atmel_ac97c_playback_close,
 627         .ioctl          = snd_pcm_lib_ioctl,
 628         .hw_params      = atmel_ac97c_playback_hw_params,
 629         .hw_free        = atmel_ac97c_playback_hw_free,
 630         .prepare        = atmel_ac97c_playback_prepare,
 631         .trigger        = atmel_ac97c_playback_trigger,
 632         .pointer        = atmel_ac97c_playback_pointer,
 633 };
 634
 635 static struct snd_pcm_ops atmel_ac97_capture_ops = {
 636         .open           = atmel_ac97c_capture_open,
 637         .close          = atmel_ac97c_capture_close,
 638         .ioctl          = snd_pcm_lib_ioctl,
 639         .hw_params      = atmel_ac97c_capture_hw_params,
 640         .hw_free        = atmel_ac97c_capture_hw_free,
 641         .prepare        = atmel_ac97c_capture_prepare,
 642         .trigger        = atmel_ac97c_capture_trigger,
 643         .pointer        = atmel_ac97c_capture_pointer,
 644 };
 645
 646 static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev)
 647 {
 648         struct atmel_ac97c      *chip  = (struct atmel_ac97c *)dev;
 649         irqreturn_t             retval = IRQ_NONE;
 650         u32                     sr     = ac97c_readl(chip, SR);
 651         u32                     casr   = ac97c_readl(chip, CASR);
 652         u32                     cosr   = ac97c_readl(chip, COSR);
 653         u32                     camr   = ac97c_readl(chip, CAMR);
 654
 655         if (sr & AC97C_SR_CAEVT) {
 656                 struct snd_pcm_runtime *runtime;
 657                 int offset, next_period, block_size;
 658                 dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n",
 659                                 casr & AC97C_CSR_OVRUN   ? " OVRUN"   : "",
 660                                 casr & AC97C_CSR_RXRDY   ? " RXRDY"   : "",
 661                                 casr & AC97C_CSR_UNRUN   ? " UNRUN"   : "",
 662                                 casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
 663                                 casr & AC97C_CSR_TXRDY   ? " TXRDY"   : "",
 664                                 !casr                    ? " NONE"    : "");
 665                 if (!cpu_is_at32ap7000()) {
 666                         if ((casr & camr) & AC97C_CSR_ENDTX) {
 667                                 runtime = chip->playback_substream->runtime;
 668                                 block_size = frames_to_bytes(runtime,
 669                                                 runtime->period_size);
 670                                 chip->playback_period++;
 671
 672                                 if (chip->playback_period == runtime->periods)
 673                                         chip->playback_period = 0;
 674                                 next_period = chip->playback_period + 1;
 675                                 if (next_period == runtime->periods)
 676                                         next_period = 0;
 677
 678                                 offset = block_size * next_period;
 679
 680                                 writel(runtime->dma_addr + offset,
 681                                                 chip->regs + ATMEL_PDC_TNPR);
 682                                 writel(block_size / 2,
 683                                                 chip->regs + ATMEL_PDC_TNCR);
 684
 685                                 snd_pcm_period_elapsed(
 686                                                 chip->playback_substream);
 687                         }
 688                         if ((casr & camr) & AC97C_CSR_ENDRX) {
 689                                 runtime = chip->capture_substream->runtime;
 690                                 block_size = frames_to_bytes(runtime,
 691                                                 runtime->period_size);
 692                                 chip->capture_period++;
 693
 694                                 if (chip->capture_period == runtime->periods)
 695                                         chip->capture_period = 0;
 696                                 next_period = chip->capture_period + 1;
 697                                 if (next_period == runtime->periods)
 698                                         next_period = 0;
 699
 700                                 offset = block_size * next_period;
 701
 702                                 writel(runtime->dma_addr + offset,
 703                                                 chip->regs + ATMEL_PDC_RNPR);
 704                                 writel(block_size / 2,
 705                                                 chip->regs + ATMEL_PDC_RNCR);
 706                                 snd_pcm_period_elapsed(chip->capture_substream);
 707                         }
 708                 }
 709                 retval = IRQ_HANDLED;
 710         }
 711
 712         if (sr & AC97C_SR_COEVT) {
 713                 dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n",
 714                                 cosr & AC97C_CSR_OVRUN   ? " OVRUN"   : "",
 715                                 cosr & AC97C_CSR_RXRDY   ? " RXRDY"   : "",
 716                                 cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
 717                                 cosr & AC97C_CSR_TXRDY   ? " TXRDY"   : "",
 718                                 !cosr                    ? " NONE"    : "");
 719                 retval = IRQ_HANDLED;
 720         }
 721
 722         if (retval == IRQ_NONE) {
 723                 dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x "
 724                                 "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr);
 725         }
 726
 727         return retval;
 728 }
 729
 730 static struct ac97_pcm at91_ac97_pcm_defs[] = {
 731         /* Playback */
 732         {
 733                 .exclusive = 1,
 734                 .r = { {
 735                         .slots = ((1 << AC97_SLOT_PCM_LEFT)
 736                                   | (1 << AC97_SLOT_PCM_RIGHT)),
 737                 } },
 738         },
 739         /* PCM in */
 740         {
 741                 .stream = 1,
 742                 .exclusive = 1,
 743                 .r = { {
 744                         .slots = ((1 << AC97_SLOT_PCM_LEFT)
 745                                         | (1 << AC97_SLOT_PCM_RIGHT)),
 746                 } }
 747         },
 748         /* Mic in */
 749         {
 750                 .stream = 1,
 751                 .exclusive = 1,
 752                 .r = { {
 753                         .slots = (1<<AC97_SLOT_MIC),
 754                 } }
 755         },
 756 };
 757
 758 static int atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
 759 {
 760         struct snd_pcm          *pcm;
 761         struct snd_pcm_hardware hw = atmel_ac97c_hw;
 762         int                     capture, playback, retval, err;
 763
 764         capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
 765         playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
 766
 767         if (!cpu_is_at32ap7000()) {
 768                 err = snd_ac97_pcm_assign(chip->ac97_bus,
 769                                 ARRAY_SIZE(at91_ac97_pcm_defs),
 770                                 at91_ac97_pcm_defs);
 771                 if (err)
 772                         return err;
 773         }
 774         retval = snd_pcm_new(chip->card, chip->card->shortname,
 775                         chip->pdev->id, playback, capture, &pcm);
 776         if (retval)
 777                 return retval;
 778
 779         if (capture)
 780                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 781                                 &atmel_ac97_capture_ops);
 782         if (playback)
 783                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 784                                 &atmel_ac97_playback_ops);
 785
 786         retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 787                         &chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
 788                         hw.buffer_bytes_max);
 789         if (retval)
 790                 return retval;
 791
 792         pcm->private_data = chip;
 793         pcm->info_flags = 0;
 794         strcpy(pcm->name, chip->card->shortname);
 795         chip->pcm = pcm;
 796
 797         return 0;
 798 }
 799
 800 static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
 801 {
 802         struct snd_ac97_template template;
 803         memset(&template, 0, sizeof(template));
 804         template.private_data = chip;
 805         return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
 806 }
 807
 808 static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
 809                 unsigned short val)
 810 {
 811         struct atmel_ac97c *chip = get_chip(ac97);
 812         unsigned long word;
 813         int timeout = 40;
 814
 815         word = (reg & 0x7f) << 16 | val;
 816
 817         do {
 818                 if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
 819                         ac97c_writel(chip, COTHR, word);
 820                         return;
 821                 }
 822                 udelay(1);
 823         } while (--timeout);
 824
 825         dev_dbg(&chip->pdev->dev, "codec write timeout\n");
 826 }
 827
 828 static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
 829                 unsigned short reg)
 830 {
 831         struct atmel_ac97c *chip = get_chip(ac97);
 832         unsigned long word;
 833         int timeout = 40;
 834         int write = 10;
 835
 836         word = (0x80 | (reg & 0x7f)) << 16;
 837
 838         if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
 839                 ac97c_readl(chip, CORHR);
 840
 841 retry_write:
 842         timeout = 40;
 843
 844         do {
 845                 if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
 846                         ac97c_writel(chip, COTHR, word);
 847                         goto read_reg;
 848                 }
 849                 udelay(10);
 850         } while (--timeout);
 851
 852         if (!--write)
 853                 goto timed_out;
 854         goto retry_write;
 855
 856 read_reg:
 857         do {
 858                 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
 859                         unsigned short val = ac97c_readl(chip, CORHR);
 860                         return val;
 861                 }
 862                 udelay(10);
 863         } while (--timeout);
 864
 865         if (!--write)
 866                 goto timed_out;
 867         goto retry_write;
 868
 869 timed_out:
 870         dev_dbg(&chip->pdev->dev, "codec read timeout\n");
 871         return 0xffff;
 872 }
 873
 874 static bool filter(struct dma_chan *chan, void *slave)
 875 {
 876         struct dw_dma_slave *dws = slave;
 877
 878         if (dws->dma_dev == chan->device->dev) {
 879                 chan->private = dws;
 880                 return true;
 881         } else
 882                 return false;
 883 }
 884
 885 static void atmel_ac97c_reset(struct atmel_ac97c *chip)
 886 {
 887         ac97c_writel(chip, MR,   0);
 888         ac97c_writel(chip, MR,   AC97C_MR_ENA);
 889         ac97c_writel(chip, CAMR, 0);
 890         ac97c_writel(chip, COMR, 0);
 891
 892         if (gpio_is_valid(chip->reset_pin)) {
 893                 gpio_set_value(chip->reset_pin, 0);
 894                 /* AC97 v2.2 specifications says minimum 1 us. */
 895                 udelay(2);
 896                 gpio_set_value(chip->reset_pin, 1);
 897         } else {
 898                 ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA);
 899                 udelay(2);
 900                 ac97c_writel(chip, MR, AC97C_MR_ENA);
 901         }
 902 }
 903
 904 static int atmel_ac97c_probe(struct platform_device *pdev)
 905 {
 906         struct snd_card                 *card;
 907         struct atmel_ac97c              *chip;
 908         struct resource                 *regs;
 909         struct ac97c_platform_data      *pdata;
 910         struct clk                      *pclk;
 911         static struct snd_ac97_bus_ops  ops = {
 912                 .write  = atmel_ac97c_write,
 913                 .read   = atmel_ac97c_read,
 914         };
 915         int                             retval;
 916         int                             irq;
 917
 918         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 919         if (!regs) {
 920                 dev_dbg(&pdev->dev, "no memory resource\n");
 921                 return -ENXIO;
 922         }
 923
 924         pdata = pdev->dev.platform_data;
 925         if (!pdata) {
 926                 dev_dbg(&pdev->dev, "no platform data\n");
 927                 return -ENXIO;
 928         }
 929
 930         irq = platform_get_irq(pdev, 0);
 931         if (irq < 0) {
 932                 dev_dbg(&pdev->dev, "could not get irq\n");
 933                 return -ENXIO;
 934         }
 935
 936         if (cpu_is_at32ap7000()) {
 937                 pclk = clk_get(&pdev->dev, "pclk");
 938         } else {
 939                 pclk = clk_get(&pdev->dev, "ac97_clk");
 940         }
 941
 942         if (IS_ERR(pclk)) {
 943                 dev_dbg(&pdev->dev, "no peripheral clock\n");
 944                 return PTR_ERR(pclk);
 945         }
 946         clk_enable(pclk);
 947
 948         retval = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1,
 949                               SNDRV_DEFAULT_STR1, THIS_MODULE,
 950                               sizeof(struct atmel_ac97c), &card);
 951         if (retval) {
 952                 dev_dbg(&pdev->dev, "could not create sound card device\n");
 953                 goto err_snd_card_new;
 954         }
 955
 956         chip = get_chip(card);
 957
 958         retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip);
 959         if (retval) {
 960                 dev_dbg(&pdev->dev, "unable to request irq %d\n", irq);
 961                 goto err_request_irq;
 962         }
 963         chip->irq = irq;
 964
 965         spin_lock_init(&chip->lock);
 966
 967         strcpy(card->driver, "Atmel AC97C");
 968         strcpy(card->shortname, "Atmel AC97C");
 969         sprintf(card->longname, "Atmel AC97 controller");
 970
 971         chip->card = card;
 972         chip->pclk = pclk;
 973         chip->pdev = pdev;
 974         chip->regs = ioremap(regs->start, resource_size(regs));
 975
 976         if (!chip->regs) {
 977                 dev_dbg(&pdev->dev, "could not remap register memory\n");
 978                 retval = -ENOMEM;
 979                 goto err_ioremap;
 980         }
 981
 982         if (gpio_is_valid(pdata->reset_pin)) {
 983                 if (gpio_request(pdata->reset_pin, "reset_pin")) {
 984                         dev_dbg(&pdev->dev, "reset pin not available\n");
 985                         chip->reset_pin = -ENODEV;
 986                 } else {
 987                         gpio_direction_output(pdata->reset_pin, 1);
 988                         chip->reset_pin = pdata->reset_pin;
 989                 }
 990         } else {
 991                 chip->reset_pin = -EINVAL;
 992         }
 993
 994         atmel_ac97c_reset(chip);
 995
 996         /* Enable overrun interrupt from codec channel */
 997         ac97c_writel(chip, COMR, AC97C_CSR_OVRUN);
 998         ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT);
 999
1000         retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
1001         if (retval) {
1002                 dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
1003                 goto err_ac97_bus;
1004         }
1005
1006         retval = atmel_ac97c_mixer_new(chip);
1007         if (retval) {
1008                 dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
1009                 goto err_ac97_bus;
1010         }
1011
1012         if (cpu_is_at32ap7000()) {
1013                 if (pdata->rx_dws.dma_dev) {
1014                         dma_cap_mask_t mask;
1015
1016                         dma_cap_zero(mask);
1017                         dma_cap_set(DMA_SLAVE, mask);
1018
1019                         chip->dma.rx_chan = dma_request_channel(mask, filter,
1020                                                                 &pdata->rx_dws);
1021                         if (chip->dma.rx_chan) {
1022                                 struct dma_slave_config dma_conf = {
1023                                         .src_addr = regs->start + AC97C_CARHR +
1024                                                 2,
1025                                         .src_addr_width =
1026                                                 DMA_SLAVE_BUSWIDTH_2_BYTES,
1027                                         .src_maxburst = 1,
1028                                         .dst_maxburst = 1,
1029                                         .direction = DMA_DEV_TO_MEM,
1030                                         .device_fc = false,
1031                                 };
1032
1033                                 dmaengine_slave_config(chip->dma.rx_chan,
1034                                                 &dma_conf);
1035                         }
1036
1037                         dev_info(&chip->pdev->dev, "using %s for DMA RX\n",
1038                                 dev_name(&chip->dma.rx_chan->dev->device));
1039                         set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1040                 }
1041
1042                 if (pdata->tx_dws.dma_dev) {
1043                         dma_cap_mask_t mask;
1044
1045                         dma_cap_zero(mask);
1046                         dma_cap_set(DMA_SLAVE, mask);
1047
1048                         chip->dma.tx_chan = dma_request_channel(mask, filter,
1049                                                                 &pdata->tx_dws);
1050                         if (chip->dma.tx_chan) {
1051                                 struct dma_slave_config dma_conf = {
1052                                         .dst_addr = regs->start + AC97C_CATHR +
1053                                                 2,
1054                                         .dst_addr_width =
1055                                                 DMA_SLAVE_BUSWIDTH_2_BYTES,
1056                                         .src_maxburst = 1,
1057                                         .dst_maxburst = 1,
1058                                         .direction = DMA_MEM_TO_DEV,
1059                                         .device_fc = false,
1060                                 };
1061
1062                                 dmaengine_slave_config(chip->dma.tx_chan,
1063                                                 &dma_conf);
1064                         }
1065
1066                         dev_info(&chip->pdev->dev, "using %s for DMA TX\n",
1067                                 dev_name(&chip->dma.tx_chan->dev->device));
1068                         set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1069                 }
1070
1071                 if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) &&
1072                                 !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) {
1073                         dev_dbg(&pdev->dev, "DMA not available\n");
1074                         retval = -ENODEV;
1075                         goto err_dma;
1076                 }
1077         } else {
1078                 /* Just pretend that we have DMA channel(for at91 i is actually
1079                  * the PDC) */
1080                 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1081                 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1082         }
1083
1084         retval = atmel_ac97c_pcm_new(chip);
1085         if (retval) {
1086                 dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
1087                 goto err_dma;
1088         }
1089
1090         retval = snd_card_register(card);
1091         if (retval) {
1092                 dev_dbg(&pdev->dev, "could not register sound card\n");
1093                 goto err_dma;
1094         }
1095
1096         platform_set_drvdata(pdev, card);
1097
1098         dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n",
1099                         chip->regs, irq);
1100
1101         return 0;
1102
1103 err_dma:
1104         if (cpu_is_at32ap7000()) {
1105                 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1106                         dma_release_channel(chip->dma.rx_chan);
1107                 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1108                         dma_release_channel(chip->dma.tx_chan);
1109                 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1110                 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1111                 chip->dma.rx_chan = NULL;
1112                 chip->dma.tx_chan = NULL;
1113         }
1114 err_ac97_bus:
1115         if (gpio_is_valid(chip->reset_pin))
1116                 gpio_free(chip->reset_pin);
1117
1118         iounmap(chip->regs);
1119 err_ioremap:
1120         free_irq(irq, chip);
1121 err_request_irq:
1122         snd_card_free(card);
1123 err_snd_card_new:
1124         clk_disable(pclk);
1125         clk_put(pclk);
1126         return retval;
1127 }
1128
1129 #ifdef CONFIG_PM_SLEEP
1130 static int atmel_ac97c_suspend(struct device *pdev)
1131 {
1132         struct snd_card *card = dev_get_drvdata(pdev);
1133         struct atmel_ac97c *chip = card->private_data;
1134
1135         if (cpu_is_at32ap7000()) {
1136                 if (test_bit(DMA_RX_READY, &chip->flags))
1137                         dw_dma_cyclic_stop(chip->dma.rx_chan);
1138                 if (test_bit(DMA_TX_READY, &chip->flags))
1139                         dw_dma_cyclic_stop(chip->dma.tx_chan);
1140         }
1141         clk_disable(chip->pclk);
1142
1143         return 0;
1144 }
1145
1146 static int atmel_ac97c_resume(struct device *pdev)
1147 {
1148         struct snd_card *card = dev_get_drvdata(pdev);
1149         struct atmel_ac97c *chip = card->private_data;
1150
1151         clk_enable(chip->pclk);
1152         if (cpu_is_at32ap7000()) {
1153                 if (test_bit(DMA_RX_READY, &chip->flags))
1154                         dw_dma_cyclic_start(chip->dma.rx_chan);
1155                 if (test_bit(DMA_TX_READY, &chip->flags))
1156                         dw_dma_cyclic_start(chip->dma.tx_chan);
1157         }
1158         return 0;
1159 }
1160
1161 static SIMPLE_DEV_PM_OPS(atmel_ac97c_pm, atmel_ac97c_suspend, atmel_ac97c_resume);
1162 #define ATMEL_AC97C_PM_OPS      &atmel_ac97c_pm
1163 #else
1164 #define ATMEL_AC97C_PM_OPS      NULL
1165 #endif
1166
1167 static int atmel_ac97c_remove(struct platform_device *pdev)
1168 {
1169         struct snd_card *card = platform_get_drvdata(pdev);
1170         struct atmel_ac97c *chip = get_chip(card);
1171
1172         if (gpio_is_valid(chip->reset_pin))
1173                 gpio_free(chip->reset_pin);
1174
1175         ac97c_writel(chip, CAMR, 0);
1176         ac97c_writel(chip, COMR, 0);
1177         ac97c_writel(chip, MR,   0);
1178
1179         clk_disable(chip->pclk);
1180         clk_put(chip->pclk);
1181         iounmap(chip->regs);
1182         free_irq(chip->irq, chip);
1183
1184         if (cpu_is_at32ap7000()) {
1185                 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1186                         dma_release_channel(chip->dma.rx_chan);
1187                 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1188                         dma_release_channel(chip->dma.tx_chan);
1189                 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1190                 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1191                 chip->dma.rx_chan = NULL;
1192                 chip->dma.tx_chan = NULL;
1193         }
1194
1195         snd_card_free(card);
1196
1197         return 0;
1198 }
1199
1200 static struct platform_driver atmel_ac97c_driver = {
1201         .probe          = atmel_ac97c_probe,
1202         .remove         = atmel_ac97c_remove,
1203         .driver         = {
1204                 .name   = "atmel_ac97c",
1205                 .owner  = THIS_MODULE,
1206                 .pm     = ATMEL_AC97C_PM_OPS,
1207         },
1208 };
1209 module_platform_driver(atmel_ac97c_driver);
1210
1211 MODULE_LICENSE("GPL");
1212 MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
1213 MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");