spi: document odd controller reference handling
[sfrench/cifs-2.6.git] / include / uapi / rdma / vmw_pvrdma-abi.h
1 /*
2  * Copyright (c) 2012-2016 VMware, Inc.  All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of EITHER the GNU General Public License
6  * version 2 as published by the Free Software Foundation or the BSD
7  * 2-Clause License. This program is distributed in the hope that it
8  * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
9  * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
10  * See the GNU General Public License version 2 for more details at
11  * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program available in the file COPYING in the main
15  * directory of this source tree.
16  *
17  * The BSD 2-Clause License
18  *
19  *     Redistribution and use in source and binary forms, with or
20  *     without modification, are permitted provided that the following
21  *     conditions are met:
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24  *        copyright notice, this list of conditions and the following
25  *        disclaimer.
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27  *      - Redistributions in binary form must reproduce the above
28  *        copyright notice, this list of conditions and the following
29  *        disclaimer in the documentation and/or other materials
30  *        provided with the distribution.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
35  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
36  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
37  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
43  * OF THE POSSIBILITY OF SUCH DAMAGE.
44  */
45
46 #ifndef __VMW_PVRDMA_ABI_H__
47 #define __VMW_PVRDMA_ABI_H__
48
49 #include <linux/types.h>
50
51 #define PVRDMA_UVERBS_ABI_VERSION       3               /* ABI Version. */
52 #define PVRDMA_UAR_HANDLE_MASK          0x00FFFFFF      /* Bottom 24 bits. */
53 #define PVRDMA_UAR_QP_OFFSET            0               /* QP doorbell. */
54 #define PVRDMA_UAR_QP_SEND              BIT(30)         /* Send bit. */
55 #define PVRDMA_UAR_QP_RECV              BIT(31)         /* Recv bit. */
56 #define PVRDMA_UAR_CQ_OFFSET            4               /* CQ doorbell. */
57 #define PVRDMA_UAR_CQ_ARM_SOL           BIT(29)         /* Arm solicited bit. */
58 #define PVRDMA_UAR_CQ_ARM               BIT(30)         /* Arm bit. */
59 #define PVRDMA_UAR_CQ_POLL              BIT(31)         /* Poll bit. */
60
61 enum pvrdma_wr_opcode {
62         PVRDMA_WR_RDMA_WRITE,
63         PVRDMA_WR_RDMA_WRITE_WITH_IMM,
64         PVRDMA_WR_SEND,
65         PVRDMA_WR_SEND_WITH_IMM,
66         PVRDMA_WR_RDMA_READ,
67         PVRDMA_WR_ATOMIC_CMP_AND_SWP,
68         PVRDMA_WR_ATOMIC_FETCH_AND_ADD,
69         PVRDMA_WR_LSO,
70         PVRDMA_WR_SEND_WITH_INV,
71         PVRDMA_WR_RDMA_READ_WITH_INV,
72         PVRDMA_WR_LOCAL_INV,
73         PVRDMA_WR_FAST_REG_MR,
74         PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP,
75         PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD,
76         PVRDMA_WR_BIND_MW,
77         PVRDMA_WR_REG_SIG_MR,
78 };
79
80 enum pvrdma_wc_status {
81         PVRDMA_WC_SUCCESS,
82         PVRDMA_WC_LOC_LEN_ERR,
83         PVRDMA_WC_LOC_QP_OP_ERR,
84         PVRDMA_WC_LOC_EEC_OP_ERR,
85         PVRDMA_WC_LOC_PROT_ERR,
86         PVRDMA_WC_WR_FLUSH_ERR,
87         PVRDMA_WC_MW_BIND_ERR,
88         PVRDMA_WC_BAD_RESP_ERR,
89         PVRDMA_WC_LOC_ACCESS_ERR,
90         PVRDMA_WC_REM_INV_REQ_ERR,
91         PVRDMA_WC_REM_ACCESS_ERR,
92         PVRDMA_WC_REM_OP_ERR,
93         PVRDMA_WC_RETRY_EXC_ERR,
94         PVRDMA_WC_RNR_RETRY_EXC_ERR,
95         PVRDMA_WC_LOC_RDD_VIOL_ERR,
96         PVRDMA_WC_REM_INV_RD_REQ_ERR,
97         PVRDMA_WC_REM_ABORT_ERR,
98         PVRDMA_WC_INV_EECN_ERR,
99         PVRDMA_WC_INV_EEC_STATE_ERR,
100         PVRDMA_WC_FATAL_ERR,
101         PVRDMA_WC_RESP_TIMEOUT_ERR,
102         PVRDMA_WC_GENERAL_ERR,
103 };
104
105 enum pvrdma_wc_opcode {
106         PVRDMA_WC_SEND,
107         PVRDMA_WC_RDMA_WRITE,
108         PVRDMA_WC_RDMA_READ,
109         PVRDMA_WC_COMP_SWAP,
110         PVRDMA_WC_FETCH_ADD,
111         PVRDMA_WC_BIND_MW,
112         PVRDMA_WC_LSO,
113         PVRDMA_WC_LOCAL_INV,
114         PVRDMA_WC_FAST_REG_MR,
115         PVRDMA_WC_MASKED_COMP_SWAP,
116         PVRDMA_WC_MASKED_FETCH_ADD,
117         PVRDMA_WC_RECV = 1 << 7,
118         PVRDMA_WC_RECV_RDMA_WITH_IMM,
119 };
120
121 enum pvrdma_wc_flags {
122         PVRDMA_WC_GRH                   = 1 << 0,
123         PVRDMA_WC_WITH_IMM              = 1 << 1,
124         PVRDMA_WC_WITH_INVALIDATE       = 1 << 2,
125         PVRDMA_WC_IP_CSUM_OK            = 1 << 3,
126         PVRDMA_WC_WITH_SMAC             = 1 << 4,
127         PVRDMA_WC_WITH_VLAN             = 1 << 5,
128         PVRDMA_WC_WITH_NETWORK_HDR_TYPE = 1 << 6,
129         PVRDMA_WC_FLAGS_MAX             = PVRDMA_WC_WITH_NETWORK_HDR_TYPE,
130 };
131
132 struct pvrdma_alloc_ucontext_resp {
133         __u32 qp_tab_size;
134         __u32 reserved;
135 };
136
137 struct pvrdma_alloc_pd_resp {
138         __u32 pdn;
139         __u32 reserved;
140 };
141
142 struct pvrdma_create_cq {
143         __u64 buf_addr;
144         __u32 buf_size;
145         __u32 reserved;
146 };
147
148 struct pvrdma_create_cq_resp {
149         __u32 cqn;
150         __u32 reserved;
151 };
152
153 struct pvrdma_resize_cq {
154         __u64 buf_addr;
155         __u32 buf_size;
156         __u32 reserved;
157 };
158
159 struct pvrdma_create_srq {
160         __u64 buf_addr;
161 };
162
163 struct pvrdma_create_srq_resp {
164         __u32 srqn;
165         __u32 reserved;
166 };
167
168 struct pvrdma_create_qp {
169         __u64 rbuf_addr;
170         __u64 sbuf_addr;
171         __u32 rbuf_size;
172         __u32 sbuf_size;
173         __u64 qp_addr;
174 };
175
176 /* PVRDMA masked atomic compare and swap */
177 struct pvrdma_ex_cmp_swap {
178         __u64 swap_val;
179         __u64 compare_val;
180         __u64 swap_mask;
181         __u64 compare_mask;
182 };
183
184 /* PVRDMA masked atomic fetch and add */
185 struct pvrdma_ex_fetch_add {
186         __u64 add_val;
187         __u64 field_boundary;
188 };
189
190 /* PVRDMA address vector. */
191 struct pvrdma_av {
192         __u32 port_pd;
193         __u32 sl_tclass_flowlabel;
194         __u8 dgid[16];
195         __u8 src_path_bits;
196         __u8 gid_index;
197         __u8 stat_rate;
198         __u8 hop_limit;
199         __u8 dmac[6];
200         __u8 reserved[6];
201 };
202
203 /* PVRDMA scatter/gather entry */
204 struct pvrdma_sge {
205         __u64   addr;
206         __u32   length;
207         __u32   lkey;
208 };
209
210 /* PVRDMA receive queue work request */
211 struct pvrdma_rq_wqe_hdr {
212         __u64 wr_id;            /* wr id */
213         __u32 num_sge;          /* size of s/g array */
214         __u32 total_len;        /* reserved */
215 };
216 /* Use pvrdma_sge (ib_sge) for receive queue s/g array elements. */
217
218 /* PVRDMA send queue work request */
219 struct pvrdma_sq_wqe_hdr {
220         __u64 wr_id;            /* wr id */
221         __u32 num_sge;          /* size of s/g array */
222         __u32 total_len;        /* reserved */
223         __u32 opcode;           /* operation type */
224         __u32 send_flags;       /* wr flags */
225         union {
226                 __be32 imm_data;
227                 __u32 invalidate_rkey;
228         } ex;
229         __u32 reserved;
230         union {
231                 struct {
232                         __u64 remote_addr;
233                         __u32 rkey;
234                         __u8 reserved[4];
235                 } rdma;
236                 struct {
237                         __u64 remote_addr;
238                         __u64 compare_add;
239                         __u64 swap;
240                         __u32 rkey;
241                         __u32 reserved;
242                 } atomic;
243                 struct {
244                         __u64 remote_addr;
245                         __u32 log_arg_sz;
246                         __u32 rkey;
247                         union {
248                                 struct pvrdma_ex_cmp_swap  cmp_swap;
249                                 struct pvrdma_ex_fetch_add fetch_add;
250                         } wr_data;
251                 } masked_atomics;
252                 struct {
253                         __u64 iova_start;
254                         __u64 pl_pdir_dma;
255                         __u32 page_shift;
256                         __u32 page_list_len;
257                         __u32 length;
258                         __u32 access_flags;
259                         __u32 rkey;
260                 } fast_reg;
261                 struct {
262                         __u32 remote_qpn;
263                         __u32 remote_qkey;
264                         struct pvrdma_av av;
265                 } ud;
266         } wr;
267 };
268 /* Use pvrdma_sge (ib_sge) for send queue s/g array elements. */
269
270 /* Completion queue element. */
271 struct pvrdma_cqe {
272         __u64 wr_id;
273         __u64 qp;
274         __u32 opcode;
275         __u32 status;
276         __u32 byte_len;
277         __be32 imm_data;
278         __u32 src_qp;
279         __u32 wc_flags;
280         __u32 vendor_err;
281         __u16 pkey_index;
282         __u16 slid;
283         __u8 sl;
284         __u8 dlid_path_bits;
285         __u8 port_num;
286         __u8 smac[6];
287         __u8 network_hdr_type;
288         __u8 reserved2[6]; /* Pad to next power of 2 (64). */
289 };
290
291 #endif /* __VMW_PVRDMA_ABI_H__ */