include/asm-ppc/hawk_defs.h

   1 /*
   2  * include/asm-ppc/hawk_defs.h
   3  *
   4  * Definitions for Motorola MCG Falcon/Raven & HAWK North Bridge & Memory ctlr.
   5  *
   6  * Author: Mark A. Greer
   7  *         mgreer@mvista.com
   8  *
   9  * Modified by Randy Vinson (rvinson@mvista.com)
  10  *
  11  * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
  12  * the terms of the GNU General Public License version 2.  This program
  13  * is licensed "as is" without any warranty of any kind, whether express
  14  * or implied.
  15  */
  16
  17 #ifndef __ASMPPC_HAWK_DEFS_H
  18 #define __ASMPPC_HAWK_DEFS_H
  19
  20 #include <asm/pci-bridge.h>
  21
  22 /*
  23  * The Falcon/Raven and HAWK have 4 sets of registers:
  24  *   1) PPC Registers which define the mappings from PPC bus to PCI bus,
  25  *      etc.
  26  *   2) PCI Registers which define the mappings from PCI bus to PPC bus and the
  27  *      MPIC base address.
  28  *   3) MPIC registers
  29  *   4) System Memory Controller (SMC) registers.
  30  */
  31
  32 #define HAWK_PCI_CONFIG_ADDR_OFF        0x00000cf8
  33 #define HAWK_PCI_CONFIG_DATA_OFF        0x00000cfc
  34
  35 #define HAWK_MPIC_SIZE                  0x00040000U
  36 #define HAWK_SMC_SIZE                   0x00001000U
  37
  38 /*
  39  * Define PPC register offsets.
  40  */
  41 #define HAWK_PPC_XSADD0_OFF                     0x40
  42 #define HAWK_PPC_XSOFF0_OFF                     0x44
  43 #define HAWK_PPC_XSADD1_OFF                     0x48
  44 #define HAWK_PPC_XSOFF1_OFF                     0x4c
  45 #define HAWK_PPC_XSADD2_OFF                     0x50
  46 #define HAWK_PPC_XSOFF2_OFF                     0x54
  47 #define HAWK_PPC_XSADD3_OFF                     0x58
  48 #define HAWK_PPC_XSOFF3_OFF                     0x5c
  49
  50 /*
  51  * Define PCI register offsets.
  52  */
  53 #define HAWK_PCI_PSADD0_OFF                     0x80
  54 #define HAWK_PCI_PSOFF0_OFF                     0x84
  55 #define HAWK_PCI_PSADD1_OFF                     0x88
  56 #define HAWK_PCI_PSOFF1_OFF                     0x8c
  57 #define HAWK_PCI_PSADD2_OFF                     0x90
  58 #define HAWK_PCI_PSOFF2_OFF                     0x94
  59 #define HAWK_PCI_PSADD3_OFF                     0x98
  60 #define HAWK_PCI_PSOFF3_OFF                     0x9c
  61
  62 /*
  63  * Define the System Memory Controller (SMC) register offsets.
  64  */
  65 #define HAWK_SMC_RAM_A_SIZE_REG_OFF             0x10
  66 #define HAWK_SMC_RAM_B_SIZE_REG_OFF             0x11
  67 #define HAWK_SMC_RAM_C_SIZE_REG_OFF             0x12
  68 #define HAWK_SMC_RAM_D_SIZE_REG_OFF             0x13
  69 #define HAWK_SMC_RAM_E_SIZE_REG_OFF             0xc0    /* HAWK Only */
  70 #define HAWK_SMC_RAM_F_SIZE_REG_OFF             0xc1    /* HAWK Only */
  71 #define HAWK_SMC_RAM_G_SIZE_REG_OFF             0xc2    /* HAWK Only */
  72 #define HAWK_SMC_RAM_H_SIZE_REG_OFF             0xc3    /* HAWK Only */
  73
  74 #define FALCON_SMC_REG_COUNT                    4
  75 #define HAWK_SMC_REG_COUNT                      8
  76 #endif                          /* __ASMPPC_HAWK_DEFS_H */