drivers/usb/host/ohci-hcd.c

   1 // SPDX-License-Identifier: GPL-1.0+
   2 /*
   3  * Open Host Controller Interface (OHCI) driver for USB.
   4  *
   5  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   6  *
   7  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   8  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   9  *
  10  * [ Initialisation is based on Linus'  ]
  11  * [ uhci code and gregs ohci fragments ]
  12  * [ (C) Copyright 1999 Linus Torvalds  ]
  13  * [ (C) Copyright 1999 Gregory P. Smith]
  14  *
  15  *
  16  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  17  * interfaces (though some non-x86 Intel chips use it).  It supports
  18  * smarter hardware than UHCI.  A download link for the spec available
  19  * through the http://www.usb.org website.
  20  *
  21  * This file is licenced under the GPL.
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/moduleparam.h>
  26 #include <linux/pci.h>
  27 #include <linux/kernel.h>
  28 #include <linux/delay.h>
  29 #include <linux/ioport.h>
  30 #include <linux/sched.h>
  31 #include <linux/slab.h>
  32 #include <linux/errno.h>
  33 #include <linux/init.h>
  34 #include <linux/timer.h>
  35 #include <linux/list.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/otg.h>
  38 #include <linux/usb/hcd.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/dmapool.h>
  41 #include <linux/workqueue.h>
  42 #include <linux/debugfs.h>
  43
  44 #include <asm/io.h>
  45 #include <asm/irq.h>
  46 #include <asm/unaligned.h>
  47 #include <asm/byteorder.h>
  48
  49
  50 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  51 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  52
  53 /*-------------------------------------------------------------------------*/
  54
  55 /* For initializing controller (mask in an HCFS mode too) */
  56 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  57 #define OHCI_INTR_INIT \
  58                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  59                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  60
  61 #ifdef __hppa__
  62 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  63 #define IR_DISABLE
  64 #endif
  65
  66 #ifdef CONFIG_ARCH_OMAP
  67 /* OMAP doesn't support IR (no SMM; not needed) */
  68 #define IR_DISABLE
  69 #endif
  70
  71 /*-------------------------------------------------------------------------*/
  72
  73 static const char       hcd_name [] = "ohci_hcd";
  74
  75 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  76 #define IO_WATCHDOG_DELAY       msecs_to_jiffies(275)
  77
  78 #include "ohci.h"
  79 #include "pci-quirks.h"
  80
  81 static void ohci_dump(struct ohci_hcd *ohci);
  82 static void ohci_stop(struct usb_hcd *hcd);
  83 static void io_watchdog_func(unsigned long _ohci);
  84
  85 #include "ohci-hub.c"
  86 #include "ohci-dbg.c"
  87 #include "ohci-mem.c"
  88 #include "ohci-q.c"
  89
  90
  91 /*
  92  * On architectures with edge-triggered interrupts we must never return
  93  * IRQ_NONE.
  94  */
  95 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
  96 #define IRQ_NOTMINE     IRQ_HANDLED
  97 #else
  98 #define IRQ_NOTMINE     IRQ_NONE
  99 #endif
 100
 101
 102 /* Some boards misreport power switching/overcurrent */
 103 static bool distrust_firmware = true;
 104 module_param (distrust_firmware, bool, 0);
 105 MODULE_PARM_DESC (distrust_firmware,
 106         "true to distrust firmware power/overcurrent setup");
 107
 108 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 109 static bool no_handshake;
 110 module_param (no_handshake, bool, 0);
 111 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 112
 113 /*-------------------------------------------------------------------------*/
 114
 115 static int number_of_tds(struct urb *urb)
 116 {
 117         int                     len, i, num, this_sg_len;
 118         struct scatterlist      *sg;
 119
 120         len = urb->transfer_buffer_length;
 121         i = urb->num_mapped_sgs;
 122
 123         if (len > 0 && i > 0) {         /* Scatter-gather transfer */
 124                 num = 0;
 125                 sg = urb->sg;
 126                 for (;;) {
 127                         this_sg_len = min_t(int, sg_dma_len(sg), len);
 128                         num += DIV_ROUND_UP(this_sg_len, 4096);
 129                         len -= this_sg_len;
 130                         if (--i <= 0 || len <= 0)
 131                                 break;
 132                         sg = sg_next(sg);
 133                 }
 134
 135         } else {                        /* Non-SG transfer */
 136                 /* one TD for every 4096 Bytes (could be up to 8K) */
 137                 num = DIV_ROUND_UP(len, 4096);
 138         }
 139         return num;
 140 }
 141
 142 /*
 143  * queue up an urb for anything except the root hub
 144  */
 145 static int ohci_urb_enqueue (
 146         struct usb_hcd  *hcd,
 147         struct urb      *urb,
 148         gfp_t           mem_flags
 149 ) {
 150         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 151         struct ed       *ed;
 152         urb_priv_t      *urb_priv;
 153         unsigned int    pipe = urb->pipe;
 154         int             i, size = 0;
 155         unsigned long   flags;
 156         int             retval = 0;
 157
 158         /* every endpoint has a ed, locate and maybe (re)initialize it */
 159         ed = ed_get(ohci, urb->ep, urb->dev, pipe, urb->interval);
 160         if (! ed)
 161                 return -ENOMEM;
 162
 163         /* for the private part of the URB we need the number of TDs (size) */
 164         switch (ed->type) {
 165                 case PIPE_CONTROL:
 166                         /* td_submit_urb() doesn't yet handle these */
 167                         if (urb->transfer_buffer_length > 4096)
 168                                 return -EMSGSIZE;
 169
 170                         /* 1 TD for setup, 1 for ACK, plus ... */
 171                         size = 2;
 172                         /* FALLTHROUGH */
 173                 // case PIPE_INTERRUPT:
 174                 // case PIPE_BULK:
 175                 default:
 176                         size += number_of_tds(urb);
 177                         /* maybe a zero-length packet to wrap it up */
 178                         if (size == 0)
 179                                 size++;
 180                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 181                                 && (urb->transfer_buffer_length
 182                                         % usb_maxpacket (urb->dev, pipe,
 183                                                 usb_pipeout (pipe))) == 0)
 184                                 size++;
 185                         break;
 186                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 187                         size = urb->number_of_packets;
 188                         break;
 189         }
 190
 191         /* allocate the private part of the URB */
 192         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 193                         mem_flags);
 194         if (!urb_priv)
 195                 return -ENOMEM;
 196         INIT_LIST_HEAD (&urb_priv->pending);
 197         urb_priv->length = size;
 198         urb_priv->ed = ed;
 199
 200         /* allocate the TDs (deferring hash chain updates) */
 201         for (i = 0; i < size; i++) {
 202                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 203                 if (!urb_priv->td [i]) {
 204                         urb_priv->length = i;
 205                         urb_free_priv (ohci, urb_priv);
 206                         return -ENOMEM;
 207                 }
 208         }
 209
 210         spin_lock_irqsave (&ohci->lock, flags);
 211
 212         /* don't submit to a dead HC */
 213         if (!HCD_HW_ACCESSIBLE(hcd)) {
 214                 retval = -ENODEV;
 215                 goto fail;
 216         }
 217         if (ohci->rh_state != OHCI_RH_RUNNING) {
 218                 retval = -ENODEV;
 219                 goto fail;
 220         }
 221         retval = usb_hcd_link_urb_to_ep(hcd, urb);
 222         if (retval)
 223                 goto fail;
 224
 225         /* schedule the ed if needed */
 226         if (ed->state == ED_IDLE) {
 227                 retval = ed_schedule (ohci, ed);
 228                 if (retval < 0) {
 229                         usb_hcd_unlink_urb_from_ep(hcd, urb);
 230                         goto fail;
 231                 }
 232
 233                 /* Start up the I/O watchdog timer, if it's not running */
 234                 if (!timer_pending(&ohci->io_watchdog) &&
 235                                 list_empty(&ohci->eds_in_use) &&
 236                                 !(ohci->flags & OHCI_QUIRK_QEMU)) {
 237                         ohci->prev_frame_no = ohci_frame_no(ohci);
 238                         mod_timer(&ohci->io_watchdog,
 239                                         jiffies + IO_WATCHDOG_DELAY);
 240                 }
 241                 list_add(&ed->in_use_list, &ohci->eds_in_use);
 242
 243                 if (ed->type == PIPE_ISOCHRONOUS) {
 244                         u16     frame = ohci_frame_no(ohci);
 245
 246                         /* delay a few frames before the first TD */
 247                         frame += max_t (u16, 8, ed->interval);
 248                         frame &= ~(ed->interval - 1);
 249                         frame |= ed->branch;
 250                         urb->start_frame = frame;
 251                         ed->last_iso = frame + ed->interval * (size - 1);
 252                 }
 253         } else if (ed->type == PIPE_ISOCHRONOUS) {
 254                 u16     next = ohci_frame_no(ohci) + 1;
 255                 u16     frame = ed->last_iso + ed->interval;
 256                 u16     length = ed->interval * (size - 1);
 257
 258                 /* Behind the scheduling threshold? */
 259                 if (unlikely(tick_before(frame, next))) {
 260
 261                         /* URB_ISO_ASAP: Round up to the first available slot */
 262                         if (urb->transfer_flags & URB_ISO_ASAP) {
 263                                 frame += (next - frame + ed->interval - 1) &
 264                                                 -ed->interval;
 265
 266                         /*
 267                          * Not ASAP: Use the next slot in the stream,
 268                          * no matter what.
 269                          */
 270                         } else {
 271                                 /*
 272                                  * Some OHCI hardware doesn't handle late TDs
 273                                  * correctly.  After retiring them it proceeds
 274                                  * to the next ED instead of the next TD.
 275                                  * Therefore we have to omit the late TDs
 276                                  * entirely.
 277                                  */
 278                                 urb_priv->td_cnt = DIV_ROUND_UP(
 279                                                 (u16) (next - frame),
 280                                                 ed->interval);
 281                                 if (urb_priv->td_cnt >= urb_priv->length) {
 282                                         ++urb_priv->td_cnt;     /* Mark it */
 283                                         ohci_dbg(ohci, "iso underrun %p (%u+%u < %u)\n",
 284                                                         urb, frame, length,
 285                                                         next);
 286                                 }
 287                         }
 288                 }
 289                 urb->start_frame = frame;
 290                 ed->last_iso = frame + length;
 291         }
 292
 293         /* fill the TDs and link them to the ed; and
 294          * enable that part of the schedule, if needed
 295          * and update count of queued periodic urbs
 296          */
 297         urb->hcpriv = urb_priv;
 298         td_submit_urb (ohci, urb);
 299
 300 fail:
 301         if (retval)
 302                 urb_free_priv (ohci, urb_priv);
 303         spin_unlock_irqrestore (&ohci->lock, flags);
 304         return retval;
 305 }
 306
 307 /*
 308  * decouple the URB from the HC queues (TDs, urb_priv).
 309  * reporting is always done
 310  * asynchronously, and we might be dealing with an urb that's
 311  * partially transferred, or an ED with other urbs being unlinked.
 312  */
 313 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 314 {
 315         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 316         unsigned long           flags;
 317         int                     rc;
 318         urb_priv_t              *urb_priv;
 319
 320         spin_lock_irqsave (&ohci->lock, flags);
 321         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 322         if (rc == 0) {
 323
 324                 /* Unless an IRQ completed the unlink while it was being
 325                  * handed to us, flag it for unlink and giveback, and force
 326                  * some upcoming INTR_SF to call finish_unlinks()
 327                  */
 328                 urb_priv = urb->hcpriv;
 329                 if (urb_priv->ed->state == ED_OPER)
 330                         start_ed_unlink(ohci, urb_priv->ed);
 331
 332                 if (ohci->rh_state != OHCI_RH_RUNNING) {
 333                         /* With HC dead, we can clean up right away */
 334                         ohci_work(ohci);
 335                 }
 336         }
 337         spin_unlock_irqrestore (&ohci->lock, flags);
 338         return rc;
 339 }
 340
 341 /*-------------------------------------------------------------------------*/
 342
 343 /* frees config/altsetting state for endpoints,
 344  * including ED memory, dummy TD, and bulk/intr data toggle
 345  */
 346
 347 static void
 348 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 349 {
 350         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 351         unsigned long           flags;
 352         struct ed               *ed = ep->hcpriv;
 353         unsigned                limit = 1000;
 354
 355         /* ASSERT:  any requests/urbs are being unlinked */
 356         /* ASSERT:  nobody can be submitting urbs for this any more */
 357
 358         if (!ed)
 359                 return;
 360
 361 rescan:
 362         spin_lock_irqsave (&ohci->lock, flags);
 363
 364         if (ohci->rh_state != OHCI_RH_RUNNING) {
 365 sanitize:
 366                 ed->state = ED_IDLE;
 367                 ohci_work(ohci);
 368         }
 369
 370         switch (ed->state) {
 371         case ED_UNLINK:         /* wait for hw to finish? */
 372                 /* major IRQ delivery trouble loses INTR_SF too... */
 373                 if (limit-- == 0) {
 374                         ohci_warn(ohci, "ED unlink timeout\n");
 375                         goto sanitize;
 376                 }
 377                 spin_unlock_irqrestore (&ohci->lock, flags);
 378                 schedule_timeout_uninterruptible(1);
 379                 goto rescan;
 380         case ED_IDLE:           /* fully unlinked */
 381                 if (list_empty (&ed->td_list)) {
 382                         td_free (ohci, ed->dummy);
 383                         ed_free (ohci, ed);
 384                         break;
 385                 }
 386                 /* fall through */
 387         default:
 388                 /* caller was supposed to have unlinked any requests;
 389                  * that's not our job.  can't recover; must leak ed.
 390                  */
 391                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 392                         ed, ep->desc.bEndpointAddress, ed->state,
 393                         list_empty (&ed->td_list) ? "" : " (has tds)");
 394                 td_free (ohci, ed->dummy);
 395                 break;
 396         }
 397         ep->hcpriv = NULL;
 398         spin_unlock_irqrestore (&ohci->lock, flags);
 399 }
 400
 401 static int ohci_get_frame (struct usb_hcd *hcd)
 402 {
 403         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 404
 405         return ohci_frame_no(ohci);
 406 }
 407
 408 static void ohci_usb_reset (struct ohci_hcd *ohci)
 409 {
 410         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 411         ohci->hc_control &= OHCI_CTRL_RWC;
 412         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 413         ohci->rh_state = OHCI_RH_HALTED;
 414 }
 415
 416 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 417  * other cases where the next software may expect clean state from the
 418  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 419  */
 420 static void
 421 ohci_shutdown (struct usb_hcd *hcd)
 422 {
 423         struct ohci_hcd *ohci;
 424
 425         ohci = hcd_to_ohci (hcd);
 426         ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
 427
 428         /* Software reset, after which the controller goes into SUSPEND */
 429         ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
 430         ohci_readl(ohci, &ohci->regs->cmdstatus);       /* flush the writes */
 431         udelay(10);
 432
 433         ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
 434         ohci->rh_state = OHCI_RH_HALTED;
 435 }
 436
 437 /*-------------------------------------------------------------------------*
 438  * HC functions
 439  *-------------------------------------------------------------------------*/
 440
 441 /* init memory, and kick BIOS/SMM off */
 442
 443 static int ohci_init (struct ohci_hcd *ohci)
 444 {
 445         int ret;
 446         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 447
 448         /* Accept arbitrarily long scatter-gather lists */
 449         hcd->self.sg_tablesize = ~0;
 450
 451         if (distrust_firmware)
 452                 ohci->flags |= OHCI_QUIRK_HUB_POWER;
 453
 454         ohci->rh_state = OHCI_RH_HALTED;
 455         ohci->regs = hcd->regs;
 456
 457         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 458          * was never needed for most non-PCI systems ... remove the code?
 459          */
 460
 461 #ifndef IR_DISABLE
 462         /* SMM owns the HC?  not for long! */
 463         if (!no_handshake && ohci_readl (ohci,
 464                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 465                 u32 temp;
 466
 467                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 468
 469                 /* this timeout is arbitrary.  we make it long, so systems
 470                  * depending on usb keyboards may be usable even if the
 471                  * BIOS/SMM code seems pretty broken.
 472                  */
 473                 temp = 500;     /* arbitrary: five seconds */
 474
 475                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 476                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 477                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 478                         msleep (10);
 479                         if (--temp == 0) {
 480                                 ohci_err (ohci, "USB HC takeover failed!"
 481                                         "  (BIOS/SMM bug)\n");
 482                                 return -EBUSY;
 483                         }
 484                 }
 485                 ohci_usb_reset (ohci);
 486         }
 487 #endif
 488
 489         /* Disable HC interrupts */
 490         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 491
 492         /* flush the writes, and save key bits like RWC */
 493         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 494                 ohci->hc_control |= OHCI_CTRL_RWC;
 495
 496         /* Read the number of ports unless overridden */
 497         if (ohci->num_ports == 0)
 498                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 499
 500         if (ohci->hcca)
 501                 return 0;
 502
 503         setup_timer(&ohci->io_watchdog, io_watchdog_func,
 504                         (unsigned long) ohci);
 505
 506         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 507                         sizeof(*ohci->hcca), &ohci->hcca_dma, GFP_KERNEL);
 508         if (!ohci->hcca)
 509                 return -ENOMEM;
 510
 511         if ((ret = ohci_mem_init (ohci)) < 0)
 512                 ohci_stop (hcd);
 513         else {
 514                 create_debug_files (ohci);
 515         }
 516
 517         return ret;
 518 }
 519
 520 /*-------------------------------------------------------------------------*/
 521
 522 /* Start an OHCI controller, set the BUS operational
 523  * resets USB and controller
 524  * enable interrupts
 525  */
 526 static int ohci_run (struct ohci_hcd *ohci)
 527 {
 528         u32                     mask, val;
 529         int                     first = ohci->fminterval == 0;
 530         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 531
 532         ohci->rh_state = OHCI_RH_HALTED;
 533
 534         /* boot firmware should have set this up (5.1.1.3.1) */
 535         if (first) {
 536
 537                 val = ohci_readl (ohci, &ohci->regs->fminterval);
 538                 ohci->fminterval = val & 0x3fff;
 539                 if (ohci->fminterval != FI)
 540                         ohci_dbg (ohci, "fminterval delta %d\n",
 541                                 ohci->fminterval - FI);
 542                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 543                 /* also: power/overcurrent flags in roothub.a */
 544         }
 545
 546         /* Reset USB nearly "by the book".  RemoteWakeupConnected has
 547          * to be checked in case boot firmware (BIOS/SMM/...) has set up
 548          * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
 549          * If the bus glue detected wakeup capability then it should
 550          * already be enabled; if so we'll just enable it again.
 551          */
 552         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
 553                 device_set_wakeup_capable(hcd->self.controller, 1);
 554
 555         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 556         case OHCI_USB_OPER:
 557                 val = 0;
 558                 break;
 559         case OHCI_USB_SUSPEND:
 560         case OHCI_USB_RESUME:
 561                 ohci->hc_control &= OHCI_CTRL_RWC;
 562                 ohci->hc_control |= OHCI_USB_RESUME;
 563                 val = 10 /* msec wait */;
 564                 break;
 565         // case OHCI_USB_RESET:
 566         default:
 567                 ohci->hc_control &= OHCI_CTRL_RWC;
 568                 ohci->hc_control |= OHCI_USB_RESET;
 569                 val = 50 /* msec wait */;
 570                 break;
 571         }
 572         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 573         // flush the writes
 574         (void) ohci_readl (ohci, &ohci->regs->control);
 575         msleep(val);
 576
 577         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 578
 579         /* 2msec timelimit here means no irqs/preempt */
 580         spin_lock_irq (&ohci->lock);
 581
 582 retry:
 583         /* HC Reset requires max 10 us delay */
 584         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 585         val = 30;       /* ... allow extra time */
 586         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 587                 if (--val == 0) {
 588                         spin_unlock_irq (&ohci->lock);
 589                         ohci_err (ohci, "USB HC reset timed out!\n");
 590                         return -1;
 591                 }
 592                 udelay (1);
 593         }
 594
 595         /* now we're in the SUSPEND state ... must go OPERATIONAL
 596          * within 2msec else HC enters RESUME
 597          *
 598          * ... but some hardware won't init fmInterval "by the book"
 599          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 600          * this if we write fmInterval after we're OPERATIONAL.
 601          * Unclear about ALi, ServerWorks, and others ... this could
 602          * easily be a longstanding bug in chip init on Linux.
 603          */
 604         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 605                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 606                 // flush those writes
 607                 (void) ohci_readl (ohci, &ohci->regs->control);
 608         }
 609
 610         /* Tell the controller where the control and bulk lists are
 611          * The lists are empty now. */
 612         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 613         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 614
 615         /* a reset clears this */
 616         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 617
 618         periodic_reinit (ohci);
 619
 620         /* some OHCI implementations are finicky about how they init.
 621          * bogus values here mean not even enumeration could work.
 622          */
 623         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 624                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 625                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 626                         ohci->flags |= OHCI_QUIRK_INITRESET;
 627                         ohci_dbg (ohci, "enabling initreset quirk\n");
 628                         goto retry;
 629                 }
 630                 spin_unlock_irq (&ohci->lock);
 631                 ohci_err (ohci, "init err (%08x %04x)\n",
 632                         ohci_readl (ohci, &ohci->regs->fminterval),
 633                         ohci_readl (ohci, &ohci->regs->periodicstart));
 634                 return -EOVERFLOW;
 635         }
 636
 637         /* use rhsc irqs after hub_wq is allocated */
 638         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 639         hcd->uses_new_polling = 1;
 640
 641         /* start controller operations */
 642         ohci->hc_control &= OHCI_CTRL_RWC;
 643         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 644         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 645         ohci->rh_state = OHCI_RH_RUNNING;
 646
 647         /* wake on ConnectStatusChange, matching external hubs */
 648         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 649
 650         /* Choose the interrupts we care about now, others later on demand */
 651         mask = OHCI_INTR_INIT;
 652         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 653         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 654
 655         /* handle root hub init quirks ... */
 656         val = roothub_a (ohci);
 657         val &= ~(RH_A_PSM | RH_A_OCPM);
 658         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 659                 /* NSC 87560 and maybe others */
 660                 val |= RH_A_NOCP;
 661                 val &= ~(RH_A_POTPGT | RH_A_NPS);
 662                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 663         } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 664                         (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 665                 /* hub power always on; required for AMD-756 and some
 666                  * Mac platforms.  ganged overcurrent reporting, if any.
 667                  */
 668                 val |= RH_A_NPS;
 669                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 670         }
 671         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 672         ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
 673                                                 &ohci->regs->roothub.b);
 674         // flush those writes
 675         (void) ohci_readl (ohci, &ohci->regs->control);
 676
 677         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 678         spin_unlock_irq (&ohci->lock);
 679
 680         // POTPGT delay is bits 24-31, in 2 ms units.
 681         mdelay ((val >> 23) & 0x1fe);
 682
 683         ohci_dump(ohci);
 684
 685         return 0;
 686 }
 687
 688 /* ohci_setup routine for generic controller initialization */
 689
 690 int ohci_setup(struct usb_hcd *hcd)
 691 {
 692         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 693
 694         ohci_hcd_init(ohci);
 695
 696         return ohci_init(ohci);
 697 }
 698 EXPORT_SYMBOL_GPL(ohci_setup);
 699
 700 /* ohci_start routine for generic controller start of all OHCI bus glue */
 701 static int ohci_start(struct usb_hcd *hcd)
 702 {
 703         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 704         int     ret;
 705
 706         ret = ohci_run(ohci);
 707         if (ret < 0) {
 708                 ohci_err(ohci, "can't start\n");
 709                 ohci_stop(hcd);
 710         }
 711         return ret;
 712 }
 713
 714 /*-------------------------------------------------------------------------*/
 715
 716 /*
 717  * Some OHCI controllers are known to lose track of completed TDs.  They
 718  * don't add the TDs to the hardware done queue, which means we never see
 719  * them as being completed.
 720  *
 721  * This watchdog routine checks for such problems.  Without some way to
 722  * tell when those TDs have completed, we would never take their EDs off
 723  * the unlink list.  As a result, URBs could never be dequeued and
 724  * endpoints could never be released.
 725  */
 726 static void io_watchdog_func(unsigned long _ohci)
 727 {
 728         struct ohci_hcd *ohci = (struct ohci_hcd *) _ohci;
 729         bool            takeback_all_pending = false;
 730         u32             status;
 731         u32             head;
 732         struct ed       *ed;
 733         struct td       *td, *td_start, *td_next;
 734         unsigned        frame_no;
 735         unsigned long   flags;
 736
 737         spin_lock_irqsave(&ohci->lock, flags);
 738
 739         /*
 740          * One way to lose track of completed TDs is if the controller
 741          * never writes back the done queue head.  If it hasn't been
 742          * written back since the last time this function ran and if it
 743          * was non-empty at that time, something is badly wrong with the
 744          * hardware.
 745          */
 746         status = ohci_readl(ohci, &ohci->regs->intrstatus);
 747         if (!(status & OHCI_INTR_WDH) && ohci->wdh_cnt == ohci->prev_wdh_cnt) {
 748                 if (ohci->prev_donehead) {
 749                         ohci_err(ohci, "HcDoneHead not written back; disabled\n");
 750  died:
 751                         usb_hc_died(ohci_to_hcd(ohci));
 752                         ohci_dump(ohci);
 753                         ohci_shutdown(ohci_to_hcd(ohci));
 754                         goto done;
 755                 } else {
 756                         /* No write back because the done queue was empty */
 757                         takeback_all_pending = true;
 758                 }
 759         }
 760
 761         /* Check every ED which might have pending TDs */
 762         list_for_each_entry(ed, &ohci->eds_in_use, in_use_list) {
 763                 if (ed->pending_td) {
 764                         if (takeback_all_pending ||
 765                                         OKAY_TO_TAKEBACK(ohci, ed)) {
 766                                 unsigned tmp = hc32_to_cpu(ohci, ed->hwINFO);
 767
 768                                 ohci_dbg(ohci, "takeback pending TD for dev %d ep 0x%x\n",
 769                                                 0x007f & tmp,
 770                                                 (0x000f & (tmp >> 7)) +
 771                                                         ((tmp & ED_IN) >> 5));
 772                                 add_to_done_list(ohci, ed->pending_td);
 773                         }
 774                 }
 775
 776                 /* Starting from the latest pending TD, */
 777                 td = ed->pending_td;
 778
 779                 /* or the last TD on the done list, */
 780                 if (!td) {
 781                         list_for_each_entry(td_next, &ed->td_list, td_list) {
 782                                 if (!td_next->next_dl_td)
 783                                         break;
 784                                 td = td_next;
 785                         }
 786                 }
 787
 788                 /* find the last TD processed by the controller. */
 789                 head = hc32_to_cpu(ohci, READ_ONCE(ed->hwHeadP)) & TD_MASK;
 790                 td_start = td;
 791                 td_next = list_prepare_entry(td, &ed->td_list, td_list);
 792                 list_for_each_entry_continue(td_next, &ed->td_list, td_list) {
 793                         if (head == (u32) td_next->td_dma)
 794                                 break;
 795                         td = td_next;   /* head pointer has passed this TD */
 796                 }
 797                 if (td != td_start) {
 798                         /*
 799                          * In case a WDH cycle is in progress, we will wait
 800                          * for the next two cycles to complete before assuming
 801                          * this TD will never get on the done queue.
 802                          */
 803                         ed->takeback_wdh_cnt = ohci->wdh_cnt + 2;
 804                         ed->pending_td = td;
 805                 }
 806         }
 807
 808         ohci_work(ohci);
 809
 810         if (ohci->rh_state == OHCI_RH_RUNNING) {
 811
 812                 /*
 813                  * Sometimes a controller just stops working.  We can tell
 814                  * by checking that the frame counter has advanced since
 815                  * the last time we ran.
 816                  *
 817                  * But be careful: Some controllers violate the spec by
 818                  * stopping their frame counter when no ports are active.
 819                  */
 820                 frame_no = ohci_frame_no(ohci);
 821                 if (frame_no == ohci->prev_frame_no) {
 822                         int             active_cnt = 0;
 823                         int             i;
 824                         unsigned        tmp;
 825
 826                         for (i = 0; i < ohci->num_ports; ++i) {
 827                                 tmp = roothub_portstatus(ohci, i);
 828                                 /* Enabled and not suspended? */
 829                                 if ((tmp & RH_PS_PES) && !(tmp & RH_PS_PSS))
 830                                         ++active_cnt;
 831                         }
 832
 833                         if (active_cnt > 0) {
 834                                 ohci_err(ohci, "frame counter not updating; disabled\n");
 835                                 goto died;
 836                         }
 837                 }
 838                 if (!list_empty(&ohci->eds_in_use)) {
 839                         ohci->prev_frame_no = frame_no;
 840                         ohci->prev_wdh_cnt = ohci->wdh_cnt;
 841                         ohci->prev_donehead = ohci_readl(ohci,
 842                                         &ohci->regs->donehead);
 843                         mod_timer(&ohci->io_watchdog,
 844                                         jiffies + IO_WATCHDOG_DELAY);
 845                 }
 846         }
 847
 848  done:
 849         spin_unlock_irqrestore(&ohci->lock, flags);
 850 }
 851
 852 /* an interrupt happens */
 853
 854 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 855 {
 856         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 857         struct ohci_regs __iomem *regs = ohci->regs;
 858         int                     ints;
 859
 860         /* Read interrupt status (and flush pending writes).  We ignore the
 861          * optimization of checking the LSB of hcca->done_head; it doesn't
 862          * work on all systems (edge triggering for OHCI can be a factor).
 863          */
 864         ints = ohci_readl(ohci, &regs->intrstatus);
 865
 866         /* Check for an all 1's result which is a typical consequence
 867          * of dead, unclocked, or unplugged (CardBus...) devices
 868          */
 869         if (ints == ~(u32)0) {
 870                 ohci->rh_state = OHCI_RH_HALTED;
 871                 ohci_dbg (ohci, "device removed!\n");
 872                 usb_hc_died(hcd);
 873                 return IRQ_HANDLED;
 874         }
 875
 876         /* We only care about interrupts that are enabled */
 877         ints &= ohci_readl(ohci, &regs->intrenable);
 878
 879         /* interrupt for some other device? */
 880         if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
 881                 return IRQ_NOTMINE;
 882
 883         if (ints & OHCI_INTR_UE) {
 884                 // e.g. due to PCI Master/Target Abort
 885                 if (quirk_nec(ohci)) {
 886                         /* Workaround for a silicon bug in some NEC chips used
 887                          * in Apple's PowerBooks. Adapted from Darwin code.
 888                          */
 889                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 890
 891                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 892
 893                         schedule_work (&ohci->nec_work);
 894                 } else {
 895                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 896                         ohci->rh_state = OHCI_RH_HALTED;
 897                         usb_hc_died(hcd);
 898                 }
 899
 900                 ohci_dump(ohci);
 901                 ohci_usb_reset (ohci);
 902         }
 903
 904         if (ints & OHCI_INTR_RHSC) {
 905                 ohci_dbg(ohci, "rhsc\n");
 906                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 907                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 908                                 &regs->intrstatus);
 909
 910                 /* NOTE: Vendors didn't always make the same implementation
 911                  * choices for RHSC.  Many followed the spec; RHSC triggers
 912                  * on an edge, like setting and maybe clearing a port status
 913                  * change bit.  With others it's level-triggered, active
 914                  * until hub_wq clears all the port status change bits.  We'll
 915                  * always disable it here and rely on polling until hub_wq
 916                  * re-enables it.
 917                  */
 918                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 919                 usb_hcd_poll_rh_status(hcd);
 920         }
 921
 922         /* For connect and disconnect events, we expect the controller
 923          * to turn on RHSC along with RD.  But for remote wakeup events
 924          * this might not happen.
 925          */
 926         else if (ints & OHCI_INTR_RD) {
 927                 ohci_dbg(ohci, "resume detect\n");
 928                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 929                 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 930                 if (ohci->autostop) {
 931                         spin_lock (&ohci->lock);
 932                         ohci_rh_resume (ohci);
 933                         spin_unlock (&ohci->lock);
 934                 } else
 935                         usb_hcd_resume_root_hub(hcd);
 936         }
 937
 938         spin_lock(&ohci->lock);
 939         if (ints & OHCI_INTR_WDH)
 940                 update_done_list(ohci);
 941
 942         /* could track INTR_SO to reduce available PCI/... bandwidth */
 943
 944         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 945          * when there's still unlinking to be done (next frame).
 946          */
 947         ohci_work(ohci);
 948         if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 949                         && ohci->rh_state == OHCI_RH_RUNNING)
 950                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 951
 952         if (ohci->rh_state == OHCI_RH_RUNNING) {
 953                 ohci_writel (ohci, ints, &regs->intrstatus);
 954                 if (ints & OHCI_INTR_WDH)
 955                         ++ohci->wdh_cnt;
 956
 957                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 958                 // flush those writes
 959                 (void) ohci_readl (ohci, &ohci->regs->control);
 960         }
 961         spin_unlock(&ohci->lock);
 962
 963         return IRQ_HANDLED;
 964 }
 965
 966 /*-------------------------------------------------------------------------*/
 967
 968 static void ohci_stop (struct usb_hcd *hcd)
 969 {
 970         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 971
 972         ohci_dump(ohci);
 973
 974         if (quirk_nec(ohci))
 975                 flush_work(&ohci->nec_work);
 976         del_timer_sync(&ohci->io_watchdog);
 977
 978         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 979         ohci_usb_reset(ohci);
 980         free_irq(hcd->irq, hcd);
 981         hcd->irq = 0;
 982
 983         if (quirk_amdiso(ohci))
 984                 usb_amd_dev_put();
 985
 986         remove_debug_files (ohci);
 987         ohci_mem_cleanup (ohci);
 988         if (ohci->hcca) {
 989                 dma_free_coherent (hcd->self.controller,
 990                                 sizeof *ohci->hcca,
 991                                 ohci->hcca, ohci->hcca_dma);
 992                 ohci->hcca = NULL;
 993                 ohci->hcca_dma = 0;
 994         }
 995 }
 996
 997 /*-------------------------------------------------------------------------*/
 998
 999 #if defined(CONFIG_PM) || defined(CONFIG_USB_PCI)
1000
1001 /* must not be called from interrupt context */
1002 int ohci_restart(struct ohci_hcd *ohci)
1003 {
1004         int temp;
1005         int i;
1006         struct urb_priv *priv;
1007
1008         ohci_init(ohci);
1009         spin_lock_irq(&ohci->lock);
1010         ohci->rh_state = OHCI_RH_HALTED;
1011
1012         /* Recycle any "live" eds/tds (and urbs). */
1013         if (!list_empty (&ohci->pending))
1014                 ohci_dbg(ohci, "abort schedule...\n");
1015         list_for_each_entry (priv, &ohci->pending, pending) {
1016                 struct urb      *urb = priv->td[0]->urb;
1017                 struct ed       *ed = priv->ed;
1018
1019                 switch (ed->state) {
1020                 case ED_OPER:
1021                         ed->state = ED_UNLINK;
1022                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
1023                         ed_deschedule (ohci, ed);
1024
1025                         ed->ed_next = ohci->ed_rm_list;
1026                         ed->ed_prev = NULL;
1027                         ohci->ed_rm_list = ed;
1028                         /* FALLTHROUGH */
1029                 case ED_UNLINK:
1030                         break;
1031                 default:
1032                         ohci_dbg(ohci, "bogus ed %p state %d\n",
1033                                         ed, ed->state);
1034                 }
1035
1036                 if (!urb->unlinked)
1037                         urb->unlinked = -ESHUTDOWN;
1038         }
1039         ohci_work(ohci);
1040         spin_unlock_irq(&ohci->lock);
1041
1042         /* paranoia, in case that didn't work: */
1043
1044         /* empty the interrupt branches */
1045         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
1046         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
1047
1048         /* no EDs to remove */
1049         ohci->ed_rm_list = NULL;
1050
1051         /* empty control and bulk lists */
1052         ohci->ed_controltail = NULL;
1053         ohci->ed_bulktail    = NULL;
1054
1055         if ((temp = ohci_run (ohci)) < 0) {
1056                 ohci_err (ohci, "can't restart, %d\n", temp);
1057                 return temp;
1058         }
1059         ohci_dbg(ohci, "restart complete\n");
1060         return 0;
1061 }
1062 EXPORT_SYMBOL_GPL(ohci_restart);
1063
1064 #endif
1065
1066 #ifdef CONFIG_PM
1067
1068 int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1069 {
1070         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
1071         unsigned long   flags;
1072         int             rc = 0;
1073
1074         /* Disable irq emission and mark HW unaccessible. Use
1075          * the spinlock to properly synchronize with possible pending
1076          * RH suspend or resume activity.
1077          */
1078         spin_lock_irqsave (&ohci->lock, flags);
1079         ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1080         (void)ohci_readl(ohci, &ohci->regs->intrdisable);
1081
1082         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1083         spin_unlock_irqrestore (&ohci->lock, flags);
1084
1085         synchronize_irq(hcd->irq);
1086
1087         if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1088                 ohci_resume(hcd, false);
1089                 rc = -EBUSY;
1090         }
1091         return rc;
1092 }
1093 EXPORT_SYMBOL_GPL(ohci_suspend);
1094
1095
1096 int ohci_resume(struct usb_hcd *hcd, bool hibernated)
1097 {
1098         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
1099         int                     port;
1100         bool                    need_reinit = false;
1101
1102         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1103
1104         /* Make sure resume from hibernation re-enumerates everything */
1105         if (hibernated)
1106                 ohci_usb_reset(ohci);
1107
1108         /* See if the controller is already running or has been reset */
1109         ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
1110         if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
1111                 need_reinit = true;
1112         } else {
1113                 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
1114                 case OHCI_USB_OPER:
1115                 case OHCI_USB_RESET:
1116                         need_reinit = true;
1117                 }
1118         }
1119
1120         /* If needed, reinitialize and suspend the root hub */
1121         if (need_reinit) {
1122                 spin_lock_irq(&ohci->lock);
1123                 ohci_rh_resume(ohci);
1124                 ohci_rh_suspend(ohci, 0);
1125                 spin_unlock_irq(&ohci->lock);
1126         }
1127
1128         /* Normally just turn on port power and enable interrupts */
1129         else {
1130                 ohci_dbg(ohci, "powerup ports\n");
1131                 for (port = 0; port < ohci->num_ports; port++)
1132                         ohci_writel(ohci, RH_PS_PPS,
1133                                         &ohci->regs->roothub.portstatus[port]);
1134
1135                 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
1136                 ohci_readl(ohci, &ohci->regs->intrenable);
1137                 msleep(20);
1138         }
1139
1140         usb_hcd_resume_root_hub(hcd);
1141
1142         return 0;
1143 }
1144 EXPORT_SYMBOL_GPL(ohci_resume);
1145
1146 #endif
1147
1148 /*-------------------------------------------------------------------------*/
1149
1150 /*
1151  * Generic structure: This gets copied for platform drivers so that
1152  * individual entries can be overridden as needed.
1153  */
1154
1155 static const struct hc_driver ohci_hc_driver = {
1156         .description =          hcd_name,
1157         .product_desc =         "OHCI Host Controller",
1158         .hcd_priv_size =        sizeof(struct ohci_hcd),
1159
1160         /*
1161          * generic hardware linkage
1162         */
1163         .irq =                  ohci_irq,
1164         .flags =                HCD_MEMORY | HCD_USB11,
1165
1166         /*
1167         * basic lifecycle operations
1168         */
1169         .reset =                ohci_setup,
1170         .start =                ohci_start,
1171         .stop =                 ohci_stop,
1172         .shutdown =             ohci_shutdown,
1173
1174         /*
1175          * managing i/o requests and associated device resources
1176         */
1177         .urb_enqueue =          ohci_urb_enqueue,
1178         .urb_dequeue =          ohci_urb_dequeue,
1179         .endpoint_disable =     ohci_endpoint_disable,
1180
1181         /*
1182         * scheduling support
1183         */
1184         .get_frame_number =     ohci_get_frame,
1185
1186         /*
1187         * root hub support
1188         */
1189         .hub_status_data =      ohci_hub_status_data,
1190         .hub_control =          ohci_hub_control,
1191 #ifdef CONFIG_PM
1192         .bus_suspend =          ohci_bus_suspend,
1193         .bus_resume =           ohci_bus_resume,
1194 #endif
1195         .start_port_reset =     ohci_start_port_reset,
1196 };
1197
1198 void ohci_init_driver(struct hc_driver *drv,
1199                 const struct ohci_driver_overrides *over)
1200 {
1201         /* Copy the generic table to drv and then apply the overrides */
1202         *drv = ohci_hc_driver;
1203
1204         if (over) {
1205                 drv->product_desc = over->product_desc;
1206                 drv->hcd_priv_size += over->extra_priv_size;
1207                 if (over->reset)
1208                         drv->reset = over->reset;
1209         }
1210 }
1211 EXPORT_SYMBOL_GPL(ohci_init_driver);
1212
1213 /*-------------------------------------------------------------------------*/
1214
1215 MODULE_AUTHOR (DRIVER_AUTHOR);
1216 MODULE_DESCRIPTION(DRIVER_DESC);
1217 MODULE_LICENSE ("GPL");
1218
1219 #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1220 #include "ohci-sa1111.c"
1221 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
1222 #endif
1223
1224 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1225 #include "ohci-ppc-of.c"
1226 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1227 #endif
1228
1229 #ifdef CONFIG_PPC_PS3
1230 #include "ohci-ps3.c"
1231 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1232 #endif
1233
1234 #ifdef CONFIG_MFD_SM501
1235 #include "ohci-sm501.c"
1236 #define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1237 #endif
1238
1239 #ifdef CONFIG_MFD_TC6393XB
1240 #include "ohci-tmio.c"
1241 #define TMIO_OHCI_DRIVER        ohci_hcd_tmio_driver
1242 #endif
1243
1244 #ifdef CONFIG_TILE_USB
1245 #include "ohci-tilegx.c"
1246 #define PLATFORM_DRIVER         ohci_hcd_tilegx_driver
1247 #endif
1248
1249 static int __init ohci_hcd_mod_init(void)
1250 {
1251         int retval = 0;
1252
1253         if (usb_disabled())
1254                 return -ENODEV;
1255
1256         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1257         pr_debug ("%s: block sizes: ed %zd td %zd\n", hcd_name,
1258                 sizeof (struct ed), sizeof (struct td));
1259         set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1260
1261         ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1262         if (!ohci_debug_root) {
1263                 retval = -ENOENT;
1264                 goto error_debug;
1265         }
1266
1267 #ifdef PS3_SYSTEM_BUS_DRIVER
1268         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1269         if (retval < 0)
1270                 goto error_ps3;
1271 #endif
1272
1273 #ifdef PLATFORM_DRIVER
1274         retval = platform_driver_register(&PLATFORM_DRIVER);
1275         if (retval < 0)
1276                 goto error_platform;
1277 #endif
1278
1279 #ifdef OF_PLATFORM_DRIVER
1280         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1281         if (retval < 0)
1282                 goto error_of_platform;
1283 #endif
1284
1285 #ifdef SA1111_DRIVER
1286         retval = sa1111_driver_register(&SA1111_DRIVER);
1287         if (retval < 0)
1288                 goto error_sa1111;
1289 #endif
1290
1291 #ifdef SM501_OHCI_DRIVER
1292         retval = platform_driver_register(&SM501_OHCI_DRIVER);
1293         if (retval < 0)
1294                 goto error_sm501;
1295 #endif
1296
1297 #ifdef TMIO_OHCI_DRIVER
1298         retval = platform_driver_register(&TMIO_OHCI_DRIVER);
1299         if (retval < 0)
1300                 goto error_tmio;
1301 #endif
1302
1303         return retval;
1304
1305         /* Error path */
1306 #ifdef TMIO_OHCI_DRIVER
1307         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1308  error_tmio:
1309 #endif
1310 #ifdef SM501_OHCI_DRIVER
1311         platform_driver_unregister(&SM501_OHCI_DRIVER);
1312  error_sm501:
1313 #endif
1314 #ifdef SA1111_DRIVER
1315         sa1111_driver_unregister(&SA1111_DRIVER);
1316  error_sa1111:
1317 #endif
1318 #ifdef OF_PLATFORM_DRIVER
1319         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1320  error_of_platform:
1321 #endif
1322 #ifdef PLATFORM_DRIVER
1323         platform_driver_unregister(&PLATFORM_DRIVER);
1324  error_platform:
1325 #endif
1326 #ifdef PS3_SYSTEM_BUS_DRIVER
1327         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1328  error_ps3:
1329 #endif
1330         debugfs_remove(ohci_debug_root);
1331         ohci_debug_root = NULL;
1332  error_debug:
1333
1334         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1335         return retval;
1336 }
1337 module_init(ohci_hcd_mod_init);
1338
1339 static void __exit ohci_hcd_mod_exit(void)
1340 {
1341 #ifdef TMIO_OHCI_DRIVER
1342         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1343 #endif
1344 #ifdef SM501_OHCI_DRIVER
1345         platform_driver_unregister(&SM501_OHCI_DRIVER);
1346 #endif
1347 #ifdef SA1111_DRIVER
1348         sa1111_driver_unregister(&SA1111_DRIVER);
1349 #endif
1350 #ifdef OF_PLATFORM_DRIVER
1351         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1352 #endif
1353 #ifdef PLATFORM_DRIVER
1354         platform_driver_unregister(&PLATFORM_DRIVER);
1355 #endif
1356 #ifdef PS3_SYSTEM_BUS_DRIVER
1357         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1358 #endif
1359         debugfs_remove(ohci_debug_root);
1360         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1361 }
1362 module_exit(ohci_hcd_mod_exit);
1363