drivers/usb/gadget/udc/atmel_usba_udc.c

   1 /*
   2  * Driver for the Atmel USBA high speed USB device controller
   3  *
   4  * Copyright (C) 2005-2007 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/clk.h>
  11 #include <linux/clk/at91_pmc.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/io.h>
  16 #include <linux/slab.h>
  17 #include <linux/device.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/list.h>
  20 #include <linux/mfd/syscon.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/regmap.h>
  23 #include <linux/ctype.h>
  24 #include <linux/usb/ch9.h>
  25 #include <linux/usb/gadget.h>
  26 #include <linux/usb/atmel_usba_udc.h>
  27 #include <linux/delay.h>
  28 #include <linux/of.h>
  29 #include <linux/of_gpio.h>
  30
  31 #include "atmel_usba_udc.h"
  32
  33 #ifdef CONFIG_USB_GADGET_DEBUG_FS
  34 #include <linux/debugfs.h>
  35 #include <linux/uaccess.h>
  36
  37 static int queue_dbg_open(struct inode *inode, struct file *file)
  38 {
  39         struct usba_ep *ep = inode->i_private;
  40         struct usba_request *req, *req_copy;
  41         struct list_head *queue_data;
  42
  43         queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
  44         if (!queue_data)
  45                 return -ENOMEM;
  46         INIT_LIST_HEAD(queue_data);
  47
  48         spin_lock_irq(&ep->udc->lock);
  49         list_for_each_entry(req, &ep->queue, queue) {
  50                 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
  51                 if (!req_copy)
  52                         goto fail;
  53                 list_add_tail(&req_copy->queue, queue_data);
  54         }
  55         spin_unlock_irq(&ep->udc->lock);
  56
  57         file->private_data = queue_data;
  58         return 0;
  59
  60 fail:
  61         spin_unlock_irq(&ep->udc->lock);
  62         list_for_each_entry_safe(req, req_copy, queue_data, queue) {
  63                 list_del(&req->queue);
  64                 kfree(req);
  65         }
  66         kfree(queue_data);
  67         return -ENOMEM;
  68 }
  69
  70 /*
  71  * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
  72  *
  73  * b: buffer address
  74  * l: buffer length
  75  * I/i: interrupt/no interrupt
  76  * Z/z: zero/no zero
  77  * S/s: short ok/short not ok
  78  * s: status
  79  * n: nr_packets
  80  * F/f: submitted/not submitted to FIFO
  81  * D/d: using/not using DMA
  82  * L/l: last transaction/not last transaction
  83  */
  84 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
  85                 size_t nbytes, loff_t *ppos)
  86 {
  87         struct list_head *queue = file->private_data;
  88         struct usba_request *req, *tmp_req;
  89         size_t len, remaining, actual = 0;
  90         char tmpbuf[38];
  91
  92         if (!access_ok(VERIFY_WRITE, buf, nbytes))
  93                 return -EFAULT;
  94
  95         inode_lock(file_inode(file));
  96         list_for_each_entry_safe(req, tmp_req, queue, queue) {
  97                 len = snprintf(tmpbuf, sizeof(tmpbuf),
  98                                 "%8p %08x %c%c%c %5d %c%c%c\n",
  99                                 req->req.buf, req->req.length,
 100                                 req->req.no_interrupt ? 'i' : 'I',
 101                                 req->req.zero ? 'Z' : 'z',
 102                                 req->req.short_not_ok ? 's' : 'S',
 103                                 req->req.status,
 104                                 req->submitted ? 'F' : 'f',
 105                                 req->using_dma ? 'D' : 'd',
 106                                 req->last_transaction ? 'L' : 'l');
 107                 len = min(len, sizeof(tmpbuf));
 108                 if (len > nbytes)
 109                         break;
 110
 111                 list_del(&req->queue);
 112                 kfree(req);
 113
 114                 remaining = __copy_to_user(buf, tmpbuf, len);
 115                 actual += len - remaining;
 116                 if (remaining)
 117                         break;
 118
 119                 nbytes -= len;
 120                 buf += len;
 121         }
 122         inode_unlock(file_inode(file));
 123
 124         return actual;
 125 }
 126
 127 static int queue_dbg_release(struct inode *inode, struct file *file)
 128 {
 129         struct list_head *queue_data = file->private_data;
 130         struct usba_request *req, *tmp_req;
 131
 132         list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
 133                 list_del(&req->queue);
 134                 kfree(req);
 135         }
 136         kfree(queue_data);
 137         return 0;
 138 }
 139
 140 static int regs_dbg_open(struct inode *inode, struct file *file)
 141 {
 142         struct usba_udc *udc;
 143         unsigned int i;
 144         u32 *data;
 145         int ret = -ENOMEM;
 146
 147         inode_lock(inode);
 148         udc = inode->i_private;
 149         data = kmalloc(inode->i_size, GFP_KERNEL);
 150         if (!data)
 151                 goto out;
 152
 153         spin_lock_irq(&udc->lock);
 154         for (i = 0; i < inode->i_size / 4; i++)
 155                 data[i] = readl_relaxed(udc->regs + i * 4);
 156         spin_unlock_irq(&udc->lock);
 157
 158         file->private_data = data;
 159         ret = 0;
 160
 161 out:
 162         inode_unlock(inode);
 163
 164         return ret;
 165 }
 166
 167 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
 168                 size_t nbytes, loff_t *ppos)
 169 {
 170         struct inode *inode = file_inode(file);
 171         int ret;
 172
 173         inode_lock(inode);
 174         ret = simple_read_from_buffer(buf, nbytes, ppos,
 175                         file->private_data,
 176                         file_inode(file)->i_size);
 177         inode_unlock(inode);
 178
 179         return ret;
 180 }
 181
 182 static int regs_dbg_release(struct inode *inode, struct file *file)
 183 {
 184         kfree(file->private_data);
 185         return 0;
 186 }
 187
 188 const struct file_operations queue_dbg_fops = {
 189         .owner          = THIS_MODULE,
 190         .open           = queue_dbg_open,
 191         .llseek         = no_llseek,
 192         .read           = queue_dbg_read,
 193         .release        = queue_dbg_release,
 194 };
 195
 196 const struct file_operations regs_dbg_fops = {
 197         .owner          = THIS_MODULE,
 198         .open           = regs_dbg_open,
 199         .llseek         = generic_file_llseek,
 200         .read           = regs_dbg_read,
 201         .release        = regs_dbg_release,
 202 };
 203
 204 static void usba_ep_init_debugfs(struct usba_udc *udc,
 205                 struct usba_ep *ep)
 206 {
 207         struct dentry *ep_root;
 208
 209         ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
 210         if (!ep_root)
 211                 goto err_root;
 212         ep->debugfs_dir = ep_root;
 213
 214         ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
 215                                                 ep, &queue_dbg_fops);
 216         if (!ep->debugfs_queue)
 217                 goto err_queue;
 218
 219         if (ep->can_dma) {
 220                 ep->debugfs_dma_status
 221                         = debugfs_create_u32("dma_status", 0400, ep_root,
 222                                         &ep->last_dma_status);
 223                 if (!ep->debugfs_dma_status)
 224                         goto err_dma_status;
 225         }
 226         if (ep_is_control(ep)) {
 227                 ep->debugfs_state
 228                         = debugfs_create_u32("state", 0400, ep_root,
 229                                         &ep->state);
 230                 if (!ep->debugfs_state)
 231                         goto err_state;
 232         }
 233
 234         return;
 235
 236 err_state:
 237         if (ep->can_dma)
 238                 debugfs_remove(ep->debugfs_dma_status);
 239 err_dma_status:
 240         debugfs_remove(ep->debugfs_queue);
 241 err_queue:
 242         debugfs_remove(ep_root);
 243 err_root:
 244         dev_err(&ep->udc->pdev->dev,
 245                 "failed to create debugfs directory for %s\n", ep->ep.name);
 246 }
 247
 248 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
 249 {
 250         debugfs_remove(ep->debugfs_queue);
 251         debugfs_remove(ep->debugfs_dma_status);
 252         debugfs_remove(ep->debugfs_state);
 253         debugfs_remove(ep->debugfs_dir);
 254         ep->debugfs_dma_status = NULL;
 255         ep->debugfs_dir = NULL;
 256 }
 257
 258 static void usba_init_debugfs(struct usba_udc *udc)
 259 {
 260         struct dentry *root, *regs;
 261         struct resource *regs_resource;
 262
 263         root = debugfs_create_dir(udc->gadget.name, NULL);
 264         if (IS_ERR(root) || !root)
 265                 goto err_root;
 266         udc->debugfs_root = root;
 267
 268         regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
 269                                 CTRL_IOMEM_ID);
 270
 271         if (regs_resource) {
 272                 regs = debugfs_create_file_size("regs", 0400, root, udc,
 273                                                 &regs_dbg_fops,
 274                                                 resource_size(regs_resource));
 275                 if (!regs)
 276                         goto err_regs;
 277                 udc->debugfs_regs = regs;
 278         }
 279
 280         usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
 281
 282         return;
 283
 284 err_regs:
 285         debugfs_remove(root);
 286 err_root:
 287         udc->debugfs_root = NULL;
 288         dev_err(&udc->pdev->dev, "debugfs is not available\n");
 289 }
 290
 291 static void usba_cleanup_debugfs(struct usba_udc *udc)
 292 {
 293         usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
 294         debugfs_remove(udc->debugfs_regs);
 295         debugfs_remove(udc->debugfs_root);
 296         udc->debugfs_regs = NULL;
 297         udc->debugfs_root = NULL;
 298 }
 299 #else
 300 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
 301                                          struct usba_ep *ep)
 302 {
 303
 304 }
 305
 306 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
 307 {
 308
 309 }
 310
 311 static inline void usba_init_debugfs(struct usba_udc *udc)
 312 {
 313
 314 }
 315
 316 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
 317 {
 318
 319 }
 320 #endif
 321
 322 static ushort fifo_mode;
 323
 324 module_param(fifo_mode, ushort, 0x0);
 325 MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode");
 326
 327 /* mode 0 - uses autoconfig */
 328
 329 /* mode 1 - fits in 8KB, generic max fifo configuration */
 330 static struct usba_fifo_cfg mode_1_cfg[] = {
 331 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 332 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 2, },
 333 { .hw_ep_num = 2, .fifo_size = 1024,    .nr_banks = 1, },
 334 { .hw_ep_num = 3, .fifo_size = 1024,    .nr_banks = 1, },
 335 { .hw_ep_num = 4, .fifo_size = 1024,    .nr_banks = 1, },
 336 { .hw_ep_num = 5, .fifo_size = 1024,    .nr_banks = 1, },
 337 { .hw_ep_num = 6, .fifo_size = 1024,    .nr_banks = 1, },
 338 };
 339
 340 /* mode 2 - fits in 8KB, performance max fifo configuration */
 341 static struct usba_fifo_cfg mode_2_cfg[] = {
 342 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 343 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 3, },
 344 { .hw_ep_num = 2, .fifo_size = 1024,    .nr_banks = 2, },
 345 { .hw_ep_num = 3, .fifo_size = 1024,    .nr_banks = 2, },
 346 };
 347
 348 /* mode 3 - fits in 8KB, mixed fifo configuration */
 349 static struct usba_fifo_cfg mode_3_cfg[] = {
 350 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 351 { .hw_ep_num = 1, .fifo_size = 1024,    .nr_banks = 2, },
 352 { .hw_ep_num = 2, .fifo_size = 512,     .nr_banks = 2, },
 353 { .hw_ep_num = 3, .fifo_size = 512,     .nr_banks = 2, },
 354 { .hw_ep_num = 4, .fifo_size = 512,     .nr_banks = 2, },
 355 { .hw_ep_num = 5, .fifo_size = 512,     .nr_banks = 2, },
 356 { .hw_ep_num = 6, .fifo_size = 512,     .nr_banks = 2, },
 357 };
 358
 359 /* mode 4 - fits in 8KB, custom fifo configuration */
 360 static struct usba_fifo_cfg mode_4_cfg[] = {
 361 { .hw_ep_num = 0, .fifo_size = 64,      .nr_banks = 1, },
 362 { .hw_ep_num = 1, .fifo_size = 512,     .nr_banks = 2, },
 363 { .hw_ep_num = 2, .fifo_size = 512,     .nr_banks = 2, },
 364 { .hw_ep_num = 3, .fifo_size = 8,       .nr_banks = 2, },
 365 { .hw_ep_num = 4, .fifo_size = 512,     .nr_banks = 2, },
 366 { .hw_ep_num = 5, .fifo_size = 512,     .nr_banks = 2, },
 367 { .hw_ep_num = 6, .fifo_size = 16,      .nr_banks = 2, },
 368 { .hw_ep_num = 7, .fifo_size = 8,       .nr_banks = 2, },
 369 { .hw_ep_num = 8, .fifo_size = 8,       .nr_banks = 2, },
 370 };
 371 /* Add additional configurations here */
 372
 373 static int usba_config_fifo_table(struct usba_udc *udc)
 374 {
 375         int n;
 376
 377         switch (fifo_mode) {
 378         default:
 379                 fifo_mode = 0;
 380         case 0:
 381                 udc->fifo_cfg = NULL;
 382                 n = 0;
 383                 break;
 384         case 1:
 385                 udc->fifo_cfg = mode_1_cfg;
 386                 n = ARRAY_SIZE(mode_1_cfg);
 387                 break;
 388         case 2:
 389                 udc->fifo_cfg = mode_2_cfg;
 390                 n = ARRAY_SIZE(mode_2_cfg);
 391                 break;
 392         case 3:
 393                 udc->fifo_cfg = mode_3_cfg;
 394                 n = ARRAY_SIZE(mode_3_cfg);
 395                 break;
 396         case 4:
 397                 udc->fifo_cfg = mode_4_cfg;
 398                 n = ARRAY_SIZE(mode_4_cfg);
 399                 break;
 400         }
 401         DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode);
 402
 403         return n;
 404 }
 405
 406 static inline u32 usba_int_enb_get(struct usba_udc *udc)
 407 {
 408         return udc->int_enb_cache;
 409 }
 410
 411 static inline void usba_int_enb_set(struct usba_udc *udc, u32 val)
 412 {
 413         usba_writel(udc, INT_ENB, val);
 414         udc->int_enb_cache = val;
 415 }
 416
 417 static int vbus_is_present(struct usba_udc *udc)
 418 {
 419         if (gpio_is_valid(udc->vbus_pin))
 420                 return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
 421
 422         /* No Vbus detection: Assume always present */
 423         return 1;
 424 }
 425
 426 static void toggle_bias(struct usba_udc *udc, int is_on)
 427 {
 428         if (udc->errata && udc->errata->toggle_bias)
 429                 udc->errata->toggle_bias(udc, is_on);
 430 }
 431
 432 static void generate_bias_pulse(struct usba_udc *udc)
 433 {
 434         if (!udc->bias_pulse_needed)
 435                 return;
 436
 437         if (udc->errata && udc->errata->pulse_bias)
 438                 udc->errata->pulse_bias(udc);
 439
 440         udc->bias_pulse_needed = false;
 441 }
 442
 443 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
 444 {
 445         unsigned int transaction_len;
 446
 447         transaction_len = req->req.length - req->req.actual;
 448         req->last_transaction = 1;
 449         if (transaction_len > ep->ep.maxpacket) {
 450                 transaction_len = ep->ep.maxpacket;
 451                 req->last_transaction = 0;
 452         } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
 453                 req->last_transaction = 0;
 454
 455         DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
 456                 ep->ep.name, req, transaction_len,
 457                 req->last_transaction ? ", done" : "");
 458
 459         memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
 460         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
 461         req->req.actual += transaction_len;
 462 }
 463
 464 static void submit_request(struct usba_ep *ep, struct usba_request *req)
 465 {
 466         DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
 467                 ep->ep.name, req, req->req.length);
 468
 469         req->req.actual = 0;
 470         req->submitted = 1;
 471
 472         if (req->using_dma) {
 473                 if (req->req.length == 0) {
 474                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 475                         return;
 476                 }
 477
 478                 if (req->req.zero)
 479                         usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
 480                 else
 481                         usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
 482
 483                 usba_dma_writel(ep, ADDRESS, req->req.dma);
 484                 usba_dma_writel(ep, CONTROL, req->ctrl);
 485         } else {
 486                 next_fifo_transaction(ep, req);
 487                 if (req->last_transaction) {
 488                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
 489                         usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
 490                 } else {
 491                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
 492                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 493                 }
 494         }
 495 }
 496
 497 static void submit_next_request(struct usba_ep *ep)
 498 {
 499         struct usba_request *req;
 500
 501         if (list_empty(&ep->queue)) {
 502                 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
 503                 return;
 504         }
 505
 506         req = list_entry(ep->queue.next, struct usba_request, queue);
 507         if (!req->submitted)
 508                 submit_request(ep, req);
 509 }
 510
 511 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
 512 {
 513         ep->state = STATUS_STAGE_IN;
 514         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
 515         usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
 516 }
 517
 518 static void receive_data(struct usba_ep *ep)
 519 {
 520         struct usba_udc *udc = ep->udc;
 521         struct usba_request *req;
 522         unsigned long status;
 523         unsigned int bytecount, nr_busy;
 524         int is_complete = 0;
 525
 526         status = usba_ep_readl(ep, STA);
 527         nr_busy = USBA_BFEXT(BUSY_BANKS, status);
 528
 529         DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
 530
 531         while (nr_busy > 0) {
 532                 if (list_empty(&ep->queue)) {
 533                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
 534                         break;
 535                 }
 536                 req = list_entry(ep->queue.next,
 537                                  struct usba_request, queue);
 538
 539                 bytecount = USBA_BFEXT(BYTE_COUNT, status);
 540
 541                 if (status & (1 << 31))
 542                         is_complete = 1;
 543                 if (req->req.actual + bytecount >= req->req.length) {
 544                         is_complete = 1;
 545                         bytecount = req->req.length - req->req.actual;
 546                 }
 547
 548                 memcpy_fromio(req->req.buf + req->req.actual,
 549                                 ep->fifo, bytecount);
 550                 req->req.actual += bytecount;
 551
 552                 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
 553
 554                 if (is_complete) {
 555                         DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
 556                         req->req.status = 0;
 557                         list_del_init(&req->queue);
 558                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
 559                         spin_unlock(&udc->lock);
 560                         usb_gadget_giveback_request(&ep->ep, &req->req);
 561                         spin_lock(&udc->lock);
 562                 }
 563
 564                 status = usba_ep_readl(ep, STA);
 565                 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
 566
 567                 if (is_complete && ep_is_control(ep)) {
 568                         send_status(udc, ep);
 569                         break;
 570                 }
 571         }
 572 }
 573
 574 static void
 575 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
 576 {
 577         struct usba_udc *udc = ep->udc;
 578
 579         WARN_ON(!list_empty(&req->queue));
 580
 581         if (req->req.status == -EINPROGRESS)
 582                 req->req.status = status;
 583
 584         if (req->using_dma)
 585                 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
 586
 587         DBG(DBG_GADGET | DBG_REQ,
 588                 "%s: req %p complete: status %d, actual %u\n",
 589                 ep->ep.name, req, req->req.status, req->req.actual);
 590
 591         spin_unlock(&udc->lock);
 592         usb_gadget_giveback_request(&ep->ep, &req->req);
 593         spin_lock(&udc->lock);
 594 }
 595
 596 static void
 597 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
 598 {
 599         struct usba_request *req, *tmp_req;
 600
 601         list_for_each_entry_safe(req, tmp_req, list, queue) {
 602                 list_del_init(&req->queue);
 603                 request_complete(ep, req, status);
 604         }
 605 }
 606
 607 static int
 608 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
 609 {
 610         struct usba_ep *ep = to_usba_ep(_ep);
 611         struct usba_udc *udc = ep->udc;
 612         unsigned long flags, maxpacket;
 613         unsigned int nr_trans;
 614
 615         DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
 616
 617         maxpacket = usb_endpoint_maxp(desc);
 618
 619         if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
 620                         || ep->index == 0
 621                         || desc->bDescriptorType != USB_DT_ENDPOINT
 622                         || maxpacket == 0
 623                         || maxpacket > ep->fifo_size) {
 624                 DBG(DBG_ERR, "ep_enable: Invalid argument");
 625                 return -EINVAL;
 626         }
 627
 628         ep->is_isoc = 0;
 629         ep->is_in = 0;
 630
 631         DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
 632                         ep->ep.name, ep->ept_cfg, maxpacket);
 633
 634         if (usb_endpoint_dir_in(desc)) {
 635                 ep->is_in = 1;
 636                 ep->ept_cfg |= USBA_EPT_DIR_IN;
 637         }
 638
 639         switch (usb_endpoint_type(desc)) {
 640         case USB_ENDPOINT_XFER_CONTROL:
 641                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
 642                 break;
 643         case USB_ENDPOINT_XFER_ISOC:
 644                 if (!ep->can_isoc) {
 645                         DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
 646                                         ep->ep.name);
 647                         return -EINVAL;
 648                 }
 649
 650                 /*
 651                  * Bits 11:12 specify number of _additional_
 652                  * transactions per microframe.
 653                  */
 654                 nr_trans = usb_endpoint_maxp_mult(desc);
 655                 if (nr_trans > 3)
 656                         return -EINVAL;
 657
 658                 ep->is_isoc = 1;
 659                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
 660                 ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
 661
 662                 break;
 663         case USB_ENDPOINT_XFER_BULK:
 664                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
 665                 break;
 666         case USB_ENDPOINT_XFER_INT:
 667                 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
 668                 break;
 669         }
 670
 671         spin_lock_irqsave(&ep->udc->lock, flags);
 672
 673         ep->ep.desc = desc;
 674         ep->ep.maxpacket = maxpacket;
 675
 676         usba_ep_writel(ep, CFG, ep->ept_cfg);
 677         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
 678
 679         if (ep->can_dma) {
 680                 u32 ctrl;
 681
 682                 usba_int_enb_set(udc, usba_int_enb_get(udc) |
 683                                       USBA_BF(EPT_INT, 1 << ep->index) |
 684                                       USBA_BF(DMA_INT, 1 << ep->index));
 685                 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
 686                 usba_ep_writel(ep, CTL_ENB, ctrl);
 687         } else {
 688                 usba_int_enb_set(udc, usba_int_enb_get(udc) |
 689                                       USBA_BF(EPT_INT, 1 << ep->index));
 690         }
 691
 692         spin_unlock_irqrestore(&udc->lock, flags);
 693
 694         DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
 695                         (unsigned long)usba_ep_readl(ep, CFG));
 696         DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
 697                         (unsigned long)usba_int_enb_get(udc));
 698
 699         return 0;
 700 }
 701
 702 static int usba_ep_disable(struct usb_ep *_ep)
 703 {
 704         struct usba_ep *ep = to_usba_ep(_ep);
 705         struct usba_udc *udc = ep->udc;
 706         LIST_HEAD(req_list);
 707         unsigned long flags;
 708
 709         DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
 710
 711         spin_lock_irqsave(&udc->lock, flags);
 712
 713         if (!ep->ep.desc) {
 714                 spin_unlock_irqrestore(&udc->lock, flags);
 715                 /* REVISIT because this driver disables endpoints in
 716                  * reset_all_endpoints() before calling disconnect(),
 717                  * most gadget drivers would trigger this non-error ...
 718                  */
 719                 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
 720                         DBG(DBG_ERR, "ep_disable: %s not enabled\n",
 721                                         ep->ep.name);
 722                 return -EINVAL;
 723         }
 724         ep->ep.desc = NULL;
 725
 726         list_splice_init(&ep->queue, &req_list);
 727         if (ep->can_dma) {
 728                 usba_dma_writel(ep, CONTROL, 0);
 729                 usba_dma_writel(ep, ADDRESS, 0);
 730                 usba_dma_readl(ep, STATUS);
 731         }
 732         usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
 733         usba_int_enb_set(udc, usba_int_enb_get(udc) &
 734                               ~USBA_BF(EPT_INT, 1 << ep->index));
 735
 736         request_complete_list(ep, &req_list, -ESHUTDOWN);
 737
 738         spin_unlock_irqrestore(&udc->lock, flags);
 739
 740         return 0;
 741 }
 742
 743 static struct usb_request *
 744 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 745 {
 746         struct usba_request *req;
 747
 748         DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
 749
 750         req = kzalloc(sizeof(*req), gfp_flags);
 751         if (!req)
 752                 return NULL;
 753
 754         INIT_LIST_HEAD(&req->queue);
 755
 756         return &req->req;
 757 }
 758
 759 static void
 760 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
 761 {
 762         struct usba_request *req = to_usba_req(_req);
 763
 764         DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
 765
 766         kfree(req);
 767 }
 768
 769 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
 770                 struct usba_request *req, gfp_t gfp_flags)
 771 {
 772         unsigned long flags;
 773         int ret;
 774
 775         DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
 776                 ep->ep.name, req->req.length, &req->req.dma,
 777                 req->req.zero ? 'Z' : 'z',
 778                 req->req.short_not_ok ? 'S' : 's',
 779                 req->req.no_interrupt ? 'I' : 'i');
 780
 781         if (req->req.length > 0x10000) {
 782                 /* Lengths from 0 to 65536 (inclusive) are supported */
 783                 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
 784                 return -EINVAL;
 785         }
 786
 787         ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
 788         if (ret)
 789                 return ret;
 790
 791         req->using_dma = 1;
 792         req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
 793                         | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
 794                         | USBA_DMA_END_BUF_EN;
 795
 796         if (!ep->is_in)
 797                 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
 798
 799         /*
 800          * Add this request to the queue and submit for DMA if
 801          * possible. Check if we're still alive first -- we may have
 802          * received a reset since last time we checked.
 803          */
 804         ret = -ESHUTDOWN;
 805         spin_lock_irqsave(&udc->lock, flags);
 806         if (ep->ep.desc) {
 807                 if (list_empty(&ep->queue))
 808                         submit_request(ep, req);
 809
 810                 list_add_tail(&req->queue, &ep->queue);
 811                 ret = 0;
 812         }
 813         spin_unlock_irqrestore(&udc->lock, flags);
 814
 815         return ret;
 816 }
 817
 818 static int
 819 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 820 {
 821         struct usba_request *req = to_usba_req(_req);
 822         struct usba_ep *ep = to_usba_ep(_ep);
 823         struct usba_udc *udc = ep->udc;
 824         unsigned long flags;
 825         int ret;
 826
 827         DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
 828                         ep->ep.name, req, _req->length);
 829
 830         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
 831             !ep->ep.desc)
 832                 return -ESHUTDOWN;
 833
 834         req->submitted = 0;
 835         req->using_dma = 0;
 836         req->last_transaction = 0;
 837
 838         _req->status = -EINPROGRESS;
 839         _req->actual = 0;
 840
 841         if (ep->can_dma)
 842                 return queue_dma(udc, ep, req, gfp_flags);
 843
 844         /* May have received a reset since last time we checked */
 845         ret = -ESHUTDOWN;
 846         spin_lock_irqsave(&udc->lock, flags);
 847         if (ep->ep.desc) {
 848                 list_add_tail(&req->queue, &ep->queue);
 849
 850                 if ((!ep_is_control(ep) && ep->is_in) ||
 851                         (ep_is_control(ep)
 852                                 && (ep->state == DATA_STAGE_IN
 853                                         || ep->state == STATUS_STAGE_IN)))
 854                         usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
 855                 else
 856                         usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
 857                 ret = 0;
 858         }
 859         spin_unlock_irqrestore(&udc->lock, flags);
 860
 861         return ret;
 862 }
 863
 864 static void
 865 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
 866 {
 867         req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
 868 }
 869
 870 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
 871 {
 872         unsigned int timeout;
 873         u32 status;
 874
 875         /*
 876          * Stop the DMA controller. When writing both CH_EN
 877          * and LINK to 0, the other bits are not affected.
 878          */
 879         usba_dma_writel(ep, CONTROL, 0);
 880
 881         /* Wait for the FIFO to empty */
 882         for (timeout = 40; timeout; --timeout) {
 883                 status = usba_dma_readl(ep, STATUS);
 884                 if (!(status & USBA_DMA_CH_EN))
 885                         break;
 886                 udelay(1);
 887         }
 888
 889         if (pstatus)
 890                 *pstatus = status;
 891
 892         if (timeout == 0) {
 893                 dev_err(&ep->udc->pdev->dev,
 894                         "%s: timed out waiting for DMA FIFO to empty\n",
 895                         ep->ep.name);
 896                 return -ETIMEDOUT;
 897         }
 898
 899         return 0;
 900 }
 901
 902 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 903 {
 904         struct usba_ep *ep = to_usba_ep(_ep);
 905         struct usba_udc *udc = ep->udc;
 906         struct usba_request *req;
 907         unsigned long flags;
 908         u32 status;
 909
 910         DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
 911                         ep->ep.name, req);
 912
 913         spin_lock_irqsave(&udc->lock, flags);
 914
 915         list_for_each_entry(req, &ep->queue, queue) {
 916                 if (&req->req == _req)
 917                         break;
 918         }
 919
 920         if (&req->req != _req) {
 921                 spin_unlock_irqrestore(&udc->lock, flags);
 922                 return -EINVAL;
 923         }
 924
 925         if (req->using_dma) {
 926                 /*
 927                  * If this request is currently being transferred,
 928                  * stop the DMA controller and reset the FIFO.
 929                  */
 930                 if (ep->queue.next == &req->queue) {
 931                         status = usba_dma_readl(ep, STATUS);
 932                         if (status & USBA_DMA_CH_EN)
 933                                 stop_dma(ep, &status);
 934
 935 #ifdef CONFIG_USB_GADGET_DEBUG_FS
 936                         ep->last_dma_status = status;
 937 #endif
 938
 939                         usba_writel(udc, EPT_RST, 1 << ep->index);
 940
 941                         usba_update_req(ep, req, status);
 942                 }
 943         }
 944
 945         /*
 946          * Errors should stop the queue from advancing until the
 947          * completion function returns.
 948          */
 949         list_del_init(&req->queue);
 950
 951         request_complete(ep, req, -ECONNRESET);
 952
 953         /* Process the next request if any */
 954         submit_next_request(ep);
 955         spin_unlock_irqrestore(&udc->lock, flags);
 956
 957         return 0;
 958 }
 959
 960 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
 961 {
 962         struct usba_ep *ep = to_usba_ep(_ep);
 963         struct usba_udc *udc = ep->udc;
 964         unsigned long flags;
 965         int ret = 0;
 966
 967         DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
 968                         value ? "set" : "clear");
 969
 970         if (!ep->ep.desc) {
 971                 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
 972                                 ep->ep.name);
 973                 return -ENODEV;
 974         }
 975         if (ep->is_isoc) {
 976                 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
 977                                 ep->ep.name);
 978                 return -ENOTTY;
 979         }
 980
 981         spin_lock_irqsave(&udc->lock, flags);
 982
 983         /*
 984          * We can't halt IN endpoints while there are still data to be
 985          * transferred
 986          */
 987         if (!list_empty(&ep->queue)
 988                         || ((value && ep->is_in && (usba_ep_readl(ep, STA)
 989                                         & USBA_BF(BUSY_BANKS, -1L))))) {
 990                 ret = -EAGAIN;
 991         } else {
 992                 if (value)
 993                         usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
 994                 else
 995                         usba_ep_writel(ep, CLR_STA,
 996                                         USBA_FORCE_STALL | USBA_TOGGLE_CLR);
 997                 usba_ep_readl(ep, STA);
 998         }
 999
1000         spin_unlock_irqrestore(&udc->lock, flags);
1001
1002         return ret;
1003 }
1004
1005 static int usba_ep_fifo_status(struct usb_ep *_ep)
1006 {
1007         struct usba_ep *ep = to_usba_ep(_ep);
1008
1009         return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1010 }
1011
1012 static void usba_ep_fifo_flush(struct usb_ep *_ep)
1013 {
1014         struct usba_ep *ep = to_usba_ep(_ep);
1015         struct usba_udc *udc = ep->udc;
1016
1017         usba_writel(udc, EPT_RST, 1 << ep->index);
1018 }
1019
1020 static const struct usb_ep_ops usba_ep_ops = {
1021         .enable         = usba_ep_enable,
1022         .disable        = usba_ep_disable,
1023         .alloc_request  = usba_ep_alloc_request,
1024         .free_request   = usba_ep_free_request,
1025         .queue          = usba_ep_queue,
1026         .dequeue        = usba_ep_dequeue,
1027         .set_halt       = usba_ep_set_halt,
1028         .fifo_status    = usba_ep_fifo_status,
1029         .fifo_flush     = usba_ep_fifo_flush,
1030 };
1031
1032 static int usba_udc_get_frame(struct usb_gadget *gadget)
1033 {
1034         struct usba_udc *udc = to_usba_udc(gadget);
1035
1036         return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
1037 }
1038
1039 static int usba_udc_wakeup(struct usb_gadget *gadget)
1040 {
1041         struct usba_udc *udc = to_usba_udc(gadget);
1042         unsigned long flags;
1043         u32 ctrl;
1044         int ret = -EINVAL;
1045
1046         spin_lock_irqsave(&udc->lock, flags);
1047         if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
1048                 ctrl = usba_readl(udc, CTRL);
1049                 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
1050                 ret = 0;
1051         }
1052         spin_unlock_irqrestore(&udc->lock, flags);
1053
1054         return ret;
1055 }
1056
1057 static int
1058 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1059 {
1060         struct usba_udc *udc = to_usba_udc(gadget);
1061         unsigned long flags;
1062
1063         gadget->is_selfpowered = (is_selfpowered != 0);
1064         spin_lock_irqsave(&udc->lock, flags);
1065         if (is_selfpowered)
1066                 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
1067         else
1068                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1069         spin_unlock_irqrestore(&udc->lock, flags);
1070
1071         return 0;
1072 }
1073
1074 static int atmel_usba_start(struct usb_gadget *gadget,
1075                 struct usb_gadget_driver *driver);
1076 static int atmel_usba_stop(struct usb_gadget *gadget);
1077
1078 static struct usb_ep *atmel_usba_match_ep(struct usb_gadget *gadget,
1079                                 struct usb_endpoint_descriptor  *desc,
1080                                 struct usb_ss_ep_comp_descriptor *ep_comp)
1081 {
1082         struct usb_ep   *_ep;
1083         struct usba_ep *ep;
1084
1085         /* Look at endpoints until an unclaimed one looks usable */
1086         list_for_each_entry(_ep, &gadget->ep_list, ep_list) {
1087                 if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp))
1088                         goto found_ep;
1089         }
1090         /* Fail */
1091         return NULL;
1092
1093 found_ep:
1094
1095         if (fifo_mode == 0) {
1096                 /* Optimize hw fifo size based on ep type and other info */
1097                 ep = to_usba_ep(_ep);
1098
1099                 switch (usb_endpoint_type(desc)) {
1100                 case USB_ENDPOINT_XFER_CONTROL:
1101                         break;
1102
1103                 case USB_ENDPOINT_XFER_ISOC:
1104                         ep->fifo_size = 1024;
1105                         ep->nr_banks = 2;
1106                         break;
1107
1108                 case USB_ENDPOINT_XFER_BULK:
1109                         ep->fifo_size = 512;
1110                         ep->nr_banks = 1;
1111                         break;
1112
1113                 case USB_ENDPOINT_XFER_INT:
1114                         if (desc->wMaxPacketSize == 0)
1115                                 ep->fifo_size =
1116                                     roundup_pow_of_two(_ep->maxpacket_limit);
1117                         else
1118                                 ep->fifo_size =
1119                                     roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
1120                         ep->nr_banks = 1;
1121                         break;
1122                 }
1123
1124                 /* It might be a little bit late to set this */
1125                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
1126
1127                 /* Generate ept_cfg basd on FIFO size and number of banks */
1128                 if (ep->fifo_size  <= 8)
1129                         ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
1130                 else
1131                         /* LSB is bit 1, not 0 */
1132                         ep->ept_cfg =
1133                                 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
1134
1135                 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
1136
1137                 ep->udc->configured_ep++;
1138         }
1139
1140         return _ep;
1141 }
1142
1143 static const struct usb_gadget_ops usba_udc_ops = {
1144         .get_frame              = usba_udc_get_frame,
1145         .wakeup                 = usba_udc_wakeup,
1146         .set_selfpowered        = usba_udc_set_selfpowered,
1147         .udc_start              = atmel_usba_start,
1148         .udc_stop               = atmel_usba_stop,
1149         .match_ep               = atmel_usba_match_ep,
1150 };
1151
1152 static struct usb_endpoint_descriptor usba_ep0_desc = {
1153         .bLength = USB_DT_ENDPOINT_SIZE,
1154         .bDescriptorType = USB_DT_ENDPOINT,
1155         .bEndpointAddress = 0,
1156         .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1157         .wMaxPacketSize = cpu_to_le16(64),
1158         /* FIXME: I have no idea what to put here */
1159         .bInterval = 1,
1160 };
1161
1162 static struct usb_gadget usba_gadget_template = {
1163         .ops            = &usba_udc_ops,
1164         .max_speed      = USB_SPEED_HIGH,
1165         .name           = "atmel_usba_udc",
1166 };
1167
1168 /*
1169  * Called with interrupts disabled and udc->lock held.
1170  */
1171 static void reset_all_endpoints(struct usba_udc *udc)
1172 {
1173         struct usba_ep *ep;
1174         struct usba_request *req, *tmp_req;
1175
1176         usba_writel(udc, EPT_RST, ~0UL);
1177
1178         ep = to_usba_ep(udc->gadget.ep0);
1179         list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1180                 list_del_init(&req->queue);
1181                 request_complete(ep, req, -ECONNRESET);
1182         }
1183 }
1184
1185 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1186 {
1187         struct usba_ep *ep;
1188
1189         if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1190                 return to_usba_ep(udc->gadget.ep0);
1191
1192         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1193                 u8 bEndpointAddress;
1194
1195                 if (!ep->ep.desc)
1196                         continue;
1197                 bEndpointAddress = ep->ep.desc->bEndpointAddress;
1198                 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1199                         continue;
1200                 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1201                                 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1202                         return ep;
1203         }
1204
1205         return NULL;
1206 }
1207
1208 /* Called with interrupts disabled and udc->lock held */
1209 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1210 {
1211         usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1212         ep->state = WAIT_FOR_SETUP;
1213 }
1214
1215 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1216 {
1217         if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1218                 return 1;
1219         return 0;
1220 }
1221
1222 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1223 {
1224         u32 regval;
1225
1226         DBG(DBG_BUS, "setting address %u...\n", addr);
1227         regval = usba_readl(udc, CTRL);
1228         regval = USBA_BFINS(DEV_ADDR, addr, regval);
1229         usba_writel(udc, CTRL, regval);
1230 }
1231
1232 static int do_test_mode(struct usba_udc *udc)
1233 {
1234         static const char test_packet_buffer[] = {
1235                 /* JKJKJKJK * 9 */
1236                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1237                 /* JJKKJJKK * 8 */
1238                 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1239                 /* JJKKJJKK * 8 */
1240                 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1241                 /* JJJJJJJKKKKKKK * 8 */
1242                 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1243                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1244                 /* JJJJJJJK * 8 */
1245                 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1246                 /* {JKKKKKKK * 10}, JK */
1247                 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1248         };
1249         struct usba_ep *ep;
1250         struct device *dev = &udc->pdev->dev;
1251         int test_mode;
1252
1253         test_mode = udc->test_mode;
1254
1255         /* Start from a clean slate */
1256         reset_all_endpoints(udc);
1257
1258         switch (test_mode) {
1259         case 0x0100:
1260                 /* Test_J */
1261                 usba_writel(udc, TST, USBA_TST_J_MODE);
1262                 dev_info(dev, "Entering Test_J mode...\n");
1263                 break;
1264         case 0x0200:
1265                 /* Test_K */
1266                 usba_writel(udc, TST, USBA_TST_K_MODE);
1267                 dev_info(dev, "Entering Test_K mode...\n");
1268                 break;
1269         case 0x0300:
1270                 /*
1271                  * Test_SE0_NAK: Force high-speed mode and set up ep0
1272                  * for Bulk IN transfers
1273                  */
1274                 ep = &udc->usba_ep[0];
1275                 usba_writel(udc, TST,
1276                                 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1277                 usba_ep_writel(ep, CFG,
1278                                 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1279                                 | USBA_EPT_DIR_IN
1280                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1281                                 | USBA_BF(BK_NUMBER, 1));
1282                 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1283                         set_protocol_stall(udc, ep);
1284                         dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1285                 } else {
1286                         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1287                         dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1288                 }
1289                 break;
1290         case 0x0400:
1291                 /* Test_Packet */
1292                 ep = &udc->usba_ep[0];
1293                 usba_ep_writel(ep, CFG,
1294                                 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1295                                 | USBA_EPT_DIR_IN
1296                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1297                                 | USBA_BF(BK_NUMBER, 1));
1298                 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1299                         set_protocol_stall(udc, ep);
1300                         dev_err(dev, "Test_Packet: ep0 not mapped\n");
1301                 } else {
1302                         usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1303                         usba_writel(udc, TST, USBA_TST_PKT_MODE);
1304                         memcpy_toio(ep->fifo, test_packet_buffer,
1305                                         sizeof(test_packet_buffer));
1306                         usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1307                         dev_info(dev, "Entering Test_Packet mode...\n");
1308                 }
1309                 break;
1310         default:
1311                 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1312                 return -EINVAL;
1313         }
1314
1315         return 0;
1316 }
1317
1318 /* Avoid overly long expressions */
1319 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1320 {
1321         if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1322                 return true;
1323         return false;
1324 }
1325
1326 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1327 {
1328         if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1329                 return true;
1330         return false;
1331 }
1332
1333 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1334 {
1335         if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1336                 return true;
1337         return false;
1338 }
1339
1340 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1341                 struct usb_ctrlrequest *crq)
1342 {
1343         int retval = 0;
1344
1345         switch (crq->bRequest) {
1346         case USB_REQ_GET_STATUS: {
1347                 u16 status;
1348
1349                 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1350                         status = cpu_to_le16(udc->devstatus);
1351                 } else if (crq->bRequestType
1352                                 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1353                         status = cpu_to_le16(0);
1354                 } else if (crq->bRequestType
1355                                 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1356                         struct usba_ep *target;
1357
1358                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1359                         if (!target)
1360                                 goto stall;
1361
1362                         status = 0;
1363                         if (is_stalled(udc, target))
1364                                 status |= cpu_to_le16(1);
1365                 } else
1366                         goto delegate;
1367
1368                 /* Write directly to the FIFO. No queueing is done. */
1369                 if (crq->wLength != cpu_to_le16(sizeof(status)))
1370                         goto stall;
1371                 ep->state = DATA_STAGE_IN;
1372                 writew_relaxed(status, ep->fifo);
1373                 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1374                 break;
1375         }
1376
1377         case USB_REQ_CLEAR_FEATURE: {
1378                 if (crq->bRequestType == USB_RECIP_DEVICE) {
1379                         if (feature_is_dev_remote_wakeup(crq))
1380                                 udc->devstatus
1381                                         &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1382                         else
1383                                 /* Can't CLEAR_FEATURE TEST_MODE */
1384                                 goto stall;
1385                 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1386                         struct usba_ep *target;
1387
1388                         if (crq->wLength != cpu_to_le16(0)
1389                                         || !feature_is_ep_halt(crq))
1390                                 goto stall;
1391                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1392                         if (!target)
1393                                 goto stall;
1394
1395                         usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1396                         if (target->index != 0)
1397                                 usba_ep_writel(target, CLR_STA,
1398                                                 USBA_TOGGLE_CLR);
1399                 } else {
1400                         goto delegate;
1401                 }
1402
1403                 send_status(udc, ep);
1404                 break;
1405         }
1406
1407         case USB_REQ_SET_FEATURE: {
1408                 if (crq->bRequestType == USB_RECIP_DEVICE) {
1409                         if (feature_is_dev_test_mode(crq)) {
1410                                 send_status(udc, ep);
1411                                 ep->state = STATUS_STAGE_TEST;
1412                                 udc->test_mode = le16_to_cpu(crq->wIndex);
1413                                 return 0;
1414                         } else if (feature_is_dev_remote_wakeup(crq)) {
1415                                 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1416                         } else {
1417                                 goto stall;
1418                         }
1419                 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1420                         struct usba_ep *target;
1421
1422                         if (crq->wLength != cpu_to_le16(0)
1423                                         || !feature_is_ep_halt(crq))
1424                                 goto stall;
1425
1426                         target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1427                         if (!target)
1428                                 goto stall;
1429
1430                         usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1431                 } else
1432                         goto delegate;
1433
1434                 send_status(udc, ep);
1435                 break;
1436         }
1437
1438         case USB_REQ_SET_ADDRESS:
1439                 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1440                         goto delegate;
1441
1442                 set_address(udc, le16_to_cpu(crq->wValue));
1443                 send_status(udc, ep);
1444                 ep->state = STATUS_STAGE_ADDR;
1445                 break;
1446
1447         default:
1448 delegate:
1449                 spin_unlock(&udc->lock);
1450                 retval = udc->driver->setup(&udc->gadget, crq);
1451                 spin_lock(&udc->lock);
1452         }
1453
1454         return retval;
1455
1456 stall:
1457         pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1458                 "halting endpoint...\n",
1459                 ep->ep.name, crq->bRequestType, crq->bRequest,
1460                 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1461                 le16_to_cpu(crq->wLength));
1462         set_protocol_stall(udc, ep);
1463         return -1;
1464 }
1465
1466 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1467 {
1468         struct usba_request *req;
1469         u32 epstatus;
1470         u32 epctrl;
1471
1472 restart:
1473         epstatus = usba_ep_readl(ep, STA);
1474         epctrl = usba_ep_readl(ep, CTL);
1475
1476         DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1477                         ep->ep.name, ep->state, epstatus, epctrl);
1478
1479         req = NULL;
1480         if (!list_empty(&ep->queue))
1481                 req = list_entry(ep->queue.next,
1482                                  struct usba_request, queue);
1483
1484         if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1485                 if (req->submitted)
1486                         next_fifo_transaction(ep, req);
1487                 else
1488                         submit_request(ep, req);
1489
1490                 if (req->last_transaction) {
1491                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1492                         usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1493                 }
1494                 goto restart;
1495         }
1496         if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1497                 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1498
1499                 switch (ep->state) {
1500                 case DATA_STAGE_IN:
1501                         usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1502                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1503                         ep->state = STATUS_STAGE_OUT;
1504                         break;
1505                 case STATUS_STAGE_ADDR:
1506                         /* Activate our new address */
1507                         usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1508                                                 | USBA_FADDR_EN));
1509                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1510                         ep->state = WAIT_FOR_SETUP;
1511                         break;
1512                 case STATUS_STAGE_IN:
1513                         if (req) {
1514                                 list_del_init(&req->queue);
1515                                 request_complete(ep, req, 0);
1516                                 submit_next_request(ep);
1517                         }
1518                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1519                         ep->state = WAIT_FOR_SETUP;
1520                         break;
1521                 case STATUS_STAGE_TEST:
1522                         usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1523                         ep->state = WAIT_FOR_SETUP;
1524                         if (do_test_mode(udc))
1525                                 set_protocol_stall(udc, ep);
1526                         break;
1527                 default:
1528                         pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1529                                 "halting endpoint...\n",
1530                                 ep->ep.name, ep->state);
1531                         set_protocol_stall(udc, ep);
1532                         break;
1533                 }
1534
1535                 goto restart;
1536         }
1537         if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1538                 switch (ep->state) {
1539                 case STATUS_STAGE_OUT:
1540                         usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1541                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1542
1543                         if (req) {
1544                                 list_del_init(&req->queue);
1545                                 request_complete(ep, req, 0);
1546                         }
1547                         ep->state = WAIT_FOR_SETUP;
1548                         break;
1549
1550                 case DATA_STAGE_OUT:
1551                         receive_data(ep);
1552                         break;
1553
1554                 default:
1555                         usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1556                         usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1557                         pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1558                                 "halting endpoint...\n",
1559                                 ep->ep.name, ep->state);
1560                         set_protocol_stall(udc, ep);
1561                         break;
1562                 }
1563
1564                 goto restart;
1565         }
1566         if (epstatus & USBA_RX_SETUP) {
1567                 union {
1568                         struct usb_ctrlrequest crq;
1569                         unsigned long data[2];
1570                 } crq;
1571                 unsigned int pkt_len;
1572                 int ret;
1573
1574                 if (ep->state != WAIT_FOR_SETUP) {
1575                         /*
1576                          * Didn't expect a SETUP packet at this
1577                          * point. Clean up any pending requests (which
1578                          * may be successful).
1579                          */
1580                         int status = -EPROTO;
1581
1582                         /*
1583                          * RXRDY and TXCOMP are dropped when SETUP
1584                          * packets arrive.  Just pretend we received
1585                          * the status packet.
1586                          */
1587                         if (ep->state == STATUS_STAGE_OUT
1588                                         || ep->state == STATUS_STAGE_IN) {
1589                                 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1590                                 status = 0;
1591                         }
1592
1593                         if (req) {
1594                                 list_del_init(&req->queue);
1595                                 request_complete(ep, req, status);
1596                         }
1597                 }
1598
1599                 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1600                 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1601                 if (pkt_len != sizeof(crq)) {
1602                         pr_warn("udc: Invalid packet length %u (expected %zu)\n",
1603                                 pkt_len, sizeof(crq));
1604                         set_protocol_stall(udc, ep);
1605                         return;
1606                 }
1607
1608                 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1609                 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1610
1611                 /* Free up one bank in the FIFO so that we can
1612                  * generate or receive a reply right away. */
1613                 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1614
1615                 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1616                         ep->state, crq.crq.bRequestType,
1617                         crq.crq.bRequest); */
1618
1619                 if (crq.crq.bRequestType & USB_DIR_IN) {
1620                         /*
1621                          * The USB 2.0 spec states that "if wLength is
1622                          * zero, there is no data transfer phase."
1623                          * However, testusb #14 seems to actually
1624                          * expect a data phase even if wLength = 0...
1625                          */
1626                         ep->state = DATA_STAGE_IN;
1627                 } else {
1628                         if (crq.crq.wLength != cpu_to_le16(0))
1629                                 ep->state = DATA_STAGE_OUT;
1630                         else
1631                                 ep->state = STATUS_STAGE_IN;
1632                 }
1633
1634                 ret = -1;
1635                 if (ep->index == 0)
1636                         ret = handle_ep0_setup(udc, ep, &crq.crq);
1637                 else {
1638                         spin_unlock(&udc->lock);
1639                         ret = udc->driver->setup(&udc->gadget, &crq.crq);
1640                         spin_lock(&udc->lock);
1641                 }
1642
1643                 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1644                         crq.crq.bRequestType, crq.crq.bRequest,
1645                         le16_to_cpu(crq.crq.wLength), ep->state, ret);
1646
1647                 if (ret < 0) {
1648                         /* Let the host know that we failed */
1649                         set_protocol_stall(udc, ep);
1650                 }
1651         }
1652 }
1653
1654 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1655 {
1656         struct usba_request *req;
1657         u32 epstatus;
1658         u32 epctrl;
1659
1660         epstatus = usba_ep_readl(ep, STA);
1661         epctrl = usba_ep_readl(ep, CTL);
1662
1663         DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1664
1665         while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1666                 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1667
1668                 if (list_empty(&ep->queue)) {
1669                         dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1670                         usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1671                         return;
1672                 }
1673
1674                 req = list_entry(ep->queue.next, struct usba_request, queue);
1675
1676                 if (req->using_dma) {
1677                         /* Send a zero-length packet */
1678                         usba_ep_writel(ep, SET_STA,
1679                                         USBA_TX_PK_RDY);
1680                         usba_ep_writel(ep, CTL_DIS,
1681                                         USBA_TX_PK_RDY);
1682                         list_del_init(&req->queue);
1683                         submit_next_request(ep);
1684                         request_complete(ep, req, 0);
1685                 } else {
1686                         if (req->submitted)
1687                                 next_fifo_transaction(ep, req);
1688                         else
1689                                 submit_request(ep, req);
1690
1691                         if (req->last_transaction) {
1692                                 list_del_init(&req->queue);
1693                                 submit_next_request(ep);
1694                                 request_complete(ep, req, 0);
1695                         }
1696                 }
1697
1698                 epstatus = usba_ep_readl(ep, STA);
1699                 epctrl = usba_ep_readl(ep, CTL);
1700         }
1701         if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1702                 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1703                 receive_data(ep);
1704         }
1705 }
1706
1707 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1708 {
1709         struct usba_request *req;
1710         u32 status, control, pending;
1711
1712         status = usba_dma_readl(ep, STATUS);
1713         control = usba_dma_readl(ep, CONTROL);
1714 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1715         ep->last_dma_status = status;
1716 #endif
1717         pending = status & control;
1718         DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1719
1720         if (status & USBA_DMA_CH_EN) {
1721                 dev_err(&udc->pdev->dev,
1722                         "DMA_CH_EN is set after transfer is finished!\n");
1723                 dev_err(&udc->pdev->dev,
1724                         "status=%#08x, pending=%#08x, control=%#08x\n",
1725                         status, pending, control);
1726
1727                 /*
1728                  * try to pretend nothing happened. We might have to
1729                  * do something here...
1730                  */
1731         }
1732
1733         if (list_empty(&ep->queue))
1734                 /* Might happen if a reset comes along at the right moment */
1735                 return;
1736
1737         if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1738                 req = list_entry(ep->queue.next, struct usba_request, queue);
1739                 usba_update_req(ep, req, status);
1740
1741                 list_del_init(&req->queue);
1742                 submit_next_request(ep);
1743                 request_complete(ep, req, 0);
1744         }
1745 }
1746
1747 static irqreturn_t usba_udc_irq(int irq, void *devid)
1748 {
1749         struct usba_udc *udc = devid;
1750         u32 status, int_enb;
1751         u32 dma_status;
1752         u32 ep_status;
1753
1754         spin_lock(&udc->lock);
1755
1756         int_enb = usba_int_enb_get(udc);
1757         status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
1758         DBG(DBG_INT, "irq, status=%#08x\n", status);
1759
1760         if (status & USBA_DET_SUSPEND) {
1761                 toggle_bias(udc, 0);
1762                 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1763                 usba_int_enb_set(udc, int_enb | USBA_WAKE_UP);
1764                 udc->bias_pulse_needed = true;
1765                 DBG(DBG_BUS, "Suspend detected\n");
1766                 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1767                                 && udc->driver && udc->driver->suspend) {
1768                         spin_unlock(&udc->lock);
1769                         udc->driver->suspend(&udc->gadget);
1770                         spin_lock(&udc->lock);
1771                 }
1772         }
1773
1774         if (status & USBA_WAKE_UP) {
1775                 toggle_bias(udc, 1);
1776                 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1777                 usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP);
1778                 DBG(DBG_BUS, "Wake Up CPU detected\n");
1779         }
1780
1781         if (status & USBA_END_OF_RESUME) {
1782                 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1783                 generate_bias_pulse(udc);
1784                 DBG(DBG_BUS, "Resume detected\n");
1785                 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1786                                 && udc->driver && udc->driver->resume) {
1787                         spin_unlock(&udc->lock);
1788                         udc->driver->resume(&udc->gadget);
1789                         spin_lock(&udc->lock);
1790                 }
1791         }
1792
1793         dma_status = USBA_BFEXT(DMA_INT, status);
1794         if (dma_status) {
1795                 int i;
1796
1797                 for (i = 1; i <= USBA_NR_DMAS; i++)
1798                         if (dma_status & (1 << i))
1799                                 usba_dma_irq(udc, &udc->usba_ep[i]);
1800         }
1801
1802         ep_status = USBA_BFEXT(EPT_INT, status);
1803         if (ep_status) {
1804                 int i;
1805
1806                 for (i = 0; i < udc->num_ep; i++)
1807                         if (ep_status & (1 << i)) {
1808                                 if (ep_is_control(&udc->usba_ep[i]))
1809                                         usba_control_irq(udc, &udc->usba_ep[i]);
1810                                 else
1811                                         usba_ep_irq(udc, &udc->usba_ep[i]);
1812                         }
1813         }
1814
1815         if (status & USBA_END_OF_RESET) {
1816                 struct usba_ep *ep0, *ep;
1817                 int i, n;
1818
1819                 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1820                 generate_bias_pulse(udc);
1821                 reset_all_endpoints(udc);
1822
1823                 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
1824                         udc->gadget.speed = USB_SPEED_UNKNOWN;
1825                         spin_unlock(&udc->lock);
1826                         usb_gadget_udc_reset(&udc->gadget, udc->driver);
1827                         spin_lock(&udc->lock);
1828                 }
1829
1830                 if (status & USBA_HIGH_SPEED)
1831                         udc->gadget.speed = USB_SPEED_HIGH;
1832                 else
1833                         udc->gadget.speed = USB_SPEED_FULL;
1834                 DBG(DBG_BUS, "%s bus reset detected\n",
1835                     usb_speed_string(udc->gadget.speed));
1836
1837                 ep0 = &udc->usba_ep[0];
1838                 ep0->ep.desc = &usba_ep0_desc;
1839                 ep0->state = WAIT_FOR_SETUP;
1840                 usba_ep_writel(ep0, CFG,
1841                                 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1842                                 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1843                                 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1844                 usba_ep_writel(ep0, CTL_ENB,
1845                                 USBA_EPT_ENABLE | USBA_RX_SETUP);
1846                 usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) |
1847                                       USBA_DET_SUSPEND | USBA_END_OF_RESUME);
1848
1849                 /*
1850                  * Unclear why we hit this irregularly, e.g. in usbtest,
1851                  * but it's clearly harmless...
1852                  */
1853                 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1854                         dev_err(&udc->pdev->dev,
1855                                 "ODD: EP0 configuration is invalid!\n");
1856
1857                 /* Preallocate other endpoints */
1858                 n = fifo_mode ? udc->num_ep : udc->configured_ep;
1859                 for (i = 1; i < n; i++) {
1860                         ep = &udc->usba_ep[i];
1861                         usba_ep_writel(ep, CFG, ep->ept_cfg);
1862                         if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1863                                 dev_err(&udc->pdev->dev,
1864                                         "ODD: EP%d configuration is invalid!\n", i);
1865                 }
1866         }
1867
1868         spin_unlock(&udc->lock);
1869
1870         return IRQ_HANDLED;
1871 }
1872
1873 static int start_clock(struct usba_udc *udc)
1874 {
1875         int ret;
1876
1877         if (udc->clocked)
1878                 return 0;
1879
1880         ret = clk_prepare_enable(udc->pclk);
1881         if (ret)
1882                 return ret;
1883         ret = clk_prepare_enable(udc->hclk);
1884         if (ret) {
1885                 clk_disable_unprepare(udc->pclk);
1886                 return ret;
1887         }
1888
1889         udc->clocked = true;
1890         return 0;
1891 }
1892
1893 static void stop_clock(struct usba_udc *udc)
1894 {
1895         if (!udc->clocked)
1896                 return;
1897
1898         clk_disable_unprepare(udc->hclk);
1899         clk_disable_unprepare(udc->pclk);
1900
1901         udc->clocked = false;
1902 }
1903
1904 static int usba_start(struct usba_udc *udc)
1905 {
1906         unsigned long flags;
1907         int ret;
1908
1909         ret = start_clock(udc);
1910         if (ret)
1911                 return ret;
1912
1913         spin_lock_irqsave(&udc->lock, flags);
1914         toggle_bias(udc, 1);
1915         usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1916         usba_int_enb_set(udc, USBA_END_OF_RESET);
1917         spin_unlock_irqrestore(&udc->lock, flags);
1918
1919         return 0;
1920 }
1921
1922 static void usba_stop(struct usba_udc *udc)
1923 {
1924         unsigned long flags;
1925
1926         spin_lock_irqsave(&udc->lock, flags);
1927         udc->gadget.speed = USB_SPEED_UNKNOWN;
1928         reset_all_endpoints(udc);
1929
1930         /* This will also disable the DP pullup */
1931         toggle_bias(udc, 0);
1932         usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1933         spin_unlock_irqrestore(&udc->lock, flags);
1934
1935         stop_clock(udc);
1936 }
1937
1938 static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
1939 {
1940         struct usba_udc *udc = devid;
1941         int vbus;
1942
1943         /* debounce */
1944         udelay(10);
1945
1946         mutex_lock(&udc->vbus_mutex);
1947
1948         vbus = vbus_is_present(udc);
1949         if (vbus != udc->vbus_prev) {
1950                 if (vbus) {
1951                         usba_start(udc);
1952                 } else {
1953                         usba_stop(udc);
1954
1955                         if (udc->driver->disconnect)
1956                                 udc->driver->disconnect(&udc->gadget);
1957                 }
1958                 udc->vbus_prev = vbus;
1959         }
1960
1961         mutex_unlock(&udc->vbus_mutex);
1962         return IRQ_HANDLED;
1963 }
1964
1965 static int atmel_usba_start(struct usb_gadget *gadget,
1966                 struct usb_gadget_driver *driver)
1967 {
1968         int ret;
1969         struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1970         unsigned long flags;
1971
1972         spin_lock_irqsave(&udc->lock, flags);
1973         udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1974         udc->driver = driver;
1975         spin_unlock_irqrestore(&udc->lock, flags);
1976
1977         mutex_lock(&udc->vbus_mutex);
1978
1979         if (gpio_is_valid(udc->vbus_pin))
1980                 enable_irq(gpio_to_irq(udc->vbus_pin));
1981
1982         /* If Vbus is present, enable the controller and wait for reset */
1983         udc->vbus_prev = vbus_is_present(udc);
1984         if (udc->vbus_prev) {
1985                 ret = usba_start(udc);
1986                 if (ret)
1987                         goto err;
1988         }
1989
1990         mutex_unlock(&udc->vbus_mutex);
1991         return 0;
1992
1993 err:
1994         if (gpio_is_valid(udc->vbus_pin))
1995                 disable_irq(gpio_to_irq(udc->vbus_pin));
1996
1997         mutex_unlock(&udc->vbus_mutex);
1998
1999         spin_lock_irqsave(&udc->lock, flags);
2000         udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
2001         udc->driver = NULL;
2002         spin_unlock_irqrestore(&udc->lock, flags);
2003         return ret;
2004 }
2005
2006 static int atmel_usba_stop(struct usb_gadget *gadget)
2007 {
2008         struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
2009
2010         if (gpio_is_valid(udc->vbus_pin))
2011                 disable_irq(gpio_to_irq(udc->vbus_pin));
2012
2013         if (fifo_mode == 0)
2014                 udc->configured_ep = 1;
2015
2016         usba_stop(udc);
2017
2018         udc->driver = NULL;
2019
2020         return 0;
2021 }
2022
2023 #ifdef CONFIG_OF
2024 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
2025 {
2026         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2027                            is_on ? AT91_PMC_BIASEN : 0);
2028 }
2029
2030 static void at91sam9g45_pulse_bias(struct usba_udc *udc)
2031 {
2032         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0);
2033         regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2034                            AT91_PMC_BIASEN);
2035 }
2036
2037 static const struct usba_udc_errata at91sam9rl_errata = {
2038         .toggle_bias = at91sam9rl_toggle_bias,
2039 };
2040
2041 static const struct usba_udc_errata at91sam9g45_errata = {
2042         .pulse_bias = at91sam9g45_pulse_bias,
2043 };
2044
2045 static const struct of_device_id atmel_udc_dt_ids[] = {
2046         { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
2047         { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
2048         { .compatible = "atmel,sama5d3-udc" },
2049         { /* sentinel */ }
2050 };
2051
2052 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
2053
2054 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2055                                                     struct usba_udc *udc)
2056 {
2057         u32 val;
2058         const char *name;
2059         enum of_gpio_flags flags;
2060         struct device_node *np = pdev->dev.of_node;
2061         const struct of_device_id *match;
2062         struct device_node *pp;
2063         int i, ret;
2064         struct usba_ep *eps, *ep;
2065
2066         match = of_match_node(atmel_udc_dt_ids, np);
2067         if (!match)
2068                 return ERR_PTR(-EINVAL);
2069
2070         udc->errata = match->data;
2071         udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
2072         if (IS_ERR(udc->pmc))
2073                 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc");
2074         if (udc->errata && IS_ERR(udc->pmc))
2075                 return ERR_CAST(udc->pmc);
2076
2077         udc->num_ep = 0;
2078
2079         udc->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0,
2080                                                 &flags);
2081         udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
2082
2083         if (fifo_mode == 0) {
2084                 pp = NULL;
2085                 while ((pp = of_get_next_child(np, pp)))
2086                         udc->num_ep++;
2087                 udc->configured_ep = 1;
2088         } else {
2089                 udc->num_ep = usba_config_fifo_table(udc);
2090         }
2091
2092         eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep,
2093                            GFP_KERNEL);
2094         if (!eps)
2095                 return ERR_PTR(-ENOMEM);
2096
2097         udc->gadget.ep0 = &eps[0].ep;
2098
2099         INIT_LIST_HEAD(&eps[0].ep.ep_list);
2100
2101         pp = NULL;
2102         i = 0;
2103         while ((pp = of_get_next_child(np, pp)) && i < udc->num_ep) {
2104                 ep = &eps[i];
2105
2106                 ret = of_property_read_u32(pp, "reg", &val);
2107                 if (ret) {
2108                         dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
2109                         goto err;
2110                 }
2111                 ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : val;
2112
2113                 ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
2114                 if (ret) {
2115                         dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
2116                         goto err;
2117                 }
2118                 if (fifo_mode) {
2119                         if (val < udc->fifo_cfg[i].fifo_size) {
2120                                 dev_warn(&pdev->dev,
2121                                          "Using max fifo-size value from DT\n");
2122                                 ep->fifo_size = val;
2123                         } else {
2124                                 ep->fifo_size = udc->fifo_cfg[i].fifo_size;
2125                         }
2126                 } else {
2127                         ep->fifo_size = val;
2128                 }
2129
2130                 ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
2131                 if (ret) {
2132                         dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
2133                         goto err;
2134                 }
2135                 if (fifo_mode) {
2136                         if (val < udc->fifo_cfg[i].nr_banks) {
2137                                 dev_warn(&pdev->dev,
2138                                          "Using max nb-banks value from DT\n");
2139                                 ep->nr_banks = val;
2140                         } else {
2141                                 ep->nr_banks = udc->fifo_cfg[i].nr_banks;
2142                         }
2143                 } else {
2144                         ep->nr_banks = val;
2145                 }
2146
2147                 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
2148                 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
2149
2150                 ret = of_property_read_string(pp, "name", &name);
2151                 if (ret) {
2152                         dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
2153                         goto err;
2154                 }
2155                 sprintf(ep->name, "ep%d", ep->index);
2156                 ep->ep.name = ep->name;
2157
2158                 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2159                 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2160                 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2161                 ep->ep.ops = &usba_ep_ops;
2162                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2163                 ep->udc = udc;
2164                 INIT_LIST_HEAD(&ep->queue);
2165
2166                 if (ep->index == 0) {
2167                         ep->ep.caps.type_control = true;
2168                 } else {
2169                         ep->ep.caps.type_iso = ep->can_isoc;
2170                         ep->ep.caps.type_bulk = true;
2171                         ep->ep.caps.type_int = true;
2172                 }
2173
2174                 ep->ep.caps.dir_in = true;
2175                 ep->ep.caps.dir_out = true;
2176
2177                 if (fifo_mode != 0) {
2178                         /*
2179                          * Generate ept_cfg based on FIFO size and
2180                          * banks number
2181                          */
2182                         if (ep->fifo_size  <= 8)
2183                                 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
2184                         else
2185                                 /* LSB is bit 1, not 0 */
2186                                 ep->ept_cfg =
2187                                   USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
2188
2189                         ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
2190                 }
2191
2192                 if (i)
2193                         list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2194
2195                 i++;
2196         }
2197
2198         if (i == 0) {
2199                 dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
2200                 ret = -EINVAL;
2201                 goto err;
2202         }
2203
2204         return eps;
2205 err:
2206         return ERR_PTR(ret);
2207 }
2208 #else
2209 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2210                                                     struct usba_udc *udc)
2211 {
2212         return ERR_PTR(-ENOSYS);
2213 }
2214 #endif
2215
2216 static struct usba_ep * usba_udc_pdata(struct platform_device *pdev,
2217                                                  struct usba_udc *udc)
2218 {
2219         struct usba_platform_data *pdata = dev_get_platdata(&pdev->dev);
2220         struct usba_ep *eps;
2221         int i;
2222
2223         if (!pdata)
2224                 return ERR_PTR(-ENXIO);
2225
2226         eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * pdata->num_ep,
2227                            GFP_KERNEL);
2228         if (!eps)
2229                 return ERR_PTR(-ENOMEM);
2230
2231         udc->gadget.ep0 = &eps[0].ep;
2232
2233         udc->vbus_pin = pdata->vbus_pin;
2234         udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
2235         udc->num_ep = pdata->num_ep;
2236
2237         INIT_LIST_HEAD(&eps[0].ep.ep_list);
2238
2239         for (i = 0; i < pdata->num_ep; i++) {
2240                 struct usba_ep *ep = &eps[i];
2241
2242                 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2243                 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2244                 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2245                 ep->ep.ops = &usba_ep_ops;
2246                 ep->ep.name = pdata->ep[i].name;
2247                 ep->fifo_size = pdata->ep[i].fifo_size;
2248                 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2249                 ep->udc = udc;
2250                 INIT_LIST_HEAD(&ep->queue);
2251                 ep->nr_banks = pdata->ep[i].nr_banks;
2252                 ep->index = pdata->ep[i].index;
2253                 ep->can_dma = pdata->ep[i].can_dma;
2254                 ep->can_isoc = pdata->ep[i].can_isoc;
2255
2256                 if (i == 0) {
2257                         ep->ep.caps.type_control = true;
2258                 } else {
2259                         ep->ep.caps.type_iso = ep->can_isoc;
2260                         ep->ep.caps.type_bulk = true;
2261                         ep->ep.caps.type_int = true;
2262                 }
2263
2264                 ep->ep.caps.dir_in = true;
2265                 ep->ep.caps.dir_out = true;
2266
2267                 if (i)
2268                         list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2269         }
2270
2271         return eps;
2272 }
2273
2274 static int usba_udc_probe(struct platform_device *pdev)
2275 {
2276         struct resource *regs, *fifo;
2277         struct clk *pclk, *hclk;
2278         struct usba_udc *udc;
2279         int irq, ret, i;
2280
2281         udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2282         if (!udc)
2283                 return -ENOMEM;
2284
2285         udc->gadget = usba_gadget_template;
2286         INIT_LIST_HEAD(&udc->gadget.ep_list);
2287
2288         regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
2289         fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
2290         if (!regs || !fifo)
2291                 return -ENXIO;
2292
2293         irq = platform_get_irq(pdev, 0);
2294         if (irq < 0)
2295                 return irq;
2296
2297         pclk = devm_clk_get(&pdev->dev, "pclk");
2298         if (IS_ERR(pclk))
2299                 return PTR_ERR(pclk);
2300         hclk = devm_clk_get(&pdev->dev, "hclk");
2301         if (IS_ERR(hclk))
2302                 return PTR_ERR(hclk);
2303
2304         spin_lock_init(&udc->lock);
2305         mutex_init(&udc->vbus_mutex);
2306         udc->pdev = pdev;
2307         udc->pclk = pclk;
2308         udc->hclk = hclk;
2309         udc->vbus_pin = -ENODEV;
2310
2311         ret = -ENOMEM;
2312         udc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
2313         if (!udc->regs) {
2314                 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
2315                 return ret;
2316         }
2317         dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
2318                  (unsigned long)regs->start, udc->regs);
2319         udc->fifo = devm_ioremap(&pdev->dev, fifo->start, resource_size(fifo));
2320         if (!udc->fifo) {
2321                 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
2322                 return ret;
2323         }
2324         dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
2325                  (unsigned long)fifo->start, udc->fifo);
2326
2327         platform_set_drvdata(pdev, udc);
2328
2329         /* Make sure we start from a clean slate */
2330         ret = clk_prepare_enable(pclk);
2331         if (ret) {
2332                 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
2333                 return ret;
2334         }
2335
2336         usba_writel(udc, CTRL, USBA_DISABLE_MASK);
2337         clk_disable_unprepare(pclk);
2338
2339         if (pdev->dev.of_node)
2340                 udc->usba_ep = atmel_udc_of_init(pdev, udc);
2341         else
2342                 udc->usba_ep = usba_udc_pdata(pdev, udc);
2343
2344         toggle_bias(udc, 0);
2345
2346         if (IS_ERR(udc->usba_ep))
2347                 return PTR_ERR(udc->usba_ep);
2348
2349         ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
2350                                 "atmel_usba_udc", udc);
2351         if (ret) {
2352                 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
2353                         irq, ret);
2354                 return ret;
2355         }
2356         udc->irq = irq;
2357
2358         if (gpio_is_valid(udc->vbus_pin)) {
2359                 if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) {
2360                         irq_set_status_flags(gpio_to_irq(udc->vbus_pin),
2361                                         IRQ_NOAUTOEN);
2362                         ret = devm_request_threaded_irq(&pdev->dev,
2363                                         gpio_to_irq(udc->vbus_pin), NULL,
2364                                         usba_vbus_irq_thread, IRQF_ONESHOT,
2365                                         "atmel_usba_udc", udc);
2366                         if (ret) {
2367                                 udc->vbus_pin = -ENODEV;
2368                                 dev_warn(&udc->pdev->dev,
2369                                          "failed to request vbus irq; "
2370                                          "assuming always on\n");
2371                         }
2372                 } else {
2373                         /* gpio_request fail so use -EINVAL for gpio_is_valid */
2374                         udc->vbus_pin = -EINVAL;
2375                 }
2376         }
2377
2378         ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2379         if (ret)
2380                 return ret;
2381         device_init_wakeup(&pdev->dev, 1);
2382
2383         usba_init_debugfs(udc);
2384         for (i = 1; i < udc->num_ep; i++)
2385                 usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
2386
2387         return 0;
2388 }
2389
2390 static int usba_udc_remove(struct platform_device *pdev)
2391 {
2392         struct usba_udc *udc;
2393         int i;
2394
2395         udc = platform_get_drvdata(pdev);
2396
2397         device_init_wakeup(&pdev->dev, 0);
2398         usb_del_gadget_udc(&udc->gadget);
2399
2400         for (i = 1; i < udc->num_ep; i++)
2401                 usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
2402         usba_cleanup_debugfs(udc);
2403
2404         return 0;
2405 }
2406
2407 #ifdef CONFIG_PM_SLEEP
2408 static int usba_udc_suspend(struct device *dev)
2409 {
2410         struct usba_udc *udc = dev_get_drvdata(dev);
2411
2412         /* Not started */
2413         if (!udc->driver)
2414                 return 0;
2415
2416         mutex_lock(&udc->vbus_mutex);
2417
2418         if (!device_may_wakeup(dev)) {
2419                 usba_stop(udc);
2420                 goto out;
2421         }
2422
2423         /*
2424          * Device may wake up. We stay clocked if we failed
2425          * to request vbus irq, assuming always on.
2426          */
2427         if (gpio_is_valid(udc->vbus_pin)) {
2428                 usba_stop(udc);
2429                 enable_irq_wake(gpio_to_irq(udc->vbus_pin));
2430         }
2431
2432 out:
2433         mutex_unlock(&udc->vbus_mutex);
2434         return 0;
2435 }
2436
2437 static int usba_udc_resume(struct device *dev)
2438 {
2439         struct usba_udc *udc = dev_get_drvdata(dev);
2440
2441         /* Not started */
2442         if (!udc->driver)
2443                 return 0;
2444
2445         if (device_may_wakeup(dev) && gpio_is_valid(udc->vbus_pin))
2446                 disable_irq_wake(gpio_to_irq(udc->vbus_pin));
2447
2448         /* If Vbus is present, enable the controller and wait for reset */
2449         mutex_lock(&udc->vbus_mutex);
2450         udc->vbus_prev = vbus_is_present(udc);
2451         if (udc->vbus_prev)
2452                 usba_start(udc);
2453         mutex_unlock(&udc->vbus_mutex);
2454
2455         return 0;
2456 }
2457 #endif
2458
2459 static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
2460
2461 static struct platform_driver udc_driver = {
2462         .remove         = usba_udc_remove,
2463         .driver         = {
2464                 .name           = "atmel_usba_udc",
2465                 .pm             = &usba_udc_pm_ops,
2466                 .of_match_table = of_match_ptr(atmel_udc_dt_ids),
2467         },
2468 };
2469
2470 module_platform_driver_probe(udc_driver, usba_udc_probe);
2471
2472 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2473 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2474 MODULE_LICENSE("GPL");
2475 MODULE_ALIAS("platform:atmel_usba_udc");