drivers/usb/gadget/fsl_usb2_udc.c

   1 /*
   2  * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved.
   3  *
   4  * Author: Li Yang <leoli@freescale.com>
   5  *         Jiang Bo <tanya.jiang@freescale.com>
   6  *
   7  * Description:
   8  * Freescale high-speed USB SOC DR module device controller driver.
   9  * This can be found on MPC8349E/MPC8313E cpus.
  10  * The driver is previously named as mpc_udc.  Based on bare board
  11  * code from Dave Liu and Shlomi Gridish.
  12  *
  13  * This program is free software; you can redistribute  it and/or modify it
  14  * under  the terms of  the GNU General  Public License as published by the
  15  * Free Software Foundation;  either version 2 of the  License, or (at your
  16  * option) any later version.
  17  */
  18
  19 #undef VERBOSE
  20
  21 #include <linux/module.h>
  22 #include <linux/kernel.h>
  23 #include <linux/ioport.h>
  24 #include <linux/types.h>
  25 #include <linux/errno.h>
  26 #include <linux/slab.h>
  27 #include <linux/init.h>
  28 #include <linux/list.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/proc_fs.h>
  31 #include <linux/mm.h>
  32 #include <linux/moduleparam.h>
  33 #include <linux/device.h>
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/dma-mapping.h>
  38 #include <linux/platform_device.h>
  39 #include <linux/fsl_devices.h>
  40 #include <linux/dmapool.h>
  41
  42 #include <asm/byteorder.h>
  43 #include <asm/io.h>
  44 #include <asm/system.h>
  45 #include <asm/unaligned.h>
  46 #include <asm/dma.h>
  47
  48 #include "fsl_usb2_udc.h"
  49
  50 #define DRIVER_DESC     "Freescale High-Speed USB SOC Device Controller driver"
  51 #define DRIVER_AUTHOR   "Li Yang/Jiang Bo"
  52 #define DRIVER_VERSION  "Apr 20, 2007"
  53
  54 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  55
  56 static const char driver_name[] = "fsl-usb2-udc";
  57 static const char driver_desc[] = DRIVER_DESC;
  58
  59 static struct usb_dr_device *dr_regs;
  60 static struct usb_sys_interface *usb_sys_regs;
  61
  62 /* it is initialized in probe()  */
  63 static struct fsl_udc *udc_controller = NULL;
  64
  65 static const struct usb_endpoint_descriptor
  66 fsl_ep0_desc = {
  67         .bLength =              USB_DT_ENDPOINT_SIZE,
  68         .bDescriptorType =      USB_DT_ENDPOINT,
  69         .bEndpointAddress =     0,
  70         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
  71         .wMaxPacketSize =       USB_MAX_CTRL_PAYLOAD,
  72 };
  73
  74 static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state);
  75 static int fsl_udc_resume(struct platform_device *pdev);
  76 static void fsl_ep_fifo_flush(struct usb_ep *_ep);
  77
  78 #ifdef CONFIG_PPC32
  79 #define fsl_readl(addr)         in_le32(addr)
  80 #define fsl_writel(addr, val32) out_le32(val32, addr)
  81 #else
  82 #define fsl_readl(addr)         readl(addr)
  83 #define fsl_writel(addr, val32) writel(addr, val32)
  84 #endif
  85
  86 /********************************************************************
  87  *      Internal Used Function
  88 ********************************************************************/
  89 /*-----------------------------------------------------------------
  90  * done() - retire a request; caller blocked irqs
  91  * @status : request status to be set, only works when
  92  *      request is still in progress.
  93  *--------------------------------------------------------------*/
  94 static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
  95 {
  96         struct fsl_udc *udc = NULL;
  97         unsigned char stopped = ep->stopped;
  98         struct ep_td_struct *curr_td, *next_td;
  99         int j;
 100
 101         udc = (struct fsl_udc *)ep->udc;
 102         /* Removed the req from fsl_ep->queue */
 103         list_del_init(&req->queue);
 104
 105         /* req.status should be set as -EINPROGRESS in ep_queue() */
 106         if (req->req.status == -EINPROGRESS)
 107                 req->req.status = status;
 108         else
 109                 status = req->req.status;
 110
 111         /* Free dtd for the request */
 112         next_td = req->head;
 113         for (j = 0; j < req->dtd_count; j++) {
 114                 curr_td = next_td;
 115                 if (j != req->dtd_count - 1) {
 116                         next_td = curr_td->next_td_virt;
 117                 }
 118                 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
 119         }
 120
 121         if (req->mapped) {
 122                 dma_unmap_single(ep->udc->gadget.dev.parent,
 123                         req->req.dma, req->req.length,
 124                         ep_is_in(ep)
 125                                 ? DMA_TO_DEVICE
 126                                 : DMA_FROM_DEVICE);
 127                 req->req.dma = DMA_ADDR_INVALID;
 128                 req->mapped = 0;
 129         } else
 130                 dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
 131                         req->req.dma, req->req.length,
 132                         ep_is_in(ep)
 133                                 ? DMA_TO_DEVICE
 134                                 : DMA_FROM_DEVICE);
 135
 136         if (status && (status != -ESHUTDOWN))
 137                 VDBG("complete %s req %p stat %d len %u/%u",
 138                         ep->ep.name, &req->req, status,
 139                         req->req.actual, req->req.length);
 140
 141         ep->stopped = 1;
 142
 143         spin_unlock(&ep->udc->lock);
 144         /* complete() is from gadget layer,
 145          * eg fsg->bulk_in_complete() */
 146         if (req->req.complete)
 147                 req->req.complete(&ep->ep, &req->req);
 148
 149         spin_lock(&ep->udc->lock);
 150         ep->stopped = stopped;
 151 }
 152
 153 /*-----------------------------------------------------------------
 154  * nuke(): delete all requests related to this ep
 155  * called with spinlock held
 156  *--------------------------------------------------------------*/
 157 static void nuke(struct fsl_ep *ep, int status)
 158 {
 159         ep->stopped = 1;
 160
 161         /* Flush fifo */
 162         fsl_ep_fifo_flush(&ep->ep);
 163
 164         /* Whether this eq has request linked */
 165         while (!list_empty(&ep->queue)) {
 166                 struct fsl_req *req = NULL;
 167
 168                 req = list_entry(ep->queue.next, struct fsl_req, queue);
 169                 done(ep, req, status);
 170         }
 171 }
 172
 173 /*------------------------------------------------------------------
 174         Internal Hardware related function
 175  ------------------------------------------------------------------*/
 176
 177 static int dr_controller_setup(struct fsl_udc *udc)
 178 {
 179         unsigned int tmp = 0, portctrl = 0, ctrl = 0;
 180         unsigned long timeout;
 181 #define FSL_UDC_RESET_TIMEOUT 1000
 182
 183         /* Stop and reset the usb controller */
 184         tmp = fsl_readl(&dr_regs->usbcmd);
 185         tmp &= ~USB_CMD_RUN_STOP;
 186         fsl_writel(tmp, &dr_regs->usbcmd);
 187
 188         tmp = fsl_readl(&dr_regs->usbcmd);
 189         tmp |= USB_CMD_CTRL_RESET;
 190         fsl_writel(tmp, &dr_regs->usbcmd);
 191
 192         /* Wait for reset to complete */
 193         timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
 194         while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
 195                 if (time_after(jiffies, timeout)) {
 196                         ERR("udc reset timeout!\n");
 197                         return -ETIMEDOUT;
 198                 }
 199                 cpu_relax();
 200         }
 201
 202         /* Set the controller as device mode */
 203         tmp = fsl_readl(&dr_regs->usbmode);
 204         tmp |= USB_MODE_CTRL_MODE_DEVICE;
 205         /* Disable Setup Lockout */
 206         tmp |= USB_MODE_SETUP_LOCK_OFF;
 207         fsl_writel(tmp, &dr_regs->usbmode);
 208
 209         /* Clear the setup status */
 210         fsl_writel(0, &dr_regs->usbsts);
 211
 212         tmp = udc->ep_qh_dma;
 213         tmp &= USB_EP_LIST_ADDRESS_MASK;
 214         fsl_writel(tmp, &dr_regs->endpointlistaddr);
 215
 216         VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
 217                 udc->ep_qh, (int)tmp,
 218                 fsl_readl(&dr_regs->endpointlistaddr));
 219
 220         /* Config PHY interface */
 221         portctrl = fsl_readl(&dr_regs->portsc1);
 222         portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
 223         switch (udc->phy_mode) {
 224         case FSL_USB2_PHY_ULPI:
 225                 portctrl |= PORTSCX_PTS_ULPI;
 226                 break;
 227         case FSL_USB2_PHY_UTMI_WIDE:
 228                 portctrl |= PORTSCX_PTW_16BIT;
 229                 /* fall through */
 230         case FSL_USB2_PHY_UTMI:
 231                 portctrl |= PORTSCX_PTS_UTMI;
 232                 break;
 233         case FSL_USB2_PHY_SERIAL:
 234                 portctrl |= PORTSCX_PTS_FSLS;
 235                 break;
 236         default:
 237                 return -EINVAL;
 238         }
 239         fsl_writel(portctrl, &dr_regs->portsc1);
 240
 241         /* Config control enable i/o output, cpu endian register */
 242         ctrl = __raw_readl(&usb_sys_regs->control);
 243         ctrl |= USB_CTRL_IOENB;
 244         __raw_writel(ctrl, &usb_sys_regs->control);
 245
 246 #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
 247         /* Turn on cache snooping hardware, since some PowerPC platforms
 248          * wholly rely on hardware to deal with cache coherent. */
 249
 250         /* Setup Snooping for all the 4GB space */
 251         tmp = SNOOP_SIZE_2GB;   /* starts from 0x0, size 2G */
 252         __raw_writel(tmp, &usb_sys_regs->snoop1);
 253         tmp |= 0x80000000;      /* starts from 0x8000000, size 2G */
 254         __raw_writel(tmp, &usb_sys_regs->snoop2);
 255 #endif
 256
 257         return 0;
 258 }
 259
 260 /* Enable DR irq and set controller to run state */
 261 static void dr_controller_run(struct fsl_udc *udc)
 262 {
 263         u32 temp;
 264
 265         /* Enable DR irq reg */
 266         temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
 267                 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
 268                 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
 269
 270         fsl_writel(temp, &dr_regs->usbintr);
 271
 272         /* Clear stopped bit */
 273         udc->stopped = 0;
 274
 275         /* Set the controller as device mode */
 276         temp = fsl_readl(&dr_regs->usbmode);
 277         temp |= USB_MODE_CTRL_MODE_DEVICE;
 278         fsl_writel(temp, &dr_regs->usbmode);
 279
 280         /* Set controller to Run */
 281         temp = fsl_readl(&dr_regs->usbcmd);
 282         temp |= USB_CMD_RUN_STOP;
 283         fsl_writel(temp, &dr_regs->usbcmd);
 284
 285         return;
 286 }
 287
 288 static void dr_controller_stop(struct fsl_udc *udc)
 289 {
 290         unsigned int tmp;
 291
 292         /* disable all INTR */
 293         fsl_writel(0, &dr_regs->usbintr);
 294
 295         /* Set stopped bit for isr */
 296         udc->stopped = 1;
 297
 298         /* disable IO output */
 299 /*      usb_sys_regs->control = 0; */
 300
 301         /* set controller to Stop */
 302         tmp = fsl_readl(&dr_regs->usbcmd);
 303         tmp &= ~USB_CMD_RUN_STOP;
 304         fsl_writel(tmp, &dr_regs->usbcmd);
 305
 306         return;
 307 }
 308
 309 static void dr_ep_setup(unsigned char ep_num, unsigned char dir,
 310                         unsigned char ep_type)
 311 {
 312         unsigned int tmp_epctrl = 0;
 313
 314         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 315         if (dir) {
 316                 if (ep_num)
 317                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
 318                 tmp_epctrl |= EPCTRL_TX_ENABLE;
 319                 tmp_epctrl |= ((unsigned int)(ep_type)
 320                                 << EPCTRL_TX_EP_TYPE_SHIFT);
 321         } else {
 322                 if (ep_num)
 323                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
 324                 tmp_epctrl |= EPCTRL_RX_ENABLE;
 325                 tmp_epctrl |= ((unsigned int)(ep_type)
 326                                 << EPCTRL_RX_EP_TYPE_SHIFT);
 327         }
 328
 329         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
 330 }
 331
 332 static void
 333 dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
 334 {
 335         u32 tmp_epctrl = 0;
 336
 337         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 338
 339         if (value) {
 340                 /* set the stall bit */
 341                 if (dir)
 342                         tmp_epctrl |= EPCTRL_TX_EP_STALL;
 343                 else
 344                         tmp_epctrl |= EPCTRL_RX_EP_STALL;
 345         } else {
 346                 /* clear the stall bit and reset data toggle */
 347                 if (dir) {
 348                         tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
 349                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
 350                 } else {
 351                         tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
 352                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
 353                 }
 354         }
 355         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
 356 }
 357
 358 /* Get stall status of a specific ep
 359    Return: 0: not stalled; 1:stalled */
 360 static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
 361 {
 362         u32 epctrl;
 363
 364         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 365         if (dir)
 366                 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
 367         else
 368                 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
 369 }
 370
 371 /********************************************************************
 372         Internal Structure Build up functions
 373 ********************************************************************/
 374
 375 /*------------------------------------------------------------------
 376 * struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
 377  * @zlt: Zero Length Termination Select (1: disable; 0: enable)
 378  * @mult: Mult field
 379  ------------------------------------------------------------------*/
 380 static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
 381                 unsigned char dir, unsigned char ep_type,
 382                 unsigned int max_pkt_len,
 383                 unsigned int zlt, unsigned char mult)
 384 {
 385         struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
 386         unsigned int tmp = 0;
 387
 388         /* set the Endpoint Capabilites in QH */
 389         switch (ep_type) {
 390         case USB_ENDPOINT_XFER_CONTROL:
 391                 /* Interrupt On Setup (IOS). for control ep  */
 392                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
 393                         | EP_QUEUE_HEAD_IOS;
 394                 break;
 395         case USB_ENDPOINT_XFER_ISOC:
 396                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
 397                         | (mult << EP_QUEUE_HEAD_MULT_POS);
 398                 break;
 399         case USB_ENDPOINT_XFER_BULK:
 400         case USB_ENDPOINT_XFER_INT:
 401                 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
 402                 break;
 403         default:
 404                 VDBG("error ep type is %d", ep_type);
 405                 return;
 406         }
 407         if (zlt)
 408                 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
 409         p_QH->max_pkt_length = cpu_to_le32(tmp);
 410
 411         return;
 412 }
 413
 414 /* Setup qh structure and ep register for ep0. */
 415 static void ep0_setup(struct fsl_udc *udc)
 416 {
 417         /* the intialization of an ep includes: fields in QH, Regs,
 418          * fsl_ep struct */
 419         struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
 420                         USB_MAX_CTRL_PAYLOAD, 0, 0);
 421         struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
 422                         USB_MAX_CTRL_PAYLOAD, 0, 0);
 423         dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
 424         dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
 425
 426         return;
 427
 428 }
 429
 430 /***********************************************************************
 431                 Endpoint Management Functions
 432 ***********************************************************************/
 433
 434 /*-------------------------------------------------------------------------
 435  * when configurations are set, or when interface settings change
 436  * for example the do_set_interface() in gadget layer,
 437  * the driver will enable or disable the relevant endpoints
 438  * ep0 doesn't use this routine. It is always enabled.
 439 -------------------------------------------------------------------------*/
 440 static int fsl_ep_enable(struct usb_ep *_ep,
 441                 const struct usb_endpoint_descriptor *desc)
 442 {
 443         struct fsl_udc *udc = NULL;
 444         struct fsl_ep *ep = NULL;
 445         unsigned short max = 0;
 446         unsigned char mult = 0, zlt;
 447         int retval = -EINVAL;
 448         unsigned long flags = 0;
 449
 450         ep = container_of(_ep, struct fsl_ep, ep);
 451
 452         /* catch various bogus parameters */
 453         if (!_ep || !desc || ep->desc
 454                         || (desc->bDescriptorType != USB_DT_ENDPOINT))
 455                 return -EINVAL;
 456
 457         udc = ep->udc;
 458
 459         if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
 460                 return -ESHUTDOWN;
 461
 462         max = le16_to_cpu(desc->wMaxPacketSize);
 463
 464         /* Disable automatic zlp generation.  Driver is reponsible to indicate
 465          * explicitly through req->req.zero.  This is needed to enable multi-td
 466          * request. */
 467         zlt = 1;
 468
 469         /* Assume the max packet size from gadget is always correct */
 470         switch (desc->bmAttributes & 0x03) {
 471         case USB_ENDPOINT_XFER_CONTROL:
 472         case USB_ENDPOINT_XFER_BULK:
 473         case USB_ENDPOINT_XFER_INT:
 474                 /* mult = 0.  Execute N Transactions as demonstrated by
 475                  * the USB variable length packet protocol where N is
 476                  * computed using the Maximum Packet Length (dQH) and
 477                  * the Total Bytes field (dTD) */
 478                 mult = 0;
 479                 break;
 480         case USB_ENDPOINT_XFER_ISOC:
 481                 /* Calculate transactions needed for high bandwidth iso */
 482                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
 483                 max = max & 0x8ff;      /* bit 0~10 */
 484                 /* 3 transactions at most */
 485                 if (mult > 3)
 486                         goto en_done;
 487                 break;
 488         default:
 489                 goto en_done;
 490         }
 491
 492         spin_lock_irqsave(&udc->lock, flags);
 493         ep->ep.maxpacket = max;
 494         ep->desc = desc;
 495         ep->stopped = 0;
 496
 497         /* Controller related setup */
 498         /* Init EPx Queue Head (Ep Capabilites field in QH
 499          * according to max, zlt, mult) */
 500         struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
 501                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
 502                                         ?  USB_SEND : USB_RECV),
 503                         (unsigned char) (desc->bmAttributes
 504                                         & USB_ENDPOINT_XFERTYPE_MASK),
 505                         max, zlt, mult);
 506
 507         /* Init endpoint ctrl register */
 508         dr_ep_setup((unsigned char) ep_index(ep),
 509                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
 510                                         ? USB_SEND : USB_RECV),
 511                         (unsigned char) (desc->bmAttributes
 512                                         & USB_ENDPOINT_XFERTYPE_MASK));
 513
 514         spin_unlock_irqrestore(&udc->lock, flags);
 515         retval = 0;
 516
 517         VDBG("enabled %s (ep%d%s) maxpacket %d",ep->ep.name,
 518                         ep->desc->bEndpointAddress & 0x0f,
 519                         (desc->bEndpointAddress & USB_DIR_IN)
 520                                 ? "in" : "out", max);
 521 en_done:
 522         return retval;
 523 }
 524
 525 /*---------------------------------------------------------------------
 526  * @ep : the ep being unconfigured. May not be ep0
 527  * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
 528 *---------------------------------------------------------------------*/
 529 static int fsl_ep_disable(struct usb_ep *_ep)
 530 {
 531         struct fsl_udc *udc = NULL;
 532         struct fsl_ep *ep = NULL;
 533         unsigned long flags = 0;
 534         u32 epctrl;
 535         int ep_num;
 536
 537         ep = container_of(_ep, struct fsl_ep, ep);
 538         if (!_ep || !ep->desc) {
 539                 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
 540                 return -EINVAL;
 541         }
 542
 543         /* disable ep on controller */
 544         ep_num = ep_index(ep);
 545         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 546         if (ep_is_in(ep))
 547                 epctrl &= ~EPCTRL_TX_ENABLE;
 548         else
 549                 epctrl &= ~EPCTRL_RX_ENABLE;
 550         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 551
 552         udc = (struct fsl_udc *)ep->udc;
 553         spin_lock_irqsave(&udc->lock, flags);
 554
 555         /* nuke all pending requests (does flush) */
 556         nuke(ep, -ESHUTDOWN);
 557
 558         ep->desc = NULL;
 559         ep->stopped = 1;
 560         spin_unlock_irqrestore(&udc->lock, flags);
 561
 562         VDBG("disabled %s OK", _ep->name);
 563         return 0;
 564 }
 565
 566 /*---------------------------------------------------------------------
 567  * allocate a request object used by this endpoint
 568  * the main operation is to insert the req->queue to the eq->queue
 569  * Returns the request, or null if one could not be allocated
 570 *---------------------------------------------------------------------*/
 571 static struct usb_request *
 572 fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 573 {
 574         struct fsl_req *req = NULL;
 575
 576         req = kzalloc(sizeof *req, gfp_flags);
 577         if (!req)
 578                 return NULL;
 579
 580         req->req.dma = DMA_ADDR_INVALID;
 581         INIT_LIST_HEAD(&req->queue);
 582
 583         return &req->req;
 584 }
 585
 586 static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
 587 {
 588         struct fsl_req *req = NULL;
 589
 590         req = container_of(_req, struct fsl_req, req);
 591
 592         if (_req)
 593                 kfree(req);
 594 }
 595
 596 /*-------------------------------------------------------------------------*/
 597 static int fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
 598 {
 599         int i = ep_index(ep) * 2 + ep_is_in(ep);
 600         u32 temp, bitmask, tmp_stat;
 601         struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
 602
 603         /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
 604         VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
 605
 606         bitmask = ep_is_in(ep)
 607                 ? (1 << (ep_index(ep) + 16))
 608                 : (1 << (ep_index(ep)));
 609
 610         /* check if the pipe is empty */
 611         if (!(list_empty(&ep->queue))) {
 612                 /* Add td to the end */
 613                 struct fsl_req *lastreq;
 614                 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
 615                 lastreq->tail->next_td_ptr =
 616                         cpu_to_le32(req->head->td_dma & DTD_ADDR_MASK);
 617                 /* Read prime bit, if 1 goto done */
 618                 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
 619                         goto out;
 620
 621                 do {
 622                         /* Set ATDTW bit in USBCMD */
 623                         temp = fsl_readl(&dr_regs->usbcmd);
 624                         fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
 625
 626                         /* Read correct status bit */
 627                         tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
 628
 629                 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
 630
 631                 /* Write ATDTW bit to 0 */
 632                 temp = fsl_readl(&dr_regs->usbcmd);
 633                 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
 634
 635                 if (tmp_stat)
 636                         goto out;
 637         }
 638
 639         /* Write dQH next pointer and terminate bit to 0 */
 640         temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
 641         dQH->next_dtd_ptr = cpu_to_le32(temp);
 642
 643         /* Clear active and halt bit */
 644         temp = cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
 645                         | EP_QUEUE_HEAD_STATUS_HALT));
 646         dQH->size_ioc_int_sts &= temp;
 647
 648         /* Prime endpoint by writing 1 to ENDPTPRIME */
 649         temp = ep_is_in(ep)
 650                 ? (1 << (ep_index(ep) + 16))
 651                 : (1 << (ep_index(ep)));
 652         fsl_writel(temp, &dr_regs->endpointprime);
 653 out:
 654         return 0;
 655 }
 656
 657 /* Fill in the dTD structure
 658  * @req: request that the transfer belongs to
 659  * @length: return actually data length of the dTD
 660  * @dma: return dma address of the dTD
 661  * @is_last: return flag if it is the last dTD of the request
 662  * return: pointer to the built dTD */
 663 static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
 664                 dma_addr_t *dma, int *is_last)
 665 {
 666         u32 swap_temp;
 667         struct ep_td_struct *dtd;
 668
 669         /* how big will this transfer be? */
 670         *length = min(req->req.length - req->req.actual,
 671                         (unsigned)EP_MAX_LENGTH_TRANSFER);
 672
 673         dtd = dma_pool_alloc(udc_controller->td_pool, GFP_KERNEL, dma);
 674         if (dtd == NULL)
 675                 return dtd;
 676
 677         dtd->td_dma = *dma;
 678         /* Clear reserved field */
 679         swap_temp = cpu_to_le32(dtd->size_ioc_sts);
 680         swap_temp &= ~DTD_RESERVED_FIELDS;
 681         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
 682
 683         /* Init all of buffer page pointers */
 684         swap_temp = (u32) (req->req.dma + req->req.actual);
 685         dtd->buff_ptr0 = cpu_to_le32(swap_temp);
 686         dtd->buff_ptr1 = cpu_to_le32(swap_temp + 0x1000);
 687         dtd->buff_ptr2 = cpu_to_le32(swap_temp + 0x2000);
 688         dtd->buff_ptr3 = cpu_to_le32(swap_temp + 0x3000);
 689         dtd->buff_ptr4 = cpu_to_le32(swap_temp + 0x4000);
 690
 691         req->req.actual += *length;
 692
 693         /* zlp is needed if req->req.zero is set */
 694         if (req->req.zero) {
 695                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
 696                         *is_last = 1;
 697                 else
 698                         *is_last = 0;
 699         } else if (req->req.length == req->req.actual)
 700                 *is_last = 1;
 701         else
 702                 *is_last = 0;
 703
 704         if ((*is_last) == 0)
 705                 VDBG("multi-dtd request!");
 706         /* Fill in the transfer size; set active bit */
 707         swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
 708
 709         /* Enable interrupt for the last dtd of a request */
 710         if (*is_last && !req->req.no_interrupt)
 711                 swap_temp |= DTD_IOC;
 712
 713         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
 714
 715         mb();
 716
 717         VDBG("length = %d address= 0x%x", *length, (int)*dma);
 718
 719         return dtd;
 720 }
 721
 722 /* Generate dtd chain for a request */
 723 static int fsl_req_to_dtd(struct fsl_req *req)
 724 {
 725         unsigned        count;
 726         int             is_last;
 727         int             is_first =1;
 728         struct ep_td_struct     *last_dtd = NULL, *dtd;
 729         dma_addr_t dma;
 730
 731         do {
 732                 dtd = fsl_build_dtd(req, &count, &dma, &is_last);
 733                 if (dtd == NULL)
 734                         return -ENOMEM;
 735
 736                 if (is_first) {
 737                         is_first = 0;
 738                         req->head = dtd;
 739                 } else {
 740                         last_dtd->next_td_ptr = cpu_to_le32(dma);
 741                         last_dtd->next_td_virt = dtd;
 742                 }
 743                 last_dtd = dtd;
 744
 745                 req->dtd_count++;
 746         } while (!is_last);
 747
 748         dtd->next_td_ptr = cpu_to_le32(DTD_NEXT_TERMINATE);
 749
 750         req->tail = dtd;
 751
 752         return 0;
 753 }
 754
 755 /* queues (submits) an I/O request to an endpoint */
 756 static int
 757 fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 758 {
 759         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
 760         struct fsl_req *req = container_of(_req, struct fsl_req, req);
 761         struct fsl_udc *udc;
 762         unsigned long flags;
 763         int is_iso = 0;
 764
 765         /* catch various bogus parameters */
 766         if (!_req || !req->req.complete || !req->req.buf
 767                         || !list_empty(&req->queue)) {
 768                 VDBG("%s, bad params", __func__);
 769                 return -EINVAL;
 770         }
 771         if (unlikely(!_ep || !ep->desc)) {
 772                 VDBG("%s, bad ep", __func__);
 773                 return -EINVAL;
 774         }
 775         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 776                 if (req->req.length > ep->ep.maxpacket)
 777                         return -EMSGSIZE;
 778                 is_iso = 1;
 779         }
 780
 781         udc = ep->udc;
 782         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
 783                 return -ESHUTDOWN;
 784
 785         req->ep = ep;
 786
 787         /* map virtual address to hardware */
 788         if (req->req.dma == DMA_ADDR_INVALID) {
 789                 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
 790                                         req->req.buf,
 791                                         req->req.length, ep_is_in(ep)
 792                                                 ? DMA_TO_DEVICE
 793                                                 : DMA_FROM_DEVICE);
 794                 req->mapped = 1;
 795         } else {
 796                 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
 797                                         req->req.dma, req->req.length,
 798                                         ep_is_in(ep)
 799                                                 ? DMA_TO_DEVICE
 800                                                 : DMA_FROM_DEVICE);
 801                 req->mapped = 0;
 802         }
 803
 804         req->req.status = -EINPROGRESS;
 805         req->req.actual = 0;
 806         req->dtd_count = 0;
 807
 808         spin_lock_irqsave(&udc->lock, flags);
 809
 810         /* build dtds and push them to device queue */
 811         if (!fsl_req_to_dtd(req)) {
 812                 fsl_queue_td(ep, req);
 813         } else {
 814                 spin_unlock_irqrestore(&udc->lock, flags);
 815                 return -ENOMEM;
 816         }
 817
 818         /* Update ep0 state */
 819         if ((ep_index(ep) == 0))
 820                 udc->ep0_state = DATA_STATE_XMIT;
 821
 822         /* irq handler advances the queue */
 823         if (req != NULL)
 824                 list_add_tail(&req->queue, &ep->queue);
 825         spin_unlock_irqrestore(&udc->lock, flags);
 826
 827         return 0;
 828 }
 829
 830 /* dequeues (cancels, unlinks) an I/O request from an endpoint */
 831 static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 832 {
 833         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
 834         struct fsl_req *req;
 835         unsigned long flags;
 836         int ep_num, stopped, ret = 0;
 837         u32 epctrl;
 838
 839         if (!_ep || !_req)
 840                 return -EINVAL;
 841
 842         spin_lock_irqsave(&ep->udc->lock, flags);
 843         stopped = ep->stopped;
 844
 845         /* Stop the ep before we deal with the queue */
 846         ep->stopped = 1;
 847         ep_num = ep_index(ep);
 848         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 849         if (ep_is_in(ep))
 850                 epctrl &= ~EPCTRL_TX_ENABLE;
 851         else
 852                 epctrl &= ~EPCTRL_RX_ENABLE;
 853         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 854
 855         /* make sure it's actually queued on this endpoint */
 856         list_for_each_entry(req, &ep->queue, queue) {
 857                 if (&req->req == _req)
 858                         break;
 859         }
 860         if (&req->req != _req) {
 861                 ret = -EINVAL;
 862                 goto out;
 863         }
 864
 865         /* The request is in progress, or completed but not dequeued */
 866         if (ep->queue.next == &req->queue) {
 867                 _req->status = -ECONNRESET;
 868                 fsl_ep_fifo_flush(_ep); /* flush current transfer */
 869
 870                 /* The request isn't the last request in this ep queue */
 871                 if (req->queue.next != &ep->queue) {
 872                         struct ep_queue_head *qh;
 873                         struct fsl_req *next_req;
 874
 875                         qh = ep->qh;
 876                         next_req = list_entry(req->queue.next, struct fsl_req,
 877                                         queue);
 878
 879                         /* Point the QH to the first TD of next request */
 880                         fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr);
 881                 }
 882
 883                 /* The request hasn't been processed, patch up the TD chain */
 884         } else {
 885                 struct fsl_req *prev_req;
 886
 887                 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
 888                 fsl_writel(fsl_readl(&req->tail->next_td_ptr),
 889                                 &prev_req->tail->next_td_ptr);
 890
 891         }
 892
 893         done(ep, req, -ECONNRESET);
 894
 895         /* Enable EP */
 896 out:    epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 897         if (ep_is_in(ep))
 898                 epctrl |= EPCTRL_TX_ENABLE;
 899         else
 900                 epctrl |= EPCTRL_RX_ENABLE;
 901         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 902         ep->stopped = stopped;
 903
 904         spin_unlock_irqrestore(&ep->udc->lock, flags);
 905         return ret;
 906 }
 907
 908 /*-------------------------------------------------------------------------*/
 909
 910 /*-----------------------------------------------------------------
 911  * modify the endpoint halt feature
 912  * @ep: the non-isochronous endpoint being stalled
 913  * @value: 1--set halt  0--clear halt
 914  * Returns zero, or a negative error code.
 915 *----------------------------------------------------------------*/
 916 static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
 917 {
 918         struct fsl_ep *ep = NULL;
 919         unsigned long flags = 0;
 920         int status = -EOPNOTSUPP;       /* operation not supported */
 921         unsigned char ep_dir = 0, ep_num = 0;
 922         struct fsl_udc *udc = NULL;
 923
 924         ep = container_of(_ep, struct fsl_ep, ep);
 925         udc = ep->udc;
 926         if (!_ep || !ep->desc) {
 927                 status = -EINVAL;
 928                 goto out;
 929         }
 930
 931         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 932                 status = -EOPNOTSUPP;
 933                 goto out;
 934         }
 935
 936         /* Attempt to halt IN ep will fail if any transfer requests
 937          * are still queue */
 938         if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
 939                 status = -EAGAIN;
 940                 goto out;
 941         }
 942
 943         status = 0;
 944         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
 945         ep_num = (unsigned char)(ep_index(ep));
 946         spin_lock_irqsave(&ep->udc->lock, flags);
 947         dr_ep_change_stall(ep_num, ep_dir, value);
 948         spin_unlock_irqrestore(&ep->udc->lock, flags);
 949
 950         if (ep_index(ep) == 0) {
 951                 udc->ep0_state = WAIT_FOR_SETUP;
 952                 udc->ep0_dir = 0;
 953         }
 954 out:
 955         VDBG(" %s %s halt stat %d", ep->ep.name,
 956                         value ?  "set" : "clear", status);
 957
 958         return status;
 959 }
 960
 961 static void fsl_ep_fifo_flush(struct usb_ep *_ep)
 962 {
 963         struct fsl_ep *ep;
 964         int ep_num, ep_dir;
 965         u32 bits;
 966         unsigned long timeout;
 967 #define FSL_UDC_FLUSH_TIMEOUT 1000
 968
 969         if (!_ep) {
 970                 return;
 971         } else {
 972                 ep = container_of(_ep, struct fsl_ep, ep);
 973                 if (!ep->desc)
 974                         return;
 975         }
 976         ep_num = ep_index(ep);
 977         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
 978
 979         if (ep_num == 0)
 980                 bits = (1 << 16) | 1;
 981         else if (ep_dir == USB_SEND)
 982                 bits = 1 << (16 + ep_num);
 983         else
 984                 bits = 1 << ep_num;
 985
 986         timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
 987         do {
 988                 fsl_writel(bits, &dr_regs->endptflush);
 989
 990                 /* Wait until flush complete */
 991                 while (fsl_readl(&dr_regs->endptflush)) {
 992                         if (time_after(jiffies, timeout)) {
 993                                 ERR("ep flush timeout\n");
 994                                 return;
 995                         }
 996                         cpu_relax();
 997                 }
 998                 /* See if we need to flush again */
 999         } while (fsl_readl(&dr_regs->endptstatus) & bits);
1000 }
1001
1002 static struct usb_ep_ops fsl_ep_ops = {
1003         .enable = fsl_ep_enable,
1004         .disable = fsl_ep_disable,
1005
1006         .alloc_request = fsl_alloc_request,
1007         .free_request = fsl_free_request,
1008
1009         .queue = fsl_ep_queue,
1010         .dequeue = fsl_ep_dequeue,
1011
1012         .set_halt = fsl_ep_set_halt,
1013         .fifo_flush = fsl_ep_fifo_flush,        /* flush fifo */
1014 };
1015
1016 /*-------------------------------------------------------------------------
1017                 Gadget Driver Layer Operations
1018 -------------------------------------------------------------------------*/
1019
1020 /*----------------------------------------------------------------------
1021  * Get the current frame number (from DR frame_index Reg )
1022  *----------------------------------------------------------------------*/
1023 static int fsl_get_frame(struct usb_gadget *gadget)
1024 {
1025         return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1026 }
1027
1028 /*-----------------------------------------------------------------------
1029  * Tries to wake up the host connected to this gadget
1030  -----------------------------------------------------------------------*/
1031 static int fsl_wakeup(struct usb_gadget *gadget)
1032 {
1033         struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1034         u32 portsc;
1035
1036         /* Remote wakeup feature not enabled by host */
1037         if (!udc->remote_wakeup)
1038                 return -ENOTSUPP;
1039
1040         portsc = fsl_readl(&dr_regs->portsc1);
1041         /* not suspended? */
1042         if (!(portsc & PORTSCX_PORT_SUSPEND))
1043                 return 0;
1044         /* trigger force resume */
1045         portsc |= PORTSCX_PORT_FORCE_RESUME;
1046         fsl_writel(portsc, &dr_regs->portsc1);
1047         return 0;
1048 }
1049
1050 static int can_pullup(struct fsl_udc *udc)
1051 {
1052         return udc->driver && udc->softconnect && udc->vbus_active;
1053 }
1054
1055 /* Notify controller that VBUS is powered, Called by whatever
1056    detects VBUS sessions */
1057 static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1058 {
1059         struct fsl_udc  *udc;
1060         unsigned long   flags;
1061
1062         udc = container_of(gadget, struct fsl_udc, gadget);
1063         spin_lock_irqsave(&udc->lock, flags);
1064         VDBG("VBUS %s", is_active ? "on" : "off");
1065         udc->vbus_active = (is_active != 0);
1066         if (can_pullup(udc))
1067                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1068                                 &dr_regs->usbcmd);
1069         else
1070                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1071                                 &dr_regs->usbcmd);
1072         spin_unlock_irqrestore(&udc->lock, flags);
1073         return 0;
1074 }
1075
1076 /* constrain controller's VBUS power usage
1077  * This call is used by gadget drivers during SET_CONFIGURATION calls,
1078  * reporting how much power the device may consume.  For example, this
1079  * could affect how quickly batteries are recharged.
1080  *
1081  * Returns zero on success, else negative errno.
1082  */
1083 static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1084 {
1085         struct fsl_udc *udc;
1086
1087         udc = container_of(gadget, struct fsl_udc, gadget);
1088         if (udc->transceiver)
1089                 return otg_set_power(udc->transceiver, mA);
1090         return -ENOTSUPP;
1091 }
1092
1093 /* Change Data+ pullup status
1094  * this func is used by usb_gadget_connect/disconnet
1095  */
1096 static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1097 {
1098         struct fsl_udc *udc;
1099
1100         udc = container_of(gadget, struct fsl_udc, gadget);
1101         udc->softconnect = (is_on != 0);
1102         if (can_pullup(udc))
1103                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1104                                 &dr_regs->usbcmd);
1105         else
1106                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1107                                 &dr_regs->usbcmd);
1108
1109         return 0;
1110 }
1111
1112 /* defined in gadget.h */
1113 static struct usb_gadget_ops fsl_gadget_ops = {
1114         .get_frame = fsl_get_frame,
1115         .wakeup = fsl_wakeup,
1116 /*      .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1117         .vbus_session = fsl_vbus_session,
1118         .vbus_draw = fsl_vbus_draw,
1119         .pullup = fsl_pullup,
1120 };
1121
1122 /* Set protocol stall on ep0, protocol stall will automatically be cleared
1123    on new transaction */
1124 static void ep0stall(struct fsl_udc *udc)
1125 {
1126         u32 tmp;
1127
1128         /* must set tx and rx to stall at the same time */
1129         tmp = fsl_readl(&dr_regs->endptctrl[0]);
1130         tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1131         fsl_writel(tmp, &dr_regs->endptctrl[0]);
1132         udc->ep0_state = WAIT_FOR_SETUP;
1133         udc->ep0_dir = 0;
1134 }
1135
1136 /* Prime a status phase for ep0 */
1137 static int ep0_prime_status(struct fsl_udc *udc, int direction)
1138 {
1139         struct fsl_req *req = udc->status_req;
1140         struct fsl_ep *ep;
1141         int status = 0;
1142
1143         if (direction == EP_DIR_IN)
1144                 udc->ep0_dir = USB_DIR_IN;
1145         else
1146                 udc->ep0_dir = USB_DIR_OUT;
1147
1148         ep = &udc->eps[0];
1149         udc->ep0_state = WAIT_FOR_OUT_STATUS;
1150
1151         req->ep = ep;
1152         req->req.length = 0;
1153         req->req.status = -EINPROGRESS;
1154         req->req.actual = 0;
1155         req->req.complete = NULL;
1156         req->dtd_count = 0;
1157
1158         if (fsl_req_to_dtd(req) == 0)
1159                 status = fsl_queue_td(ep, req);
1160         else
1161                 return -ENOMEM;
1162
1163         if (status)
1164                 ERR("Can't queue ep0 status request\n");
1165         list_add_tail(&req->queue, &ep->queue);
1166
1167         return status;
1168 }
1169
1170 static inline int udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
1171 {
1172         struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1173
1174         if (!ep->name)
1175                 return 0;
1176
1177         nuke(ep, -ESHUTDOWN);
1178
1179         return 0;
1180 }
1181
1182 /*
1183  * ch9 Set address
1184  */
1185 static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1186 {
1187         /* Save the new address to device struct */
1188         udc->device_address = (u8) value;
1189         /* Update usb state */
1190         udc->usb_state = USB_STATE_ADDRESS;
1191         /* Status phase */
1192         if (ep0_prime_status(udc, EP_DIR_IN))
1193                 ep0stall(udc);
1194 }
1195
1196 /*
1197  * ch9 Get status
1198  */
1199 static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1200                 u16 index, u16 length)
1201 {
1202         u16 tmp = 0;            /* Status, cpu endian */
1203
1204         struct fsl_req *req;
1205         struct fsl_ep *ep;
1206         int status = 0;
1207
1208         ep = &udc->eps[0];
1209
1210         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1211                 /* Get device status */
1212                 tmp = 1 << USB_DEVICE_SELF_POWERED;
1213                 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1214         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1215                 /* Get interface status */
1216                 /* We don't have interface information in udc driver */
1217                 tmp = 0;
1218         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1219                 /* Get endpoint status */
1220                 struct fsl_ep *target_ep;
1221
1222                 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1223
1224                 /* stall if endpoint doesn't exist */
1225                 if (!target_ep->desc)
1226                         goto stall;
1227                 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1228                                 << USB_ENDPOINT_HALT;
1229         }
1230
1231         udc->ep0_dir = USB_DIR_IN;
1232         /* Borrow the per device status_req */
1233         req = udc->status_req;
1234         /* Fill in the reqest structure */
1235         *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1236         req->ep = ep;
1237         req->req.length = 2;
1238         req->req.status = -EINPROGRESS;
1239         req->req.actual = 0;
1240         req->req.complete = NULL;
1241         req->dtd_count = 0;
1242
1243         /* prime the data phase */
1244         if ((fsl_req_to_dtd(req) == 0))
1245                 status = fsl_queue_td(ep, req);
1246         else                    /* no mem */
1247                 goto stall;
1248
1249         if (status) {
1250                 ERR("Can't respond to getstatus request\n");
1251                 goto stall;
1252         }
1253         list_add_tail(&req->queue, &ep->queue);
1254         udc->ep0_state = DATA_STATE_XMIT;
1255         return;
1256 stall:
1257         ep0stall(udc);
1258 }
1259
1260 static void setup_received_irq(struct fsl_udc *udc,
1261                 struct usb_ctrlrequest *setup)
1262 {
1263         u16 wValue = le16_to_cpu(setup->wValue);
1264         u16 wIndex = le16_to_cpu(setup->wIndex);
1265         u16 wLength = le16_to_cpu(setup->wLength);
1266
1267         udc_reset_ep_queue(udc, 0);
1268
1269         /* We process some stardard setup requests here */
1270         switch (setup->bRequest) {
1271         case USB_REQ_GET_STATUS:
1272                 /* Data+Status phase from udc */
1273                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
1274                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
1275                         break;
1276                 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
1277                 return;
1278
1279         case USB_REQ_SET_ADDRESS:
1280                 /* Status phase from udc */
1281                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1282                                                 | USB_RECIP_DEVICE))
1283                         break;
1284                 ch9setaddress(udc, wValue, wIndex, wLength);
1285                 return;
1286
1287         case USB_REQ_CLEAR_FEATURE:
1288         case USB_REQ_SET_FEATURE:
1289                 /* Status phase from udc */
1290         {
1291                 int rc = -EOPNOTSUPP;
1292
1293                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1294                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
1295                         int pipe = get_pipe_by_windex(wIndex);
1296                         struct fsl_ep *ep;
1297
1298                         if (wValue != 0 || wLength != 0 || pipe > udc->max_ep)
1299                                 break;
1300                         ep = get_ep_by_pipe(udc, pipe);
1301
1302                         spin_unlock(&udc->lock);
1303                         rc = fsl_ep_set_halt(&ep->ep,
1304                                         (setup->bRequest == USB_REQ_SET_FEATURE)
1305                                                 ? 1 : 0);
1306                         spin_lock(&udc->lock);
1307
1308                 } else if ((setup->bRequestType & (USB_RECIP_MASK
1309                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1310                                 | USB_TYPE_STANDARD)) {
1311                         /* Note: The driver has not include OTG support yet.
1312                          * This will be set when OTG support is added */
1313                         if (!gadget_is_otg(&udc->gadget))
1314                                 break;
1315                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
1316                                 udc->gadget.b_hnp_enable = 1;
1317                         else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
1318                                 udc->gadget.a_hnp_support = 1;
1319                         else if (setup->bRequest ==
1320                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
1321                                 udc->gadget.a_alt_hnp_support = 1;
1322                         else
1323                                 break;
1324                         rc = 0;
1325                 } else
1326                         break;
1327
1328                 if (rc == 0) {
1329                         if (ep0_prime_status(udc, EP_DIR_IN))
1330                                 ep0stall(udc);
1331                 }
1332                 return;
1333         }
1334
1335         default:
1336                 break;
1337         }
1338
1339         /* Requests handled by gadget */
1340         if (wLength) {
1341                 /* Data phase from gadget, status phase from udc */
1342                 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1343                                 ?  USB_DIR_IN : USB_DIR_OUT;
1344                 spin_unlock(&udc->lock);
1345                 if (udc->driver->setup(&udc->gadget,
1346                                 &udc->local_setup_buff) < 0)
1347                         ep0stall(udc);
1348                 spin_lock(&udc->lock);
1349                 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1350                                 ?  DATA_STATE_XMIT : DATA_STATE_RECV;
1351         } else {
1352                 /* No data phase, IN status from gadget */
1353                 udc->ep0_dir = USB_DIR_IN;
1354                 spin_unlock(&udc->lock);
1355                 if (udc->driver->setup(&udc->gadget,
1356                                 &udc->local_setup_buff) < 0)
1357                         ep0stall(udc);
1358                 spin_lock(&udc->lock);
1359                 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1360         }
1361 }
1362
1363 /* Process request for Data or Status phase of ep0
1364  * prime status phase if needed */
1365 static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1366                 struct fsl_req *req)
1367 {
1368         if (udc->usb_state == USB_STATE_ADDRESS) {
1369                 /* Set the new address */
1370                 u32 new_address = (u32) udc->device_address;
1371                 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1372                                 &dr_regs->deviceaddr);
1373         }
1374
1375         done(ep0, req, 0);
1376
1377         switch (udc->ep0_state) {
1378         case DATA_STATE_XMIT:
1379                 /* receive status phase */
1380                 if (ep0_prime_status(udc, EP_DIR_OUT))
1381                         ep0stall(udc);
1382                 break;
1383         case DATA_STATE_RECV:
1384                 /* send status phase */
1385                 if (ep0_prime_status(udc, EP_DIR_IN))
1386                         ep0stall(udc);
1387                 break;
1388         case WAIT_FOR_OUT_STATUS:
1389                 udc->ep0_state = WAIT_FOR_SETUP;
1390                 break;
1391         case WAIT_FOR_SETUP:
1392                 ERR("Unexpect ep0 packets\n");
1393                 break;
1394         default:
1395                 ep0stall(udc);
1396                 break;
1397         }
1398 }
1399
1400 /* Tripwire mechanism to ensure a setup packet payload is extracted without
1401  * being corrupted by another incoming setup packet */
1402 static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1403 {
1404         u32 temp;
1405         struct ep_queue_head *qh;
1406
1407         qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1408
1409         /* Clear bit in ENDPTSETUPSTAT */
1410         temp = fsl_readl(&dr_regs->endptsetupstat);
1411         fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1412
1413         /* while a hazard exists when setup package arrives */
1414         do {
1415                 /* Set Setup Tripwire */
1416                 temp = fsl_readl(&dr_regs->usbcmd);
1417                 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1418
1419                 /* Copy the setup packet to local buffer */
1420                 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1421         } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1422
1423         /* Clear Setup Tripwire */
1424         temp = fsl_readl(&dr_regs->usbcmd);
1425         fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1426 }
1427
1428 /* process-ep_req(): free the completed Tds for this req */
1429 static int process_ep_req(struct fsl_udc *udc, int pipe,
1430                 struct fsl_req *curr_req)
1431 {
1432         struct ep_td_struct *curr_td;
1433         int     td_complete, actual, remaining_length, j, tmp;
1434         int     status = 0;
1435         int     errors = 0;
1436         struct  ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1437         int direction = pipe % 2;
1438
1439         curr_td = curr_req->head;
1440         td_complete = 0;
1441         actual = curr_req->req.length;
1442
1443         for (j = 0; j < curr_req->dtd_count; j++) {
1444                 remaining_length = (le32_to_cpu(curr_td->size_ioc_sts)
1445                                         & DTD_PACKET_SIZE)
1446                                 >> DTD_LENGTH_BIT_POS;
1447                 actual -= remaining_length;
1448
1449                 if ((errors = le32_to_cpu(curr_td->size_ioc_sts) &
1450                                                 DTD_ERROR_MASK)) {
1451                         if (errors & DTD_STATUS_HALTED) {
1452                                 ERR("dTD error %08x QH=%d\n", errors, pipe);
1453                                 /* Clear the errors and Halt condition */
1454                                 tmp = le32_to_cpu(curr_qh->size_ioc_int_sts);
1455                                 tmp &= ~errors;
1456                                 curr_qh->size_ioc_int_sts = cpu_to_le32(tmp);
1457                                 status = -EPIPE;
1458                                 /* FIXME: continue with next queued TD? */
1459
1460                                 break;
1461                         }
1462                         if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1463                                 VDBG("Transfer overflow");
1464                                 status = -EPROTO;
1465                                 break;
1466                         } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1467                                 VDBG("ISO error");
1468                                 status = -EILSEQ;
1469                                 break;
1470                         } else
1471                                 ERR("Unknown error has occured (0x%x)!\n",
1472                                         errors);
1473
1474                 } else if (le32_to_cpu(curr_td->size_ioc_sts)
1475                                 & DTD_STATUS_ACTIVE) {
1476                         VDBG("Request not complete");
1477                         status = REQ_UNCOMPLETE;
1478                         return status;
1479                 } else if (remaining_length) {
1480                         if (direction) {
1481                                 VDBG("Transmit dTD remaining length not zero");
1482                                 status = -EPROTO;
1483                                 break;
1484                         } else {
1485                                 td_complete++;
1486                                 break;
1487                         }
1488                 } else {
1489                         td_complete++;
1490                         VDBG("dTD transmitted successful");
1491                 }
1492
1493                 if (j != curr_req->dtd_count - 1)
1494                         curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1495         }
1496
1497         if (status)
1498                 return status;
1499
1500         curr_req->req.actual = actual;
1501
1502         return 0;
1503 }
1504
1505 /* Process a DTD completion interrupt */
1506 static void dtd_complete_irq(struct fsl_udc *udc)
1507 {
1508         u32 bit_pos;
1509         int i, ep_num, direction, bit_mask, status;
1510         struct fsl_ep *curr_ep;
1511         struct fsl_req *curr_req, *temp_req;
1512
1513         /* Clear the bits in the register */
1514         bit_pos = fsl_readl(&dr_regs->endptcomplete);
1515         fsl_writel(bit_pos, &dr_regs->endptcomplete);
1516
1517         if (!bit_pos)
1518                 return;
1519
1520         for (i = 0; i < udc->max_ep * 2; i++) {
1521                 ep_num = i >> 1;
1522                 direction = i % 2;
1523
1524                 bit_mask = 1 << (ep_num + 16 * direction);
1525
1526                 if (!(bit_pos & bit_mask))
1527                         continue;
1528
1529                 curr_ep = get_ep_by_pipe(udc, i);
1530
1531                 /* If the ep is configured */
1532                 if (curr_ep->name == NULL) {
1533                         WARNING("Invalid EP?");
1534                         continue;
1535                 }
1536
1537                 /* process the req queue until an uncomplete request */
1538                 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1539                                 queue) {
1540                         status = process_ep_req(udc, i, curr_req);
1541
1542                         VDBG("status of process_ep_req= %d, ep = %d",
1543                                         status, ep_num);
1544                         if (status == REQ_UNCOMPLETE)
1545                                 break;
1546                         /* write back status to req */
1547                         curr_req->req.status = status;
1548
1549                         if (ep_num == 0) {
1550                                 ep0_req_complete(udc, curr_ep, curr_req);
1551                                 break;
1552                         } else
1553                                 done(curr_ep, curr_req, status);
1554                 }
1555         }
1556 }
1557
1558 /* Process a port change interrupt */
1559 static void port_change_irq(struct fsl_udc *udc)
1560 {
1561         u32 speed;
1562
1563         /* Bus resetting is finished */
1564         if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) {
1565                 /* Get the speed */
1566                 speed = (fsl_readl(&dr_regs->portsc1)
1567                                 & PORTSCX_PORT_SPEED_MASK);
1568                 switch (speed) {
1569                 case PORTSCX_PORT_SPEED_HIGH:
1570                         udc->gadget.speed = USB_SPEED_HIGH;
1571                         break;
1572                 case PORTSCX_PORT_SPEED_FULL:
1573                         udc->gadget.speed = USB_SPEED_FULL;
1574                         break;
1575                 case PORTSCX_PORT_SPEED_LOW:
1576                         udc->gadget.speed = USB_SPEED_LOW;
1577                         break;
1578                 default:
1579                         udc->gadget.speed = USB_SPEED_UNKNOWN;
1580                         break;
1581                 }
1582         }
1583
1584         /* Update USB state */
1585         if (!udc->resume_state)
1586                 udc->usb_state = USB_STATE_DEFAULT;
1587 }
1588
1589 /* Process suspend interrupt */
1590 static void suspend_irq(struct fsl_udc *udc)
1591 {
1592         udc->resume_state = udc->usb_state;
1593         udc->usb_state = USB_STATE_SUSPENDED;
1594
1595         /* report suspend to the driver, serial.c does not support this */
1596         if (udc->driver->suspend)
1597                 udc->driver->suspend(&udc->gadget);
1598 }
1599
1600 static void bus_resume(struct fsl_udc *udc)
1601 {
1602         udc->usb_state = udc->resume_state;
1603         udc->resume_state = 0;
1604
1605         /* report resume to the driver, serial.c does not support this */
1606         if (udc->driver->resume)
1607                 udc->driver->resume(&udc->gadget);
1608 }
1609
1610 /* Clear up all ep queues */
1611 static int reset_queues(struct fsl_udc *udc)
1612 {
1613         u8 pipe;
1614
1615         for (pipe = 0; pipe < udc->max_pipes; pipe++)
1616                 udc_reset_ep_queue(udc, pipe);
1617
1618         /* report disconnect; the driver is already quiesced */
1619         spin_unlock(&udc->lock);
1620         udc->driver->disconnect(&udc->gadget);
1621         spin_lock(&udc->lock);
1622
1623         return 0;
1624 }
1625
1626 /* Process reset interrupt */
1627 static void reset_irq(struct fsl_udc *udc)
1628 {
1629         u32 temp;
1630         unsigned long timeout;
1631
1632         /* Clear the device address */
1633         temp = fsl_readl(&dr_regs->deviceaddr);
1634         fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
1635
1636         udc->device_address = 0;
1637
1638         /* Clear usb state */
1639         udc->resume_state = 0;
1640         udc->ep0_dir = 0;
1641         udc->ep0_state = WAIT_FOR_SETUP;
1642         udc->remote_wakeup = 0; /* default to 0 on reset */
1643         udc->gadget.b_hnp_enable = 0;
1644         udc->gadget.a_hnp_support = 0;
1645         udc->gadget.a_alt_hnp_support = 0;
1646
1647         /* Clear all the setup token semaphores */
1648         temp = fsl_readl(&dr_regs->endptsetupstat);
1649         fsl_writel(temp, &dr_regs->endptsetupstat);
1650
1651         /* Clear all the endpoint complete status bits */
1652         temp = fsl_readl(&dr_regs->endptcomplete);
1653         fsl_writel(temp, &dr_regs->endptcomplete);
1654
1655         timeout = jiffies + 100;
1656         while (fsl_readl(&dr_regs->endpointprime)) {
1657                 /* Wait until all endptprime bits cleared */
1658                 if (time_after(jiffies, timeout)) {
1659                         ERR("Timeout for reset\n");
1660                         break;
1661                 }
1662                 cpu_relax();
1663         }
1664
1665         /* Write 1s to the flush register */
1666         fsl_writel(0xffffffff, &dr_regs->endptflush);
1667
1668         if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1669                 VDBG("Bus reset");
1670                 /* Reset all the queues, include XD, dTD, EP queue
1671                  * head and TR Queue */
1672                 reset_queues(udc);
1673                 udc->usb_state = USB_STATE_DEFAULT;
1674         } else {
1675                 VDBG("Controller reset");
1676                 /* initialize usb hw reg except for regs for EP, not
1677                  * touch usbintr reg */
1678                 dr_controller_setup(udc);
1679
1680                 /* Reset all internal used Queues */
1681                 reset_queues(udc);
1682
1683                 ep0_setup(udc);
1684
1685                 /* Enable DR IRQ reg, Set Run bit, change udc state */
1686                 dr_controller_run(udc);
1687                 udc->usb_state = USB_STATE_ATTACHED;
1688         }
1689 }
1690
1691 /*
1692  * USB device controller interrupt handler
1693  */
1694 static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1695 {
1696         struct fsl_udc *udc = _udc;
1697         u32 irq_src;
1698         irqreturn_t status = IRQ_NONE;
1699         unsigned long flags;
1700
1701         /* Disable ISR for OTG host mode */
1702         if (udc->stopped)
1703                 return IRQ_NONE;
1704         spin_lock_irqsave(&udc->lock, flags);
1705         irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
1706         /* Clear notification bits */
1707         fsl_writel(irq_src, &dr_regs->usbsts);
1708
1709         /* VDBG("irq_src [0x%8x]", irq_src); */
1710
1711         /* Need to resume? */
1712         if (udc->usb_state == USB_STATE_SUSPENDED)
1713                 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
1714                         bus_resume(udc);
1715
1716         /* USB Interrupt */
1717         if (irq_src & USB_STS_INT) {
1718                 VDBG("Packet int");
1719                 /* Setup package, we only support ep0 as control ep */
1720                 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
1721                         tripwire_handler(udc, 0,
1722                                         (u8 *) (&udc->local_setup_buff));
1723                         setup_received_irq(udc, &udc->local_setup_buff);
1724                         status = IRQ_HANDLED;
1725                 }
1726
1727                 /* completion of dtd */
1728                 if (fsl_readl(&dr_regs->endptcomplete)) {
1729                         dtd_complete_irq(udc);
1730                         status = IRQ_HANDLED;
1731                 }
1732         }
1733
1734         /* SOF (for ISO transfer) */
1735         if (irq_src & USB_STS_SOF) {
1736                 status = IRQ_HANDLED;
1737         }
1738
1739         /* Port Change */
1740         if (irq_src & USB_STS_PORT_CHANGE) {
1741                 port_change_irq(udc);
1742                 status = IRQ_HANDLED;
1743         }
1744
1745         /* Reset Received */
1746         if (irq_src & USB_STS_RESET) {
1747                 reset_irq(udc);
1748                 status = IRQ_HANDLED;
1749         }
1750
1751         /* Sleep Enable (Suspend) */
1752         if (irq_src & USB_STS_SUSPEND) {
1753                 suspend_irq(udc);
1754                 status = IRQ_HANDLED;
1755         }
1756
1757         if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
1758                 VDBG("Error IRQ %x", irq_src);
1759         }
1760
1761         spin_unlock_irqrestore(&udc->lock, flags);
1762         return status;
1763 }
1764
1765 /*----------------------------------------------------------------*
1766  * Hook to gadget drivers
1767  * Called by initialization code of gadget drivers
1768 *----------------------------------------------------------------*/
1769 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1770 {
1771         int retval = -ENODEV;
1772         unsigned long flags = 0;
1773
1774         if (!udc_controller)
1775                 return -ENODEV;
1776
1777         if (!driver || (driver->speed != USB_SPEED_FULL
1778                                 && driver->speed != USB_SPEED_HIGH)
1779                         || !driver->bind || !driver->disconnect
1780                         || !driver->setup)
1781                 return -EINVAL;
1782
1783         if (udc_controller->driver)
1784                 return -EBUSY;
1785
1786         /* lock is needed but whether should use this lock or another */
1787         spin_lock_irqsave(&udc_controller->lock, flags);
1788
1789         driver->driver.bus = NULL;
1790         /* hook up the driver */
1791         udc_controller->driver = driver;
1792         udc_controller->gadget.dev.driver = &driver->driver;
1793         spin_unlock_irqrestore(&udc_controller->lock, flags);
1794
1795         /* bind udc driver to gadget driver */
1796         retval = driver->bind(&udc_controller->gadget);
1797         if (retval) {
1798                 VDBG("bind to %s --> %d", driver->driver.name, retval);
1799                 udc_controller->gadget.dev.driver = NULL;
1800                 udc_controller->driver = NULL;
1801                 goto out;
1802         }
1803
1804         /* Enable DR IRQ reg and Set usbcmd reg  Run bit */
1805         dr_controller_run(udc_controller);
1806         udc_controller->usb_state = USB_STATE_ATTACHED;
1807         udc_controller->ep0_state = WAIT_FOR_SETUP;
1808         udc_controller->ep0_dir = 0;
1809         printk(KERN_INFO "%s: bind to driver %s\n",
1810                         udc_controller->gadget.name, driver->driver.name);
1811
1812 out:
1813         if (retval)
1814                 printk("gadget driver register failed %d\n", retval);
1815         return retval;
1816 }
1817 EXPORT_SYMBOL(usb_gadget_register_driver);
1818
1819 /* Disconnect from gadget driver */
1820 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1821 {
1822         struct fsl_ep *loop_ep;
1823         unsigned long flags;
1824
1825         if (!udc_controller)
1826                 return -ENODEV;
1827
1828         if (!driver || driver != udc_controller->driver || !driver->unbind)
1829                 return -EINVAL;
1830
1831         if (udc_controller->transceiver)
1832                 otg_set_peripheral(udc_controller->transceiver, NULL);
1833
1834         /* stop DR, disable intr */
1835         dr_controller_stop(udc_controller);
1836
1837         /* in fact, no needed */
1838         udc_controller->usb_state = USB_STATE_ATTACHED;
1839         udc_controller->ep0_state = WAIT_FOR_SETUP;
1840         udc_controller->ep0_dir = 0;
1841
1842         /* stand operation */
1843         spin_lock_irqsave(&udc_controller->lock, flags);
1844         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
1845         nuke(&udc_controller->eps[0], -ESHUTDOWN);
1846         list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
1847                         ep.ep_list)
1848                 nuke(loop_ep, -ESHUTDOWN);
1849         spin_unlock_irqrestore(&udc_controller->lock, flags);
1850
1851         /* unbind gadget and unhook driver. */
1852         driver->unbind(&udc_controller->gadget);
1853         udc_controller->gadget.dev.driver = NULL;
1854         udc_controller->driver = NULL;
1855
1856         printk("unregistered gadget driver '%s'\n", driver->driver.name);
1857         return 0;
1858 }
1859 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1860
1861 /*-------------------------------------------------------------------------
1862                 PROC File System Support
1863 -------------------------------------------------------------------------*/
1864 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1865
1866 #include <linux/seq_file.h>
1867
1868 static const char proc_filename[] = "driver/fsl_usb2_udc";
1869
1870 static int fsl_proc_read(char *page, char **start, off_t off, int count,
1871                 int *eof, void *_dev)
1872 {
1873         char *buf = page;
1874         char *next = buf;
1875         unsigned size = count;
1876         unsigned long flags;
1877         int t, i;
1878         u32 tmp_reg;
1879         struct fsl_ep *ep = NULL;
1880         struct fsl_req *req;
1881
1882         struct fsl_udc *udc = udc_controller;
1883         if (off != 0)
1884                 return 0;
1885
1886         spin_lock_irqsave(&udc->lock, flags);
1887
1888         /* ------basic driver information ---- */
1889         t = scnprintf(next, size,
1890                         DRIVER_DESC "\n"
1891                         "%s version: %s\n"
1892                         "Gadget driver: %s\n\n",
1893                         driver_name, DRIVER_VERSION,
1894                         udc->driver ? udc->driver->driver.name : "(none)");
1895         size -= t;
1896         next += t;
1897
1898         /* ------ DR Registers ----- */
1899         tmp_reg = fsl_readl(&dr_regs->usbcmd);
1900         t = scnprintf(next, size,
1901                         "USBCMD reg:\n"
1902                         "SetupTW: %d\n"
1903                         "Run/Stop: %s\n\n",
1904                         (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
1905                         (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
1906         size -= t;
1907         next += t;
1908
1909         tmp_reg = fsl_readl(&dr_regs->usbsts);
1910         t = scnprintf(next, size,
1911                         "USB Status Reg:\n"
1912                         "Dr Suspend: %d" "Reset Received: %d" "System Error: %s"
1913                         "USB Error Interrupt: %s\n\n",
1914                         (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
1915                         (tmp_reg & USB_STS_RESET) ? 1 : 0,
1916                         (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
1917                         (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
1918         size -= t;
1919         next += t;
1920
1921         tmp_reg = fsl_readl(&dr_regs->usbintr);
1922         t = scnprintf(next, size,
1923                         "USB Intrrupt Enable Reg:\n"
1924                         "Sleep Enable: %d" "SOF Received Enable: %d"
1925                         "Reset Enable: %d\n"
1926                         "System Error Enable: %d"
1927                         "Port Change Dectected Enable: %d\n"
1928                         "USB Error Intr Enable: %d" "USB Intr Enable: %d\n\n",
1929                         (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
1930                         (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
1931                         (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
1932                         (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
1933                         (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
1934                         (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
1935                         (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
1936         size -= t;
1937         next += t;
1938
1939         tmp_reg = fsl_readl(&dr_regs->frindex);
1940         t = scnprintf(next, size,
1941                         "USB Frame Index Reg:" "Frame Number is 0x%x\n\n",
1942                         (tmp_reg & USB_FRINDEX_MASKS));
1943         size -= t;
1944         next += t;
1945
1946         tmp_reg = fsl_readl(&dr_regs->deviceaddr);
1947         t = scnprintf(next, size,
1948                         "USB Device Address Reg:" "Device Addr is 0x%x\n\n",
1949                         (tmp_reg & USB_DEVICE_ADDRESS_MASK));
1950         size -= t;
1951         next += t;
1952
1953         tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
1954         t = scnprintf(next, size,
1955                         "USB Endpoint List Address Reg:"
1956                         "Device Addr is 0x%x\n\n",
1957                         (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
1958         size -= t;
1959         next += t;
1960
1961         tmp_reg = fsl_readl(&dr_regs->portsc1);
1962         t = scnprintf(next, size,
1963                 "USB Port Status&Control Reg:\n"
1964                 "Port Transceiver Type : %s" "Port Speed: %s \n"
1965                 "PHY Low Power Suspend: %s" "Port Reset: %s"
1966                 "Port Suspend Mode: %s \n" "Over-current Change: %s"
1967                 "Port Enable/Disable Change: %s\n"
1968                 "Port Enabled/Disabled: %s"
1969                 "Current Connect Status: %s\n\n", ( {
1970                         char *s;
1971                         switch (tmp_reg & PORTSCX_PTS_FSLS) {
1972                         case PORTSCX_PTS_UTMI:
1973                                 s = "UTMI"; break;
1974                         case PORTSCX_PTS_ULPI:
1975                                 s = "ULPI "; break;
1976                         case PORTSCX_PTS_FSLS:
1977                                 s = "FS/LS Serial"; break;
1978                         default:
1979                                 s = "None"; break;
1980                         }
1981                         s;} ), ( {
1982                         char *s;
1983                         switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) {
1984                         case PORTSCX_PORT_SPEED_FULL:
1985                                 s = "Full Speed"; break;
1986                         case PORTSCX_PORT_SPEED_LOW:
1987                                 s = "Low Speed"; break;
1988                         case PORTSCX_PORT_SPEED_HIGH:
1989                                 s = "High Speed"; break;
1990                         default:
1991                                 s = "Undefined"; break;
1992                         }
1993                         s;
1994                 } ),
1995                 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
1996                 "Normal PHY mode" : "Low power mode",
1997                 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
1998                 "Not in Reset",
1999                 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
2000                 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
2001                 "No",
2002                 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
2003                 "Not change",
2004                 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
2005                 "Not correct",
2006                 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
2007                 "Attached" : "Not-Att");
2008         size -= t;
2009         next += t;
2010
2011         tmp_reg = fsl_readl(&dr_regs->usbmode);
2012         t = scnprintf(next, size,
2013                         "USB Mode Reg:" "Controller Mode is : %s\n\n", ( {
2014                                 char *s;
2015                                 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2016                                 case USB_MODE_CTRL_MODE_IDLE:
2017                                         s = "Idle"; break;
2018                                 case USB_MODE_CTRL_MODE_DEVICE:
2019                                         s = "Device Controller"; break;
2020                                 case USB_MODE_CTRL_MODE_HOST:
2021                                         s = "Host Controller"; break;
2022                                 default:
2023                                         s = "None"; break;
2024                                 }
2025                                 s;
2026                         } ));
2027         size -= t;
2028         next += t;
2029
2030         tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2031         t = scnprintf(next, size,
2032                         "Endpoint Setup Status Reg:" "SETUP on ep 0x%x\n\n",
2033                         (tmp_reg & EP_SETUP_STATUS_MASK));
2034         size -= t;
2035         next += t;
2036
2037         for (i = 0; i < udc->max_ep / 2; i++) {
2038                 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2039                 t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2040                                 i, tmp_reg);
2041                 size -= t;
2042                 next += t;
2043         }
2044         tmp_reg = fsl_readl(&dr_regs->endpointprime);
2045         t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n", tmp_reg);
2046         size -= t;
2047         next += t;
2048
2049         tmp_reg = usb_sys_regs->snoop1;
2050         t = scnprintf(next, size, "\nSnoop1 Reg : = [0x%x]\n\n", tmp_reg);
2051         size -= t;
2052         next += t;
2053
2054         tmp_reg = usb_sys_regs->control;
2055         t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n",
2056                         tmp_reg);
2057         size -= t;
2058         next += t;
2059
2060         /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2061         ep = &udc->eps[0];
2062         t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n",
2063                         ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2064         size -= t;
2065         next += t;
2066
2067         if (list_empty(&ep->queue)) {
2068                 t = scnprintf(next, size, "its req queue is empty\n\n");
2069                 size -= t;
2070                 next += t;
2071         } else {
2072                 list_for_each_entry(req, &ep->queue, queue) {
2073                         t = scnprintf(next, size,
2074                                 "req %p actual 0x%x length 0x%x  buf %p\n",
2075                                 &req->req, req->req.actual,
2076                                 req->req.length, req->req.buf);
2077                         size -= t;
2078                         next += t;
2079                 }
2080         }
2081         /* other gadget->eplist ep */
2082         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2083                 if (ep->desc) {
2084                         t = scnprintf(next, size,
2085                                         "\nFor %s Maxpkt is 0x%x "
2086                                         "index is 0x%x\n",
2087                                         ep->ep.name, ep_maxpacket(ep),
2088                                         ep_index(ep));
2089                         size -= t;
2090                         next += t;
2091
2092                         if (list_empty(&ep->queue)) {
2093                                 t = scnprintf(next, size,
2094                                                 "its req queue is empty\n\n");
2095                                 size -= t;
2096                                 next += t;
2097                         } else {
2098                                 list_for_each_entry(req, &ep->queue, queue) {
2099                                         t = scnprintf(next, size,
2100                                                 "req %p actual 0x%x length"
2101                                                 "0x%x  buf %p\n",
2102                                                 &req->req, req->req.actual,
2103                                                 req->req.length, req->req.buf);
2104                                         size -= t;
2105                                         next += t;
2106                                         }       /* end for each_entry of ep req */
2107                                 }       /* end for else */
2108                         }       /* end for if(ep->queue) */
2109                 }               /* end (ep->desc) */
2110
2111         spin_unlock_irqrestore(&udc->lock, flags);
2112
2113         *eof = 1;
2114         return count - size;
2115 }
2116
2117 #define create_proc_file()      create_proc_read_entry(proc_filename, \
2118                                 0, NULL, fsl_proc_read, NULL)
2119
2120 #define remove_proc_file()      remove_proc_entry(proc_filename, NULL)
2121
2122 #else                           /* !CONFIG_USB_GADGET_DEBUG_FILES */
2123
2124 #define create_proc_file()      do {} while (0)
2125 #define remove_proc_file()      do {} while (0)
2126
2127 #endif                          /* CONFIG_USB_GADGET_DEBUG_FILES */
2128
2129 /*-------------------------------------------------------------------------*/
2130
2131 /* Release udc structures */
2132 static void fsl_udc_release(struct device *dev)
2133 {
2134         complete(udc_controller->done);
2135         dma_free_coherent(dev, udc_controller->ep_qh_size,
2136                         udc_controller->ep_qh, udc_controller->ep_qh_dma);
2137         kfree(udc_controller);
2138 }
2139
2140 /******************************************************************
2141         Internal structure setup functions
2142 *******************************************************************/
2143 /*------------------------------------------------------------------
2144  * init resource for globle controller
2145  * Return the udc handle on success or NULL on failure
2146  ------------------------------------------------------------------*/
2147 static int __init struct_udc_setup(struct fsl_udc *udc,
2148                 struct platform_device *pdev)
2149 {
2150         struct fsl_usb2_platform_data *pdata;
2151         size_t size;
2152
2153         pdata = pdev->dev.platform_data;
2154         udc->phy_mode = pdata->phy_mode;
2155
2156         udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2157         if (!udc->eps) {
2158                 ERR("malloc fsl_ep failed\n");
2159                 return -1;
2160         }
2161
2162         /* initialized QHs, take care of alignment */
2163         size = udc->max_ep * sizeof(struct ep_queue_head);
2164         if (size < QH_ALIGNMENT)
2165                 size = QH_ALIGNMENT;
2166         else if ((size % QH_ALIGNMENT) != 0) {
2167                 size += QH_ALIGNMENT + 1;
2168                 size &= ~(QH_ALIGNMENT - 1);
2169         }
2170         udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2171                                         &udc->ep_qh_dma, GFP_KERNEL);
2172         if (!udc->ep_qh) {
2173                 ERR("malloc QHs for udc failed\n");
2174                 kfree(udc->eps);
2175                 return -1;
2176         }
2177
2178         udc->ep_qh_size = size;
2179
2180         /* Initialize ep0 status request structure */
2181         /* FIXME: fsl_alloc_request() ignores ep argument */
2182         udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2183                         struct fsl_req, req);
2184         /* allocate a small amount of memory to get valid address */
2185         udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2186         udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2187
2188         udc->resume_state = USB_STATE_NOTATTACHED;
2189         udc->usb_state = USB_STATE_POWERED;
2190         udc->ep0_dir = 0;
2191         udc->remote_wakeup = 0; /* default to 0 on reset */
2192         spin_lock_init(&udc->lock);
2193
2194         return 0;
2195 }
2196
2197 /*----------------------------------------------------------------
2198  * Setup the fsl_ep struct for eps
2199  * Link fsl_ep->ep to gadget->ep_list
2200  * ep0out is not used so do nothing here
2201  * ep0in should be taken care
2202  *--------------------------------------------------------------*/
2203 static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2204                 char *name, int link)
2205 {
2206         struct fsl_ep *ep = &udc->eps[index];
2207
2208         ep->udc = udc;
2209         strcpy(ep->name, name);
2210         ep->ep.name = ep->name;
2211
2212         ep->ep.ops = &fsl_ep_ops;
2213         ep->stopped = 0;
2214
2215         /* for ep0: maxP defined in desc
2216          * for other eps, maxP is set by epautoconfig() called by gadget layer
2217          */
2218         ep->ep.maxpacket = (unsigned short) ~0;
2219
2220         /* the queue lists any req for this ep */
2221         INIT_LIST_HEAD(&ep->queue);
2222
2223         /* gagdet.ep_list used for ep_autoconfig so no ep0 */
2224         if (link)
2225                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2226         ep->gadget = &udc->gadget;
2227         ep->qh = &udc->ep_qh[index];
2228
2229         return 0;
2230 }
2231
2232 /* Driver probe function
2233  * all intialization operations implemented here except enabling usb_intr reg
2234  * board setup should have been done in the platform code
2235  */
2236 static int __init fsl_udc_probe(struct platform_device *pdev)
2237 {
2238         struct resource *res;
2239         int ret = -ENODEV;
2240         unsigned int i;
2241         u32 dccparams;
2242
2243         if (strcmp(pdev->name, driver_name)) {
2244                 VDBG("Wrong device");
2245                 return -ENODEV;
2246         }
2247
2248         udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
2249         if (udc_controller == NULL) {
2250                 ERR("malloc udc failed\n");
2251                 return -ENOMEM;
2252         }
2253
2254         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2255         if (!res) {
2256                 kfree(udc_controller);
2257                 return -ENXIO;
2258         }
2259
2260         if (!request_mem_region(res->start, res->end - res->start + 1,
2261                                 driver_name)) {
2262                 ERR("request mem region for %s failed\n", pdev->name);
2263                 kfree(udc_controller);
2264                 return -EBUSY;
2265         }
2266
2267         dr_regs = ioremap(res->start, res->end - res->start + 1);
2268         if (!dr_regs) {
2269                 ret = -ENOMEM;
2270                 goto err1;
2271         }
2272
2273         usb_sys_regs = (struct usb_sys_interface *)
2274                         ((u32)dr_regs + USB_DR_SYS_OFFSET);
2275
2276         /* Read Device Controller Capability Parameters register */
2277         dccparams = fsl_readl(&dr_regs->dccparams);
2278         if (!(dccparams & DCCPARAMS_DC)) {
2279                 ERR("This SOC doesn't support device role\n");
2280                 ret = -ENODEV;
2281                 goto err2;
2282         }
2283         /* Get max device endpoints */
2284         /* DEN is bidirectional ep number, max_ep doubles the number */
2285         udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
2286
2287         udc_controller->irq = platform_get_irq(pdev, 0);
2288         if (!udc_controller->irq) {
2289                 ret = -ENODEV;
2290                 goto err2;
2291         }
2292
2293         ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
2294                         driver_name, udc_controller);
2295         if (ret != 0) {
2296                 ERR("cannot request irq %d err %d\n",
2297                                 udc_controller->irq, ret);
2298                 goto err2;
2299         }
2300
2301         /* Initialize the udc structure including QH member and other member */
2302         if (struct_udc_setup(udc_controller, pdev)) {
2303                 ERR("Can't initialize udc data structure\n");
2304                 ret = -ENOMEM;
2305                 goto err3;
2306         }
2307
2308         /* initialize usb hw reg except for regs for EP,
2309          * leave usbintr reg untouched */
2310         dr_controller_setup(udc_controller);
2311
2312         /* Setup gadget structure */
2313         udc_controller->gadget.ops = &fsl_gadget_ops;
2314         udc_controller->gadget.is_dualspeed = 1;
2315         udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2316         INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2317         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2318         udc_controller->gadget.name = driver_name;
2319
2320         /* Setup gadget.dev and register with kernel */
2321         dev_set_name(&udc_controller->gadget.dev, "gadget");
2322         udc_controller->gadget.dev.release = fsl_udc_release;
2323         udc_controller->gadget.dev.parent = &pdev->dev;
2324         ret = device_register(&udc_controller->gadget.dev);
2325         if (ret < 0)
2326                 goto err3;
2327
2328         /* setup QH and epctrl for ep0 */
2329         ep0_setup(udc_controller);
2330
2331         /* setup udc->eps[] for ep0 */
2332         struct_ep_setup(udc_controller, 0, "ep0", 0);
2333         /* for ep0: the desc defined here;
2334          * for other eps, gadget layer called ep_enable with defined desc
2335          */
2336         udc_controller->eps[0].desc = &fsl_ep0_desc;
2337         udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD;
2338
2339         /* setup the udc->eps[] for non-control endpoints and link
2340          * to gadget.ep_list */
2341         for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
2342                 char name[14];
2343
2344                 sprintf(name, "ep%dout", i);
2345                 struct_ep_setup(udc_controller, i * 2, name, 1);
2346                 sprintf(name, "ep%din", i);
2347                 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
2348         }
2349
2350         /* use dma_pool for TD management */
2351         udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
2352                         sizeof(struct ep_td_struct),
2353                         DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
2354         if (udc_controller->td_pool == NULL) {
2355                 ret = -ENOMEM;
2356                 goto err4;
2357         }
2358         create_proc_file();
2359         return 0;
2360
2361 err4:
2362         device_unregister(&udc_controller->gadget.dev);
2363 err3:
2364         free_irq(udc_controller->irq, udc_controller);
2365 err2:
2366         iounmap(dr_regs);
2367 err1:
2368         release_mem_region(res->start, res->end - res->start + 1);
2369         kfree(udc_controller);
2370         return ret;
2371 }
2372
2373 /* Driver removal function
2374  * Free resources and finish pending transactions
2375  */
2376 static int __exit fsl_udc_remove(struct platform_device *pdev)
2377 {
2378         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2379
2380         DECLARE_COMPLETION(done);
2381
2382         if (!udc_controller)
2383                 return -ENODEV;
2384         udc_controller->done = &done;
2385
2386         /* DR has been stopped in usb_gadget_unregister_driver() */
2387         remove_proc_file();
2388
2389         /* Free allocated memory */
2390         kfree(udc_controller->status_req->req.buf);
2391         kfree(udc_controller->status_req);
2392         kfree(udc_controller->eps);
2393
2394         dma_pool_destroy(udc_controller->td_pool);
2395         free_irq(udc_controller->irq, udc_controller);
2396         iounmap(dr_regs);
2397         release_mem_region(res->start, res->end - res->start + 1);
2398
2399         device_unregister(&udc_controller->gadget.dev);
2400         /* free udc --wait for the release() finished */
2401         wait_for_completion(&done);
2402
2403         return 0;
2404 }
2405
2406 /*-----------------------------------------------------------------
2407  * Modify Power management attributes
2408  * Used by OTG statemachine to disable gadget temporarily
2409  -----------------------------------------------------------------*/
2410 static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
2411 {
2412         dr_controller_stop(udc_controller);
2413         return 0;
2414 }
2415
2416 /*-----------------------------------------------------------------
2417  * Invoked on USB resume. May be called in_interrupt.
2418  * Here we start the DR controller and enable the irq
2419  *-----------------------------------------------------------------*/
2420 static int fsl_udc_resume(struct platform_device *pdev)
2421 {
2422         /* Enable DR irq reg and set controller Run */
2423         if (udc_controller->stopped) {
2424                 dr_controller_setup(udc_controller);
2425                 dr_controller_run(udc_controller);
2426         }
2427         udc_controller->usb_state = USB_STATE_ATTACHED;
2428         udc_controller->ep0_state = WAIT_FOR_SETUP;
2429         udc_controller->ep0_dir = 0;
2430         return 0;
2431 }
2432
2433 /*-------------------------------------------------------------------------
2434         Register entry point for the peripheral controller driver
2435 --------------------------------------------------------------------------*/
2436
2437 static struct platform_driver udc_driver = {
2438         .remove  = __exit_p(fsl_udc_remove),
2439         /* these suspend and resume are not usb suspend and resume */
2440         .suspend = fsl_udc_suspend,
2441         .resume  = fsl_udc_resume,
2442         .driver  = {
2443                 .name = (char *)driver_name,
2444                 .owner = THIS_MODULE,
2445         },
2446 };
2447
2448 static int __init udc_init(void)
2449 {
2450         printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION);
2451         return platform_driver_probe(&udc_driver, fsl_udc_probe);
2452 }
2453
2454 module_init(udc_init);
2455
2456 static void __exit udc_exit(void)
2457 {
2458         platform_driver_unregister(&udc_driver);
2459         printk("%s unregistered\n", driver_desc);
2460 }
2461
2462 module_exit(udc_exit);
2463
2464 MODULE_DESCRIPTION(DRIVER_DESC);
2465 MODULE_AUTHOR(DRIVER_AUTHOR);
2466 MODULE_LICENSE("GPL");
2467 MODULE_ALIAS("platform:fsl-usb2-udc");