drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h

   1 /*
   2  * Support for Intel Camera Imaging ISP subsystem.
   3  * Copyright (c) 2015, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #ifndef _SH_CSS_INTERNAL_H_
  16 #define _SH_CSS_INTERNAL_H_
  17
  18 #include <system_global.h>
  19 #include <math_support.h>
  20 #include <type_support.h>
  21 #include <platform_support.h>
  22 #include <stdarg.h>
  23
  24 #if !defined(HAS_NO_INPUT_FORMATTER)
  25 #include "input_formatter.h"
  26 #endif
  27 #if !defined(HAS_NO_INPUT_SYSTEM)
  28 #include "input_system.h"
  29 #endif
  30
  31 #include "ia_css_types.h"
  32 #include "ia_css_acc_types.h"
  33 #include "ia_css_buffer.h"
  34
  35 #include "ia_css_binary.h"
  36 #if !defined(__ISP)
  37 #include "sh_css_firmware.h" /* not needed/desired on SP/ISP */
  38 #endif
  39 #include "sh_css_legacy.h"
  40 #include "sh_css_defs.h"
  41 #include "sh_css_uds.h"
  42 #include "dma.h"        /* N_DMA_CHANNEL_ID */
  43 #include "ia_css_circbuf_comm.h" /* Circular buffer */
  44 #include "ia_css_frame_comm.h"
  45 #include "ia_css_3a.h"
  46 #include "ia_css_dvs.h"
  47 #include "ia_css_metadata.h"
  48 #include "runtime/bufq/interface/ia_css_bufq.h"
  49 #include "ia_css_timer.h"
  50
  51 /* TODO: Move to a more suitable place when sp pipeline design is done. */
  52 #define IA_CSS_NUM_CB_SEM_READ_RESOURCE 2
  53 #define IA_CSS_NUM_CB_SEM_WRITE_RESOURCE        1
  54 #define IA_CSS_NUM_CBS                                          2
  55 #define IA_CSS_CB_MAX_ELEMS                                     2
  56
  57 /* Use case specific. index limited to IA_CSS_NUM_CB_SEM_READ_RESOURCE or
  58  * IA_CSS_NUM_CB_SEM_WRITE_RESOURCE for read and write respectively.
  59  * TODO: Enforce the limitation above.
  60 */
  61 #define IA_CSS_COPYSINK_SEM_INDEX       0
  62 #define IA_CSS_TAGGER_SEM_INDEX 1
  63
  64 /* Force generation of output event. Used by acceleration pipe. */
  65 #define IA_CSS_POST_OUT_EVENT_FORCE             2
  66
  67 #define SH_CSS_MAX_BINARY_NAME  64
  68
  69 #define SP_DEBUG_NONE   (0)
  70 #define SP_DEBUG_DUMP   (1)
  71 #define SP_DEBUG_COPY   (2)
  72 #define SP_DEBUG_TRACE  (3)
  73 #define SP_DEBUG_MINIMAL (4)
  74
  75 #define SP_DEBUG SP_DEBUG_NONE
  76 #define SP_DEBUG_MINIMAL_OVERWRITE 1
  77
  78 #define SH_CSS_TNR_BIT_DEPTH 8
  79 #define SH_CSS_REF_BIT_DEPTH 8
  80
  81 /* keep next up to date with the definition for MAX_CB_ELEMS_FOR_TAGGER in tagger.sp.c */
  82 #if defined(HAS_SP_2400)
  83 #define NUM_CONTINUOUS_FRAMES   15
  84 #else
  85 #define NUM_CONTINUOUS_FRAMES   10
  86 #endif
  87 #define NUM_MIPI_FRAMES_PER_STREAM              2
  88
  89 #define NUM_ONLINE_INIT_CONTINUOUS_FRAMES      2
  90
  91 #define NR_OF_PIPELINES                 IA_CSS_PIPE_ID_NUM /* Must match with IA_CSS_PIPE_ID_NUM */
  92
  93 #define SH_CSS_MAX_IF_CONFIGS   3 /* Must match with IA_CSS_NR_OF_CONFIGS (not defined yet).*/
  94 #define SH_CSS_IF_CONFIG_NOT_NEEDED     0xFF
  95
  96 #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)
  97 #define SH_CSS_ENABLE_METADATA
  98 #endif
  99
 100 #if defined(SH_CSS_ENABLE_METADATA) && !defined(USE_INPUT_SYSTEM_VERSION_2401)
 101 #define SH_CSS_ENABLE_METADATA_THREAD
 102 #endif
 103
 104
 105  /*
 106   * SH_CSS_MAX_SP_THREADS:
 107   *      sp threads visible to host with connected communication queues
 108   *      these threads are capable of running an image pipe
 109   * SH_CSS_MAX_SP_INTERNAL_THREADS:
 110   *      internal sp service threads, no communication queues to host
 111   *      these threads can't be used as image pipe
 112   */
 113
 114 #if defined(SH_CSS_ENABLE_METADATA_THREAD)
 115 #define SH_CSS_SP_INTERNAL_METADATA_THREAD      1
 116 #else
 117 #define SH_CSS_SP_INTERNAL_METADATA_THREAD      0
 118 #endif
 119
 120 #define SH_CSS_SP_INTERNAL_SERVICE_THREAD               1
 121
 122 #ifdef __DISABLE_UNUSED_THREAD__
 123         #define SH_CSS_MAX_SP_THREADS                   0
 124 #else
 125         #define SH_CSS_MAX_SP_THREADS           5
 126 #endif
 127
 128 #define SH_CSS_MAX_SP_INTERNAL_THREADS  (\
 129          SH_CSS_SP_INTERNAL_SERVICE_THREAD +\
 130          SH_CSS_SP_INTERNAL_METADATA_THREAD)
 131
 132 #define SH_CSS_MAX_PIPELINES    SH_CSS_MAX_SP_THREADS
 133
 134 /**
 135  * The C99 standard does not specify the exact object representation of structs;
 136  * the representation is compiler dependent.
 137  *
 138  * The structs that are communicated between host and SP/ISP should have the
 139  * exact same object representation. The compiler that is used to compile the
 140  * firmware is hivecc.
 141  *
 142  * To check if a different compiler, used to compile a host application, uses
 143  * another object representation, macros are defined specifying the size of
 144  * the structs as expected by the firmware.
 145  *
 146  * A host application shall verify that a sizeof( ) of the struct is equal to
 147  * the SIZE_OF_XXX macro of the corresponding struct. If they are not
 148  * equal, functionality will break.
 149  */
 150 #define CALC_ALIGNMENT_MEMBER(x, y)     (CEIL_MUL(x, y) - x)
 151 #define SIZE_OF_HRT_VADDRESS            sizeof(hive_uint32)
 152 #define SIZE_OF_IA_CSS_PTR              sizeof(uint32_t)
 153
 154 /* Number of SP's */
 155 #define NUM_OF_SPS 1
 156
 157 #define NUM_OF_BLS 0
 158
 159 /* Enum for order of Binaries */
 160 enum sh_css_order_binaries {
 161         SP_FIRMWARE = 0,
 162         ISP_FIRMWARE
 163 };
 164
 165  /*
 166  * JB: keep next enum in sync with thread id's
 167  * and pipe id's
 168  */
 169 enum sh_css_pipe_config_override {
 170         SH_CSS_PIPE_CONFIG_OVRD_NONE     = 0,
 171         SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD  = 0xffff
 172 };
 173
 174 enum host2sp_commands {
 175         host2sp_cmd_error = 0,
 176         /*
 177          * The host2sp_cmd_ready command is the only command written by the SP
 178          * It acknowledges that is previous command has been received.
 179          * (this does not mean that the command has been executed)
 180          * It also indicates that a new command can be send (it is a queue
 181          * with depth 1).
 182          */
 183         host2sp_cmd_ready = 1,
 184         /* Command written by the Host */
 185         host2sp_cmd_dummy,              /* No action, can be used as watchdog */
 186         host2sp_cmd_start_flash,        /* Request SP to start the flash */
 187         host2sp_cmd_terminate,          /* SP should terminate itself */
 188         N_host2sp_cmd
 189 };
 190
 191 /** Enumeration used to indicate the events that are produced by
 192  *  the SP and consumed by the Host.
 193  *
 194  * !!!IMPORTANT!!! KEEP THE FOLLOWING IN SYNC:
 195  * 1) "enum ia_css_event_type"                                  (ia_css_event_public.h)
 196  * 2) "enum sh_css_sp_event_type"                               (sh_css_internal.h)
 197  * 3) "enum ia_css_event_type event_id_2_event_mask"            (event_handler.sp.c)
 198  * 4) "enum ia_css_event_type convert_event_sp_to_host_domain"  (sh_css.c)
 199  */
 200 enum sh_css_sp_event_type {
 201         SH_CSS_SP_EVENT_OUTPUT_FRAME_DONE,
 202         SH_CSS_SP_EVENT_SECOND_OUTPUT_FRAME_DONE,
 203         SH_CSS_SP_EVENT_VF_OUTPUT_FRAME_DONE,
 204         SH_CSS_SP_EVENT_SECOND_VF_OUTPUT_FRAME_DONE,
 205         SH_CSS_SP_EVENT_3A_STATISTICS_DONE,
 206         SH_CSS_SP_EVENT_DIS_STATISTICS_DONE,
 207         SH_CSS_SP_EVENT_PIPELINE_DONE,
 208         SH_CSS_SP_EVENT_FRAME_TAGGED,
 209         SH_CSS_SP_EVENT_INPUT_FRAME_DONE,
 210         SH_CSS_SP_EVENT_METADATA_DONE,
 211         SH_CSS_SP_EVENT_LACE_STATISTICS_DONE,
 212         SH_CSS_SP_EVENT_ACC_STAGE_COMPLETE,
 213         SH_CSS_SP_EVENT_TIMER,
 214         SH_CSS_SP_EVENT_PORT_EOF,
 215         SH_CSS_SP_EVENT_FW_WARNING,
 216         SH_CSS_SP_EVENT_FW_ASSERT,
 217         SH_CSS_SP_EVENT_NR_OF_TYPES             /* must be last */
 218 };
 219
 220 /* xmem address map allocation per pipeline, css pointers */
 221 /* Note that the struct below should only consist of hrt_vaddress-es
 222    Otherwise this will cause a fail in the function ref_sh_css_ddr_address_map
 223  */
 224 struct sh_css_ddr_address_map {
 225         hrt_vaddress isp_param;
 226         hrt_vaddress isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES];
 227         hrt_vaddress macc_tbl;
 228         hrt_vaddress fpn_tbl;
 229         hrt_vaddress sc_tbl;
 230         hrt_vaddress tetra_r_x;
 231         hrt_vaddress tetra_r_y;
 232         hrt_vaddress tetra_gr_x;
 233         hrt_vaddress tetra_gr_y;
 234         hrt_vaddress tetra_gb_x;
 235         hrt_vaddress tetra_gb_y;
 236         hrt_vaddress tetra_b_x;
 237         hrt_vaddress tetra_b_y;
 238         hrt_vaddress tetra_ratb_x;
 239         hrt_vaddress tetra_ratb_y;
 240         hrt_vaddress tetra_batr_x;
 241         hrt_vaddress tetra_batr_y;
 242         hrt_vaddress dvs_6axis_params_y;
 243 };
 244 #define SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT                                   \
 245         (SIZE_OF_HRT_VADDRESS +                                                 \
 246         (SH_CSS_MAX_STAGES * IA_CSS_NUM_MEMORIES * SIZE_OF_HRT_VADDRESS) +      \
 247         (16 * SIZE_OF_HRT_VADDRESS))
 248
 249 /* xmem address map allocation per pipeline */
 250 struct sh_css_ddr_address_map_size {
 251         size_t isp_param;
 252         size_t isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES];
 253         size_t macc_tbl;
 254         size_t fpn_tbl;
 255         size_t sc_tbl;
 256         size_t tetra_r_x;
 257         size_t tetra_r_y;
 258         size_t tetra_gr_x;
 259         size_t tetra_gr_y;
 260         size_t tetra_gb_x;
 261         size_t tetra_gb_y;
 262         size_t tetra_b_x;
 263         size_t tetra_b_y;
 264         size_t tetra_ratb_x;
 265         size_t tetra_ratb_y;
 266         size_t tetra_batr_x;
 267         size_t tetra_batr_y;
 268         size_t dvs_6axis_params_y;
 269 };
 270
 271 struct sh_css_ddr_address_map_compound {
 272         struct sh_css_ddr_address_map           map;
 273         struct sh_css_ddr_address_map_size      size;
 274 };
 275
 276 struct ia_css_isp_parameter_set_info {
 277         struct sh_css_ddr_address_map  mem_map;/**< pointers to Parameters in ISP format IMPT:
 278                                                     This should be first member of this struct */
 279         uint32_t                       isp_parameters_id;/**< Unique ID to track which config was actually applied to a particular frame */
 280         ia_css_ptr                     output_frame_ptr;/**< Output frame to which this config has to be applied (optional) */
 281 };
 282
 283 /* this struct contains all arguments that can be passed to
 284    a binary. It depends on the binary which ones are used. */
 285 struct sh_css_binary_args {
 286         struct ia_css_frame *in_frame;       /* input frame */
 287         struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES];   /* reference input frame */
 288 #ifndef ISP2401
 289         struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES];   /* tnr frames */
 290 #else
 291         struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES];   /* tnr frames */
 292 #endif
 293         struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS];      /* output frame */
 294         struct ia_css_frame *out_vf_frame;   /* viewfinder output frame */
 295         bool                 copy_vf;
 296         bool                 copy_output;
 297         unsigned             vf_downscale_log2;
 298 };
 299
 300 #if SP_DEBUG == SP_DEBUG_DUMP
 301
 302 #define SH_CSS_NUM_SP_DEBUG 48
 303
 304 struct sh_css_sp_debug_state {
 305         unsigned int error;
 306         unsigned int debug[SH_CSS_NUM_SP_DEBUG];
 307 };
 308
 309 #elif SP_DEBUG == SP_DEBUG_COPY
 310
 311 #define SH_CSS_SP_DBG_TRACE_DEPTH       (40)
 312
 313 struct sh_css_sp_debug_trace {
 314         uint16_t frame;
 315         uint16_t line;
 316         uint16_t pixel_distance;
 317         uint16_t mipi_used_dword;
 318         uint16_t sp_index;
 319 };
 320
 321 struct sh_css_sp_debug_state {
 322         uint16_t if_start_line;
 323         uint16_t if_start_column;
 324         uint16_t if_cropped_height;
 325         uint16_t if_cropped_width;
 326         unsigned int index;
 327         struct sh_css_sp_debug_trace
 328                 trace[SH_CSS_SP_DBG_TRACE_DEPTH];
 329 };
 330
 331 #elif SP_DEBUG == SP_DEBUG_TRACE
 332
 333 #if 1
 334 /* Example of just one global trace */
 335 #define SH_CSS_SP_DBG_NR_OF_TRACES      (1)
 336 #define SH_CSS_SP_DBG_TRACE_DEPTH       (40)
 337 #else
 338 /* E.g. if you like seperate traces for 4 threads */
 339 #define SH_CSS_SP_DBG_NR_OF_TRACES      (4)
 340 #define SH_CSS_SP_DBG_TRACE_DEPTH       (10)
 341 #endif
 342
 343 #define SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS (13)
 344
 345 struct sh_css_sp_debug_trace {
 346         uint16_t time_stamp;
 347         uint16_t location;      /* bit 15..13 = file_id, 12..0 = line nr. */
 348         uint32_t data;
 349 };
 350
 351 struct sh_css_sp_debug_state {
 352         struct sh_css_sp_debug_trace
 353                 trace[SH_CSS_SP_DBG_NR_OF_TRACES][SH_CSS_SP_DBG_TRACE_DEPTH];
 354         uint16_t index_last[SH_CSS_SP_DBG_NR_OF_TRACES];
 355         uint8_t index[SH_CSS_SP_DBG_NR_OF_TRACES];
 356 };
 357
 358 #elif SP_DEBUG == SP_DEBUG_MINIMAL
 359
 360 #define SH_CSS_NUM_SP_DEBUG 128
 361
 362 struct sh_css_sp_debug_state {
 363         unsigned int error;
 364         unsigned int debug[SH_CSS_NUM_SP_DEBUG];
 365 };
 366
 367 #endif
 368
 369
 370 struct sh_css_sp_debug_command {
 371         /*
 372          * The DMA software-mask,
 373          *      Bit 31...24: unused.
 374          *      Bit 23...16: unused.
 375          *      Bit 15...08: reading-request enabling bits for DMA channel 7..0
 376          *      Bit 07...00: writing-reqeust enabling bits for DMA channel 7..0
 377          *
 378          * For example, "0...0 0...0 11111011 11111101" indicates that the
 379          * writing request through DMA Channel 1 and the reading request
 380          * through DMA channel 2 are both disabled. The others are enabled.
 381          */
 382         uint32_t dma_sw_reg;
 383 };
 384
 385 #if !defined(HAS_NO_INPUT_FORMATTER)
 386 /* SP input formatter configuration.*/
 387 struct sh_css_sp_input_formatter_set {
 388         uint32_t                                stream_format;
 389         input_formatter_cfg_t   config_a;
 390         input_formatter_cfg_t   config_b;
 391 };
 392 #endif
 393
 394 #if !defined(HAS_NO_INPUT_SYSTEM)
 395 #define IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT (3)
 396 #endif
 397
 398 /* SP configuration information */
 399 struct sh_css_sp_config {
 400         uint8_t                 no_isp_sync; /* Signal host immediately after start */
 401         uint8_t                 enable_raw_pool_locking; /**< Enable Raw Buffer Locking for HALv3 Support */
 402         uint8_t                 lock_all;
 403         /**< If raw buffer locking is enabled, this flag indicates whether raw
 404              frames are locked when their EOF event is successfully sent to the
 405              host (true) or when they are passed to the preview/video pipe
 406              (false). */
 407 #if !defined(HAS_NO_INPUT_FORMATTER)
 408         struct {
 409                 uint8_t                                 a_changed;
 410                 uint8_t                                 b_changed;
 411                 uint8_t                                 isp_2ppc;
 412                 struct sh_css_sp_input_formatter_set    set[SH_CSS_MAX_IF_CONFIGS]; /* CSI-2 port is used as index. */
 413         } input_formatter;
 414 #endif
 415 #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2)
 416         sync_generator_cfg_t    sync_gen;
 417         tpg_cfg_t               tpg;
 418         prbs_cfg_t              prbs;
 419         input_system_cfg_t      input_circuit;
 420         uint8_t                 input_circuit_cfg_changed;
 421         uint32_t                mipi_sizes_for_check[N_CSI_PORTS][IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT];
 422 #endif
 423 #if !defined(HAS_NO_INPUT_SYSTEM)
 424         uint8_t                 enable_isys_event_queue;
 425 #endif
 426         uint8_t                 disable_cont_vf;
 427 };
 428
 429 enum sh_css_stage_type {
 430         SH_CSS_SP_STAGE_TYPE  = 0,
 431         SH_CSS_ISP_STAGE_TYPE = 1
 432 };
 433 #define SH_CSS_NUM_STAGE_TYPES 2
 434
 435 #define SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS        (1 << 0)
 436 #define SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS_MASK \
 437         ((SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << SH_CSS_MAX_SP_THREADS)-1)
 438
 439 #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401)
 440 struct sh_css_sp_pipeline_terminal {
 441         union {
 442                 /* Input System 2401 */
 443                 virtual_input_system_stream_t virtual_input_system_stream[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH];
 444         } context;
 445         /*
 446          * TODO
 447          * - Remove "virtual_input_system_cfg" when the ISYS2401 DLI is ready.
 448          */
 449         union {
 450                 /* Input System 2401 */
 451                 virtual_input_system_stream_cfg_t virtual_input_system_stream_cfg[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH];
 452         } ctrl;
 453 };
 454
 455 struct sh_css_sp_pipeline_io {
 456         struct sh_css_sp_pipeline_terminal      input;
 457         /* pqiao: comment out temporarily to save dmem */
 458         /*struct sh_css_sp_pipeline_terminal    output;*/
 459 };
 460
 461 /** This struct tracks how many streams are registered per CSI port.
 462  * This is used to track which streams have already been configured.
 463  * Only when all streams are configured, the CSI RX is started for that port.
 464  */
 465 struct sh_css_sp_pipeline_io_status {
 466         uint32_t        active[N_INPUT_SYSTEM_CSI_PORT];        /**< registered streams */
 467         uint32_t        running[N_INPUT_SYSTEM_CSI_PORT];       /**< configured streams */
 468 };
 469
 470 #endif
 471 enum sh_css_port_dir {
 472         SH_CSS_PORT_INPUT  = 0,
 473         SH_CSS_PORT_OUTPUT  = 1
 474 };
 475
 476 enum sh_css_port_type {
 477         SH_CSS_HOST_TYPE  = 0,
 478         SH_CSS_COPYSINK_TYPE  = 1,
 479         SH_CSS_TAGGERSINK_TYPE  = 2
 480 };
 481
 482 /* Pipe inout settings: output port on 7-4bits, input port on 3-0bits */
 483 #define SH_CSS_PORT_FLD_WIDTH_IN_BITS (4)
 484 #define SH_CSS_PORT_TYPE_BIT_FLD(pt) (0x1 << (pt))
 485 #define SH_CSS_PORT_FLD(pd) ((pd) ? SH_CSS_PORT_FLD_WIDTH_IN_BITS : 0)
 486 #define SH_CSS_PIPE_PORT_CONFIG_ON(p, pd, pt) ((p) |= (SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd)))
 487 #define SH_CSS_PIPE_PORT_CONFIG_OFF(p, pd, pt) ((p) &= ~(SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd)))
 488 #define SH_CSS_PIPE_PORT_CONFIG_SET(p, pd, pt, val) ((val) ? \
 489                 SH_CSS_PIPE_PORT_CONFIG_ON(p, pd, pt) : SH_CSS_PIPE_PORT_CONFIG_OFF(p, pd, pt))
 490 #define SH_CSS_PIPE_PORT_CONFIG_GET(p, pd, pt) ((p) & (SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd)))
 491 #define SH_CSS_PIPE_PORT_CONFIG_IS_CONTINUOUS(p) \
 492         (!(SH_CSS_PIPE_PORT_CONFIG_GET(p, SH_CSS_PORT_INPUT, SH_CSS_HOST_TYPE) && \
 493            SH_CSS_PIPE_PORT_CONFIG_GET(p, SH_CSS_PORT_OUTPUT, SH_CSS_HOST_TYPE)))
 494
 495 #define IA_CSS_ACQUIRE_ISP_POS  31
 496
 497 /* Flags for metadata processing */
 498 #define SH_CSS_METADATA_ENABLED        0x01
 499 #define SH_CSS_METADATA_PROCESSED      0x02
 500 #define SH_CSS_METADATA_OFFLINE_MODE   0x04
 501 #define SH_CSS_METADATA_WAIT_INPUT     0x08
 502
 503 /** @brief Free an array of metadata buffers.
 504  *
 505  * @param[in]   num_bufs        Number of metadata buffers to be freed.
 506  * @param[in]   bufs            Pointer of array of metadata buffers.
 507  *
 508  * This function frees an array of metadata buffers.
 509  */
 510 void
 511 ia_css_metadata_free_multiple(unsigned int num_bufs, struct ia_css_metadata **bufs);
 512
 513 /* Macro for handling pipe_qos_config */
 514 #define QOS_INVALID                  (~0U)
 515 #define QOS_ALL_STAGES_DISABLED      (0U)
 516 #define QOS_STAGE_MASK(num)          (0x00000001 << num)
 517 #define SH_CSS_IS_QOS_PIPE(pipe)               ((pipe)->pipe_qos_config != QOS_INVALID)
 518 #define SH_CSS_QOS_STAGE_ENABLE(pipe, num)     ((pipe)->pipe_qos_config |= QOS_STAGE_MASK(num))
 519 #define SH_CSS_QOS_STAGE_DISABLE(pipe, num)    ((pipe)->pipe_qos_config &= ~QOS_STAGE_MASK(num))
 520 #define SH_CSS_QOS_STAGE_IS_ENABLED(pipe, num) ((pipe)->pipe_qos_config & QOS_STAGE_MASK(num))
 521 #define SH_CSS_QOS_STAGE_IS_ALL_DISABLED(pipe) ((pipe)->pipe_qos_config == QOS_ALL_STAGES_DISABLED)
 522 #define SH_CSS_QOS_MODE_PIPE_ADD(mode, pipe)    ((mode) |= (0x1 << (pipe)->pipe_id))
 523 #define SH_CSS_QOS_MODE_PIPE_REMOVE(mode, pipe) ((mode) &= ~(0x1 << (pipe)->pipe_id))
 524 #define SH_CSS_IS_QOS_ONLY_MODE(mode)           ((mode) == (0x1 << IA_CSS_PIPE_ID_ACC))
 525
 526 /* Information for a pipeline */
 527 struct sh_css_sp_pipeline {
 528         uint32_t        pipe_id;        /* the pipe ID */
 529         uint32_t        pipe_num;       /* the dynamic pipe number */
 530         uint32_t        thread_id;      /* the sp thread ID */
 531         uint32_t        pipe_config;    /* the pipe config */
 532         uint32_t        pipe_qos_config;        /* Bitmap of multiple QOS extension fw state.
 533                                                 (0xFFFFFFFF) indicates non QOS pipe.*/
 534         uint32_t        inout_port_config;
 535         uint32_t        required_bds_factor;
 536         uint32_t        dvs_frame_delay;
 537 #if !defined(HAS_NO_INPUT_SYSTEM)
 538         uint32_t        input_system_mode;      /* enum ia_css_input_mode */
 539         uint32_t        port_id;        /* port_id for input system */
 540 #endif
 541         uint32_t        num_stages;             /* the pipe config */
 542         uint32_t        running;        /* needed for pipe termination */
 543         hrt_vaddress    sp_stage_addr[SH_CSS_MAX_STAGES];
 544         hrt_vaddress    scaler_pp_lut; /* Early bound LUT */
 545         uint32_t        dummy; /* stage ptr is only used on sp but lives in
 546                                   this struct; needs cleanup */
 547         int32_t num_execs; /* number of times to run if this is
 548                               an acceleration pipe. */
 549 #if defined(SH_CSS_ENABLE_METADATA)
 550         struct {
 551                 uint32_t        format;   /* Metadata format in hrt format */
 552                 uint32_t        width;    /* Width of a line */
 553                 uint32_t        height;   /* Number of lines */
 554                 uint32_t        stride;   /* Stride (in bytes) per line */
 555                 uint32_t        size;     /* Total size (in bytes) */
 556                 hrt_vaddress    cont_buf; /* Address of continuous buffer */
 557         } metadata;
 558 #endif
 559 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS)
 560         uint32_t        output_frame_queue_id;
 561 #endif
 562         union {
 563                 struct {
 564                         uint32_t        bytes_available;
 565                 } bin;
 566                 struct {
 567                         uint32_t        height;
 568                         uint32_t        width;
 569                         uint32_t        padded_width;
 570                         uint32_t        max_input_width;
 571                         uint32_t        raw_bit_depth;
 572                 } raw;
 573         } copy;
 574 #ifdef ISP2401
 575
 576         /* Parameters passed to Shading Correction kernel. */
 577         struct {
 578                 uint32_t internal_frame_origin_x_bqs_on_sctbl; /* Origin X (bqs) of internal frame on shading table */
 579                 uint32_t internal_frame_origin_y_bqs_on_sctbl; /* Origin Y (bqs) of internal frame on shading table */
 580         } shading;
 581 #endif
 582 };
 583
 584 /*
 585  * The first frames (with comment Dynamic) can be dynamic or static
 586  * The other frames (ref_in and below) can only be static
 587  * Static means that the data addres will not change during the life time
 588  * of the associated pipe. Dynamic means that the data address can
 589  * change with every (frame) iteration of the associated pipe
 590  *
 591  * s3a and dis are now also dynamic but (stil) handled seperately
 592  */
 593 #define SH_CSS_NUM_DYNAMIC_FRAME_IDS (3)
 594
 595 struct ia_css_frames_sp {
 596         struct ia_css_frame_sp  in;
 597         struct ia_css_frame_sp  out[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
 598         struct ia_css_resolution effective_in_res;
 599         struct ia_css_frame_sp  out_vf;
 600         struct ia_css_frame_sp_info internal_frame_info;
 601         struct ia_css_buffer_sp s3a_buf;
 602         struct ia_css_buffer_sp dvs_buf;
 603 #if defined SH_CSS_ENABLE_METADATA
 604         struct ia_css_buffer_sp metadata_buf;
 605 #endif
 606 };
 607
 608 /* Information for a single pipeline stage for an ISP */
 609 struct sh_css_isp_stage {
 610         /*
 611          * For compatability and portabilty, only types
 612          * from "stdint.h" are allowed
 613          *
 614          * Use of "enum" and "bool" is prohibited
 615          * Multiple boolean flags can be stored in an
 616          * integer
 617          */
 618         struct ia_css_blob_info   blob_info;
 619         struct ia_css_binary_info binary_info;
 620         char                      binary_name[SH_CSS_MAX_BINARY_NAME];
 621         struct ia_css_isp_param_css_segments mem_initializers;
 622 };
 623
 624 /* Information for a single pipeline stage */
 625 struct sh_css_sp_stage {
 626         /*
 627          * For compatability and portabilty, only types
 628          * from "stdint.h" are allowed
 629          *
 630          * Use of "enum" and "bool" is prohibited
 631          * Multiple boolean flags can be stored in an
 632          * integer
 633          */
 634         uint8_t                 num; /* Stage number */
 635         uint8_t                 isp_online;
 636         uint8_t                 isp_copy_vf;
 637         uint8_t                 isp_copy_output;
 638         uint8_t                 sp_enable_xnr;
 639         uint8_t                 isp_deci_log_factor;
 640         uint8_t                 isp_vf_downscale_bits;
 641         uint8_t                 deinterleaved;
 642 /*
 643  * NOTE: Programming the input circuit can only be done at the
 644  * start of a session. It is illegal to program it during execution
 645  * The input circuit defines the connectivity
 646  */
 647         uint8_t                 program_input_circuit;
 648 /* enum ia_css_pipeline_stage_sp_func   func; */
 649         uint8_t                 func;
 650         /* The type of the pipe-stage */
 651         /* enum sh_css_stage_type       stage_type; */
 652         uint8_t                 stage_type;
 653         uint8_t                 num_stripes;
 654         uint8_t                 isp_pipe_version;
 655         struct {
 656                 uint8_t         vf_output;
 657                 uint8_t         s3a;
 658                 uint8_t         sdis;
 659                 uint8_t         dvs_stats;
 660                 uint8_t         lace_stats;
 661         } enable;
 662         /* Add padding to come to a word boundary */
 663         /* unsigned char                        padding[0]; */
 664
 665         struct sh_css_crop_pos          sp_out_crop_pos;
 666         struct ia_css_frames_sp         frames;
 667         struct ia_css_resolution        dvs_envelope;
 668         struct sh_css_uds_info          uds;
 669         hrt_vaddress                    isp_stage_addr;
 670         hrt_vaddress                    xmem_bin_addr;
 671         hrt_vaddress                    xmem_map_addr;
 672
 673         uint16_t                top_cropping;
 674         uint16_t                row_stripes_height;
 675         uint16_t                row_stripes_overlap_lines;
 676         uint8_t                 if_config_index; /* Which should be applied by this stage. */
 677 };
 678
 679 /*
 680  * Time: 2012-07-19, 17:40.
 681  * Note: Add a new data memeber "debug" in "sh_css_sp_group". This
 682  * data member is used to pass the debugging command from the
 683  * Host to the SP.
 684  *
 685  * Time: Before 2012-07-19.
 686  * Note:
 687  * Group all host initialized SP variables into this struct.
 688  * This is initialized every stage through dma.
 689  * The stage part itself is transfered through sh_css_sp_stage.
 690 */
 691 struct sh_css_sp_group {
 692         struct sh_css_sp_config         config;
 693         struct sh_css_sp_pipeline       pipe[SH_CSS_MAX_SP_THREADS];
 694 #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401)
 695         struct sh_css_sp_pipeline_io    pipe_io[SH_CSS_MAX_SP_THREADS];
 696         struct sh_css_sp_pipeline_io_status     pipe_io_status;
 697 #endif
 698         struct sh_css_sp_debug_command  debug;
 699 };
 700
 701 /* Data in SP dmem that is set from the host every stage. */
 702 struct sh_css_sp_per_frame_data {
 703         /* ddr address of sp_group and sp_stage */
 704         hrt_vaddress                    sp_group_addr;
 705 };
 706
 707 #define SH_CSS_NUM_SDW_IRQS 3
 708
 709 /* Output data from SP to css */
 710 struct sh_css_sp_output {
 711         unsigned int                    bin_copy_bytes_copied;
 712 #if SP_DEBUG != SP_DEBUG_NONE
 713         struct sh_css_sp_debug_state    debug;
 714 #endif
 715         unsigned int            sw_interrupt_value[SH_CSS_NUM_SDW_IRQS];
 716 };
 717
 718 #define CONFIG_ON_FRAME_ENQUEUE() 0
 719
 720 /**
 721  * @brief Data structure for the circular buffer.
 722  * The circular buffer is empty if "start == end". The
 723  * circular buffer is full if "(end + 1) % size == start".
 724  */
 725 /* Variable Sized Buffer Queue Elements */
 726
 727 #define  IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE    6
 728 #define  IA_CSS_NUM_ELEMS_HOST2SP_PARAM_QUEUE    3
 729 #define  IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE  6
 730
 731 #if !defined(HAS_NO_INPUT_SYSTEM)
 732 /* sp-to-host queue is expected to be emptied in ISR since
 733  * it is used instead of HW interrupts (due to HW design issue).
 734  * We need one queue element per CSI port. */
 735 #define  IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS)
 736 /* The host-to-sp queue needs to allow for some delay
 737  * in the emptying of this queue in the SP since there is no
 738  * separate SP thread for this. */
 739 #define  IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS)
 740 #else
 741 #define  IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE 0
 742 #define  IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE 0
 743 #define  IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE  0
 744 #endif
 745
 746 #if defined(HAS_SP_2400)
 747 #define  IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE    13
 748 #define  IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE        19
 749 #define  IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE    26 /* holds events for all type of buffers, hence deeper */
 750 #else
 751 #define  IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE    6
 752 #define  IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE        6
 753 #define  IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE    6
 754 #endif
 755
 756 struct sh_css_hmm_buffer {
 757         union {
 758                 struct ia_css_isp_3a_statistics  s3a;
 759                 struct ia_css_isp_dvs_statistics dis;
 760                 hrt_vaddress skc_dvs_statistics;
 761                 hrt_vaddress lace_stat;
 762                 struct ia_css_metadata  metadata;
 763                 struct frame_data_wrapper {
 764                         hrt_vaddress    frame_data;
 765                         uint32_t        flashed;
 766                         uint32_t        exp_id;
 767                         uint32_t        isp_parameters_id; /**< Unique ID to track which config was
 768                                                                 actually applied to a particular frame */
 769 #if CONFIG_ON_FRAME_ENQUEUE()
 770                         struct sh_css_config_on_frame_enqueue config_on_frame_enqueue;
 771 #endif
 772                 } frame;
 773                 hrt_vaddress ddr_ptrs;
 774         } payload;
 775         /*
 776          * kernel_ptr is present for host administration purposes only.
 777          * type is uint64_t in order to be 64-bit host compatible.
 778          * uint64_t does not exist on SP/ISP.
 779          * Size of the struct is checked by sp.hive.c.
 780          */
 781 #if !defined(__ISP)
 782         CSS_ALIGN(uint64_t cookie_ptr, 8); /* TODO: check if this alignment is needed */
 783         uint64_t kernel_ptr;
 784 #else
 785         CSS_ALIGN(struct { uint32_t a[2]; } cookie_ptr, 8); /* TODO: check if this alignment is needed */
 786         struct { uint32_t a[2]; } kernel_ptr;
 787 #endif
 788         struct ia_css_time_meas timing_data;
 789         clock_value_t isys_eof_clock_tick;
 790 };
 791 #if CONFIG_ON_FRAME_ENQUEUE()
 792 #define SIZE_OF_FRAME_STRUCT                                            \
 793         (SIZE_OF_HRT_VADDRESS +                                         \
 794         (3 * sizeof(uint32_t)) +                                        \
 795         sizeof(uint32_t))
 796 #else
 797 #define SIZE_OF_FRAME_STRUCT                                            \
 798         (SIZE_OF_HRT_VADDRESS +                                         \
 799         (3 * sizeof(uint32_t)))
 800 #endif
 801
 802 #define SIZE_OF_PAYLOAD_UNION                                           \
 803         (MAX(MAX(MAX(MAX(                                               \
 804         SIZE_OF_IA_CSS_ISP_3A_STATISTICS_STRUCT,                        \
 805         SIZE_OF_IA_CSS_ISP_DVS_STATISTICS_STRUCT),                      \
 806         SIZE_OF_IA_CSS_METADATA_STRUCT),                                \
 807         SIZE_OF_FRAME_STRUCT),                                          \
 808         SIZE_OF_HRT_VADDRESS))
 809
 810 /* Do not use sizeof(uint64_t) since that does not exist of SP */
 811 #define SIZE_OF_SH_CSS_HMM_BUFFER_STRUCT                                \
 812         (SIZE_OF_PAYLOAD_UNION +                                        \
 813         CALC_ALIGNMENT_MEMBER(SIZE_OF_PAYLOAD_UNION, 8) +               \
 814         8 +                                             \
 815         8 +                                             \
 816         SIZE_OF_IA_CSS_TIME_MEAS_STRUCT +                               \
 817         SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT +                      \
 818         CALC_ALIGNMENT_MEMBER(SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT, 8))
 819
 820 enum sh_css_queue_type {
 821         sh_css_invalid_queue_type = -1,
 822         sh_css_host2sp_buffer_queue,
 823         sh_css_sp2host_buffer_queue,
 824         sh_css_host2sp_psys_event_queue,
 825         sh_css_sp2host_psys_event_queue,
 826 #if !defined(HAS_NO_INPUT_SYSTEM)
 827         sh_css_sp2host_isys_event_queue,
 828         sh_css_host2sp_isys_event_queue,
 829         sh_css_host2sp_tag_cmd_queue,
 830 #endif
 831 };
 832
 833 struct sh_css_event_irq_mask {
 834         uint16_t or_mask;
 835         uint16_t and_mask;
 836 };
 837 #define SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT                            \
 838         (2 * sizeof(uint16_t))
 839
 840 struct host_sp_communication {
 841         /*
 842          * Don't use enum host2sp_commands, because the sizeof an enum is
 843          * compiler dependant and thus non-portable
 844          */
 845         uint32_t host2sp_command;
 846
 847         /*
 848          * The frame buffers that are reused by the
 849          * copy pipe in the offline preview mode.
 850          *
 851          * host2sp_offline_frames[0]: the input frame of the preview pipe.
 852          * host2sp_offline_frames[1]: the output frame of the copy pipe.
 853          *
 854          * TODO:
 855          *   Remove it when the Host and the SP is decoupled.
 856          */
 857         hrt_vaddress host2sp_offline_frames[NUM_CONTINUOUS_FRAMES];
 858         hrt_vaddress host2sp_offline_metadata[NUM_CONTINUOUS_FRAMES];
 859
 860 #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)
 861         hrt_vaddress host2sp_mipi_frames[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM];
 862         hrt_vaddress host2sp_mipi_metadata[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM];
 863         uint32_t host2sp_num_mipi_frames[N_CSI_PORTS];
 864 #endif
 865         uint32_t host2sp_cont_avail_num_raw_frames;
 866         uint32_t host2sp_cont_extra_num_raw_frames;
 867         uint32_t host2sp_cont_target_num_raw_frames;
 868         struct sh_css_event_irq_mask host2sp_event_irq_mask[NR_OF_PIPELINES];
 869
 870 };
 871
 872 #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)
 873 #define SIZE_OF_HOST_SP_COMMUNICATION_STRUCT                            \
 874         (sizeof(uint32_t) +                                             \
 875         (NUM_CONTINUOUS_FRAMES * SIZE_OF_HRT_VADDRESS * 2) +            \
 876         (N_CSI_PORTS * NUM_MIPI_FRAMES_PER_STREAM * SIZE_OF_HRT_VADDRESS * 2) +                 \
 877         ((3 + N_CSI_PORTS) * sizeof(uint32_t)) +                                                \
 878         (NR_OF_PIPELINES * SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT))
 879 #else
 880 #define SIZE_OF_HOST_SP_COMMUNICATION_STRUCT                            \
 881         (sizeof(uint32_t) +                                             \
 882         (NUM_CONTINUOUS_FRAMES * SIZE_OF_HRT_VADDRESS * 2) +            \
 883         (3 * sizeof(uint32_t)) +                                                \
 884         (NR_OF_PIPELINES * SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT))
 885 #endif
 886
 887 struct host_sp_queues {
 888         /*
 889          * Queues for the dynamic frame information,
 890          * i.e. the "in_frame" buffer, the "out_frame"
 891          * buffer and the "vf_out_frame" buffer.
 892          */
 893         ia_css_circbuf_desc_t host2sp_buffer_queues_desc
 894                 [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES];
 895         ia_css_circbuf_elem_t host2sp_buffer_queues_elems
 896                 [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]
 897                 [IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE];
 898         ia_css_circbuf_desc_t sp2host_buffer_queues_desc
 899                 [SH_CSS_MAX_NUM_QUEUES];
 900         ia_css_circbuf_elem_t sp2host_buffer_queues_elems
 901                 [SH_CSS_MAX_NUM_QUEUES][IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE];
 902
 903         /*
 904          * The queues for the events.
 905          */
 906         ia_css_circbuf_desc_t host2sp_psys_event_queue_desc;
 907         ia_css_circbuf_elem_t host2sp_psys_event_queue_elems
 908                 [IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE];
 909         ia_css_circbuf_desc_t sp2host_psys_event_queue_desc;
 910         ia_css_circbuf_elem_t sp2host_psys_event_queue_elems
 911                 [IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE];
 912
 913 #if !defined(HAS_NO_INPUT_SYSTEM)
 914         /*
 915          * The queues for the ISYS events.
 916          */
 917         ia_css_circbuf_desc_t host2sp_isys_event_queue_desc;
 918         ia_css_circbuf_elem_t host2sp_isys_event_queue_elems
 919                 [IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE];
 920         ia_css_circbuf_desc_t sp2host_isys_event_queue_desc;
 921         ia_css_circbuf_elem_t sp2host_isys_event_queue_elems
 922                 [IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE];
 923         /*
 924          * The queue for the tagger commands.
 925          * CHECK: are these last two present on the 2401 ?
 926          */
 927         ia_css_circbuf_desc_t host2sp_tag_cmd_queue_desc;
 928         ia_css_circbuf_elem_t host2sp_tag_cmd_queue_elems
 929                 [IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE];
 930 #endif
 931 };
 932
 933 #define SIZE_OF_QUEUES_ELEMS                                                    \
 934         (SIZE_OF_IA_CSS_CIRCBUF_ELEM_S_STRUCT *                         \
 935         ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE) + \
 936         (SH_CSS_MAX_NUM_QUEUES * IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE) +       \
 937         (IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE) +                           \
 938         (IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE) +                           \
 939         (IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE) +                           \
 940         (IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE) +                           \
 941         (IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE)))
 942
 943 #if !defined(HAS_NO_INPUT_SYSTEM)
 944 #define IA_CSS_NUM_CIRCBUF_DESCS 5
 945 #else
 946 #ifndef ISP2401
 947 #define IA_CSS_NUM_CIRCBUF_DESCS 3
 948 #else
 949 #define IA_CSS_NUM_CIRCBUF_DESCS 2
 950 #endif
 951 #endif
 952
 953 #define SIZE_OF_QUEUES_DESC \
 954         ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * \
 955           SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT) + \
 956          (SH_CSS_MAX_NUM_QUEUES * SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT) + \
 957          (IA_CSS_NUM_CIRCBUF_DESCS * SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT))
 958
 959 #define SIZE_OF_HOST_SP_QUEUES_STRUCT           \
 960         (SIZE_OF_QUEUES_ELEMS + SIZE_OF_QUEUES_DESC)
 961
 962 extern int (*sh_css_printf)(const char *fmt, va_list args);
 963
 964 static inline void
 965 sh_css_print(const char *fmt, ...)
 966 {
 967         va_list ap;
 968
 969         if (sh_css_printf) {
 970                 va_start(ap, fmt);
 971                 sh_css_printf(fmt, ap);
 972                 va_end(ap);
 973         }
 974 }
 975
 976 static inline void
 977 sh_css_vprint(const char *fmt, va_list args)
 978 {
 979         if (sh_css_printf)
 980                 sh_css_printf(fmt, args);
 981 }
 982
 983 /* The following #if is there because this header file is also included
 984    by SP and ISP code but they do not need this data and HIVECC has alignment
 985    issue with the firmware struct/union's.
 986    More permanent solution will be to refactor this include.
 987 */
 988 #if !defined(__ISP)
 989 hrt_vaddress
 990 sh_css_params_ddr_address_map(void);
 991
 992 enum ia_css_err
 993 sh_css_params_init(void);
 994
 995 void
 996 sh_css_params_uninit(void);
 997
 998 void *sh_css_malloc(size_t size);
 999
1000 void *sh_css_calloc(size_t N, size_t size);
1001
1002 void sh_css_free(void *ptr);
1003
1004 /* For Acceleration API: Flush FW (shared buffer pointer) arguments */
1005 void sh_css_flush(struct ia_css_acc_fw *fw);
1006
1007
1008 void
1009 sh_css_binary_args_reset(struct sh_css_binary_args *args);
1010
1011 /* Check two frames for equality (format, resolution, bits per element) */
1012 bool
1013 sh_css_frame_equal_types(const struct ia_css_frame *frame_a,
1014                          const struct ia_css_frame *frame_b);
1015
1016 bool
1017 sh_css_frame_info_equal_resolution(const struct ia_css_frame_info *info_a,
1018                                    const struct ia_css_frame_info *info_b);
1019
1020 void
1021 sh_css_capture_enable_bayer_downscaling(bool enable);
1022
1023 void
1024 sh_css_binary_print(const struct ia_css_binary *binary);
1025
1026 /* aligned argument of sh_css_frame_info_set_width can be used for an extra alignment requirement.
1027   When 0, no extra alignment is done. */
1028 void
1029 sh_css_frame_info_set_width(struct ia_css_frame_info *info,
1030                             unsigned int width,
1031                             unsigned int aligned);
1032
1033 #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2)
1034
1035 unsigned int
1036 sh_css_get_mipi_sizes_for_check(const unsigned int port, const unsigned int idx);
1037
1038 #endif
1039
1040 hrt_vaddress
1041 sh_css_store_sp_group_to_ddr(void);
1042
1043 hrt_vaddress
1044 sh_css_store_sp_stage_to_ddr(unsigned pipe, unsigned stage);
1045
1046 hrt_vaddress
1047 sh_css_store_isp_stage_to_ddr(unsigned pipe, unsigned stage);
1048
1049
1050 void
1051 sh_css_update_uds_and_crop_info(
1052                 const struct ia_css_binary_info *info,
1053                 const struct ia_css_frame_info *in_frame_info,
1054                 const struct ia_css_frame_info *out_frame_info,
1055                 const struct ia_css_resolution *dvs_env,
1056                 const struct ia_css_dz_config *zoom,
1057                 const struct ia_css_vector *motion_vector,
1058                 struct sh_css_uds_info *uds,            /* out */
1059                 struct sh_css_crop_pos *sp_out_crop_pos,        /* out */
1060                 bool enable_zoom
1061                 );
1062
1063 void
1064 sh_css_invalidate_shading_tables(struct ia_css_stream *stream);
1065
1066 struct ia_css_pipeline *
1067 ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe);
1068
1069 unsigned int
1070 ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe);
1071
1072 unsigned int
1073 ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe);
1074
1075 bool
1076 sh_css_continuous_is_enabled(uint8_t pipe_num);
1077
1078 struct ia_css_pipe *
1079 find_pipe_by_num(uint32_t pipe_num);
1080
1081 #ifdef USE_INPUT_SYSTEM_VERSION_2401
1082 void
1083 ia_css_get_crop_offsets(
1084                 struct ia_css_pipe *pipe,
1085                 struct ia_css_frame_info *in_frame);
1086 #endif
1087 #endif /* !defined(__ISP) */
1088
1089 #endif /* _SH_CSS_INTERNAL_H_ */