2 * comedi/drivers/pcl812.c
4 * Author: Michal Dobes <dobes@tesnet.cz>
6 * hardware driver for Advantech cards
7 * card: PCL-812, PCL-812PG, PCL-813, PCL-813B
8 * driver: pcl812, pcl812pg, pcl813, pcl813b
10 * card: ACL-8112DG, ACL-8112HG, ACL-8112PG, ACL-8113, ACL-8216
11 * driver: acl8112dg, acl8112hg, acl8112pg, acl8113, acl8216
12 * and for ICP DAS cards
13 * card: ISO-813, A-821PGH, A-821PGL, A-821PGL-NDA, A-822PGH, A-822PGL,
14 * driver: iso813, a821pgh, a-821pgl, a-821pglnda, a822pgh, a822pgl,
15 * card: A-823PGH, A-823PGL, A-826PG
16 * driver: a823pgh, a823pgl, a826pg
21 * Description: Advantech PCL-812/PG, PCL-813/B,
22 * ADLink ACL-8112DG/HG/PG, ACL-8113, ACL-8216,
23 * ICP DAS A-821PGH/PGL/PGL-NDA, A-822PGH/PGL, A-823PGH/PGL, A-826PG,
25 * Author: Michal Dobes <dobes@tesnet.cz>
26 * Devices: [Advantech] PCL-812 (pcl812), PCL-812PG (pcl812pg),
27 * PCL-813 (pcl813), PCL-813B (pcl813b), [ADLink] ACL-8112DG (acl8112dg),
28 * ACL-8112HG (acl8112hg), ACL-8113 (acl-8113), ACL-8216 (acl8216),
29 * [ICP] ISO-813 (iso813), A-821PGH (a821pgh), A-821PGL (a821pgl),
30 * A-821PGL-NDA (a821pclnda), A-822PGH (a822pgh), A-822PGL (a822pgl),
31 * A-823PGH (a823pgh), A-823PGL (a823pgl), A-826PG (a826pg)
32 * Updated: Mon, 06 Aug 2007 12:03:15 +0100
33 * Status: works (I hope. My board fire up under my hands
34 * and I cann't test all features.)
36 * This driver supports insn and cmd interfaces. Some boards support only insn
37 * because their hardware don't allow more (PCL-813/B, ACL-8113, ISO-813).
38 * Data transfer over DMA is supported only when you measure only one
39 * channel, this is too hardware limitation of these boards.
41 * Options for PCL-812:
43 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
44 * [2] - DMA (0=disable, 1, 3)
45 * [3] - 0=trigger source is internal 8253 with 2MHz clock
46 * 1=trigger source is external
47 * [4] - 0=A/D input range is +/-10V
48 * 1=A/D input range is +/-5V
49 * 2=A/D input range is +/-2.5V
50 * 3=A/D input range is +/-1.25V
51 * 4=A/D input range is +/-0.625V
52 * 5=A/D input range is +/-0.3125V
53 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
54 * 1=D/A outputs 0-10V (internal reference -10V)
55 * 2=D/A outputs unknown (external reference)
57 * Options for PCL-812PG, ACL-8112PG:
59 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
60 * [2] - DMA (0=disable, 1, 3)
61 * [3] - 0=trigger source is internal 8253 with 2MHz clock
62 * 1=trigger source is external
63 * [4] - 0=A/D have max +/-5V input
64 * 1=A/D have max +/-10V input
65 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
66 * 1=D/A outputs 0-10V (internal reference -10V)
67 * 2=D/A outputs unknown (external reference)
69 * Options for ACL-8112DG/HG, A-822PGL/PGH, A-823PGL/PGH, ACL-8216, A-826PG:
71 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
72 * [2] - DMA (0=disable, 1, 3)
73 * [3] - 0=trigger source is internal 8253 with 2MHz clock
74 * 1=trigger source is external
75 * [4] - 0=A/D channels are S.E.
76 * 1=A/D channels are DIFF
77 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
78 * 1=D/A outputs 0-10V (internal reference -10V)
79 * 2=D/A outputs unknown (external reference)
81 * Options for A-821PGL/PGH:
83 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
84 * [2] - 0=A/D channels are S.E.
85 * 1=A/D channels are DIFF
86 * [3] - 0=D/A output 0-5V (internal reference -5V)
87 * 1=D/A output 0-10V (internal reference -10V)
89 * Options for A-821PGL-NDA:
91 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
92 * [2] - 0=A/D channels are S.E.
93 * 1=A/D channels are DIFF
95 * Options for PCL-813:
98 * Options for PCL-813B:
100 * [1] - 0= bipolar inputs
103 * Options for ACL-8113, ISO-813:
105 * [1] - 0= 10V bipolar inputs
106 * 1= 10V unipolar inputs
107 * 2= 20V bipolar inputs
108 * 3= 20V unipolar inputs
111 #include <linux/module.h>
112 #include <linux/interrupt.h>
113 #include <linux/gfp.h>
114 #include <linux/delay.h>
115 #include <linux/io.h>
117 #include "../comedidev.h"
119 #include "comedi_isadma.h"
120 #include "comedi_fc.h"
123 /* hardware types of the cards */
124 #define boardPCL812PG 0 /* and ACL-8112PG */
125 #define boardPCL813B 1
126 #define boardPCL812 2
127 #define boardPCL813 3
128 #define boardISO813 5
129 #define boardACL8113 6
130 #define boardACL8112 7 /* ACL-8112DG/HG, A-822PGL/PGH, A-823PGL/PGH */
131 #define boardACL8216 8 /* and ICP DAS A-826PG */
132 #define boardA821 9 /* PGH, PGL, PGL/NDA versions */
137 #define PCL812_TIMER_BASE 0x00
138 #define PCL812_AI_LSB_REG 0x04
139 #define PCL812_AI_MSB_REG 0x05
140 #define PCL812_AI_MSB_DRDY (1 << 4)
141 #define PCL812_AO_LSB_REG(x) (0x04 + ((x) * 2))
142 #define PCL812_AO_MSB_REG(x) (0x05 + ((x) * 2))
143 #define PCL812_DI_LSB_REG 0x06
144 #define PCL812_DI_MSB_REG 0x07
145 #define PCL812_STATUS_REG 0x08
146 #define PCL812_STATUS_DRDY (1 << 5)
147 #define PCL812_RANGE_REG 0x09
148 #define PCL812_MUX_REG 0x0a
149 #define PCL812_MUX_CHAN(x) ((x) << 0)
150 #define PCL812_MUX_CS0 (1 << 4)
151 #define PCL812_MUX_CS1 (1 << 5)
152 #define PCL812_CTRL_REG 0x0b
153 #define PCL812_CTRL_DISABLE_TRIG (0 << 0)
154 #define PCL812_CTRL_SOFT_TRIG (1 << 0)
155 #define PCL812_CTRL_PACER_DMA_TRIG (2 << 0)
156 #define PCL812_CTRL_PACER_EOC_TRIG (6 << 0)
157 #define PCL812_SOFTTRIG_REG 0x0c
158 #define PCL812_DO_LSB_REG 0x0d
159 #define PCL812_DO_MSB_REG 0x0e
161 #define MAX_CHANLIST_LEN 256 /* length of scan list */
163 static const struct comedi_lrange range_pcl812pg_ai = {
173 static const struct comedi_lrange range_pcl812pg2_ai = {
183 static const struct comedi_lrange range812_bipolar1_25 = {
189 static const struct comedi_lrange range812_bipolar0_625 = {
195 static const struct comedi_lrange range812_bipolar0_3125 = {
201 static const struct comedi_lrange range_pcl813b_ai = {
210 static const struct comedi_lrange range_pcl813b2_ai = {
219 static const struct comedi_lrange range_iso813_1_ai = {
229 static const struct comedi_lrange range_iso813_1_2_ai = {
239 static const struct comedi_lrange range_iso813_2_ai = {
248 static const struct comedi_lrange range_iso813_2_2_ai = {
257 static const struct comedi_lrange range_acl8113_1_ai = {
266 static const struct comedi_lrange range_acl8113_1_2_ai = {
275 static const struct comedi_lrange range_acl8113_2_ai = {
283 static const struct comedi_lrange range_acl8113_2_2_ai = {
291 static const struct comedi_lrange range_acl8112dg_ai = {
305 static const struct comedi_lrange range_acl8112hg_ai = {
322 static const struct comedi_lrange range_a821pgh_ai = {
331 struct pcl812_board {
336 unsigned int ai_ns_min;
337 const struct comedi_lrange *rangelist_ai;
338 unsigned int IRQbits;
339 unsigned int has_dma:1;
340 unsigned int has_16bit_ai:1;
341 unsigned int has_mpc508_mux:1;
342 unsigned int has_dio:1;
345 static const struct pcl812_board boardtypes[] = {
348 .board_type = boardPCL812,
352 .rangelist_ai = &range_bipolar10,
358 .board_type = boardPCL812PG,
362 .rangelist_ai = &range_pcl812pg_ai,
368 .board_type = boardPCL812PG,
372 .rangelist_ai = &range_pcl812pg_ai,
378 .board_type = boardACL8112,
379 .n_aichan = 16, /* 8 differential */
382 .rangelist_ai = &range_acl8112dg_ai,
389 .board_type = boardACL8112,
390 .n_aichan = 16, /* 8 differential */
393 .rangelist_ai = &range_acl8112hg_ai,
400 .board_type = boardA821,
401 .n_aichan = 16, /* 8 differential */
404 .rangelist_ai = &range_pcl813b_ai,
408 .name = "a821pglnda",
409 .board_type = boardA821,
410 .n_aichan = 16, /* 8 differential */
412 .rangelist_ai = &range_pcl813b_ai,
416 .board_type = boardA821,
417 .n_aichan = 16, /* 8 differential */
420 .rangelist_ai = &range_a821pgh_ai,
425 .board_type = boardACL8112,
426 .n_aichan = 16, /* 8 differential */
429 .rangelist_ai = &range_acl8112dg_ai,
435 .board_type = boardACL8112,
436 .n_aichan = 16, /* 8 differential */
439 .rangelist_ai = &range_acl8112hg_ai,
445 .board_type = boardACL8112,
446 .n_aichan = 16, /* 8 differential */
449 .rangelist_ai = &range_acl8112dg_ai,
455 .board_type = boardACL8112,
456 .n_aichan = 16, /* 8 differential */
459 .rangelist_ai = &range_acl8112hg_ai,
465 .board_type = boardPCL813,
467 .rangelist_ai = &range_pcl813b_ai,
470 .board_type = boardPCL813B,
472 .rangelist_ai = &range_pcl813b_ai,
475 .board_type = boardACL8113,
477 .rangelist_ai = &range_acl8113_1_ai,
480 .board_type = boardISO813,
482 .rangelist_ai = &range_iso813_1_ai,
485 .board_type = boardACL8216,
486 .n_aichan = 16, /* 8 differential */
489 .rangelist_ai = &range_pcl813b2_ai,
497 .board_type = boardACL8216,
498 .n_aichan = 16, /* 8 differential */
501 .rangelist_ai = &range_pcl813b2_ai,
509 struct pcl812_private {
510 struct comedi_isadma *dma;
511 unsigned char range_correction; /* =1 we must add 1 to range number */
512 unsigned int last_ai_chanspec;
513 unsigned char mode_reg_int; /* there is stored INT number for some card */
514 unsigned int ai_poll_ptr; /* how many sampes transfer poll */
515 unsigned int max_812_ai_mode0_rangewait; /* setling time for gain */
516 unsigned int divisor1;
517 unsigned int divisor2;
518 unsigned int use_diff:1;
519 unsigned int use_mpc508:1;
520 unsigned int use_ext_trg:1;
521 unsigned int ai_dma:1;
522 unsigned int ai_eos:1;
525 static void pcl812_start_pacer(struct comedi_device *dev, bool load_timers)
527 struct pcl812_private *devpriv = dev->private;
528 unsigned long timer_base = dev->iobase + PCL812_TIMER_BASE;
530 i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
531 i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
535 i8254_write(timer_base, 0, 2, devpriv->divisor2);
536 i8254_write(timer_base, 0, 1, devpriv->divisor1);
540 static void pcl812_ai_setup_dma(struct comedi_device *dev,
541 struct comedi_subdevice *s,
542 unsigned int unread_samples)
544 struct pcl812_private *devpriv = dev->private;
545 struct comedi_isadma *dma = devpriv->dma;
546 struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
548 unsigned int max_samples;
549 unsigned int nsamples;
551 comedi_isadma_disable(dma->chan);
553 /* if using EOS, adapt DMA buffer to one scan */
554 bytes = devpriv->ai_eos ? comedi_bytes_per_scan(s) : desc->maxsize;
555 max_samples = comedi_bytes_to_samples(s, bytes);
558 * Determine dma size based on the buffer size plus the number of
559 * unread samples and the number of samples remaining in the command.
561 nsamples = comedi_nsamples_left(s, max_samples + unread_samples);
562 if (nsamples > unread_samples) {
563 nsamples -= unread_samples;
564 desc->size = comedi_samples_to_bytes(s, nsamples);
565 comedi_isadma_program(desc);
569 static void pcl812_ai_set_chan_range(struct comedi_device *dev,
570 unsigned int chanspec, char wait)
572 struct pcl812_private *devpriv = dev->private;
573 unsigned int chan = CR_CHAN(chanspec);
574 unsigned int range = CR_RANGE(chanspec);
575 unsigned int mux = 0;
577 if (chanspec == devpriv->last_ai_chanspec)
580 devpriv->last_ai_chanspec = chanspec;
582 if (devpriv->use_mpc508) {
583 if (devpriv->use_diff) {
584 mux |= PCL812_MUX_CS0 | PCL812_MUX_CS1;
587 mux |= PCL812_MUX_CS0;
589 mux |= PCL812_MUX_CS1;
593 outb(mux | PCL812_MUX_CHAN(chan), dev->iobase + PCL812_MUX_REG);
594 outb(range + devpriv->range_correction, dev->iobase + PCL812_RANGE_REG);
598 * XXX this depends on selected range and can be very long for
599 * some high gain ranges!
601 udelay(devpriv->max_812_ai_mode0_rangewait);
604 static void pcl812_ai_clear_eoc(struct comedi_device *dev)
606 /* writing any value clears the interrupt request */
607 outb(0, dev->iobase + PCL812_STATUS_REG);
610 static void pcl812_ai_soft_trig(struct comedi_device *dev)
612 /* writing any value triggers a software conversion */
613 outb(255, dev->iobase + PCL812_SOFTTRIG_REG);
616 static unsigned int pcl812_ai_get_sample(struct comedi_device *dev,
617 struct comedi_subdevice *s)
621 val = inb(dev->iobase + PCL812_AI_MSB_REG) << 8;
622 val |= inb(dev->iobase + PCL812_AI_LSB_REG);
624 return val & s->maxdata;
627 static int pcl812_ai_eoc(struct comedi_device *dev,
628 struct comedi_subdevice *s,
629 struct comedi_insn *insn,
630 unsigned long context)
634 if (s->maxdata > 0x0fff) {
635 status = inb(dev->iobase + PCL812_STATUS_REG);
636 if ((status & PCL812_STATUS_DRDY) == 0)
639 status = inb(dev->iobase + PCL812_AI_MSB_REG);
640 if ((status & PCL812_AI_MSB_DRDY) == 0)
646 static int pcl812_ai_cmdtest(struct comedi_device *dev,
647 struct comedi_subdevice *s, struct comedi_cmd *cmd)
649 const struct pcl812_board *board = dev->board_ptr;
650 struct pcl812_private *devpriv = dev->private;
655 /* Step 1 : check if triggers are trivially valid */
657 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
658 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
660 if (devpriv->use_ext_trg)
664 err |= cfc_check_trigger_src(&cmd->convert_src, flags);
666 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
667 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
672 /* Step 2a : make sure trigger sources are unique */
674 err |= cfc_check_trigger_is_unique(cmd->stop_src);
676 /* Step 2b : and mutually compatible */
681 /* Step 3: check if arguments are trivially valid */
683 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
684 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
686 if (cmd->convert_src == TRIG_TIMER)
687 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
690 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
692 err |= cfc_check_trigger_arg_min(&cmd->chanlist_len, 1);
693 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
695 if (cmd->stop_src == TRIG_COUNT)
696 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
698 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
703 /* step 4: fix up any arguments */
705 if (cmd->convert_src == TRIG_TIMER) {
706 arg = cmd->convert_arg;
707 i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
711 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
720 static int pcl812_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
722 struct pcl812_private *devpriv = dev->private;
723 struct comedi_isadma *dma = devpriv->dma;
724 struct comedi_cmd *cmd = &s->async->cmd;
725 unsigned int ctrl = 0;
728 pcl812_start_pacer(dev, false);
730 pcl812_ai_set_chan_range(dev, cmd->chanlist[0], 1);
732 if (dma) { /* check if we can use DMA transfer */
734 for (i = 1; i < cmd->chanlist_len; i++)
735 if (cmd->chanlist[0] != cmd->chanlist[i]) {
736 /* we cann't use DMA :-( */
744 devpriv->ai_poll_ptr = 0;
746 /* don't we want wake up every scan? */
747 if (cmd->flags & CMDF_WAKE_EOS) {
750 /* DMA is useless for this situation */
751 if (cmd->chanlist_len == 1)
755 if (devpriv->ai_dma) {
756 /* setup and enable dma for the first buffer */
758 pcl812_ai_setup_dma(dev, s, 0);
761 switch (cmd->convert_src) {
763 pcl812_start_pacer(dev, true);
768 ctrl |= PCL812_CTRL_PACER_DMA_TRIG;
770 ctrl |= PCL812_CTRL_PACER_EOC_TRIG;
771 outb(devpriv->mode_reg_int | ctrl, dev->iobase + PCL812_CTRL_REG);
776 static bool pcl812_ai_next_chan(struct comedi_device *dev,
777 struct comedi_subdevice *s)
779 struct comedi_cmd *cmd = &s->async->cmd;
781 if (cmd->stop_src == TRIG_COUNT &&
782 s->async->scans_done >= cmd->stop_arg) {
783 s->async->events |= COMEDI_CB_EOA;
790 static void pcl812_handle_eoc(struct comedi_device *dev,
791 struct comedi_subdevice *s)
793 struct comedi_cmd *cmd = &s->async->cmd;
794 unsigned int chan = s->async->cur_chan;
795 unsigned int next_chan;
798 if (pcl812_ai_eoc(dev, s, NULL, 0)) {
799 dev_dbg(dev->class_dev, "A/D cmd IRQ without DRDY!\n");
800 s->async->events |= COMEDI_CB_ERROR;
804 val = pcl812_ai_get_sample(dev, s);
805 comedi_buf_write_samples(s, &val, 1);
807 /* Set up next channel. Added by abbotti 2010-01-20, but untested. */
808 next_chan = s->async->cur_chan;
809 if (cmd->chanlist[chan] != cmd->chanlist[next_chan])
810 pcl812_ai_set_chan_range(dev, cmd->chanlist[next_chan], 0);
812 pcl812_ai_next_chan(dev, s);
815 static void transfer_from_dma_buf(struct comedi_device *dev,
816 struct comedi_subdevice *s,
818 unsigned int bufptr, unsigned int len)
823 for (i = len; i; i--) {
825 comedi_buf_write_samples(s, &val, 1);
827 if (!pcl812_ai_next_chan(dev, s))
832 static void pcl812_handle_dma(struct comedi_device *dev,
833 struct comedi_subdevice *s)
835 struct pcl812_private *devpriv = dev->private;
836 struct comedi_isadma *dma = devpriv->dma;
837 struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
838 unsigned int nsamples;
841 nsamples = comedi_bytes_to_samples(s, desc->size) -
842 devpriv->ai_poll_ptr;
843 bufptr = devpriv->ai_poll_ptr;
844 devpriv->ai_poll_ptr = 0;
846 /* restart dma with the next buffer */
847 dma->cur_dma = 1 - dma->cur_dma;
848 pcl812_ai_setup_dma(dev, s, nsamples);
850 transfer_from_dma_buf(dev, s, desc->virt_addr, bufptr, nsamples);
853 static irqreturn_t pcl812_interrupt(int irq, void *d)
855 struct comedi_device *dev = d;
856 struct comedi_subdevice *s = dev->read_subdev;
857 struct pcl812_private *devpriv = dev->private;
859 if (!dev->attached) {
860 pcl812_ai_clear_eoc(dev);
865 pcl812_handle_dma(dev, s);
867 pcl812_handle_eoc(dev, s);
869 pcl812_ai_clear_eoc(dev);
871 comedi_handle_events(dev, s);
875 static int pcl812_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s)
877 struct pcl812_private *devpriv = dev->private;
878 struct comedi_isadma *dma = devpriv->dma;
879 struct comedi_isadma_desc *desc;
884 /* poll is valid only for DMA transfer */
885 if (!devpriv->ai_dma)
888 spin_lock_irqsave(&dev->spinlock, flags);
890 poll = comedi_isadma_poll(dma);
891 poll = comedi_bytes_to_samples(s, poll);
892 if (poll > devpriv->ai_poll_ptr) {
893 desc = &dma->desc[dma->cur_dma];
894 transfer_from_dma_buf(dev, s, desc->virt_addr,
895 devpriv->ai_poll_ptr,
896 poll - devpriv->ai_poll_ptr);
897 /* new buffer position */
898 devpriv->ai_poll_ptr = poll;
900 ret = comedi_buf_n_bytes_ready(s);
906 spin_unlock_irqrestore(&dev->spinlock, flags);
911 static int pcl812_ai_cancel(struct comedi_device *dev,
912 struct comedi_subdevice *s)
914 struct pcl812_private *devpriv = dev->private;
917 comedi_isadma_disable(devpriv->dma->chan);
919 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
920 dev->iobase + PCL812_CTRL_REG);
921 pcl812_start_pacer(dev, false);
922 pcl812_ai_clear_eoc(dev);
926 static int pcl812_ai_insn_read(struct comedi_device *dev,
927 struct comedi_subdevice *s,
928 struct comedi_insn *insn,
931 struct pcl812_private *devpriv = dev->private;
935 outb(devpriv->mode_reg_int | PCL812_CTRL_SOFT_TRIG,
936 dev->iobase + PCL812_CTRL_REG);
938 pcl812_ai_set_chan_range(dev, insn->chanspec, 1);
940 for (i = 0; i < insn->n; i++) {
941 pcl812_ai_clear_eoc(dev);
942 pcl812_ai_soft_trig(dev);
944 ret = comedi_timeout(dev, s, insn, pcl812_ai_eoc, 0);
948 data[i] = pcl812_ai_get_sample(dev, s);
950 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
951 dev->iobase + PCL812_CTRL_REG);
952 pcl812_ai_clear_eoc(dev);
954 return ret ? ret : insn->n;
957 static int pcl812_ao_insn_write(struct comedi_device *dev,
958 struct comedi_subdevice *s,
959 struct comedi_insn *insn,
962 unsigned int chan = CR_CHAN(insn->chanspec);
963 unsigned int val = s->readback[chan];
966 for (i = 0; i < insn->n; i++) {
968 outb(val & 0xff, dev->iobase + PCL812_AO_LSB_REG(chan));
969 outb((val >> 8) & 0x0f, dev->iobase + PCL812_AO_MSB_REG(chan));
971 s->readback[chan] = val;
976 static int pcl812_di_insn_bits(struct comedi_device *dev,
977 struct comedi_subdevice *s,
978 struct comedi_insn *insn,
981 data[1] = inb(dev->iobase + PCL812_DI_LSB_REG) |
982 (inb(dev->iobase + PCL812_DI_MSB_REG) << 8);
987 static int pcl812_do_insn_bits(struct comedi_device *dev,
988 struct comedi_subdevice *s,
989 struct comedi_insn *insn,
992 if (comedi_dio_update_state(s, data)) {
993 outb(s->state & 0xff, dev->iobase + PCL812_DO_LSB_REG);
994 outb((s->state >> 8), dev->iobase + PCL812_DO_MSB_REG);
1002 static void pcl812_reset(struct comedi_device *dev)
1004 const struct pcl812_board *board = dev->board_ptr;
1005 struct pcl812_private *devpriv = dev->private;
1008 /* disable analog input trigger */
1009 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
1010 dev->iobase + PCL812_CTRL_REG);
1011 pcl812_ai_clear_eoc(dev);
1015 pcl812_start_pacer(dev, false);
1018 * Invalidate last_ai_chanspec then set analog input to
1019 * known channel/range.
1021 devpriv->last_ai_chanspec = CR_PACK(16, 0, 0);
1022 pcl812_ai_set_chan_range(dev, CR_PACK(0, 0, 0), 0);
1024 /* set analog output channels to 0V */
1025 for (chan = 0; chan < board->n_aochan; chan++) {
1026 outb(0, dev->iobase + PCL812_AO_LSB_REG(chan));
1027 outb(0, dev->iobase + PCL812_AO_MSB_REG(chan));
1030 /* set all digital outputs low */
1031 if (board->has_dio) {
1032 outb(0, dev->iobase + PCL812_DO_MSB_REG);
1033 outb(0, dev->iobase + PCL812_DO_LSB_REG);
1037 static void pcl812_set_ai_range_table(struct comedi_device *dev,
1038 struct comedi_subdevice *s,
1039 struct comedi_devconfig *it)
1041 const struct pcl812_board *board = dev->board_ptr;
1042 struct pcl812_private *devpriv = dev->private;
1044 /* default to the range table from the boardinfo */
1045 s->range_table = board->rangelist_ai;
1047 /* now check the user config option based on the boardtype */
1048 switch (board->board_type) {
1050 if (it->options[4] == 1)
1051 s->range_table = &range_pcl812pg2_ai;
1054 switch (it->options[4]) {
1056 s->range_table = &range_bipolar10;
1059 s->range_table = &range_bipolar5;
1062 s->range_table = &range_bipolar2_5;
1065 s->range_table = &range812_bipolar1_25;
1068 s->range_table = &range812_bipolar0_625;
1071 s->range_table = &range812_bipolar0_3125;
1074 s->range_table = &range_bipolar10;
1079 if (it->options[1] == 1)
1080 s->range_table = &range_pcl813b2_ai;
1083 switch (it->options[1]) {
1085 s->range_table = &range_iso813_1_ai;
1088 s->range_table = &range_iso813_1_2_ai;
1091 s->range_table = &range_iso813_2_ai;
1092 devpriv->range_correction = 1;
1095 s->range_table = &range_iso813_2_2_ai;
1096 devpriv->range_correction = 1;
1099 s->range_table = &range_iso813_1_ai;
1104 switch (it->options[1]) {
1106 s->range_table = &range_acl8113_1_ai;
1109 s->range_table = &range_acl8113_1_2_ai;
1112 s->range_table = &range_acl8113_2_ai;
1113 devpriv->range_correction = 1;
1116 s->range_table = &range_acl8113_2_2_ai;
1117 devpriv->range_correction = 1;
1120 s->range_table = &range_acl8113_1_ai;
1127 static void pcl812_alloc_dma(struct comedi_device *dev, unsigned int dma_chan)
1129 struct pcl812_private *devpriv = dev->private;
1131 /* only DMA channels 3 and 1 are valid */
1132 if (!(dma_chan == 3 || dma_chan == 1))
1135 /* DMA uses two 8K buffers */
1136 devpriv->dma = comedi_isadma_alloc(dev, 2, dma_chan, dma_chan,
1137 PAGE_SIZE * 2, COMEDI_ISADMA_READ);
1140 static void pcl812_free_dma(struct comedi_device *dev)
1142 struct pcl812_private *devpriv = dev->private;
1145 comedi_isadma_free(devpriv->dma);
1148 static int pcl812_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1150 const struct pcl812_board *board = dev->board_ptr;
1151 struct pcl812_private *devpriv;
1152 struct comedi_subdevice *s;
1157 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1161 ret = comedi_request_region(dev, it->options[0], 0x10);
1165 if ((1 << it->options[1]) & board->IRQbits) {
1166 ret = request_irq(it->options[1], pcl812_interrupt, 0,
1167 dev->board_name, dev);
1169 dev->irq = it->options[1];
1172 /* we need an IRQ to do DMA on channel 3 or 1 */
1173 if (dev->irq && board->has_dma)
1174 pcl812_alloc_dma(dev, it->options[2]);
1176 /* differential analog inputs? */
1177 switch (board->board_type) {
1179 if (it->options[2] == 1)
1180 devpriv->use_diff = 1;
1184 if (it->options[4] == 1)
1185 devpriv->use_diff = 1;
1189 n_subdevices = 1; /* all boardtypes have analog inputs */
1190 if (board->n_aochan > 0)
1195 ret = comedi_alloc_subdevices(dev, n_subdevices);
1201 /* Analog Input subdevice */
1202 s = &dev->subdevices[subdev];
1203 s->type = COMEDI_SUBD_AI;
1204 s->subdev_flags = SDF_READABLE;
1205 if (devpriv->use_diff) {
1206 s->subdev_flags |= SDF_DIFF;
1207 s->n_chan = board->n_aichan / 2;
1209 s->subdev_flags |= SDF_GROUND;
1210 s->n_chan = board->n_aichan;
1212 s->maxdata = board->has_16bit_ai ? 0xffff : 0x0fff;
1214 pcl812_set_ai_range_table(dev, s, it);
1216 s->insn_read = pcl812_ai_insn_read;
1219 dev->read_subdev = s;
1220 s->subdev_flags |= SDF_CMD_READ;
1221 s->len_chanlist = MAX_CHANLIST_LEN;
1222 s->do_cmdtest = pcl812_ai_cmdtest;
1223 s->do_cmd = pcl812_ai_cmd;
1224 s->poll = pcl812_ai_poll;
1225 s->cancel = pcl812_ai_cancel;
1228 devpriv->use_mpc508 = board->has_mpc508_mux;
1233 if (board->n_aochan > 0) {
1234 s = &dev->subdevices[subdev];
1235 s->type = COMEDI_SUBD_AO;
1236 s->subdev_flags = SDF_WRITABLE | SDF_GROUND;
1237 s->n_chan = board->n_aochan;
1239 s->range_table = &range_unipolar5;
1240 switch (board->board_type) {
1242 if (it->options[3] == 1)
1243 s->range_table = &range_unipolar10;
1249 if (it->options[5] == 1)
1250 s->range_table = &range_unipolar10;
1251 if (it->options[5] == 2)
1252 s->range_table = &range_unknown;
1255 s->insn_write = pcl812_ao_insn_write;
1257 ret = comedi_alloc_subdev_readback(s);
1264 if (board->has_dio) {
1265 /* Digital Input subdevice */
1266 s = &dev->subdevices[subdev];
1267 s->type = COMEDI_SUBD_DI;
1268 s->subdev_flags = SDF_READABLE;
1271 s->range_table = &range_digital;
1272 s->insn_bits = pcl812_di_insn_bits;
1275 /* Digital Output subdevice */
1276 s = &dev->subdevices[subdev];
1277 s->type = COMEDI_SUBD_DO;
1278 s->subdev_flags = SDF_WRITABLE;
1281 s->range_table = &range_digital;
1282 s->insn_bits = pcl812_do_insn_bits;
1286 switch (board->board_type) {
1291 devpriv->max_812_ai_mode0_rangewait = 1;
1292 if (it->options[3] > 0)
1293 /* we use external trigger */
1294 devpriv->use_ext_trg = 1;
1297 devpriv->max_812_ai_mode0_rangewait = 1;
1298 devpriv->mode_reg_int = (dev->irq << 4) & 0xf0;
1304 /* maybe there must by greatest timeout */
1305 devpriv->max_812_ai_mode0_rangewait = 5;
1314 static void pcl812_detach(struct comedi_device *dev)
1316 pcl812_free_dma(dev);
1317 comedi_legacy_detach(dev);
1320 static struct comedi_driver pcl812_driver = {
1321 .driver_name = "pcl812",
1322 .module = THIS_MODULE,
1323 .attach = pcl812_attach,
1324 .detach = pcl812_detach,
1325 .board_name = &boardtypes[0].name,
1326 .num_names = ARRAY_SIZE(boardtypes),
1327 .offset = sizeof(struct pcl812_board),
1329 module_comedi_driver(pcl812_driver);
1331 MODULE_AUTHOR("Comedi http://www.comedi.org");
1332 MODULE_DESCRIPTION("Comedi low-level driver");
1333 MODULE_LICENSE("GPL");