drivers/staging/axis-fifo/axis-fifo.txt

   1 Xilinx AXI-Stream FIFO v4.1 IP core
   2
   3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
   4 be accessed from the AXI4 memory-mapped interface. This is useful for
   5 transferring data from a processor into the FPGA fabric. The driver creates
   6 a character device that can be read/written to with standard
   7 open/read/write/close.
   8
   9 See Xilinx PG080 document for IP details.
  10
  11 Currently supports only store-forward mode with a 32-bit
  12 AXI4-Lite interface. DOES NOT support:
  13         - cut-through mode
  14         - AXI4 (non-lite)
  15
  16 Required properties:
  17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
  18 - interrupt-names: Should be "interrupt"
  19 - interrupt-parent: Should be <&intc>
  20 - interrupts: Should contain interrupts lines.
  21 - reg: Should contain registers location and length.
  22 - xlnx,axi-str-rxd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA"
  23 - xlnx,axi-str-rxd-tdata-width: Should be <0x20>
  24 - xlnx,axi-str-txc-protocol: Should be "XIL_AXI_STREAM_ETH_CTRL"
  25 - xlnx,axi-str-txc-tdata-width: Should be <0x20>
  26 - xlnx,axi-str-txd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA"
  27 - xlnx,axi-str-txd-tdata-width: Should be <0x20>
  28 - xlnx,axis-tdest-width: AXI-Stream TDEST width
  29 - xlnx,axis-tid-width: AXI-Stream TID width
  30 - xlnx,axis-tuser-width: AXI-Stream TUSER width
  31 - xlnx,data-interface-type: Should be <0x0>
  32 - xlnx,has-axis-tdest: Should be <0x0> (this feature isn't supported)
  33 - xlnx,has-axis-tid: Should be <0x0> (this feature isn't supported)
  34 - xlnx,has-axis-tkeep: Should be <0x0> (this feature isn't supported)
  35 - xlnx,has-axis-tstrb: Should be <0x0> (this feature isn't supported)
  36 - xlnx,has-axis-tuser: Should be <0x0> (this feature isn't supported)
  37 - xlnx,rx-fifo-depth: Depth of RX FIFO in words
  38 - xlnx,rx-fifo-pe-threshold: RX programmable empty interrupt threshold
  39 - xlnx,rx-fifo-pf-threshold: RX programmable full interrupt threshold
  40 - xlnx,s-axi-id-width: Should be <0x4>
  41 - xlnx,s-axi4-data-width: Should be <0x20>
  42 - xlnx,select-xpm: Should be <0x0>
  43 - xlnx,tx-fifo-depth: Depth of TX FIFO in words
  44 - xlnx,tx-fifo-pe-threshold: TX programmable empty interrupt threshold
  45 - xlnx,tx-fifo-pf-threshold: TX programmable full interrupt threshold
  46 - xlnx,use-rx-cut-through: Should be <0x0> (this feature isn't supported)
  47 - xlnx,use-rx-data: <0x1> if RX FIFO is enabled, <0x0> otherwise
  48 - xlnx,use-tx-ctrl: Should be <0x0> (this feature isn't supported)
  49 - xlnx,use-tx-cut-through: Should be <0x0> (this feature isn't supported)
  50 - xlnx,use-tx-data: <0x1> if TX FIFO is enabled, <0x0> otherwise
  51
  52 Example:
  53
  54 axi_fifo_mm_s_0: axi_fifo_mm_s@43c00000 {
  55         compatible = "xlnx,axi-fifo-mm-s-4.1";
  56         interrupt-names = "interrupt";
  57         interrupt-parent = <&intc>;
  58         interrupts = <0 29 4>;
  59         reg = <0x43c00000 0x10000>;
  60         xlnx,axi-str-rxd-protocol = "XIL_AXI_STREAM_ETH_DATA";
  61         xlnx,axi-str-rxd-tdata-width = <0x20>;
  62         xlnx,axi-str-txc-protocol = "XIL_AXI_STREAM_ETH_CTRL";
  63         xlnx,axi-str-txc-tdata-width = <0x20>;
  64         xlnx,axi-str-txd-protocol = "XIL_AXI_STREAM_ETH_DATA";
  65         xlnx,axi-str-txd-tdata-width = <0x20>;
  66         xlnx,axis-tdest-width = <0x4>;
  67         xlnx,axis-tid-width = <0x4>;
  68         xlnx,axis-tuser-width = <0x4>;
  69         xlnx,data-interface-type = <0x0>;
  70         xlnx,has-axis-tdest = <0x0>;
  71         xlnx,has-axis-tid = <0x0>;
  72         xlnx,has-axis-tkeep = <0x0>;
  73         xlnx,has-axis-tstrb = <0x0>;
  74         xlnx,has-axis-tuser = <0x0>;
  75         xlnx,rx-fifo-depth = <0x200>;
  76         xlnx,rx-fifo-pe-threshold = <0x2>;
  77         xlnx,rx-fifo-pf-threshold = <0x1fb>;
  78         xlnx,s-axi-id-width = <0x4>;
  79         xlnx,s-axi4-data-width = <0x20>;
  80         xlnx,select-xpm = <0x0>;
  81         xlnx,tx-fifo-depth = <0x8000>;
  82         xlnx,tx-fifo-pe-threshold = <0x200>;
  83         xlnx,tx-fifo-pf-threshold = <0x7ffb>;
  84         xlnx,use-rx-cut-through = <0x0>;
  85         xlnx,use-rx-data = <0x0>;
  86         xlnx,use-tx-ctrl = <0x0>;
  87         xlnx,use-tx-cut-through = <0x0>;
  88         xlnx,use-tx-data = <0x1>;
  89 };