2 * Copyright 2017 Impinj, Inc
3 * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
5 * Based on the code of analogus driver:
7 * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
17 #include <linux/platform_device.h>
18 #include <linux/pm_domain.h>
19 #include <linux/regmap.h>
20 #include <linux/regulator/consumer.h>
21 #include <dt-bindings/power/imx7-power.h>
23 #define GPC_LPCR_A7_BSC 0x000
25 #define GPC_PGC_CPU_MAPPING 0x0ec
26 #define USB_HSIC_PHY_A7_DOMAIN BIT(6)
27 #define USB_OTG2_PHY_A7_DOMAIN BIT(5)
28 #define USB_OTG1_PHY_A7_DOMAIN BIT(4)
29 #define PCIE_PHY_A7_DOMAIN BIT(3)
30 #define MIPI_PHY_A7_DOMAIN BIT(2)
32 #define GPC_PU_PGC_SW_PUP_REQ 0x0f8
33 #define GPC_PU_PGC_SW_PDN_REQ 0x104
34 #define USB_HSIC_PHY_SW_Pxx_REQ BIT(4)
35 #define USB_OTG2_PHY_SW_Pxx_REQ BIT(3)
36 #define USB_OTG1_PHY_SW_Pxx_REQ BIT(2)
37 #define PCIE_PHY_SW_Pxx_REQ BIT(1)
38 #define MIPI_PHY_SW_Pxx_REQ BIT(0)
40 #define GPC_M4_PU_PDN_FLG 0x1bc
45 #define PGC_USB_HSIC 8
46 #define GPC_PGC_CTRL(n) (0x800 + (n) * 0x40)
47 #define GPC_PGC_SR(n) (GPC_PGC_CTRL(n) + 0xc)
49 #define GPC_PGC_CTRL_PCR BIT(0)
51 struct imx7_pgc_domain {
52 struct generic_pm_domain genpd;
53 struct regmap *regmap;
54 struct regulator *regulator;
67 static int imx7_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
70 struct imx7_pgc_domain *domain = container_of(genpd,
71 struct imx7_pgc_domain,
73 unsigned int offset = on ?
74 GPC_PU_PGC_SW_PUP_REQ : GPC_PU_PGC_SW_PDN_REQ;
75 const bool enable_power_control = !on;
76 const bool has_regulator = !IS_ERR(domain->regulator);
77 unsigned long deadline;
80 regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
81 domain->bits.map, domain->bits.map);
83 if (has_regulator && on) {
84 ret = regulator_enable(domain->regulator);
86 dev_err(domain->dev, "failed to enable regulator\n");
91 if (enable_power_control)
92 regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
93 GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR);
95 regmap_update_bits(domain->regmap, offset,
96 domain->bits.pxx, domain->bits.pxx);
99 * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
100 * for PUP_REQ/PDN_REQ bit to be cleared
102 deadline = jiffies + msecs_to_jiffies(1);
106 regmap_read(domain->regmap, offset, &pxx_req);
108 if (!(pxx_req & domain->bits.pxx))
111 if (time_after(jiffies, deadline)) {
112 dev_err(domain->dev, "falied to command PGC\n");
115 * If we were in a process of enabling a
116 * domain and failed we might as well disable
117 * the regulator we just enabled. And if it
118 * was the opposite situation and we failed to
119 * power down -- keep the regulator on
128 if (enable_power_control)
129 regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
130 GPC_PGC_CTRL_PCR, 0);
132 if (has_regulator && !on) {
135 err = regulator_disable(domain->regulator);
138 "failed to disable regulator: %d\n", ret);
139 /* Preserve earlier error code */
143 regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
144 domain->bits.map, 0);
148 static int imx7_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain *genpd)
150 return imx7_gpc_pu_pgc_sw_pxx_req(genpd, true);
153 static int imx7_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain *genpd)
155 return imx7_gpc_pu_pgc_sw_pxx_req(genpd, false);
158 static struct imx7_pgc_domain imx7_pgc_domains[] = {
159 [IMX7_POWER_DOMAIN_MIPI_PHY] = {
164 .pxx = MIPI_PHY_SW_Pxx_REQ,
165 .map = MIPI_PHY_A7_DOMAIN,
171 [IMX7_POWER_DOMAIN_PCIE_PHY] = {
176 .pxx = PCIE_PHY_SW_Pxx_REQ,
177 .map = PCIE_PHY_A7_DOMAIN,
183 [IMX7_POWER_DOMAIN_USB_HSIC_PHY] = {
185 .name = "usb-hsic-phy",
188 .pxx = USB_HSIC_PHY_SW_Pxx_REQ,
189 .map = USB_HSIC_PHY_A7_DOMAIN,
196 static int imx7_pgc_domain_probe(struct platform_device *pdev)
198 struct imx7_pgc_domain *domain = pdev->dev.platform_data;
201 domain->dev = &pdev->dev;
203 ret = pm_genpd_init(&domain->genpd, NULL, true);
205 dev_err(domain->dev, "Failed to init power domain\n");
209 domain->regulator = devm_regulator_get_optional(domain->dev, "power");
210 if (IS_ERR(domain->regulator)) {
211 if (PTR_ERR(domain->regulator) != -ENODEV) {
212 dev_err(domain->dev, "Failed to get domain's regulator\n");
213 return PTR_ERR(domain->regulator);
216 regulator_set_voltage(domain->regulator,
217 domain->voltage, domain->voltage);
220 ret = of_genpd_add_provider_simple(domain->dev->of_node,
223 dev_err(domain->dev, "Failed to add genpd provider\n");
224 pm_genpd_remove(&domain->genpd);
230 static int imx7_pgc_domain_remove(struct platform_device *pdev)
232 struct imx7_pgc_domain *domain = pdev->dev.platform_data;
234 of_genpd_del_provider(domain->dev->of_node);
235 pm_genpd_remove(&domain->genpd);
240 static const struct platform_device_id imx7_pgc_domain_id[] = {
241 { "imx7-pgc-domain", },
245 static struct platform_driver imx7_pgc_domain_driver = {
249 .probe = imx7_pgc_domain_probe,
250 .remove = imx7_pgc_domain_remove,
251 .id_table = imx7_pgc_domain_id,
253 builtin_platform_driver(imx7_pgc_domain_driver)
255 static int imx_gpcv2_probe(struct platform_device *pdev)
257 static const struct regmap_range yes_ranges[] = {
258 regmap_reg_range(GPC_LPCR_A7_BSC,
260 regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI),
261 GPC_PGC_SR(PGC_MIPI)),
262 regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE),
263 GPC_PGC_SR(PGC_PCIE)),
264 regmap_reg_range(GPC_PGC_CTRL(PGC_USB_HSIC),
265 GPC_PGC_SR(PGC_USB_HSIC)),
267 static const struct regmap_access_table access_table = {
268 .yes_ranges = yes_ranges,
269 .n_yes_ranges = ARRAY_SIZE(yes_ranges),
271 static const struct regmap_config regmap_config = {
275 .rd_table = &access_table,
276 .wr_table = &access_table,
277 .max_register = SZ_4K,
279 struct device *dev = &pdev->dev;
280 struct device_node *pgc_np, *np;
281 struct regmap *regmap;
282 struct resource *res;
286 pgc_np = of_get_child_by_name(dev->of_node, "pgc");
288 dev_err(dev, "No power domains specified in DT\n");
292 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
293 base = devm_ioremap_resource(dev, res);
295 return PTR_ERR(base);
297 regmap = devm_regmap_init_mmio(dev, base, ®map_config);
298 if (IS_ERR(regmap)) {
299 ret = PTR_ERR(regmap);
300 dev_err(dev, "failed to init regmap (%d)\n", ret);
304 for_each_child_of_node(pgc_np, np) {
305 struct platform_device *pd_pdev;
306 struct imx7_pgc_domain *domain;
309 ret = of_property_read_u32(np, "reg", &domain_index);
311 dev_err(dev, "Failed to read 'reg' property\n");
316 if (domain_index >= ARRAY_SIZE(imx7_pgc_domains)) {
318 "Domain index %d is out of bounds\n",
323 domain = &imx7_pgc_domains[domain_index];
324 domain->regmap = regmap;
325 domain->genpd.power_on = imx7_gpc_pu_pgc_sw_pup_req;
326 domain->genpd.power_off = imx7_gpc_pu_pgc_sw_pdn_req;
328 pd_pdev = platform_device_alloc("imx7-pgc-domain",
331 dev_err(dev, "Failed to allocate platform device\n");
336 pd_pdev->dev.platform_data = domain;
337 pd_pdev->dev.parent = dev;
338 pd_pdev->dev.of_node = np;
340 ret = platform_device_add(pd_pdev);
342 platform_device_put(pd_pdev);
351 static const struct of_device_id imx_gpcv2_dt_ids[] = {
352 { .compatible = "fsl,imx7d-gpc" },
356 static struct platform_driver imx_gpc_driver = {
359 .of_match_table = imx_gpcv2_dt_ids,
361 .probe = imx_gpcv2_probe,
363 builtin_platform_driver(imx_gpc_driver)