drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <scsi/scsi_tcq.h>
  18 #include <scsi/scsicam.h>
  19 #include <scsi/scsi_transport.h>
  20 #include <scsi/scsi_transport_fc.h>
  21
  22 #include "qla_target.h"
  23
  24 /*
  25  * Driver version
  26  */
  27 char qla2x00_version_str[40];
  28
  29 static int apidev_major;
  30
  31 /*
  32  * SRB allocation cache
  33  */
  34 struct kmem_cache *srb_cachep;
  35
  36 /*
  37  * CT6 CTX allocation cache
  38  */
  39 static struct kmem_cache *ctx_cachep;
  40 /*
  41  * error level for logging
  42  */
  43 int ql_errlev = ql_log_all;
  44
  45 static int ql2xenableclass2;
  46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  47 MODULE_PARM_DESC(ql2xenableclass2,
  48                 "Specify if Class 2 operations are supported from the very "
  49                 "beginning. Default is 0 - class 2 not supported.");
  50
  51
  52 int ql2xlogintimeout = 20;
  53 module_param(ql2xlogintimeout, int, S_IRUGO);
  54 MODULE_PARM_DESC(ql2xlogintimeout,
  55                 "Login timeout value in seconds.");
  56
  57 int qlport_down_retry;
  58 module_param(qlport_down_retry, int, S_IRUGO);
  59 MODULE_PARM_DESC(qlport_down_retry,
  60                 "Maximum number of command retries to a port that returns "
  61                 "a PORT-DOWN status.");
  62
  63 int ql2xplogiabsentdevice;
  64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  66                 "Option to enable PLOGI to devices that are not present after "
  67                 "a Fabric scan.  This is needed for several broken switches. "
  68                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  69
  70 int ql2xloginretrycount = 0;
  71 module_param(ql2xloginretrycount, int, S_IRUGO);
  72 MODULE_PARM_DESC(ql2xloginretrycount,
  73                 "Specify an alternate value for the NVRAM login retry count.");
  74
  75 int ql2xallocfwdump = 1;
  76 module_param(ql2xallocfwdump, int, S_IRUGO);
  77 MODULE_PARM_DESC(ql2xallocfwdump,
  78                 "Option to enable allocation of memory for a firmware dump "
  79                 "during HBA initialization.  Memory allocation requirements "
  80                 "vary by ISP type.  Default is 1 - allocate memory.");
  81
  82 int ql2xextended_error_logging;
  83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  85 MODULE_PARM_DESC(ql2xextended_error_logging,
  86                 "Option to enable extended error logging,\n"
  87                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  88                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  89                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  90                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  91                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  92                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  93                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  94                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  95                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  96                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  97                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  98                 "\t\t0x1e400000 - Preferred value for capturing essential "
  99                 "debug information (equivalent to old "
 100                 "ql2xextended_error_logging=1).\n"
 101                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 102
 103 int ql2xshiftctondsd = 6;
 104 module_param(ql2xshiftctondsd, int, S_IRUGO);
 105 MODULE_PARM_DESC(ql2xshiftctondsd,
 106                 "Set to control shifting of command type processing "
 107                 "based on total number of SG elements.");
 108
 109 int ql2xfdmienable=1;
 110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 112 MODULE_PARM_DESC(ql2xfdmienable,
 113                 "Enables FDMI registrations. "
 114                 "0 - no FDMI. Default is 1 - perform FDMI.");
 115
 116 #define MAX_Q_DEPTH     32
 117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xmaxqdepth,
 120                 "Maximum queue depth to set for each LUN. "
 121                 "Default is 32.");
 122
 123 #if (IS_ENABLED(CONFIG_NVME_FC))
 124 int ql2xenabledif;
 125 #else
 126 int ql2xenabledif = 2;
 127 #endif
 128 module_param(ql2xenabledif, int, S_IRUGO);
 129 MODULE_PARM_DESC(ql2xenabledif,
 130                 " Enable T10-CRC-DIF:\n"
 131                 " Default is 2.\n"
 132                 "  0 -- No DIF Support\n"
 133                 "  1 -- Enable DIF for all types\n"
 134                 "  2 -- Enable DIF for all types, except Type 0.\n");
 135
 136 #if (IS_ENABLED(CONFIG_NVME_FC))
 137 int ql2xnvmeenable = 1;
 138 #else
 139 int ql2xnvmeenable;
 140 #endif
 141 module_param(ql2xnvmeenable, int, 0644);
 142 MODULE_PARM_DESC(ql2xnvmeenable,
 143     "Enables NVME support. "
 144     "0 - no NVMe.  Default is Y");
 145
 146 int ql2xenablehba_err_chk = 2;
 147 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 148 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 149                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 150                 " Default is 2.\n"
 151                 "  0 -- Error isolation disabled\n"
 152                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 153                 "  2 -- Error isolation enabled for all Types\n");
 154
 155 int ql2xiidmaenable=1;
 156 module_param(ql2xiidmaenable, int, S_IRUGO);
 157 MODULE_PARM_DESC(ql2xiidmaenable,
 158                 "Enables iIDMA settings "
 159                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 160
 161 int ql2xmqsupport = 1;
 162 module_param(ql2xmqsupport, int, S_IRUGO);
 163 MODULE_PARM_DESC(ql2xmqsupport,
 164                 "Enable on demand multiple queue pairs support "
 165                 "Default is 1 for supported. "
 166                 "Set it to 0 to turn off mq qpair support.");
 167
 168 int ql2xfwloadbin;
 169 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 170 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 171 MODULE_PARM_DESC(ql2xfwloadbin,
 172                 "Option to specify location from which to load ISP firmware:.\n"
 173                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 174                 "      interface.\n"
 175                 " 1 -- load firmware from flash.\n"
 176                 " 0 -- use default semantics.\n");
 177
 178 int ql2xetsenable;
 179 module_param(ql2xetsenable, int, S_IRUGO);
 180 MODULE_PARM_DESC(ql2xetsenable,
 181                 "Enables firmware ETS burst."
 182                 "Default is 0 - skip ETS enablement.");
 183
 184 int ql2xdbwr = 1;
 185 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 186 MODULE_PARM_DESC(ql2xdbwr,
 187                 "Option to specify scheme for request queue posting.\n"
 188                 " 0 -- Regular doorbell.\n"
 189                 " 1 -- CAMRAM doorbell (faster).\n");
 190
 191 int ql2xtargetreset = 1;
 192 module_param(ql2xtargetreset, int, S_IRUGO);
 193 MODULE_PARM_DESC(ql2xtargetreset,
 194                  "Enable target reset."
 195                  "Default is 1 - use hw defaults.");
 196
 197 int ql2xgffidenable;
 198 module_param(ql2xgffidenable, int, S_IRUGO);
 199 MODULE_PARM_DESC(ql2xgffidenable,
 200                 "Enables GFF_ID checks of port type. "
 201                 "Default is 0 - Do not use GFF_ID information.");
 202
 203 int ql2xasynctmfenable;
 204 module_param(ql2xasynctmfenable, int, S_IRUGO);
 205 MODULE_PARM_DESC(ql2xasynctmfenable,
 206                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 207                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 208
 209 int ql2xdontresethba;
 210 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 211 MODULE_PARM_DESC(ql2xdontresethba,
 212                 "Option to specify reset behaviour.\n"
 213                 " 0 (Default) -- Reset on failure.\n"
 214                 " 1 -- Do not reset on failure.\n");
 215
 216 uint64_t ql2xmaxlun = MAX_LUNS;
 217 module_param(ql2xmaxlun, ullong, S_IRUGO);
 218 MODULE_PARM_DESC(ql2xmaxlun,
 219                 "Defines the maximum LU number to register with the SCSI "
 220                 "midlayer. Default is 65535.");
 221
 222 int ql2xmdcapmask = 0x1F;
 223 module_param(ql2xmdcapmask, int, S_IRUGO);
 224 MODULE_PARM_DESC(ql2xmdcapmask,
 225                 "Set the Minidump driver capture mask level. "
 226                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 227
 228 int ql2xmdenable = 1;
 229 module_param(ql2xmdenable, int, S_IRUGO);
 230 MODULE_PARM_DESC(ql2xmdenable,
 231                 "Enable/disable MiniDump. "
 232                 "0 - MiniDump disabled. "
 233                 "1 (Default) - MiniDump enabled.");
 234
 235 int ql2xexlogins = 0;
 236 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 237 MODULE_PARM_DESC(ql2xexlogins,
 238                  "Number of extended Logins. "
 239                  "0 (Default)- Disabled.");
 240
 241 int ql2xexchoffld = 1024;
 242 module_param(ql2xexchoffld, uint, 0644);
 243 MODULE_PARM_DESC(ql2xexchoffld,
 244         "Number of target exchanges.");
 245
 246 int ql2xiniexchg = 1024;
 247 module_param(ql2xiniexchg, uint, 0644);
 248 MODULE_PARM_DESC(ql2xiniexchg,
 249         "Number of initiator exchanges.");
 250
 251 int ql2xfwholdabts = 0;
 252 module_param(ql2xfwholdabts, int, S_IRUGO);
 253 MODULE_PARM_DESC(ql2xfwholdabts,
 254                 "Allow FW to hold status IOCB until ABTS rsp received. "
 255                 "0 (Default) Do not set fw option. "
 256                 "1 - Set fw option to hold ABTS.");
 257
 258 int ql2xmvasynctoatio = 1;
 259 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 260 MODULE_PARM_DESC(ql2xmvasynctoatio,
 261                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 262                 "0 (Default). Do not move IOCBs"
 263                 "1 - Move IOCBs.");
 264
 265 /*
 266  * SCSI host template entry points
 267  */
 268 static int qla2xxx_slave_configure(struct scsi_device * device);
 269 static int qla2xxx_slave_alloc(struct scsi_device *);
 270 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 271 static void qla2xxx_scan_start(struct Scsi_Host *);
 272 static void qla2xxx_slave_destroy(struct scsi_device *);
 273 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 274 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 275 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 276 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 277 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 278 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 279
 280 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 281 static void qla2x00_free_device(scsi_qla_host_t *);
 282 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 283 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 284 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 285
 286 struct scsi_host_template qla2xxx_driver_template = {
 287         .module                 = THIS_MODULE,
 288         .name                   = QLA2XXX_DRIVER_NAME,
 289         .queuecommand           = qla2xxx_queuecommand,
 290
 291         .eh_timed_out           = fc_eh_timed_out,
 292         .eh_abort_handler       = qla2xxx_eh_abort,
 293         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 294         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 295         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 296         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 297
 298         .slave_configure        = qla2xxx_slave_configure,
 299
 300         .slave_alloc            = qla2xxx_slave_alloc,
 301         .slave_destroy          = qla2xxx_slave_destroy,
 302         .scan_finished          = qla2xxx_scan_finished,
 303         .scan_start             = qla2xxx_scan_start,
 304         .change_queue_depth     = scsi_change_queue_depth,
 305         .map_queues             = qla2xxx_map_queues,
 306         .this_id                = -1,
 307         .cmd_per_lun            = 3,
 308         .use_clustering         = ENABLE_CLUSTERING,
 309         .sg_tablesize           = SG_ALL,
 310
 311         .max_sectors            = 0xFFFF,
 312         .shost_attrs            = qla2x00_host_attrs,
 313
 314         .supported_mode         = MODE_INITIATOR,
 315         .track_queue_depth      = 1,
 316 };
 317
 318 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 319 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 320
 321 /* TODO Convert to inlines
 322  *
 323  * Timer routines
 324  */
 325
 326 __inline__ void
 327 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 328 {
 329         init_timer(&vha->timer);
 330         vha->timer.expires = jiffies + interval * HZ;
 331         vha->timer.data = (unsigned long)vha;
 332         vha->timer.function = (void (*)(unsigned long))func;
 333         add_timer(&vha->timer);
 334         vha->timer_active = 1;
 335 }
 336
 337 static inline void
 338 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 339 {
 340         /* Currently used for 82XX only. */
 341         if (vha->device_flags & DFLG_DEV_FAILED) {
 342                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 343                     "Device in a failed state, returning.\n");
 344                 return;
 345         }
 346
 347         mod_timer(&vha->timer, jiffies + interval * HZ);
 348 }
 349
 350 static __inline__ void
 351 qla2x00_stop_timer(scsi_qla_host_t *vha)
 352 {
 353         del_timer_sync(&vha->timer);
 354         vha->timer_active = 0;
 355 }
 356
 357 static int qla2x00_do_dpc(void *data);
 358
 359 static void qla2x00_rst_aen(scsi_qla_host_t *);
 360
 361 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 362         struct req_que **, struct rsp_que **);
 363 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 364 static void qla2x00_mem_free(struct qla_hw_data *);
 365 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 366         struct qla_qpair *qpair);
 367
 368 /* -------------------------------------------------------------------------- */
 369 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 370     struct rsp_que *rsp)
 371 {
 372         struct qla_hw_data *ha = vha->hw;
 373         rsp->qpair = ha->base_qpair;
 374         rsp->req = req;
 375         ha->base_qpair->req = req;
 376         ha->base_qpair->rsp = rsp;
 377         ha->base_qpair->vha = vha;
 378         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 379         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 380         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 381         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 382         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 383         /* init qpair to this cpu. Will adjust at run time. */
 384         qla_cpu_update(rsp->qpair, smp_processor_id());
 385         ha->base_qpair->pdev = ha->pdev;
 386
 387         if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
 388                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 389 }
 390
 391 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 392                                 struct rsp_que *rsp)
 393 {
 394         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 395         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 396                                 GFP_KERNEL);
 397         if (!ha->req_q_map) {
 398                 ql_log(ql_log_fatal, vha, 0x003b,
 399                     "Unable to allocate memory for request queue ptrs.\n");
 400                 goto fail_req_map;
 401         }
 402
 403         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 404                                 GFP_KERNEL);
 405         if (!ha->rsp_q_map) {
 406                 ql_log(ql_log_fatal, vha, 0x003c,
 407                     "Unable to allocate memory for response queue ptrs.\n");
 408                 goto fail_rsp_map;
 409         }
 410
 411         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 412         if (ha->base_qpair == NULL) {
 413                 ql_log(ql_log_warn, vha, 0x00e0,
 414                     "Failed to allocate base queue pair memory.\n");
 415                 goto fail_base_qpair;
 416         }
 417
 418         qla_init_base_qpair(vha, req, rsp);
 419
 420         if (ql2xmqsupport && ha->max_qpairs) {
 421                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 422                         GFP_KERNEL);
 423                 if (!ha->queue_pair_map) {
 424                         ql_log(ql_log_fatal, vha, 0x0180,
 425                             "Unable to allocate memory for queue pair ptrs.\n");
 426                         goto fail_qpair_map;
 427                 }
 428         }
 429
 430         /*
 431          * Make sure we record at least the request and response queue zero in
 432          * case we need to free them if part of the probe fails.
 433          */
 434         ha->rsp_q_map[0] = rsp;
 435         ha->req_q_map[0] = req;
 436         set_bit(0, ha->rsp_qid_map);
 437         set_bit(0, ha->req_qid_map);
 438         return 1;
 439
 440 fail_qpair_map:
 441         kfree(ha->base_qpair);
 442         ha->base_qpair = NULL;
 443 fail_base_qpair:
 444         kfree(ha->rsp_q_map);
 445         ha->rsp_q_map = NULL;
 446 fail_rsp_map:
 447         kfree(ha->req_q_map);
 448         ha->req_q_map = NULL;
 449 fail_req_map:
 450         return -ENOMEM;
 451 }
 452
 453 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 454 {
 455         if (IS_QLAFX00(ha)) {
 456                 if (req && req->ring_fx00)
 457                         dma_free_coherent(&ha->pdev->dev,
 458                             (req->length_fx00 + 1) * sizeof(request_t),
 459                             req->ring_fx00, req->dma_fx00);
 460         } else if (req && req->ring)
 461                 dma_free_coherent(&ha->pdev->dev,
 462                 (req->length + 1) * sizeof(request_t),
 463                 req->ring, req->dma);
 464
 465         if (req)
 466                 kfree(req->outstanding_cmds);
 467
 468         kfree(req);
 469 }
 470
 471 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 472 {
 473         if (IS_QLAFX00(ha)) {
 474                 if (rsp && rsp->ring)
 475                         dma_free_coherent(&ha->pdev->dev,
 476                             (rsp->length_fx00 + 1) * sizeof(request_t),
 477                             rsp->ring_fx00, rsp->dma_fx00);
 478         } else if (rsp && rsp->ring) {
 479                 dma_free_coherent(&ha->pdev->dev,
 480                 (rsp->length + 1) * sizeof(response_t),
 481                 rsp->ring, rsp->dma);
 482         }
 483         kfree(rsp);
 484 }
 485
 486 static void qla2x00_free_queues(struct qla_hw_data *ha)
 487 {
 488         struct req_que *req;
 489         struct rsp_que *rsp;
 490         int cnt;
 491         unsigned long flags;
 492
 493         if (ha->queue_pair_map) {
 494                 kfree(ha->queue_pair_map);
 495                 ha->queue_pair_map = NULL;
 496         }
 497         if (ha->base_qpair) {
 498                 kfree(ha->base_qpair);
 499                 ha->base_qpair = NULL;
 500         }
 501
 502         spin_lock_irqsave(&ha->hardware_lock, flags);
 503         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 504                 if (!test_bit(cnt, ha->req_qid_map))
 505                         continue;
 506
 507                 req = ha->req_q_map[cnt];
 508                 clear_bit(cnt, ha->req_qid_map);
 509                 ha->req_q_map[cnt] = NULL;
 510
 511                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 512                 qla2x00_free_req_que(ha, req);
 513                 spin_lock_irqsave(&ha->hardware_lock, flags);
 514         }
 515         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 516
 517         kfree(ha->req_q_map);
 518         ha->req_q_map = NULL;
 519
 520
 521         spin_lock_irqsave(&ha->hardware_lock, flags);
 522         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 523                 if (!test_bit(cnt, ha->rsp_qid_map))
 524                         continue;
 525
 526                 rsp = ha->rsp_q_map[cnt];
 527                 clear_bit(cnt, ha->rsp_qid_map);
 528                 ha->rsp_q_map[cnt] =  NULL;
 529                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 530                 qla2x00_free_rsp_que(ha, rsp);
 531                 spin_lock_irqsave(&ha->hardware_lock, flags);
 532         }
 533         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 534
 535         kfree(ha->rsp_q_map);
 536         ha->rsp_q_map = NULL;
 537 }
 538
 539 static char *
 540 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 541 {
 542         struct qla_hw_data *ha = vha->hw;
 543         static char *pci_bus_modes[] = {
 544                 "33", "66", "100", "133",
 545         };
 546         uint16_t pci_bus;
 547
 548         strcpy(str, "PCI");
 549         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 550         if (pci_bus) {
 551                 strcat(str, "-X (");
 552                 strcat(str, pci_bus_modes[pci_bus]);
 553         } else {
 554                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 555                 strcat(str, " (");
 556                 strcat(str, pci_bus_modes[pci_bus]);
 557         }
 558         strcat(str, " MHz)");
 559
 560         return (str);
 561 }
 562
 563 static char *
 564 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 565 {
 566         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 567         struct qla_hw_data *ha = vha->hw;
 568         uint32_t pci_bus;
 569
 570         if (pci_is_pcie(ha->pdev)) {
 571                 char lwstr[6];
 572                 uint32_t lstat, lspeed, lwidth;
 573
 574                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 575                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 576                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 577
 578                 strcpy(str, "PCIe (");
 579                 switch (lspeed) {
 580                 case 1:
 581                         strcat(str, "2.5GT/s ");
 582                         break;
 583                 case 2:
 584                         strcat(str, "5.0GT/s ");
 585                         break;
 586                 case 3:
 587                         strcat(str, "8.0GT/s ");
 588                         break;
 589                 default:
 590                         strcat(str, "<unknown> ");
 591                         break;
 592                 }
 593                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 594                 strcat(str, lwstr);
 595
 596                 return str;
 597         }
 598
 599         strcpy(str, "PCI");
 600         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 601         if (pci_bus == 0 || pci_bus == 8) {
 602                 strcat(str, " (");
 603                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 604         } else {
 605                 strcat(str, "-X ");
 606                 if (pci_bus & BIT_2)
 607                         strcat(str, "Mode 2");
 608                 else
 609                         strcat(str, "Mode 1");
 610                 strcat(str, " (");
 611                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 612         }
 613         strcat(str, " MHz)");
 614
 615         return str;
 616 }
 617
 618 static char *
 619 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 620 {
 621         char un_str[10];
 622         struct qla_hw_data *ha = vha->hw;
 623
 624         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 625             ha->fw_minor_version, ha->fw_subminor_version);
 626
 627         if (ha->fw_attributes & BIT_9) {
 628                 strcat(str, "FLX");
 629                 return (str);
 630         }
 631
 632         switch (ha->fw_attributes & 0xFF) {
 633         case 0x7:
 634                 strcat(str, "EF");
 635                 break;
 636         case 0x17:
 637                 strcat(str, "TP");
 638                 break;
 639         case 0x37:
 640                 strcat(str, "IP");
 641                 break;
 642         case 0x77:
 643                 strcat(str, "VI");
 644                 break;
 645         default:
 646                 sprintf(un_str, "(%x)", ha->fw_attributes);
 647                 strcat(str, un_str);
 648                 break;
 649         }
 650         if (ha->fw_attributes & 0x100)
 651                 strcat(str, "X");
 652
 653         return (str);
 654 }
 655
 656 static char *
 657 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 658 {
 659         struct qla_hw_data *ha = vha->hw;
 660
 661         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 662             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 663         return str;
 664 }
 665
 666 void
 667 qla2x00_sp_free_dma(void *ptr)
 668 {
 669         srb_t *sp = ptr;
 670         struct qla_hw_data *ha = sp->vha->hw;
 671         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 672         void *ctx = GET_CMD_CTX_SP(sp);
 673
 674         if (sp->flags & SRB_DMA_VALID) {
 675                 scsi_dma_unmap(cmd);
 676                 sp->flags &= ~SRB_DMA_VALID;
 677         }
 678
 679         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 680                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 681                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 682                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 683         }
 684
 685         if (!ctx)
 686                 goto end;
 687
 688         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 689                 /* List assured to be having elements */
 690                 qla2x00_clean_dsd_pool(ha, ctx);
 691                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 692         }
 693
 694         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 695                 struct crc_context *ctx0 = ctx;
 696
 697                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 698                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 699         }
 700
 701         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 702                 struct ct6_dsd *ctx1 = ctx;
 703
 704                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 705                     ctx1->fcp_cmnd_dma);
 706                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 707                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 708                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 709                 mempool_free(ctx1, ha->ctx_mempool);
 710         }
 711
 712 end:
 713         if ((sp->type != SRB_NVME_CMD) && (sp->type != SRB_NVME_LS)) {
 714                 CMD_SP(cmd) = NULL;
 715                 qla2x00_rel_sp(sp);
 716         }
 717 }
 718
 719 void
 720 qla2x00_sp_compl(void *ptr, int res)
 721 {
 722         srb_t *sp = ptr;
 723         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 724
 725         cmd->result = res;
 726
 727         if (atomic_read(&sp->ref_count) == 0) {
 728                 ql_dbg(ql_dbg_io, sp->vha, 0x3015,
 729                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 730                     sp, GET_CMD_SP(sp));
 731                 if (ql2xextended_error_logging & ql_dbg_io)
 732                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 733                 return;
 734         }
 735         if (!atomic_dec_and_test(&sp->ref_count))
 736                 return;
 737
 738         qla2x00_sp_free_dma(sp);
 739         cmd->scsi_done(cmd);
 740 }
 741
 742 void
 743 qla2xxx_qpair_sp_free_dma(void *ptr)
 744 {
 745         srb_t *sp = (srb_t *)ptr;
 746         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 747         struct qla_hw_data *ha = sp->fcport->vha->hw;
 748         void *ctx = GET_CMD_CTX_SP(sp);
 749
 750         if (sp->flags & SRB_DMA_VALID) {
 751                 scsi_dma_unmap(cmd);
 752                 sp->flags &= ~SRB_DMA_VALID;
 753         }
 754
 755         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 756                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 757                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 758                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 759         }
 760
 761         if (!ctx)
 762                 goto end;
 763
 764         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 765                 /* List assured to be having elements */
 766                 qla2x00_clean_dsd_pool(ha, ctx);
 767                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 768         }
 769
 770         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 771                 struct crc_context *ctx0 = ctx;
 772
 773                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 774                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 775         }
 776
 777         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 778                 struct ct6_dsd *ctx1 = ctx;
 779                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 780                     ctx1->fcp_cmnd_dma);
 781                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 782                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 783                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 784                 mempool_free(ctx1, ha->ctx_mempool);
 785         }
 786 end:
 787         CMD_SP(cmd) = NULL;
 788         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 789 }
 790
 791 void
 792 qla2xxx_qpair_sp_compl(void *ptr, int res)
 793 {
 794         srb_t *sp = ptr;
 795         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 796
 797         cmd->result = res;
 798
 799         if (atomic_read(&sp->ref_count) == 0) {
 800                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 801                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 802                     sp, GET_CMD_SP(sp));
 803                 if (ql2xextended_error_logging & ql_dbg_io)
 804                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 805                 return;
 806         }
 807         if (!atomic_dec_and_test(&sp->ref_count))
 808                 return;
 809
 810         qla2xxx_qpair_sp_free_dma(sp);
 811         cmd->scsi_done(cmd);
 812 }
 813
 814 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 815  * does not have the changes necessary to avoid taking host->host_lock.
 816  */
 817 static int
 818 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 819 {
 820         scsi_qla_host_t *vha = shost_priv(host);
 821         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 822         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 823         struct qla_hw_data *ha = vha->hw;
 824         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 825         srb_t *sp;
 826         int rval;
 827         struct qla_qpair *qpair = NULL;
 828         uint32_t tag;
 829         uint16_t hwq;
 830
 831         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 832                 cmd->result = DID_NO_CONNECT << 16;
 833                 goto qc24_fail_command;
 834         }
 835
 836         if (ha->mqenable) {
 837                 if (shost_use_blk_mq(vha->host)) {
 838                         tag = blk_mq_unique_tag(cmd->request);
 839                         hwq = blk_mq_unique_tag_to_hwq(tag);
 840                         qpair = ha->queue_pair_map[hwq];
 841                 } else if (vha->vp_idx && vha->qpair) {
 842                         qpair = vha->qpair;
 843                 }
 844
 845                 if (qpair)
 846                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 847         }
 848
 849         if (ha->flags.eeh_busy) {
 850                 if (ha->flags.pci_channel_io_perm_failure) {
 851                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 852                             "PCI Channel IO permanent failure, exiting "
 853                             "cmd=%p.\n", cmd);
 854                         cmd->result = DID_NO_CONNECT << 16;
 855                 } else {
 856                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 857                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 858                         cmd->result = DID_REQUEUE << 16;
 859                 }
 860                 goto qc24_fail_command;
 861         }
 862
 863         rval = fc_remote_port_chkready(rport);
 864         if (rval) {
 865                 cmd->result = rval;
 866                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 867                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 868                     cmd, rval);
 869                 goto qc24_fail_command;
 870         }
 871
 872         if (!vha->flags.difdix_supported &&
 873                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 874                         ql_dbg(ql_dbg_io, vha, 0x3004,
 875                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 876                             cmd);
 877                         cmd->result = DID_NO_CONNECT << 16;
 878                         goto qc24_fail_command;
 879         }
 880
 881         if (!fcport) {
 882                 cmd->result = DID_NO_CONNECT << 16;
 883                 goto qc24_fail_command;
 884         }
 885
 886         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 887                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 888                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 889                         ql_dbg(ql_dbg_io, vha, 0x3005,
 890                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 891                             atomic_read(&fcport->state),
 892                             atomic_read(&base_vha->loop_state));
 893                         cmd->result = DID_NO_CONNECT << 16;
 894                         goto qc24_fail_command;
 895                 }
 896                 goto qc24_target_busy;
 897         }
 898
 899         /*
 900          * Return target busy if we've received a non-zero retry_delay_timer
 901          * in a FCP_RSP.
 902          */
 903         if (fcport->retry_delay_timestamp == 0) {
 904                 /* retry delay not set */
 905         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 906                 fcport->retry_delay_timestamp = 0;
 907         else
 908                 goto qc24_target_busy;
 909
 910         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 911         if (!sp)
 912                 goto qc24_host_busy;
 913
 914         sp->u.scmd.cmd = cmd;
 915         sp->type = SRB_SCSI_CMD;
 916         atomic_set(&sp->ref_count, 1);
 917         CMD_SP(cmd) = (void *)sp;
 918         sp->free = qla2x00_sp_free_dma;
 919         sp->done = qla2x00_sp_compl;
 920
 921         rval = ha->isp_ops->start_scsi(sp);
 922         if (rval != QLA_SUCCESS) {
 923                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 924                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 925                 goto qc24_host_busy_free_sp;
 926         }
 927
 928         return 0;
 929
 930 qc24_host_busy_free_sp:
 931         qla2x00_sp_free_dma(sp);
 932
 933 qc24_host_busy:
 934         return SCSI_MLQUEUE_HOST_BUSY;
 935
 936 qc24_target_busy:
 937         return SCSI_MLQUEUE_TARGET_BUSY;
 938
 939 qc24_fail_command:
 940         cmd->scsi_done(cmd);
 941
 942         return 0;
 943 }
 944
 945 /* For MQ supported I/O */
 946 int
 947 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 948     struct qla_qpair *qpair)
 949 {
 950         scsi_qla_host_t *vha = shost_priv(host);
 951         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 952         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 953         struct qla_hw_data *ha = vha->hw;
 954         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 955         srb_t *sp;
 956         int rval;
 957
 958         rval = fc_remote_port_chkready(rport);
 959         if (rval) {
 960                 cmd->result = rval;
 961                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 962                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 963                     cmd, rval);
 964                 goto qc24_fail_command;
 965         }
 966
 967         if (!fcport) {
 968                 cmd->result = DID_NO_CONNECT << 16;
 969                 goto qc24_fail_command;
 970         }
 971
 972         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 973                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 974                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 975                         ql_dbg(ql_dbg_io, vha, 0x3077,
 976                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 977                             atomic_read(&fcport->state),
 978                             atomic_read(&base_vha->loop_state));
 979                         cmd->result = DID_NO_CONNECT << 16;
 980                         goto qc24_fail_command;
 981                 }
 982                 goto qc24_target_busy;
 983         }
 984
 985         /*
 986          * Return target busy if we've received a non-zero retry_delay_timer
 987          * in a FCP_RSP.
 988          */
 989         if (fcport->retry_delay_timestamp == 0) {
 990                 /* retry delay not set */
 991         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 992                 fcport->retry_delay_timestamp = 0;
 993         else
 994                 goto qc24_target_busy;
 995
 996         sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
 997         if (!sp)
 998                 goto qc24_host_busy;
 999
1000         sp->u.scmd.cmd = cmd;
1001         sp->type = SRB_SCSI_CMD;
1002         atomic_set(&sp->ref_count, 1);
1003         CMD_SP(cmd) = (void *)sp;
1004         sp->free = qla2xxx_qpair_sp_free_dma;
1005         sp->done = qla2xxx_qpair_sp_compl;
1006         sp->qpair = qpair;
1007
1008         rval = ha->isp_ops->start_scsi_mq(sp);
1009         if (rval != QLA_SUCCESS) {
1010                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1011                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1012                 if (rval == QLA_INTERFACE_ERROR)
1013                         goto qc24_fail_command;
1014                 goto qc24_host_busy_free_sp;
1015         }
1016
1017         return 0;
1018
1019 qc24_host_busy_free_sp:
1020         qla2xxx_qpair_sp_free_dma(sp);
1021
1022 qc24_host_busy:
1023         return SCSI_MLQUEUE_HOST_BUSY;
1024
1025 qc24_target_busy:
1026         return SCSI_MLQUEUE_TARGET_BUSY;
1027
1028 qc24_fail_command:
1029         cmd->scsi_done(cmd);
1030
1031         return 0;
1032 }
1033
1034 /*
1035  * qla2x00_eh_wait_on_command
1036  *    Waits for the command to be returned by the Firmware for some
1037  *    max time.
1038  *
1039  * Input:
1040  *    cmd = Scsi Command to wait on.
1041  *
1042  * Return:
1043  *    Not Found : 0
1044  *    Found : 1
1045  */
1046 static int
1047 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1048 {
1049 #define ABORT_POLLING_PERIOD    1000
1050 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1051         unsigned long wait_iter = ABORT_WAIT_ITER;
1052         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1053         struct qla_hw_data *ha = vha->hw;
1054         int ret = QLA_SUCCESS;
1055
1056         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1057                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1058                     "Return:eh_wait.\n");
1059                 return ret;
1060         }
1061
1062         while (CMD_SP(cmd) && wait_iter--) {
1063                 msleep(ABORT_POLLING_PERIOD);
1064         }
1065         if (CMD_SP(cmd))
1066                 ret = QLA_FUNCTION_FAILED;
1067
1068         return ret;
1069 }
1070
1071 /*
1072  * qla2x00_wait_for_hba_online
1073  *    Wait till the HBA is online after going through
1074  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1075  *    finally HBA is disabled ie marked offline
1076  *
1077  * Input:
1078  *     ha - pointer to host adapter structure
1079  *
1080  * Note:
1081  *    Does context switching-Release SPIN_LOCK
1082  *    (if any) before calling this routine.
1083  *
1084  * Return:
1085  *    Success (Adapter is online) : 0
1086  *    Failed  (Adapter is offline/disabled) : 1
1087  */
1088 int
1089 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1090 {
1091         int             return_status;
1092         unsigned long   wait_online;
1093         struct qla_hw_data *ha = vha->hw;
1094         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1095
1096         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1097         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1098             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1099             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1100             ha->dpc_active) && time_before(jiffies, wait_online)) {
1101
1102                 msleep(1000);
1103         }
1104         if (base_vha->flags.online)
1105                 return_status = QLA_SUCCESS;
1106         else
1107                 return_status = QLA_FUNCTION_FAILED;
1108
1109         return (return_status);
1110 }
1111
1112 static inline int test_fcport_count(scsi_qla_host_t *vha)
1113 {
1114         struct qla_hw_data *ha = vha->hw;
1115         unsigned long flags;
1116         int res;
1117
1118         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1119         ql_dbg(ql_dbg_init, vha, 0x00ec,
1120             "tgt %p, fcport_count=%d\n",
1121             vha, vha->fcport_count);
1122         res = (vha->fcport_count == 0);
1123         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1124
1125         return res;
1126 }
1127
1128 /*
1129  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1130  * it has dependency on UNLOADING flag to stop device discovery
1131  */
1132 static void
1133 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1134 {
1135         qla2x00_mark_all_devices_lost(vha, 0);
1136
1137         wait_event(vha->fcport_waitQ, test_fcport_count(vha));
1138 }
1139
1140 /*
1141  * qla2x00_wait_for_hba_ready
1142  * Wait till the HBA is ready before doing driver unload
1143  *
1144  * Input:
1145  *     ha - pointer to host adapter structure
1146  *
1147  * Note:
1148  *    Does context switching-Release SPIN_LOCK
1149  *    (if any) before calling this routine.
1150  *
1151  */
1152 static void
1153 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1154 {
1155         struct qla_hw_data *ha = vha->hw;
1156         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1157
1158         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1159                 ha->flags.mbox_busy) ||
1160                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1161                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1162                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1163                         break;
1164                 msleep(1000);
1165         }
1166 }
1167
1168 int
1169 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1170 {
1171         int             return_status;
1172         unsigned long   wait_reset;
1173         struct qla_hw_data *ha = vha->hw;
1174         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1175
1176         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1177         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1178             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1179             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1180             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1181
1182                 msleep(1000);
1183
1184                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1185                     ha->flags.chip_reset_done)
1186                         break;
1187         }
1188         if (ha->flags.chip_reset_done)
1189                 return_status = QLA_SUCCESS;
1190         else
1191                 return_status = QLA_FUNCTION_FAILED;
1192
1193         return return_status;
1194 }
1195
1196 static void
1197 sp_get(struct srb *sp)
1198 {
1199         atomic_inc(&sp->ref_count);
1200 }
1201
1202 #define ISP_REG_DISCONNECT 0xffffffffU
1203 /**************************************************************************
1204 * qla2x00_isp_reg_stat
1205 *
1206 * Description:
1207 *       Read the host status register of ISP before aborting the command.
1208 *
1209 * Input:
1210 *       ha = pointer to host adapter structure.
1211 *
1212 *
1213 * Returns:
1214 *       Either true or false.
1215 *
1216 * Note: Return true if there is register disconnect.
1217 **************************************************************************/
1218 static inline
1219 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1220 {
1221         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1222         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1223
1224         if (IS_P3P_TYPE(ha))
1225                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1226         else
1227                 return ((RD_REG_DWORD(&reg->host_status)) ==
1228                         ISP_REG_DISCONNECT);
1229 }
1230
1231 /**************************************************************************
1232 * qla2xxx_eh_abort
1233 *
1234 * Description:
1235 *    The abort function will abort the specified command.
1236 *
1237 * Input:
1238 *    cmd = Linux SCSI command packet to be aborted.
1239 *
1240 * Returns:
1241 *    Either SUCCESS or FAILED.
1242 *
1243 * Note:
1244 *    Only return FAILED if command not returned by firmware.
1245 **************************************************************************/
1246 static int
1247 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1248 {
1249         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1250         srb_t *sp;
1251         int ret;
1252         unsigned int id;
1253         uint64_t lun;
1254         unsigned long flags;
1255         int rval, wait = 0;
1256         struct qla_hw_data *ha = vha->hw;
1257
1258         if (qla2x00_isp_reg_stat(ha)) {
1259                 ql_log(ql_log_info, vha, 0x8042,
1260                     "PCI/Register disconnect, exiting.\n");
1261                 return FAILED;
1262         }
1263         if (!CMD_SP(cmd))
1264                 return SUCCESS;
1265
1266         ret = fc_block_scsi_eh(cmd);
1267         if (ret != 0)
1268                 return ret;
1269         ret = SUCCESS;
1270
1271         id = cmd->device->id;
1272         lun = cmd->device->lun;
1273
1274         spin_lock_irqsave(&ha->hardware_lock, flags);
1275         sp = (srb_t *) CMD_SP(cmd);
1276         if (!sp) {
1277                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1278                 return SUCCESS;
1279         }
1280
1281         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1282             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1283             vha->host_no, id, lun, sp, cmd, sp->handle);
1284
1285         /* Get a reference to the sp and drop the lock.*/
1286         sp_get(sp);
1287
1288         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1289         rval = ha->isp_ops->abort_command(sp);
1290         if (rval) {
1291                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1292                         ret = SUCCESS;
1293                 else
1294                         ret = FAILED;
1295
1296                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1297                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1298         } else {
1299                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1300                     "Abort command mbx success cmd=%p.\n", cmd);
1301                 wait = 1;
1302         }
1303
1304         spin_lock_irqsave(&ha->hardware_lock, flags);
1305         sp->done(sp, 0);
1306         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1307
1308         /* Did the command return during mailbox execution? */
1309         if (ret == FAILED && !CMD_SP(cmd))
1310                 ret = SUCCESS;
1311
1312         /* Wait for the command to be returned. */
1313         if (wait) {
1314                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1315                         ql_log(ql_log_warn, vha, 0x8006,
1316                             "Abort handler timed out cmd=%p.\n", cmd);
1317                         ret = FAILED;
1318                 }
1319         }
1320
1321         ql_log(ql_log_info, vha, 0x801c,
1322             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1323             vha->host_no, id, lun, wait, ret);
1324
1325         return ret;
1326 }
1327
1328 int
1329 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1330         uint64_t l, enum nexus_wait_type type)
1331 {
1332         int cnt, match, status;
1333         unsigned long flags;
1334         struct qla_hw_data *ha = vha->hw;
1335         struct req_que *req;
1336         srb_t *sp;
1337         struct scsi_cmnd *cmd;
1338
1339         status = QLA_SUCCESS;
1340
1341         spin_lock_irqsave(&ha->hardware_lock, flags);
1342         req = vha->req;
1343         for (cnt = 1; status == QLA_SUCCESS &&
1344                 cnt < req->num_outstanding_cmds; cnt++) {
1345                 sp = req->outstanding_cmds[cnt];
1346                 if (!sp)
1347                         continue;
1348                 if (sp->type != SRB_SCSI_CMD)
1349                         continue;
1350                 if (vha->vp_idx != sp->vha->vp_idx)
1351                         continue;
1352                 match = 0;
1353                 cmd = GET_CMD_SP(sp);
1354                 switch (type) {
1355                 case WAIT_HOST:
1356                         match = 1;
1357                         break;
1358                 case WAIT_TARGET:
1359                         match = cmd->device->id == t;
1360                         break;
1361                 case WAIT_LUN:
1362                         match = (cmd->device->id == t &&
1363                                 cmd->device->lun == l);
1364                         break;
1365                 }
1366                 if (!match)
1367                         continue;
1368
1369                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1370                 status = qla2x00_eh_wait_on_command(cmd);
1371                 spin_lock_irqsave(&ha->hardware_lock, flags);
1372         }
1373         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1374
1375         return status;
1376 }
1377
1378 static char *reset_errors[] = {
1379         "HBA not online",
1380         "HBA not ready",
1381         "Task management failed",
1382         "Waiting for command completions",
1383 };
1384
1385 static int
1386 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1387     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1388 {
1389         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1390         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1391         int err;
1392
1393         if (!fcport) {
1394                 return FAILED;
1395         }
1396
1397         err = fc_block_scsi_eh(cmd);
1398         if (err != 0)
1399                 return err;
1400
1401         ql_log(ql_log_info, vha, 0x8009,
1402             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1403             cmd->device->id, cmd->device->lun, cmd);
1404
1405         err = 0;
1406         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1407                 ql_log(ql_log_warn, vha, 0x800a,
1408                     "Wait for hba online failed for cmd=%p.\n", cmd);
1409                 goto eh_reset_failed;
1410         }
1411         err = 2;
1412         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1413                 != QLA_SUCCESS) {
1414                 ql_log(ql_log_warn, vha, 0x800c,
1415                     "do_reset failed for cmd=%p.\n", cmd);
1416                 goto eh_reset_failed;
1417         }
1418         err = 3;
1419         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1420             cmd->device->lun, type) != QLA_SUCCESS) {
1421                 ql_log(ql_log_warn, vha, 0x800d,
1422                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1423                 goto eh_reset_failed;
1424         }
1425
1426         ql_log(ql_log_info, vha, 0x800e,
1427             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1428             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1429
1430         return SUCCESS;
1431
1432 eh_reset_failed:
1433         ql_log(ql_log_info, vha, 0x800f,
1434             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1435             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1436             cmd);
1437         return FAILED;
1438 }
1439
1440 static int
1441 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1442 {
1443         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1444         struct qla_hw_data *ha = vha->hw;
1445
1446         if (qla2x00_isp_reg_stat(ha)) {
1447                 ql_log(ql_log_info, vha, 0x803e,
1448                     "PCI/Register disconnect, exiting.\n");
1449                 return FAILED;
1450         }
1451
1452         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1453             ha->isp_ops->lun_reset);
1454 }
1455
1456 static int
1457 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1458 {
1459         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1460         struct qla_hw_data *ha = vha->hw;
1461
1462         if (qla2x00_isp_reg_stat(ha)) {
1463                 ql_log(ql_log_info, vha, 0x803f,
1464                     "PCI/Register disconnect, exiting.\n");
1465                 return FAILED;
1466         }
1467
1468         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1469             ha->isp_ops->target_reset);
1470 }
1471
1472 /**************************************************************************
1473 * qla2xxx_eh_bus_reset
1474 *
1475 * Description:
1476 *    The bus reset function will reset the bus and abort any executing
1477 *    commands.
1478 *
1479 * Input:
1480 *    cmd = Linux SCSI command packet of the command that cause the
1481 *          bus reset.
1482 *
1483 * Returns:
1484 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1485 *
1486 **************************************************************************/
1487 static int
1488 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1489 {
1490         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1491         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1492         int ret = FAILED;
1493         unsigned int id;
1494         uint64_t lun;
1495         struct qla_hw_data *ha = vha->hw;
1496
1497         if (qla2x00_isp_reg_stat(ha)) {
1498                 ql_log(ql_log_info, vha, 0x8040,
1499                     "PCI/Register disconnect, exiting.\n");
1500                 return FAILED;
1501         }
1502
1503         id = cmd->device->id;
1504         lun = cmd->device->lun;
1505
1506         if (!fcport) {
1507                 return ret;
1508         }
1509
1510         ret = fc_block_scsi_eh(cmd);
1511         if (ret != 0)
1512                 return ret;
1513         ret = FAILED;
1514
1515         ql_log(ql_log_info, vha, 0x8012,
1516             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1517
1518         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1519                 ql_log(ql_log_fatal, vha, 0x8013,
1520                     "Wait for hba online failed board disabled.\n");
1521                 goto eh_bus_reset_done;
1522         }
1523
1524         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1525                 ret = SUCCESS;
1526
1527         if (ret == FAILED)
1528                 goto eh_bus_reset_done;
1529
1530         /* Flush outstanding commands. */
1531         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1532             QLA_SUCCESS) {
1533                 ql_log(ql_log_warn, vha, 0x8014,
1534                     "Wait for pending commands failed.\n");
1535                 ret = FAILED;
1536         }
1537
1538 eh_bus_reset_done:
1539         ql_log(ql_log_warn, vha, 0x802b,
1540             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1541             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1542
1543         return ret;
1544 }
1545
1546 /**************************************************************************
1547 * qla2xxx_eh_host_reset
1548 *
1549 * Description:
1550 *    The reset function will reset the Adapter.
1551 *
1552 * Input:
1553 *      cmd = Linux SCSI command packet of the command that cause the
1554 *            adapter reset.
1555 *
1556 * Returns:
1557 *      Either SUCCESS or FAILED.
1558 *
1559 * Note:
1560 **************************************************************************/
1561 static int
1562 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1563 {
1564         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1565         struct qla_hw_data *ha = vha->hw;
1566         int ret = FAILED;
1567         unsigned int id;
1568         uint64_t lun;
1569         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1570
1571         if (qla2x00_isp_reg_stat(ha)) {
1572                 ql_log(ql_log_info, vha, 0x8041,
1573                     "PCI/Register disconnect, exiting.\n");
1574                 schedule_work(&ha->board_disable);
1575                 return SUCCESS;
1576         }
1577
1578         id = cmd->device->id;
1579         lun = cmd->device->lun;
1580
1581         ql_log(ql_log_info, vha, 0x8018,
1582             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1583
1584         /*
1585          * No point in issuing another reset if one is active.  Also do not
1586          * attempt a reset if we are updating flash.
1587          */
1588         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1589                 goto eh_host_reset_lock;
1590
1591         if (vha != base_vha) {
1592                 if (qla2x00_vp_abort_isp(vha))
1593                         goto eh_host_reset_lock;
1594         } else {
1595                 if (IS_P3P_TYPE(vha->hw)) {
1596                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1597                                 /* Ctx reset success */
1598                                 ret = SUCCESS;
1599                                 goto eh_host_reset_lock;
1600                         }
1601                         /* fall thru if ctx reset failed */
1602                 }
1603                 if (ha->wq)
1604                         flush_workqueue(ha->wq);
1605
1606                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1607                 if (ha->isp_ops->abort_isp(base_vha)) {
1608                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1609                         /* failed. schedule dpc to try */
1610                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1611
1612                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1613                                 ql_log(ql_log_warn, vha, 0x802a,
1614                                     "wait for hba online failed.\n");
1615                                 goto eh_host_reset_lock;
1616                         }
1617                 }
1618                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1619         }
1620
1621         /* Waiting for command to be returned to OS.*/
1622         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1623                 QLA_SUCCESS)
1624                 ret = SUCCESS;
1625
1626 eh_host_reset_lock:
1627         ql_log(ql_log_info, vha, 0x8017,
1628             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1629             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1630
1631         return ret;
1632 }
1633
1634 /*
1635 * qla2x00_loop_reset
1636 *      Issue loop reset.
1637 *
1638 * Input:
1639 *      ha = adapter block pointer.
1640 *
1641 * Returns:
1642 *      0 = success
1643 */
1644 int
1645 qla2x00_loop_reset(scsi_qla_host_t *vha)
1646 {
1647         int ret;
1648         struct fc_port *fcport;
1649         struct qla_hw_data *ha = vha->hw;
1650
1651         if (IS_QLAFX00(ha)) {
1652                 return qlafx00_loop_reset(vha);
1653         }
1654
1655         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1656                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1657                         if (fcport->port_type != FCT_TARGET)
1658                                 continue;
1659
1660                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1661                         if (ret != QLA_SUCCESS) {
1662                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1663                                     "Bus Reset failed: Reset=%d "
1664                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1665                         }
1666                 }
1667         }
1668
1669
1670         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1671                 atomic_set(&vha->loop_state, LOOP_DOWN);
1672                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1673                 qla2x00_mark_all_devices_lost(vha, 0);
1674                 ret = qla2x00_full_login_lip(vha);
1675                 if (ret != QLA_SUCCESS) {
1676                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1677                             "full_login_lip=%d.\n", ret);
1678                 }
1679         }
1680
1681         if (ha->flags.enable_lip_reset) {
1682                 ret = qla2x00_lip_reset(vha);
1683                 if (ret != QLA_SUCCESS)
1684                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1685                             "lip_reset failed (%d).\n", ret);
1686         }
1687
1688         /* Issue marker command only when we are going to start the I/O */
1689         vha->marker_needed = 1;
1690
1691         return QLA_SUCCESS;
1692 }
1693
1694 void
1695 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1696 {
1697         int que, cnt, status;
1698         unsigned long flags;
1699         srb_t *sp;
1700         struct qla_hw_data *ha = vha->hw;
1701         struct req_que *req;
1702         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1703         struct qla_tgt_cmd *cmd;
1704         uint8_t trace = 0;
1705
1706         spin_lock_irqsave(&ha->hardware_lock, flags);
1707         for (que = 0; que < ha->max_req_queues; que++) {
1708                 req = ha->req_q_map[que];
1709                 if (!req)
1710                         continue;
1711                 if (!req->outstanding_cmds)
1712                         continue;
1713                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1714                         sp = req->outstanding_cmds[cnt];
1715                         if (sp) {
1716                                 req->outstanding_cmds[cnt] = NULL;
1717                                 if (sp->cmd_type == TYPE_SRB) {
1718                                         if ((sp->type == SRB_NVME_CMD) ||
1719                                             (sp->type == SRB_NVME_LS)) {
1720                                                 sp_get(sp);
1721                                                 spin_unlock_irqrestore(
1722                                                     &ha->hardware_lock, flags);
1723                                                 qla_nvme_abort(ha, sp);
1724                                                 spin_lock_irqsave(
1725                                                     &ha->hardware_lock, flags);
1726                                         } else if (GET_CMD_SP(sp) &&
1727                                             !ha->flags.eeh_busy &&
1728                                             (sp->type == SRB_SCSI_CMD)) {
1729                                                 /*
1730                                                  * Don't abort commands in
1731                                                  * adapter during EEH
1732                                                  * recovery as it's not
1733                                                  * accessible/responding.
1734                                                  *
1735                                                  * Get a reference to the sp
1736                                                  * and drop the lock. The
1737                                                  * reference ensures this
1738                                                  * sp->done() call and not the
1739                                                  * call in qla2xxx_eh_abort()
1740                                                  * ends the SCSI command (with
1741                                                  * result 'res').
1742                                                  */
1743                                                 sp_get(sp);
1744                                                 spin_unlock_irqrestore(
1745                                                     &ha->hardware_lock, flags);
1746                                                 status = qla2xxx_eh_abort(
1747                                                     GET_CMD_SP(sp));
1748                                                 spin_lock_irqsave(
1749                                                     &ha->hardware_lock, flags);
1750                                                 /*
1751                                                  * Get rid of extra reference
1752                                                  * if immediate exit from
1753                                                  * ql2xxx_eh_abort
1754                                                  */
1755                                                 if (status == FAILED &&
1756                                                     (qla2x00_isp_reg_stat(ha)))
1757                                                         atomic_dec(
1758                                                             &sp->ref_count);
1759                                         }
1760                                         sp->done(sp, res);
1761                                 } else {
1762                                         if (!vha->hw->tgt.tgt_ops || !tgt ||
1763                                             qla_ini_mode_enabled(vha)) {
1764                                                 if (!trace)
1765                                                         ql_dbg(ql_dbg_tgt_mgt,
1766                                                             vha, 0xf003,
1767                                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1768                                                             vha->dpc_flags);
1769                                                 continue;
1770                                         }
1771                                         cmd = (struct qla_tgt_cmd *)sp;
1772                                         qlt_abort_cmd_on_host_reset(cmd->vha,
1773                                             cmd);
1774                                 }
1775                         }
1776                 }
1777         }
1778         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1779 }
1780
1781 static int
1782 qla2xxx_slave_alloc(struct scsi_device *sdev)
1783 {
1784         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1785
1786         if (!rport || fc_remote_port_chkready(rport))
1787                 return -ENXIO;
1788
1789         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1790
1791         return 0;
1792 }
1793
1794 static int
1795 qla2xxx_slave_configure(struct scsi_device *sdev)
1796 {
1797         scsi_qla_host_t *vha = shost_priv(sdev->host);
1798         struct req_que *req = vha->req;
1799
1800         if (IS_T10_PI_CAPABLE(vha->hw))
1801                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1802
1803         scsi_change_queue_depth(sdev, req->max_q_depth);
1804         return 0;
1805 }
1806
1807 static void
1808 qla2xxx_slave_destroy(struct scsi_device *sdev)
1809 {
1810         sdev->hostdata = NULL;
1811 }
1812
1813 /**
1814  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1815  * @ha: HA context
1816  *
1817  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1818  * supported addressing method.
1819  */
1820 static void
1821 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1822 {
1823         /* Assume a 32bit DMA mask. */
1824         ha->flags.enable_64bit_addressing = 0;
1825
1826         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1827                 /* Any upper-dword bits set? */
1828                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1829                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1830                         /* Ok, a 64bit DMA mask is applicable. */
1831                         ha->flags.enable_64bit_addressing = 1;
1832                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1833                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1834                         return;
1835                 }
1836         }
1837
1838         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1839         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1840 }
1841
1842 static void
1843 qla2x00_enable_intrs(struct qla_hw_data *ha)
1844 {
1845         unsigned long flags = 0;
1846         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1847
1848         spin_lock_irqsave(&ha->hardware_lock, flags);
1849         ha->interrupts_on = 1;
1850         /* enable risc and host interrupts */
1851         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1852         RD_REG_WORD(&reg->ictrl);
1853         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1854
1855 }
1856
1857 static void
1858 qla2x00_disable_intrs(struct qla_hw_data *ha)
1859 {
1860         unsigned long flags = 0;
1861         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1862
1863         spin_lock_irqsave(&ha->hardware_lock, flags);
1864         ha->interrupts_on = 0;
1865         /* disable risc and host interrupts */
1866         WRT_REG_WORD(&reg->ictrl, 0);
1867         RD_REG_WORD(&reg->ictrl);
1868         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1869 }
1870
1871 static void
1872 qla24xx_enable_intrs(struct qla_hw_data *ha)
1873 {
1874         unsigned long flags = 0;
1875         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1876
1877         spin_lock_irqsave(&ha->hardware_lock, flags);
1878         ha->interrupts_on = 1;
1879         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1880         RD_REG_DWORD(&reg->ictrl);
1881         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1882 }
1883
1884 static void
1885 qla24xx_disable_intrs(struct qla_hw_data *ha)
1886 {
1887         unsigned long flags = 0;
1888         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1889
1890         if (IS_NOPOLLING_TYPE(ha))
1891                 return;
1892         spin_lock_irqsave(&ha->hardware_lock, flags);
1893         ha->interrupts_on = 0;
1894         WRT_REG_DWORD(&reg->ictrl, 0);
1895         RD_REG_DWORD(&reg->ictrl);
1896         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1897 }
1898
1899 static int
1900 qla2x00_iospace_config(struct qla_hw_data *ha)
1901 {
1902         resource_size_t pio;
1903         uint16_t msix;
1904
1905         if (pci_request_selected_regions(ha->pdev, ha->bars,
1906             QLA2XXX_DRIVER_NAME)) {
1907                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1908                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1909                     pci_name(ha->pdev));
1910                 goto iospace_error_exit;
1911         }
1912         if (!(ha->bars & 1))
1913                 goto skip_pio;
1914
1915         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1916         pio = pci_resource_start(ha->pdev, 0);
1917         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1918                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1919                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1920                             "Invalid pci I/O region size (%s).\n",
1921                             pci_name(ha->pdev));
1922                         pio = 0;
1923                 }
1924         } else {
1925                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1926                     "Region #0 no a PIO resource (%s).\n",
1927                     pci_name(ha->pdev));
1928                 pio = 0;
1929         }
1930         ha->pio_address = pio;
1931         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1932             "PIO address=%llu.\n",
1933             (unsigned long long)ha->pio_address);
1934
1935 skip_pio:
1936         /* Use MMIO operations for all accesses. */
1937         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1938                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1939                     "Region #1 not an MMIO resource (%s), aborting.\n",
1940                     pci_name(ha->pdev));
1941                 goto iospace_error_exit;
1942         }
1943         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1944                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1945                     "Invalid PCI mem region size (%s), aborting.\n",
1946                     pci_name(ha->pdev));
1947                 goto iospace_error_exit;
1948         }
1949
1950         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1951         if (!ha->iobase) {
1952                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1953                     "Cannot remap MMIO (%s), aborting.\n",
1954                     pci_name(ha->pdev));
1955                 goto iospace_error_exit;
1956         }
1957
1958         /* Determine queue resources */
1959         ha->max_req_queues = ha->max_rsp_queues = 1;
1960         ha->msix_count = QLA_BASE_VECTORS;
1961         if (!ql2xmqsupport || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1962                 goto mqiobase_exit;
1963
1964         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1965                         pci_resource_len(ha->pdev, 3));
1966         if (ha->mqiobase) {
1967                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1968                     "MQIO Base=%p.\n", ha->mqiobase);
1969                 /* Read MSIX vector size of the board */
1970                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1971                 ha->msix_count = msix + 1;
1972                 /* Max queues are bounded by available msix vectors */
1973                 /* MB interrupt uses 1 vector */
1974                 ha->max_req_queues = ha->msix_count - 1;
1975                 ha->max_rsp_queues = ha->max_req_queues;
1976                 /* Queue pairs is the max value minus the base queue pair */
1977                 ha->max_qpairs = ha->max_rsp_queues - 1;
1978                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1979                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
1980
1981                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1982                     "MSI-X vector count: %d.\n", ha->msix_count);
1983         } else
1984                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1985                     "BAR 3 not enabled.\n");
1986
1987 mqiobase_exit:
1988         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1989             "MSIX Count: %d.\n", ha->msix_count);
1990         return (0);
1991
1992 iospace_error_exit:
1993         return (-ENOMEM);
1994 }
1995
1996
1997 static int
1998 qla83xx_iospace_config(struct qla_hw_data *ha)
1999 {
2000         uint16_t msix;
2001
2002         if (pci_request_selected_regions(ha->pdev, ha->bars,
2003             QLA2XXX_DRIVER_NAME)) {
2004                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2005                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2006                     pci_name(ha->pdev));
2007
2008                 goto iospace_error_exit;
2009         }
2010
2011         /* Use MMIO operations for all accesses. */
2012         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2013                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2014                     "Invalid pci I/O region size (%s).\n",
2015                     pci_name(ha->pdev));
2016                 goto iospace_error_exit;
2017         }
2018         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2019                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2020                     "Invalid PCI mem region size (%s), aborting\n",
2021                         pci_name(ha->pdev));
2022                 goto iospace_error_exit;
2023         }
2024
2025         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2026         if (!ha->iobase) {
2027                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2028                     "Cannot remap MMIO (%s), aborting.\n",
2029                     pci_name(ha->pdev));
2030                 goto iospace_error_exit;
2031         }
2032
2033         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2034         /* 83XX 26XX always use MQ type access for queues
2035          * - mbar 2, a.k.a region 4 */
2036         ha->max_req_queues = ha->max_rsp_queues = 1;
2037         ha->msix_count = QLA_BASE_VECTORS;
2038         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2039                         pci_resource_len(ha->pdev, 4));
2040
2041         if (!ha->mqiobase) {
2042                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2043                     "BAR2/region4 not enabled\n");
2044                 goto mqiobase_exit;
2045         }
2046
2047         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2048                         pci_resource_len(ha->pdev, 2));
2049         if (ha->msixbase) {
2050                 /* Read MSIX vector size of the board */
2051                 pci_read_config_word(ha->pdev,
2052                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2053                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2054                 /*
2055                  * By default, driver uses at least two msix vectors
2056                  * (default & rspq)
2057                  */
2058                 if (ql2xmqsupport) {
2059                         /* MB interrupt uses 1 vector */
2060                         ha->max_req_queues = ha->msix_count - 1;
2061
2062                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2063                         if (QLA_TGT_MODE_ENABLED())
2064                                 ha->max_req_queues--;
2065
2066                         ha->max_rsp_queues = ha->max_req_queues;
2067
2068                         /* Queue pairs is the max value minus
2069                          * the base queue pair */
2070                         ha->max_qpairs = ha->max_req_queues - 1;
2071                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2072                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2073                 }
2074                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2075                     "MSI-X vector count: %d.\n", ha->msix_count);
2076         } else
2077                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2078                     "BAR 1 not enabled.\n");
2079
2080 mqiobase_exit:
2081         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2082             "MSIX Count: %d.\n", ha->msix_count);
2083         return 0;
2084
2085 iospace_error_exit:
2086         return -ENOMEM;
2087 }
2088
2089 static struct isp_operations qla2100_isp_ops = {
2090         .pci_config             = qla2100_pci_config,
2091         .reset_chip             = qla2x00_reset_chip,
2092         .chip_diag              = qla2x00_chip_diag,
2093         .config_rings           = qla2x00_config_rings,
2094         .reset_adapter          = qla2x00_reset_adapter,
2095         .nvram_config           = qla2x00_nvram_config,
2096         .update_fw_options      = qla2x00_update_fw_options,
2097         .load_risc              = qla2x00_load_risc,
2098         .pci_info_str           = qla2x00_pci_info_str,
2099         .fw_version_str         = qla2x00_fw_version_str,
2100         .intr_handler           = qla2100_intr_handler,
2101         .enable_intrs           = qla2x00_enable_intrs,
2102         .disable_intrs          = qla2x00_disable_intrs,
2103         .abort_command          = qla2x00_abort_command,
2104         .target_reset           = qla2x00_abort_target,
2105         .lun_reset              = qla2x00_lun_reset,
2106         .fabric_login           = qla2x00_login_fabric,
2107         .fabric_logout          = qla2x00_fabric_logout,
2108         .calc_req_entries       = qla2x00_calc_iocbs_32,
2109         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2110         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2111         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2112         .read_nvram             = qla2x00_read_nvram_data,
2113         .write_nvram            = qla2x00_write_nvram_data,
2114         .fw_dump                = qla2100_fw_dump,
2115         .beacon_on              = NULL,
2116         .beacon_off             = NULL,
2117         .beacon_blink           = NULL,
2118         .read_optrom            = qla2x00_read_optrom_data,
2119         .write_optrom           = qla2x00_write_optrom_data,
2120         .get_flash_version      = qla2x00_get_flash_version,
2121         .start_scsi             = qla2x00_start_scsi,
2122         .start_scsi_mq          = NULL,
2123         .abort_isp              = qla2x00_abort_isp,
2124         .iospace_config         = qla2x00_iospace_config,
2125         .initialize_adapter     = qla2x00_initialize_adapter,
2126 };
2127
2128 static struct isp_operations qla2300_isp_ops = {
2129         .pci_config             = qla2300_pci_config,
2130         .reset_chip             = qla2x00_reset_chip,
2131         .chip_diag              = qla2x00_chip_diag,
2132         .config_rings           = qla2x00_config_rings,
2133         .reset_adapter          = qla2x00_reset_adapter,
2134         .nvram_config           = qla2x00_nvram_config,
2135         .update_fw_options      = qla2x00_update_fw_options,
2136         .load_risc              = qla2x00_load_risc,
2137         .pci_info_str           = qla2x00_pci_info_str,
2138         .fw_version_str         = qla2x00_fw_version_str,
2139         .intr_handler           = qla2300_intr_handler,
2140         .enable_intrs           = qla2x00_enable_intrs,
2141         .disable_intrs          = qla2x00_disable_intrs,
2142         .abort_command          = qla2x00_abort_command,
2143         .target_reset           = qla2x00_abort_target,
2144         .lun_reset              = qla2x00_lun_reset,
2145         .fabric_login           = qla2x00_login_fabric,
2146         .fabric_logout          = qla2x00_fabric_logout,
2147         .calc_req_entries       = qla2x00_calc_iocbs_32,
2148         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2149         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2150         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2151         .read_nvram             = qla2x00_read_nvram_data,
2152         .write_nvram            = qla2x00_write_nvram_data,
2153         .fw_dump                = qla2300_fw_dump,
2154         .beacon_on              = qla2x00_beacon_on,
2155         .beacon_off             = qla2x00_beacon_off,
2156         .beacon_blink           = qla2x00_beacon_blink,
2157         .read_optrom            = qla2x00_read_optrom_data,
2158         .write_optrom           = qla2x00_write_optrom_data,
2159         .get_flash_version      = qla2x00_get_flash_version,
2160         .start_scsi             = qla2x00_start_scsi,
2161         .start_scsi_mq          = NULL,
2162         .abort_isp              = qla2x00_abort_isp,
2163         .iospace_config         = qla2x00_iospace_config,
2164         .initialize_adapter     = qla2x00_initialize_adapter,
2165 };
2166
2167 static struct isp_operations qla24xx_isp_ops = {
2168         .pci_config             = qla24xx_pci_config,
2169         .reset_chip             = qla24xx_reset_chip,
2170         .chip_diag              = qla24xx_chip_diag,
2171         .config_rings           = qla24xx_config_rings,
2172         .reset_adapter          = qla24xx_reset_adapter,
2173         .nvram_config           = qla24xx_nvram_config,
2174         .update_fw_options      = qla24xx_update_fw_options,
2175         .load_risc              = qla24xx_load_risc,
2176         .pci_info_str           = qla24xx_pci_info_str,
2177         .fw_version_str         = qla24xx_fw_version_str,
2178         .intr_handler           = qla24xx_intr_handler,
2179         .enable_intrs           = qla24xx_enable_intrs,
2180         .disable_intrs          = qla24xx_disable_intrs,
2181         .abort_command          = qla24xx_abort_command,
2182         .target_reset           = qla24xx_abort_target,
2183         .lun_reset              = qla24xx_lun_reset,
2184         .fabric_login           = qla24xx_login_fabric,
2185         .fabric_logout          = qla24xx_fabric_logout,
2186         .calc_req_entries       = NULL,
2187         .build_iocbs            = NULL,
2188         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2189         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2190         .read_nvram             = qla24xx_read_nvram_data,
2191         .write_nvram            = qla24xx_write_nvram_data,
2192         .fw_dump                = qla24xx_fw_dump,
2193         .beacon_on              = qla24xx_beacon_on,
2194         .beacon_off             = qla24xx_beacon_off,
2195         .beacon_blink           = qla24xx_beacon_blink,
2196         .read_optrom            = qla24xx_read_optrom_data,
2197         .write_optrom           = qla24xx_write_optrom_data,
2198         .get_flash_version      = qla24xx_get_flash_version,
2199         .start_scsi             = qla24xx_start_scsi,
2200         .start_scsi_mq          = NULL,
2201         .abort_isp              = qla2x00_abort_isp,
2202         .iospace_config         = qla2x00_iospace_config,
2203         .initialize_adapter     = qla2x00_initialize_adapter,
2204 };
2205
2206 static struct isp_operations qla25xx_isp_ops = {
2207         .pci_config             = qla25xx_pci_config,
2208         .reset_chip             = qla24xx_reset_chip,
2209         .chip_diag              = qla24xx_chip_diag,
2210         .config_rings           = qla24xx_config_rings,
2211         .reset_adapter          = qla24xx_reset_adapter,
2212         .nvram_config           = qla24xx_nvram_config,
2213         .update_fw_options      = qla24xx_update_fw_options,
2214         .load_risc              = qla24xx_load_risc,
2215         .pci_info_str           = qla24xx_pci_info_str,
2216         .fw_version_str         = qla24xx_fw_version_str,
2217         .intr_handler           = qla24xx_intr_handler,
2218         .enable_intrs           = qla24xx_enable_intrs,
2219         .disable_intrs          = qla24xx_disable_intrs,
2220         .abort_command          = qla24xx_abort_command,
2221         .target_reset           = qla24xx_abort_target,
2222         .lun_reset              = qla24xx_lun_reset,
2223         .fabric_login           = qla24xx_login_fabric,
2224         .fabric_logout          = qla24xx_fabric_logout,
2225         .calc_req_entries       = NULL,
2226         .build_iocbs            = NULL,
2227         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2228         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2229         .read_nvram             = qla25xx_read_nvram_data,
2230         .write_nvram            = qla25xx_write_nvram_data,
2231         .fw_dump                = qla25xx_fw_dump,
2232         .beacon_on              = qla24xx_beacon_on,
2233         .beacon_off             = qla24xx_beacon_off,
2234         .beacon_blink           = qla24xx_beacon_blink,
2235         .read_optrom            = qla25xx_read_optrom_data,
2236         .write_optrom           = qla24xx_write_optrom_data,
2237         .get_flash_version      = qla24xx_get_flash_version,
2238         .start_scsi             = qla24xx_dif_start_scsi,
2239         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2240         .abort_isp              = qla2x00_abort_isp,
2241         .iospace_config         = qla2x00_iospace_config,
2242         .initialize_adapter     = qla2x00_initialize_adapter,
2243 };
2244
2245 static struct isp_operations qla81xx_isp_ops = {
2246         .pci_config             = qla25xx_pci_config,
2247         .reset_chip             = qla24xx_reset_chip,
2248         .chip_diag              = qla24xx_chip_diag,
2249         .config_rings           = qla24xx_config_rings,
2250         .reset_adapter          = qla24xx_reset_adapter,
2251         .nvram_config           = qla81xx_nvram_config,
2252         .update_fw_options      = qla81xx_update_fw_options,
2253         .load_risc              = qla81xx_load_risc,
2254         .pci_info_str           = qla24xx_pci_info_str,
2255         .fw_version_str         = qla24xx_fw_version_str,
2256         .intr_handler           = qla24xx_intr_handler,
2257         .enable_intrs           = qla24xx_enable_intrs,
2258         .disable_intrs          = qla24xx_disable_intrs,
2259         .abort_command          = qla24xx_abort_command,
2260         .target_reset           = qla24xx_abort_target,
2261         .lun_reset              = qla24xx_lun_reset,
2262         .fabric_login           = qla24xx_login_fabric,
2263         .fabric_logout          = qla24xx_fabric_logout,
2264         .calc_req_entries       = NULL,
2265         .build_iocbs            = NULL,
2266         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2267         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2268         .read_nvram             = NULL,
2269         .write_nvram            = NULL,
2270         .fw_dump                = qla81xx_fw_dump,
2271         .beacon_on              = qla24xx_beacon_on,
2272         .beacon_off             = qla24xx_beacon_off,
2273         .beacon_blink           = qla83xx_beacon_blink,
2274         .read_optrom            = qla25xx_read_optrom_data,
2275         .write_optrom           = qla24xx_write_optrom_data,
2276         .get_flash_version      = qla24xx_get_flash_version,
2277         .start_scsi             = qla24xx_dif_start_scsi,
2278         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2279         .abort_isp              = qla2x00_abort_isp,
2280         .iospace_config         = qla2x00_iospace_config,
2281         .initialize_adapter     = qla2x00_initialize_adapter,
2282 };
2283
2284 static struct isp_operations qla82xx_isp_ops = {
2285         .pci_config             = qla82xx_pci_config,
2286         .reset_chip             = qla82xx_reset_chip,
2287         .chip_diag              = qla24xx_chip_diag,
2288         .config_rings           = qla82xx_config_rings,
2289         .reset_adapter          = qla24xx_reset_adapter,
2290         .nvram_config           = qla81xx_nvram_config,
2291         .update_fw_options      = qla24xx_update_fw_options,
2292         .load_risc              = qla82xx_load_risc,
2293         .pci_info_str           = qla24xx_pci_info_str,
2294         .fw_version_str         = qla24xx_fw_version_str,
2295         .intr_handler           = qla82xx_intr_handler,
2296         .enable_intrs           = qla82xx_enable_intrs,
2297         .disable_intrs          = qla82xx_disable_intrs,
2298         .abort_command          = qla24xx_abort_command,
2299         .target_reset           = qla24xx_abort_target,
2300         .lun_reset              = qla24xx_lun_reset,
2301         .fabric_login           = qla24xx_login_fabric,
2302         .fabric_logout          = qla24xx_fabric_logout,
2303         .calc_req_entries       = NULL,
2304         .build_iocbs            = NULL,
2305         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2306         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2307         .read_nvram             = qla24xx_read_nvram_data,
2308         .write_nvram            = qla24xx_write_nvram_data,
2309         .fw_dump                = qla82xx_fw_dump,
2310         .beacon_on              = qla82xx_beacon_on,
2311         .beacon_off             = qla82xx_beacon_off,
2312         .beacon_blink           = NULL,
2313         .read_optrom            = qla82xx_read_optrom_data,
2314         .write_optrom           = qla82xx_write_optrom_data,
2315         .get_flash_version      = qla82xx_get_flash_version,
2316         .start_scsi             = qla82xx_start_scsi,
2317         .start_scsi_mq          = NULL,
2318         .abort_isp              = qla82xx_abort_isp,
2319         .iospace_config         = qla82xx_iospace_config,
2320         .initialize_adapter     = qla2x00_initialize_adapter,
2321 };
2322
2323 static struct isp_operations qla8044_isp_ops = {
2324         .pci_config             = qla82xx_pci_config,
2325         .reset_chip             = qla82xx_reset_chip,
2326         .chip_diag              = qla24xx_chip_diag,
2327         .config_rings           = qla82xx_config_rings,
2328         .reset_adapter          = qla24xx_reset_adapter,
2329         .nvram_config           = qla81xx_nvram_config,
2330         .update_fw_options      = qla24xx_update_fw_options,
2331         .load_risc              = qla82xx_load_risc,
2332         .pci_info_str           = qla24xx_pci_info_str,
2333         .fw_version_str         = qla24xx_fw_version_str,
2334         .intr_handler           = qla8044_intr_handler,
2335         .enable_intrs           = qla82xx_enable_intrs,
2336         .disable_intrs          = qla82xx_disable_intrs,
2337         .abort_command          = qla24xx_abort_command,
2338         .target_reset           = qla24xx_abort_target,
2339         .lun_reset              = qla24xx_lun_reset,
2340         .fabric_login           = qla24xx_login_fabric,
2341         .fabric_logout          = qla24xx_fabric_logout,
2342         .calc_req_entries       = NULL,
2343         .build_iocbs            = NULL,
2344         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2345         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2346         .read_nvram             = NULL,
2347         .write_nvram            = NULL,
2348         .fw_dump                = qla8044_fw_dump,
2349         .beacon_on              = qla82xx_beacon_on,
2350         .beacon_off             = qla82xx_beacon_off,
2351         .beacon_blink           = NULL,
2352         .read_optrom            = qla8044_read_optrom_data,
2353         .write_optrom           = qla8044_write_optrom_data,
2354         .get_flash_version      = qla82xx_get_flash_version,
2355         .start_scsi             = qla82xx_start_scsi,
2356         .start_scsi_mq          = NULL,
2357         .abort_isp              = qla8044_abort_isp,
2358         .iospace_config         = qla82xx_iospace_config,
2359         .initialize_adapter     = qla2x00_initialize_adapter,
2360 };
2361
2362 static struct isp_operations qla83xx_isp_ops = {
2363         .pci_config             = qla25xx_pci_config,
2364         .reset_chip             = qla24xx_reset_chip,
2365         .chip_diag              = qla24xx_chip_diag,
2366         .config_rings           = qla24xx_config_rings,
2367         .reset_adapter          = qla24xx_reset_adapter,
2368         .nvram_config           = qla81xx_nvram_config,
2369         .update_fw_options      = qla81xx_update_fw_options,
2370         .load_risc              = qla81xx_load_risc,
2371         .pci_info_str           = qla24xx_pci_info_str,
2372         .fw_version_str         = qla24xx_fw_version_str,
2373         .intr_handler           = qla24xx_intr_handler,
2374         .enable_intrs           = qla24xx_enable_intrs,
2375         .disable_intrs          = qla24xx_disable_intrs,
2376         .abort_command          = qla24xx_abort_command,
2377         .target_reset           = qla24xx_abort_target,
2378         .lun_reset              = qla24xx_lun_reset,
2379         .fabric_login           = qla24xx_login_fabric,
2380         .fabric_logout          = qla24xx_fabric_logout,
2381         .calc_req_entries       = NULL,
2382         .build_iocbs            = NULL,
2383         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2384         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2385         .read_nvram             = NULL,
2386         .write_nvram            = NULL,
2387         .fw_dump                = qla83xx_fw_dump,
2388         .beacon_on              = qla24xx_beacon_on,
2389         .beacon_off             = qla24xx_beacon_off,
2390         .beacon_blink           = qla83xx_beacon_blink,
2391         .read_optrom            = qla25xx_read_optrom_data,
2392         .write_optrom           = qla24xx_write_optrom_data,
2393         .get_flash_version      = qla24xx_get_flash_version,
2394         .start_scsi             = qla24xx_dif_start_scsi,
2395         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2396         .abort_isp              = qla2x00_abort_isp,
2397         .iospace_config         = qla83xx_iospace_config,
2398         .initialize_adapter     = qla2x00_initialize_adapter,
2399 };
2400
2401 static struct isp_operations qlafx00_isp_ops = {
2402         .pci_config             = qlafx00_pci_config,
2403         .reset_chip             = qlafx00_soft_reset,
2404         .chip_diag              = qlafx00_chip_diag,
2405         .config_rings           = qlafx00_config_rings,
2406         .reset_adapter          = qlafx00_soft_reset,
2407         .nvram_config           = NULL,
2408         .update_fw_options      = NULL,
2409         .load_risc              = NULL,
2410         .pci_info_str           = qlafx00_pci_info_str,
2411         .fw_version_str         = qlafx00_fw_version_str,
2412         .intr_handler           = qlafx00_intr_handler,
2413         .enable_intrs           = qlafx00_enable_intrs,
2414         .disable_intrs          = qlafx00_disable_intrs,
2415         .abort_command          = qla24xx_async_abort_command,
2416         .target_reset           = qlafx00_abort_target,
2417         .lun_reset              = qlafx00_lun_reset,
2418         .fabric_login           = NULL,
2419         .fabric_logout          = NULL,
2420         .calc_req_entries       = NULL,
2421         .build_iocbs            = NULL,
2422         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2423         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2424         .read_nvram             = qla24xx_read_nvram_data,
2425         .write_nvram            = qla24xx_write_nvram_data,
2426         .fw_dump                = NULL,
2427         .beacon_on              = qla24xx_beacon_on,
2428         .beacon_off             = qla24xx_beacon_off,
2429         .beacon_blink           = NULL,
2430         .read_optrom            = qla24xx_read_optrom_data,
2431         .write_optrom           = qla24xx_write_optrom_data,
2432         .get_flash_version      = qla24xx_get_flash_version,
2433         .start_scsi             = qlafx00_start_scsi,
2434         .start_scsi_mq          = NULL,
2435         .abort_isp              = qlafx00_abort_isp,
2436         .iospace_config         = qlafx00_iospace_config,
2437         .initialize_adapter     = qlafx00_initialize_adapter,
2438 };
2439
2440 static struct isp_operations qla27xx_isp_ops = {
2441         .pci_config             = qla25xx_pci_config,
2442         .reset_chip             = qla24xx_reset_chip,
2443         .chip_diag              = qla24xx_chip_diag,
2444         .config_rings           = qla24xx_config_rings,
2445         .reset_adapter          = qla24xx_reset_adapter,
2446         .nvram_config           = qla81xx_nvram_config,
2447         .update_fw_options      = qla81xx_update_fw_options,
2448         .load_risc              = qla81xx_load_risc,
2449         .pci_info_str           = qla24xx_pci_info_str,
2450         .fw_version_str         = qla24xx_fw_version_str,
2451         .intr_handler           = qla24xx_intr_handler,
2452         .enable_intrs           = qla24xx_enable_intrs,
2453         .disable_intrs          = qla24xx_disable_intrs,
2454         .abort_command          = qla24xx_abort_command,
2455         .target_reset           = qla24xx_abort_target,
2456         .lun_reset              = qla24xx_lun_reset,
2457         .fabric_login           = qla24xx_login_fabric,
2458         .fabric_logout          = qla24xx_fabric_logout,
2459         .calc_req_entries       = NULL,
2460         .build_iocbs            = NULL,
2461         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2462         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2463         .read_nvram             = NULL,
2464         .write_nvram            = NULL,
2465         .fw_dump                = qla27xx_fwdump,
2466         .beacon_on              = qla24xx_beacon_on,
2467         .beacon_off             = qla24xx_beacon_off,
2468         .beacon_blink           = qla83xx_beacon_blink,
2469         .read_optrom            = qla25xx_read_optrom_data,
2470         .write_optrom           = qla24xx_write_optrom_data,
2471         .get_flash_version      = qla24xx_get_flash_version,
2472         .start_scsi             = qla24xx_dif_start_scsi,
2473         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2474         .abort_isp              = qla2x00_abort_isp,
2475         .iospace_config         = qla83xx_iospace_config,
2476         .initialize_adapter     = qla2x00_initialize_adapter,
2477 };
2478
2479 static inline void
2480 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2481 {
2482         ha->device_type = DT_EXTENDED_IDS;
2483         switch (ha->pdev->device) {
2484         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2485                 ha->isp_type |= DT_ISP2100;
2486                 ha->device_type &= ~DT_EXTENDED_IDS;
2487                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2488                 break;
2489         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2490                 ha->isp_type |= DT_ISP2200;
2491                 ha->device_type &= ~DT_EXTENDED_IDS;
2492                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2493                 break;
2494         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2495                 ha->isp_type |= DT_ISP2300;
2496                 ha->device_type |= DT_ZIO_SUPPORTED;
2497                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2498                 break;
2499         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2500                 ha->isp_type |= DT_ISP2312;
2501                 ha->device_type |= DT_ZIO_SUPPORTED;
2502                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2503                 break;
2504         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2505                 ha->isp_type |= DT_ISP2322;
2506                 ha->device_type |= DT_ZIO_SUPPORTED;
2507                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2508                     ha->pdev->subsystem_device == 0x0170)
2509                         ha->device_type |= DT_OEM_001;
2510                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2511                 break;
2512         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2513                 ha->isp_type |= DT_ISP6312;
2514                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2515                 break;
2516         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2517                 ha->isp_type |= DT_ISP6322;
2518                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2519                 break;
2520         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2521                 ha->isp_type |= DT_ISP2422;
2522                 ha->device_type |= DT_ZIO_SUPPORTED;
2523                 ha->device_type |= DT_FWI2;
2524                 ha->device_type |= DT_IIDMA;
2525                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2526                 break;
2527         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2528                 ha->isp_type |= DT_ISP2432;
2529                 ha->device_type |= DT_ZIO_SUPPORTED;
2530                 ha->device_type |= DT_FWI2;
2531                 ha->device_type |= DT_IIDMA;
2532                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2533                 break;
2534         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2535                 ha->isp_type |= DT_ISP8432;
2536                 ha->device_type |= DT_ZIO_SUPPORTED;
2537                 ha->device_type |= DT_FWI2;
2538                 ha->device_type |= DT_IIDMA;
2539                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2540                 break;
2541         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2542                 ha->isp_type |= DT_ISP5422;
2543                 ha->device_type |= DT_FWI2;
2544                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2545                 break;
2546         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2547                 ha->isp_type |= DT_ISP5432;
2548                 ha->device_type |= DT_FWI2;
2549                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2550                 break;
2551         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2552                 ha->isp_type |= DT_ISP2532;
2553                 ha->device_type |= DT_ZIO_SUPPORTED;
2554                 ha->device_type |= DT_FWI2;
2555                 ha->device_type |= DT_IIDMA;
2556                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2557                 break;
2558         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2559                 ha->isp_type |= DT_ISP8001;
2560                 ha->device_type |= DT_ZIO_SUPPORTED;
2561                 ha->device_type |= DT_FWI2;
2562                 ha->device_type |= DT_IIDMA;
2563                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2564                 break;
2565         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2566                 ha->isp_type |= DT_ISP8021;
2567                 ha->device_type |= DT_ZIO_SUPPORTED;
2568                 ha->device_type |= DT_FWI2;
2569                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2570                 /* Initialize 82XX ISP flags */
2571                 qla82xx_init_flags(ha);
2572                 break;
2573          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2574                 ha->isp_type |= DT_ISP8044;
2575                 ha->device_type |= DT_ZIO_SUPPORTED;
2576                 ha->device_type |= DT_FWI2;
2577                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2578                 /* Initialize 82XX ISP flags */
2579                 qla82xx_init_flags(ha);
2580                 break;
2581         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2582                 ha->isp_type |= DT_ISP2031;
2583                 ha->device_type |= DT_ZIO_SUPPORTED;
2584                 ha->device_type |= DT_FWI2;
2585                 ha->device_type |= DT_IIDMA;
2586                 ha->device_type |= DT_T10_PI;
2587                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2588                 break;
2589         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2590                 ha->isp_type |= DT_ISP8031;
2591                 ha->device_type |= DT_ZIO_SUPPORTED;
2592                 ha->device_type |= DT_FWI2;
2593                 ha->device_type |= DT_IIDMA;
2594                 ha->device_type |= DT_T10_PI;
2595                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2596                 break;
2597         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2598                 ha->isp_type |= DT_ISPFX00;
2599                 break;
2600         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2601                 ha->isp_type |= DT_ISP2071;
2602                 ha->device_type |= DT_ZIO_SUPPORTED;
2603                 ha->device_type |= DT_FWI2;
2604                 ha->device_type |= DT_IIDMA;
2605                 ha->device_type |= DT_T10_PI;
2606                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2607                 break;
2608         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2609                 ha->isp_type |= DT_ISP2271;
2610                 ha->device_type |= DT_ZIO_SUPPORTED;
2611                 ha->device_type |= DT_FWI2;
2612                 ha->device_type |= DT_IIDMA;
2613                 ha->device_type |= DT_T10_PI;
2614                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2615                 break;
2616         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2617                 ha->isp_type |= DT_ISP2261;
2618                 ha->device_type |= DT_ZIO_SUPPORTED;
2619                 ha->device_type |= DT_FWI2;
2620                 ha->device_type |= DT_IIDMA;
2621                 ha->device_type |= DT_T10_PI;
2622                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2623                 break;
2624         }
2625
2626         if (IS_QLA82XX(ha))
2627                 ha->port_no = ha->portnum & 1;
2628         else {
2629                 /* Get adapter physical port no from interrupt pin register. */
2630                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2631                 if (IS_QLA27XX(ha))
2632                         ha->port_no--;
2633                 else
2634                         ha->port_no = !(ha->port_no & 1);
2635         }
2636
2637         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2638             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2639             ha->device_type, ha->port_no, ha->fw_srisc_address);
2640 }
2641
2642 static void
2643 qla2xxx_scan_start(struct Scsi_Host *shost)
2644 {
2645         scsi_qla_host_t *vha = shost_priv(shost);
2646
2647         if (vha->hw->flags.running_gold_fw)
2648                 return;
2649
2650         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2651         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2652         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2653         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2654 }
2655
2656 static int
2657 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2658 {
2659         scsi_qla_host_t *vha = shost_priv(shost);
2660
2661         if (test_bit(UNLOADING, &vha->dpc_flags))
2662                 return 1;
2663         if (!vha->host)
2664                 return 1;
2665         if (time > vha->hw->loop_reset_delay * HZ)
2666                 return 1;
2667
2668         return atomic_read(&vha->loop_state) == LOOP_READY;
2669 }
2670
2671 static void qla2x00_iocb_work_fn(struct work_struct *work)
2672 {
2673         struct scsi_qla_host *vha = container_of(work,
2674                 struct scsi_qla_host, iocb_work);
2675         int cnt = 0;
2676
2677         while (!list_empty(&vha->work_list)) {
2678                 qla2x00_do_work(vha);
2679                 cnt++;
2680                 if (cnt > 10)
2681                         break;
2682         }
2683 }
2684
2685 /*
2686  * PCI driver interface
2687  */
2688 static int
2689 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2690 {
2691         int     ret = -ENODEV;
2692         struct Scsi_Host *host;
2693         scsi_qla_host_t *base_vha = NULL;
2694         struct qla_hw_data *ha;
2695         char pci_info[30];
2696         char fw_str[30], wq_name[30];
2697         struct scsi_host_template *sht;
2698         int bars, mem_only = 0;
2699         uint16_t req_length = 0, rsp_length = 0;
2700         struct req_que *req = NULL;
2701         struct rsp_que *rsp = NULL;
2702         int i;
2703
2704         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2705         sht = &qla2xxx_driver_template;
2706         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2707             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2708             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2709             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2710             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2711             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2712             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2713             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2714             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2715             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2716             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2717             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2718             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2719             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2720             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2721                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2722                 mem_only = 1;
2723                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2724                     "Mem only adapter.\n");
2725         }
2726         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2727             "Bars=%d.\n", bars);
2728
2729         if (mem_only) {
2730                 if (pci_enable_device_mem(pdev))
2731                         return ret;
2732         } else {
2733                 if (pci_enable_device(pdev))
2734                         return ret;
2735         }
2736
2737         /* This may fail but that's ok */
2738         pci_enable_pcie_error_reporting(pdev);
2739
2740         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2741         if (!ha) {
2742                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2743                     "Unable to allocate memory for ha.\n");
2744                 goto disable_device;
2745         }
2746         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2747             "Memory allocated for ha=%p.\n", ha);
2748         ha->pdev = pdev;
2749         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2750         spin_lock_init(&ha->tgt.q_full_lock);
2751         spin_lock_init(&ha->tgt.sess_lock);
2752         spin_lock_init(&ha->tgt.atio_lock);
2753
2754
2755         /* Clear our data area */
2756         ha->bars = bars;
2757         ha->mem_only = mem_only;
2758         spin_lock_init(&ha->hardware_lock);
2759         spin_lock_init(&ha->vport_slock);
2760         mutex_init(&ha->selflogin_lock);
2761         mutex_init(&ha->optrom_mutex);
2762
2763         /* Set ISP-type information. */
2764         qla2x00_set_isp_flags(ha);
2765
2766         /* Set EEH reset type to fundamental if required by hba */
2767         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2768             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2769                 pdev->needs_freset = 1;
2770
2771         ha->prev_topology = 0;
2772         ha->init_cb_size = sizeof(init_cb_t);
2773         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2774         ha->optrom_size = OPTROM_SIZE_2300;
2775
2776         /* Assign ISP specific operations. */
2777         if (IS_QLA2100(ha)) {
2778                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2779                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2780                 req_length = REQUEST_ENTRY_CNT_2100;
2781                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2782                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2783                 ha->gid_list_info_size = 4;
2784                 ha->flash_conf_off = ~0;
2785                 ha->flash_data_off = ~0;
2786                 ha->nvram_conf_off = ~0;
2787                 ha->nvram_data_off = ~0;
2788                 ha->isp_ops = &qla2100_isp_ops;
2789         } else if (IS_QLA2200(ha)) {
2790                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2791                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2792                 req_length = REQUEST_ENTRY_CNT_2200;
2793                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2794                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2795                 ha->gid_list_info_size = 4;
2796                 ha->flash_conf_off = ~0;
2797                 ha->flash_data_off = ~0;
2798                 ha->nvram_conf_off = ~0;
2799                 ha->nvram_data_off = ~0;
2800                 ha->isp_ops = &qla2100_isp_ops;
2801         } else if (IS_QLA23XX(ha)) {
2802                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2803                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2804                 req_length = REQUEST_ENTRY_CNT_2200;
2805                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2806                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2807                 ha->gid_list_info_size = 6;
2808                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2809                         ha->optrom_size = OPTROM_SIZE_2322;
2810                 ha->flash_conf_off = ~0;
2811                 ha->flash_data_off = ~0;
2812                 ha->nvram_conf_off = ~0;
2813                 ha->nvram_data_off = ~0;
2814                 ha->isp_ops = &qla2300_isp_ops;
2815         } else if (IS_QLA24XX_TYPE(ha)) {
2816                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2817                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2818                 req_length = REQUEST_ENTRY_CNT_24XX;
2819                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2820                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2821                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2822                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2823                 ha->gid_list_info_size = 8;
2824                 ha->optrom_size = OPTROM_SIZE_24XX;
2825                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2826                 ha->isp_ops = &qla24xx_isp_ops;
2827                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2828                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2829                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2830                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2831         } else if (IS_QLA25XX(ha)) {
2832                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2833                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2834                 req_length = REQUEST_ENTRY_CNT_24XX;
2835                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2836                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2837                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2838                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2839                 ha->gid_list_info_size = 8;
2840                 ha->optrom_size = OPTROM_SIZE_25XX;
2841                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2842                 ha->isp_ops = &qla25xx_isp_ops;
2843                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2844                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2845                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2846                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2847         } else if (IS_QLA81XX(ha)) {
2848                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2849                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2850                 req_length = REQUEST_ENTRY_CNT_24XX;
2851                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2852                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2853                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2854                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2855                 ha->gid_list_info_size = 8;
2856                 ha->optrom_size = OPTROM_SIZE_81XX;
2857                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2858                 ha->isp_ops = &qla81xx_isp_ops;
2859                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2860                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2861                 ha->nvram_conf_off = ~0;
2862                 ha->nvram_data_off = ~0;
2863         } else if (IS_QLA82XX(ha)) {
2864                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2865                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2866                 req_length = REQUEST_ENTRY_CNT_82XX;
2867                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2868                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2869                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2870                 ha->gid_list_info_size = 8;
2871                 ha->optrom_size = OPTROM_SIZE_82XX;
2872                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2873                 ha->isp_ops = &qla82xx_isp_ops;
2874                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2875                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2876                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2877                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2878         } else if (IS_QLA8044(ha)) {
2879                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2880                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2881                 req_length = REQUEST_ENTRY_CNT_82XX;
2882                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2883                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2884                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2885                 ha->gid_list_info_size = 8;
2886                 ha->optrom_size = OPTROM_SIZE_83XX;
2887                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2888                 ha->isp_ops = &qla8044_isp_ops;
2889                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2890                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2891                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2892                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2893         } else if (IS_QLA83XX(ha)) {
2894                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2895                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2896                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2897                 req_length = REQUEST_ENTRY_CNT_83XX;
2898                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2899                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2900                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2901                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2902                 ha->gid_list_info_size = 8;
2903                 ha->optrom_size = OPTROM_SIZE_83XX;
2904                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2905                 ha->isp_ops = &qla83xx_isp_ops;
2906                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2907                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2908                 ha->nvram_conf_off = ~0;
2909                 ha->nvram_data_off = ~0;
2910         }  else if (IS_QLAFX00(ha)) {
2911                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2912                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2913                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2914                 req_length = REQUEST_ENTRY_CNT_FX00;
2915                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2916                 ha->isp_ops = &qlafx00_isp_ops;
2917                 ha->port_down_retry_count = 30; /* default value */
2918                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2919                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2920                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2921                 ha->mr.fw_hbt_en = 1;
2922                 ha->mr.host_info_resend = false;
2923                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2924         } else if (IS_QLA27XX(ha)) {
2925                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2926                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2927                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2928                 req_length = REQUEST_ENTRY_CNT_83XX;
2929                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2930                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2931                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2932                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2933                 ha->gid_list_info_size = 8;
2934                 ha->optrom_size = OPTROM_SIZE_83XX;
2935                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2936                 ha->isp_ops = &qla27xx_isp_ops;
2937                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2938                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2939                 ha->nvram_conf_off = ~0;
2940                 ha->nvram_data_off = ~0;
2941         }
2942
2943         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2944             "mbx_count=%d, req_length=%d, "
2945             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2946             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2947             "max_fibre_devices=%d.\n",
2948             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2949             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2950             ha->nvram_npiv_size, ha->max_fibre_devices);
2951         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2952             "isp_ops=%p, flash_conf_off=%d, "
2953             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2954             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2955             ha->nvram_conf_off, ha->nvram_data_off);
2956
2957         /* Configure PCI I/O space */
2958         ret = ha->isp_ops->iospace_config(ha);
2959         if (ret)
2960                 goto iospace_config_failed;
2961
2962         ql_log_pci(ql_log_info, pdev, 0x001d,
2963             "Found an ISP%04X irq %d iobase 0x%p.\n",
2964             pdev->device, pdev->irq, ha->iobase);
2965         mutex_init(&ha->vport_lock);
2966         mutex_init(&ha->mq_lock);
2967         init_completion(&ha->mbx_cmd_comp);
2968         complete(&ha->mbx_cmd_comp);
2969         init_completion(&ha->mbx_intr_comp);
2970         init_completion(&ha->dcbx_comp);
2971         init_completion(&ha->lb_portup_comp);
2972
2973         set_bit(0, (unsigned long *) ha->vp_idx_map);
2974
2975         qla2x00_config_dma_addressing(ha);
2976         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2977             "64 Bit addressing is %s.\n",
2978             ha->flags.enable_64bit_addressing ? "enable" :
2979             "disable");
2980         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2981         if (ret) {
2982                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2983                     "Failed to allocate memory for adapter, aborting.\n");
2984
2985                 goto probe_hw_failed;
2986         }
2987
2988         req->max_q_depth = MAX_Q_DEPTH;
2989         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2990                 req->max_q_depth = ql2xmaxqdepth;
2991
2992
2993         base_vha = qla2x00_create_host(sht, ha);
2994         if (!base_vha) {
2995                 ret = -ENOMEM;
2996                 qla2x00_mem_free(ha);
2997                 qla2x00_free_req_que(ha, req);
2998                 qla2x00_free_rsp_que(ha, rsp);
2999                 goto probe_hw_failed;
3000         }
3001
3002         pci_set_drvdata(pdev, base_vha);
3003         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3004
3005         host = base_vha->host;
3006         base_vha->req = req;
3007         if (IS_QLA2XXX_MIDTYPE(ha))
3008                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
3009         else
3010                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3011                                                 base_vha->vp_idx;
3012
3013         /* Setup fcport template structure. */
3014         ha->mr.fcport.vha = base_vha;
3015         ha->mr.fcport.port_type = FCT_UNKNOWN;
3016         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3017         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3018         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3019         ha->mr.fcport.scan_state = 1;
3020
3021         /* Set the SG table size based on ISP type */
3022         if (!IS_FWI2_CAPABLE(ha)) {
3023                 if (IS_QLA2100(ha))
3024                         host->sg_tablesize = 32;
3025         } else {
3026                 if (!IS_QLA82XX(ha))
3027                         host->sg_tablesize = QLA_SG_ALL;
3028         }
3029         host->max_id = ha->max_fibre_devices;
3030         host->cmd_per_lun = 3;
3031         host->unique_id = host->host_no;
3032         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3033                 host->max_cmd_len = 32;
3034         else
3035                 host->max_cmd_len = MAX_CMDSZ;
3036         host->max_channel = MAX_BUSES - 1;
3037         /* Older HBAs support only 16-bit LUNs */
3038         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3039             ql2xmaxlun > 0xffff)
3040                 host->max_lun = 0xffff;
3041         else
3042                 host->max_lun = ql2xmaxlun;
3043         host->transportt = qla2xxx_transport_template;
3044         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3045
3046         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3047             "max_id=%d this_id=%d "
3048             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3049             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3050             host->this_id, host->cmd_per_lun, host->unique_id,
3051             host->max_cmd_len, host->max_channel, host->max_lun,
3052             host->transportt, sht->vendor_id);
3053
3054         /* Set up the irqs */
3055         ret = qla2x00_request_irqs(ha, rsp);
3056         if (ret)
3057                 goto probe_init_failed;
3058
3059         /* Alloc arrays of request and response ring ptrs */
3060         if (!qla2x00_alloc_queues(ha, req, rsp)) {
3061                 ql_log(ql_log_fatal, base_vha, 0x003d,
3062                     "Failed to allocate memory for queue pointers..."
3063                     "aborting.\n");
3064                 goto probe_init_failed;
3065         }
3066
3067         if (ha->mqenable && shost_use_blk_mq(host)) {
3068                 /* number of hardware queues supported by blk/scsi-mq*/
3069                 host->nr_hw_queues = ha->max_qpairs;
3070
3071                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3072                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3073         } else
3074                 ql_dbg(ql_dbg_init, base_vha, 0x0193,
3075                         "blk/scsi-mq disabled.\n");
3076
3077         qlt_probe_one_stage1(base_vha, ha);
3078
3079         pci_save_state(pdev);
3080
3081         /* Assign back pointers */
3082         rsp->req = req;
3083         req->rsp = rsp;
3084
3085         if (IS_QLAFX00(ha)) {
3086                 ha->rsp_q_map[0] = rsp;
3087                 ha->req_q_map[0] = req;
3088                 set_bit(0, ha->req_qid_map);
3089                 set_bit(0, ha->rsp_qid_map);
3090         }
3091
3092         /* FWI2-capable only. */
3093         req->req_q_in = &ha->iobase->isp24.req_q_in;
3094         req->req_q_out = &ha->iobase->isp24.req_q_out;
3095         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3096         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3097         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3098                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3099                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3100                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3101                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3102         }
3103
3104         if (IS_QLAFX00(ha)) {
3105                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3106                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3107                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3108                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3109         }
3110
3111         if (IS_P3P_TYPE(ha)) {
3112                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3113                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3114                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3115         }
3116
3117         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3118             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3119             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3120         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3121             "req->req_q_in=%p req->req_q_out=%p "
3122             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3123             req->req_q_in, req->req_q_out,
3124             rsp->rsp_q_in, rsp->rsp_q_out);
3125         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3126             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3127             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3128         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3129             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3130             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3131
3132         if (ha->isp_ops->initialize_adapter(base_vha)) {
3133                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3134                     "Failed to initialize adapter - Adapter flags %x.\n",
3135                     base_vha->device_flags);
3136
3137                 if (IS_QLA82XX(ha)) {
3138                         qla82xx_idc_lock(ha);
3139                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3140                                 QLA8XXX_DEV_FAILED);
3141                         qla82xx_idc_unlock(ha);
3142                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3143                             "HW State: FAILED.\n");
3144                 } else if (IS_QLA8044(ha)) {
3145                         qla8044_idc_lock(ha);
3146                         qla8044_wr_direct(base_vha,
3147                                 QLA8044_CRB_DEV_STATE_INDEX,
3148                                 QLA8XXX_DEV_FAILED);
3149                         qla8044_idc_unlock(ha);
3150                         ql_log(ql_log_fatal, base_vha, 0x0150,
3151                             "HW State: FAILED.\n");
3152                 }
3153
3154                 ret = -ENODEV;
3155                 goto probe_failed;
3156         }
3157
3158         if (IS_QLAFX00(ha))
3159                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3160         else
3161                 host->can_queue = req->num_outstanding_cmds - 10;
3162
3163         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3164             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3165             host->can_queue, base_vha->req,
3166             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3167
3168         if (ha->mqenable) {
3169                 bool mq = false;
3170                 bool startit = false;
3171                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
3172
3173                 if (QLA_TGT_MODE_ENABLED()) {
3174                         mq = true;
3175                         startit = false;
3176                 }
3177
3178                 if ((ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED) &&
3179                     shost_use_blk_mq(host)) {
3180                         mq = true;
3181                         startit = true;
3182                 }
3183
3184                 if (mq) {
3185                         /* Create start of day qpairs for Block MQ */
3186                         for (i = 0; i < ha->max_qpairs; i++)
3187                                 qla2xxx_create_qpair(base_vha, 5, 0, startit);
3188                 }
3189         }
3190
3191         if (ha->flags.running_gold_fw)
3192                 goto skip_dpc;
3193
3194         /*
3195          * Startup the kernel thread for this host adapter
3196          */
3197         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3198             "%s_dpc", base_vha->host_str);
3199         if (IS_ERR(ha->dpc_thread)) {
3200                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3201                     "Failed to start DPC thread.\n");
3202                 ret = PTR_ERR(ha->dpc_thread);
3203                 goto probe_failed;
3204         }
3205         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3206             "DPC thread started successfully.\n");
3207
3208         /*
3209          * If we're not coming up in initiator mode, we might sit for
3210          * a while without waking up the dpc thread, which leads to a
3211          * stuck process warning.  So just kick the dpc once here and
3212          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3213          */
3214         qla2xxx_wake_dpc(base_vha);
3215
3216         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3217         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3218
3219         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3220                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3221                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3222                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3223
3224                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3225                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3226                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3227                 INIT_WORK(&ha->idc_state_handler,
3228                     qla83xx_idc_state_handler_work);
3229                 INIT_WORK(&ha->nic_core_unrecoverable,
3230                     qla83xx_nic_core_unrecoverable_work);
3231         }
3232
3233 skip_dpc:
3234         list_add_tail(&base_vha->list, &ha->vp_list);
3235         base_vha->host->irq = ha->pdev->irq;
3236
3237         /* Initialized the timer */
3238         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
3239         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3240             "Started qla2x00_timer with "
3241             "interval=%d.\n", WATCH_INTERVAL);
3242         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3243             "Detected hba at address=%p.\n",
3244             ha);
3245
3246         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3247                 if (ha->fw_attributes & BIT_4) {
3248                         int prot = 0, guard;
3249                         base_vha->flags.difdix_supported = 1;
3250                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3251                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3252                         if (ql2xenabledif == 1)
3253                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3254                         scsi_host_set_prot(host,
3255                             prot | SHOST_DIF_TYPE1_PROTECTION
3256                             | SHOST_DIF_TYPE2_PROTECTION
3257                             | SHOST_DIF_TYPE3_PROTECTION
3258                             | SHOST_DIX_TYPE1_PROTECTION
3259                             | SHOST_DIX_TYPE2_PROTECTION
3260                             | SHOST_DIX_TYPE3_PROTECTION);
3261
3262                         guard = SHOST_DIX_GUARD_CRC;
3263
3264                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3265                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3266                                 guard |= SHOST_DIX_GUARD_IP;
3267
3268                         scsi_host_set_guard(host, guard);
3269                 } else
3270                         base_vha->flags.difdix_supported = 0;
3271         }
3272
3273         ha->isp_ops->enable_intrs(ha);
3274
3275         if (IS_QLAFX00(ha)) {
3276                 ret = qlafx00_fx_disc(base_vha,
3277                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3278                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3279                     QLA_SG_ALL : 128;
3280         }
3281
3282         ret = scsi_add_host(host, &pdev->dev);
3283         if (ret)
3284                 goto probe_failed;
3285
3286         base_vha->flags.init_done = 1;
3287         base_vha->flags.online = 1;
3288         ha->prev_minidump_failed = 0;
3289
3290         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3291             "Init done and hba is online.\n");
3292
3293         if (qla_ini_mode_enabled(base_vha) ||
3294                 qla_dual_mode_enabled(base_vha))
3295                 scsi_scan_host(host);
3296         else
3297                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3298                         "skipping scsi_scan_host() for non-initiator port\n");
3299
3300         qla2x00_alloc_sysfs_attr(base_vha);
3301
3302         if (IS_QLAFX00(ha)) {
3303                 ret = qlafx00_fx_disc(base_vha,
3304                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3305
3306                 /* Register system information */
3307                 ret =  qlafx00_fx_disc(base_vha,
3308                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3309         }
3310
3311         qla2x00_init_host_attr(base_vha);
3312
3313         qla2x00_dfs_setup(base_vha);
3314
3315         ql_log(ql_log_info, base_vha, 0x00fb,
3316             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3317         ql_log(ql_log_info, base_vha, 0x00fc,
3318             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3319             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3320             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3321             base_vha->host_no,
3322             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3323
3324         qlt_add_target(ha, base_vha);
3325
3326         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3327
3328         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3329                 return -ENODEV;
3330
3331         return 0;
3332
3333 probe_init_failed:
3334         qla2x00_free_req_que(ha, req);
3335         ha->req_q_map[0] = NULL;
3336         clear_bit(0, ha->req_qid_map);
3337         qla2x00_free_rsp_que(ha, rsp);
3338         ha->rsp_q_map[0] = NULL;
3339         clear_bit(0, ha->rsp_qid_map);
3340         ha->max_req_queues = ha->max_rsp_queues = 0;
3341
3342 probe_failed:
3343         if (base_vha->timer_active)
3344                 qla2x00_stop_timer(base_vha);
3345         base_vha->flags.online = 0;
3346         if (ha->dpc_thread) {
3347                 struct task_struct *t = ha->dpc_thread;
3348
3349                 ha->dpc_thread = NULL;
3350                 kthread_stop(t);
3351         }
3352
3353         qla2x00_free_device(base_vha);
3354
3355         scsi_host_put(base_vha->host);
3356
3357 probe_hw_failed:
3358         qla2x00_clear_drv_active(ha);
3359
3360 iospace_config_failed:
3361         if (IS_P3P_TYPE(ha)) {
3362                 if (!ha->nx_pcibase)
3363                         iounmap((device_reg_t *)ha->nx_pcibase);
3364                 if (!ql2xdbwr)
3365                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3366         } else {
3367                 if (ha->iobase)
3368                         iounmap(ha->iobase);
3369                 if (ha->cregbase)
3370                         iounmap(ha->cregbase);
3371         }
3372         pci_release_selected_regions(ha->pdev, ha->bars);
3373         kfree(ha);
3374
3375 disable_device:
3376         pci_disable_device(pdev);
3377         return ret;
3378 }
3379
3380 static void
3381 qla2x00_shutdown(struct pci_dev *pdev)
3382 {
3383         scsi_qla_host_t *vha;
3384         struct qla_hw_data  *ha;
3385
3386         if (!atomic_read(&pdev->enable_cnt))
3387                 return;
3388
3389         vha = pci_get_drvdata(pdev);
3390         ha = vha->hw;
3391
3392         /* Notify ISPFX00 firmware */
3393         if (IS_QLAFX00(ha))
3394                 qlafx00_driver_shutdown(vha, 20);
3395
3396         /* Turn-off FCE trace */
3397         if (ha->flags.fce_enabled) {
3398                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3399                 ha->flags.fce_enabled = 0;
3400         }
3401
3402         /* Turn-off EFT trace */
3403         if (ha->eft)
3404                 qla2x00_disable_eft_trace(vha);
3405
3406         /* Stop currently executing firmware. */
3407         qla2x00_try_to_stop_firmware(vha);
3408
3409         /* Turn adapter off line */
3410         vha->flags.online = 0;
3411
3412         /* turn-off interrupts on the card */
3413         if (ha->interrupts_on) {
3414                 vha->flags.init_done = 0;
3415                 ha->isp_ops->disable_intrs(ha);
3416         }
3417
3418         qla2x00_free_irqs(vha);
3419
3420         qla2x00_free_fw_dump(ha);
3421
3422         pci_disable_pcie_error_reporting(pdev);
3423         pci_disable_device(pdev);
3424 }
3425
3426 /* Deletes all the virtual ports for a given ha */
3427 static void
3428 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3429 {
3430         scsi_qla_host_t *vha;
3431         unsigned long flags;
3432
3433         mutex_lock(&ha->vport_lock);
3434         while (ha->cur_vport_count) {
3435                 spin_lock_irqsave(&ha->vport_slock, flags);
3436
3437                 BUG_ON(base_vha->list.next == &ha->vp_list);
3438                 /* This assumes first entry in ha->vp_list is always base vha */
3439                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3440                 scsi_host_get(vha->host);
3441
3442                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3443                 mutex_unlock(&ha->vport_lock);
3444
3445                 fc_vport_terminate(vha->fc_vport);
3446                 scsi_host_put(vha->host);
3447
3448                 mutex_lock(&ha->vport_lock);
3449         }
3450         mutex_unlock(&ha->vport_lock);
3451 }
3452
3453 /* Stops all deferred work threads */
3454 static void
3455 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3456 {
3457         /* Cancel all work and destroy DPC workqueues */
3458         if (ha->dpc_lp_wq) {
3459                 cancel_work_sync(&ha->idc_aen);
3460                 destroy_workqueue(ha->dpc_lp_wq);
3461                 ha->dpc_lp_wq = NULL;
3462         }
3463
3464         if (ha->dpc_hp_wq) {
3465                 cancel_work_sync(&ha->nic_core_reset);
3466                 cancel_work_sync(&ha->idc_state_handler);
3467                 cancel_work_sync(&ha->nic_core_unrecoverable);
3468                 destroy_workqueue(ha->dpc_hp_wq);
3469                 ha->dpc_hp_wq = NULL;
3470         }
3471
3472         /* Kill the kernel thread for this host */
3473         if (ha->dpc_thread) {
3474                 struct task_struct *t = ha->dpc_thread;
3475
3476                 /*
3477                  * qla2xxx_wake_dpc checks for ->dpc_thread
3478                  * so we need to zero it out.
3479                  */
3480                 ha->dpc_thread = NULL;
3481                 kthread_stop(t);
3482         }
3483 }
3484
3485 static void
3486 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3487 {
3488         if (IS_QLA82XX(ha)) {
3489
3490                 iounmap((device_reg_t *)ha->nx_pcibase);
3491                 if (!ql2xdbwr)
3492                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3493         } else {
3494                 if (ha->iobase)
3495                         iounmap(ha->iobase);
3496
3497                 if (ha->cregbase)
3498                         iounmap(ha->cregbase);
3499
3500                 if (ha->mqiobase)
3501                         iounmap(ha->mqiobase);
3502
3503                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3504                         iounmap(ha->msixbase);
3505         }
3506 }
3507
3508 static void
3509 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3510 {
3511         if (IS_QLA8044(ha)) {
3512                 qla8044_idc_lock(ha);
3513                 qla8044_clear_drv_active(ha);
3514                 qla8044_idc_unlock(ha);
3515         } else if (IS_QLA82XX(ha)) {
3516                 qla82xx_idc_lock(ha);
3517                 qla82xx_clear_drv_active(ha);
3518                 qla82xx_idc_unlock(ha);
3519         }
3520 }
3521
3522 static void
3523 qla2x00_remove_one(struct pci_dev *pdev)
3524 {
3525         scsi_qla_host_t *base_vha;
3526         struct qla_hw_data  *ha;
3527
3528         base_vha = pci_get_drvdata(pdev);
3529         ha = base_vha->hw;
3530
3531         /* Indicate device removal to prevent future board_disable and wait
3532          * until any pending board_disable has completed. */
3533         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3534         cancel_work_sync(&ha->board_disable);
3535
3536         /*
3537          * If the PCI device is disabled then there was a PCI-disconnect and
3538          * qla2x00_disable_board_on_pci_error has taken care of most of the
3539          * resources.
3540          */
3541         if (!atomic_read(&pdev->enable_cnt)) {
3542                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3543                     base_vha->gnl.l, base_vha->gnl.ldma);
3544
3545                 scsi_host_put(base_vha->host);
3546                 kfree(ha);
3547                 pci_set_drvdata(pdev, NULL);
3548                 return;
3549         }
3550         qla2x00_wait_for_hba_ready(base_vha);
3551
3552         /*
3553          * if UNLOAD flag is already set, then continue unload,
3554          * where it was set first.
3555          */
3556         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3557                 return;
3558
3559         set_bit(UNLOADING, &base_vha->dpc_flags);
3560
3561         qla_nvme_delete(base_vha);
3562
3563         dma_free_coherent(&ha->pdev->dev,
3564                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3565
3566         if (IS_QLAFX00(ha))
3567                 qlafx00_driver_shutdown(base_vha, 20);
3568
3569         qla2x00_delete_all_vps(ha, base_vha);
3570
3571         if (IS_QLA8031(ha)) {
3572                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3573                     "Clearing fcoe driver presence.\n");
3574                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3575                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3576                             "Error while clearing DRV-Presence.\n");
3577         }
3578
3579         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3580
3581         qla2x00_dfs_remove(base_vha);
3582
3583         qla84xx_put_chip(base_vha);
3584
3585         /* Laser should be disabled only for ISP2031 */
3586         if (IS_QLA2031(ha))
3587                 qla83xx_disable_laser(base_vha);
3588
3589         /* Disable timer */
3590         if (base_vha->timer_active)
3591                 qla2x00_stop_timer(base_vha);
3592
3593         base_vha->flags.online = 0;
3594
3595         /* free DMA memory */
3596         if (ha->exlogin_buf)
3597                 qla2x00_free_exlogin_buffer(ha);
3598
3599         /* free DMA memory */
3600         if (ha->exchoffld_buf)
3601                 qla2x00_free_exchoffld_buffer(ha);
3602
3603         qla2x00_destroy_deferred_work(ha);
3604
3605         qlt_remove_target(ha, base_vha);
3606
3607         qla2x00_free_sysfs_attr(base_vha, true);
3608
3609         fc_remove_host(base_vha->host);
3610         qlt_remove_target_resources(ha);
3611
3612         scsi_remove_host(base_vha->host);
3613
3614         qla2x00_free_device(base_vha);
3615
3616         qla2x00_clear_drv_active(ha);
3617
3618         scsi_host_put(base_vha->host);
3619
3620         qla2x00_unmap_iobases(ha);
3621
3622         pci_release_selected_regions(ha->pdev, ha->bars);
3623         kfree(ha);
3624
3625         pci_disable_pcie_error_reporting(pdev);
3626
3627         pci_disable_device(pdev);
3628 }
3629
3630 static void
3631 qla2x00_free_device(scsi_qla_host_t *vha)
3632 {
3633         struct qla_hw_data *ha = vha->hw;
3634
3635         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3636
3637         /* Disable timer */
3638         if (vha->timer_active)
3639                 qla2x00_stop_timer(vha);
3640
3641         qla25xx_delete_queues(vha);
3642
3643         if (ha->flags.fce_enabled)
3644                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3645
3646         if (ha->eft)
3647                 qla2x00_disable_eft_trace(vha);
3648
3649         /* Stop currently executing firmware. */
3650         qla2x00_try_to_stop_firmware(vha);
3651
3652         vha->flags.online = 0;
3653
3654         /* turn-off interrupts on the card */
3655         if (ha->interrupts_on) {
3656                 vha->flags.init_done = 0;
3657                 ha->isp_ops->disable_intrs(ha);
3658         }
3659
3660         qla2x00_free_fcports(vha);
3661
3662         qla2x00_free_irqs(vha);
3663
3664         /* Flush the work queue and remove it */
3665         if (ha->wq) {
3666                 flush_workqueue(ha->wq);
3667                 destroy_workqueue(ha->wq);
3668                 ha->wq = NULL;
3669         }
3670
3671
3672         qla2x00_mem_free(ha);
3673
3674         qla82xx_md_free(vha);
3675
3676         qla2x00_free_queues(ha);
3677 }
3678
3679 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3680 {
3681         fc_port_t *fcport, *tfcport;
3682
3683         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3684                 list_del(&fcport->list);
3685                 qla2x00_clear_loop_id(fcport);
3686                 kfree(fcport);
3687         }
3688 }
3689
3690 static inline void
3691 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3692     int defer)
3693 {
3694         struct fc_rport *rport;
3695         scsi_qla_host_t *base_vha;
3696         unsigned long flags;
3697
3698         if (!fcport->rport)
3699                 return;
3700
3701         rport = fcport->rport;
3702         if (defer) {
3703                 base_vha = pci_get_drvdata(vha->hw->pdev);
3704                 spin_lock_irqsave(vha->host->host_lock, flags);
3705                 fcport->drport = rport;
3706                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3707                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3708                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3709                 qla2xxx_wake_dpc(base_vha);
3710         } else {
3711                 int now;
3712                 if (rport) {
3713                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3714                             "%s %8phN. rport %p roles %x\n",
3715                             __func__, fcport->port_name, rport,
3716                             rport->roles);
3717                         fc_remote_port_delete(rport);
3718                 }
3719                 qlt_do_generation_tick(vha, &now);
3720         }
3721 }
3722
3723 /*
3724  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3725  *
3726  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3727  *
3728  * Return: None.
3729  *
3730  * Context:
3731  */
3732 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3733     int do_login, int defer)
3734 {
3735         if (IS_QLAFX00(vha->hw)) {
3736                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3737                 qla2x00_schedule_rport_del(vha, fcport, defer);
3738                 return;
3739         }
3740
3741         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3742             vha->vp_idx == fcport->vha->vp_idx) {
3743                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3744                 qla2x00_schedule_rport_del(vha, fcport, defer);
3745         }
3746         /*
3747          * We may need to retry the login, so don't change the state of the
3748          * port but do the retries.
3749          */
3750         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3751                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3752
3753         if (!do_login)
3754                 return;
3755
3756         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3757
3758         if (fcport->login_retry == 0) {
3759                 fcport->login_retry = vha->hw->login_retry_count;
3760
3761                 ql_dbg(ql_dbg_disc, vha, 0x20a3,
3762                     "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
3763                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3764         }
3765 }
3766
3767 /*
3768  * qla2x00_mark_all_devices_lost
3769  *      Updates fcport state when device goes offline.
3770  *
3771  * Input:
3772  *      ha = adapter block pointer.
3773  *      fcport = port structure pointer.
3774  *
3775  * Return:
3776  *      None.
3777  *
3778  * Context:
3779  */
3780 void
3781 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3782 {
3783         fc_port_t *fcport;
3784
3785         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3786             "Mark all dev lost\n");
3787
3788         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3789                 fcport->scan_state = 0;
3790                 qlt_schedule_sess_for_deletion_lock(fcport);
3791
3792                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3793                         continue;
3794
3795                 /*
3796                  * No point in marking the device as lost, if the device is
3797                  * already DEAD.
3798                  */
3799                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3800                         continue;
3801                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3802                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3803                         if (defer)
3804                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3805                         else if (vha->vp_idx == fcport->vha->vp_idx)
3806                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3807                 }
3808         }
3809 }
3810
3811 /*
3812 * qla2x00_mem_alloc
3813 *      Allocates adapter memory.
3814 *
3815 * Returns:
3816 *      0  = success.
3817 *      !0  = failure.
3818 */
3819 static int
3820 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3821         struct req_que **req, struct rsp_que **rsp)
3822 {
3823         char    name[16];
3824
3825         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3826                 &ha->init_cb_dma, GFP_KERNEL);
3827         if (!ha->init_cb)
3828                 goto fail;
3829
3830         if (qlt_mem_alloc(ha) < 0)
3831                 goto fail_free_init_cb;
3832
3833         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3834                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3835         if (!ha->gid_list)
3836                 goto fail_free_tgt_mem;
3837
3838         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3839         if (!ha->srb_mempool)
3840                 goto fail_free_gid_list;
3841
3842         if (IS_P3P_TYPE(ha)) {
3843                 /* Allocate cache for CT6 Ctx. */
3844                 if (!ctx_cachep) {
3845                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3846                                 sizeof(struct ct6_dsd), 0,
3847                                 SLAB_HWCACHE_ALIGN, NULL);
3848                         if (!ctx_cachep)
3849                                 goto fail_free_srb_mempool;
3850                 }
3851                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3852                         ctx_cachep);
3853                 if (!ha->ctx_mempool)
3854                         goto fail_free_srb_mempool;
3855                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3856                     "ctx_cachep=%p ctx_mempool=%p.\n",
3857                     ctx_cachep, ha->ctx_mempool);
3858         }
3859
3860         /* Get memory for cached NVRAM */
3861         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3862         if (!ha->nvram)
3863                 goto fail_free_ctx_mempool;
3864
3865         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3866                 ha->pdev->device);
3867         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3868                 DMA_POOL_SIZE, 8, 0);
3869         if (!ha->s_dma_pool)
3870                 goto fail_free_nvram;
3871
3872         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3873             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3874             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3875
3876         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3877                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3878                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3879                 if (!ha->dl_dma_pool) {
3880                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3881                             "Failed to allocate memory for dl_dma_pool.\n");
3882                         goto fail_s_dma_pool;
3883                 }
3884
3885                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3886                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3887                 if (!ha->fcp_cmnd_dma_pool) {
3888                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3889                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3890                         goto fail_dl_dma_pool;
3891                 }
3892                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3893                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3894                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3895         }
3896
3897         /* Allocate memory for SNS commands */
3898         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3899         /* Get consistent memory allocated for SNS commands */
3900                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3901                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3902                 if (!ha->sns_cmd)
3903                         goto fail_dma_pool;
3904                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3905                     "sns_cmd: %p.\n", ha->sns_cmd);
3906         } else {
3907         /* Get consistent memory allocated for MS IOCB */
3908                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3909                         &ha->ms_iocb_dma);
3910                 if (!ha->ms_iocb)
3911                         goto fail_dma_pool;
3912         /* Get consistent memory allocated for CT SNS commands */
3913                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3914                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3915                 if (!ha->ct_sns)
3916                         goto fail_free_ms_iocb;
3917                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3918                     "ms_iocb=%p ct_sns=%p.\n",
3919                     ha->ms_iocb, ha->ct_sns);
3920         }
3921
3922         /* Allocate memory for request ring */
3923         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3924         if (!*req) {
3925                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3926                     "Failed to allocate memory for req.\n");
3927                 goto fail_req;
3928         }
3929         (*req)->length = req_len;
3930         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3931                 ((*req)->length + 1) * sizeof(request_t),
3932                 &(*req)->dma, GFP_KERNEL);
3933         if (!(*req)->ring) {
3934                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3935                     "Failed to allocate memory for req_ring.\n");
3936                 goto fail_req_ring;
3937         }
3938         /* Allocate memory for response ring */
3939         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3940         if (!*rsp) {
3941                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3942                     "Failed to allocate memory for rsp.\n");
3943                 goto fail_rsp;
3944         }
3945         (*rsp)->hw = ha;
3946         (*rsp)->length = rsp_len;
3947         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3948                 ((*rsp)->length + 1) * sizeof(response_t),
3949                 &(*rsp)->dma, GFP_KERNEL);
3950         if (!(*rsp)->ring) {
3951                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3952                     "Failed to allocate memory for rsp_ring.\n");
3953                 goto fail_rsp_ring;
3954         }
3955         (*req)->rsp = *rsp;
3956         (*rsp)->req = *req;
3957         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3958             "req=%p req->length=%d req->ring=%p rsp=%p "
3959             "rsp->length=%d rsp->ring=%p.\n",
3960             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3961             (*rsp)->ring);
3962         /* Allocate memory for NVRAM data for vports */
3963         if (ha->nvram_npiv_size) {
3964                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3965                     ha->nvram_npiv_size, GFP_KERNEL);
3966                 if (!ha->npiv_info) {
3967                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3968                             "Failed to allocate memory for npiv_info.\n");
3969                         goto fail_npiv_info;
3970                 }
3971         } else
3972                 ha->npiv_info = NULL;
3973
3974         /* Get consistent memory allocated for EX-INIT-CB. */
3975         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3976                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3977                     &ha->ex_init_cb_dma);
3978                 if (!ha->ex_init_cb)
3979                         goto fail_ex_init_cb;
3980                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3981                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3982         }
3983
3984         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3985
3986         /* Get consistent memory allocated for Async Port-Database. */
3987         if (!IS_FWI2_CAPABLE(ha)) {
3988                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3989                         &ha->async_pd_dma);
3990                 if (!ha->async_pd)
3991                         goto fail_async_pd;
3992                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3993                     "async_pd=%p.\n", ha->async_pd);
3994         }
3995
3996         INIT_LIST_HEAD(&ha->vp_list);
3997
3998         /* Allocate memory for our loop_id bitmap */
3999         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
4000             GFP_KERNEL);
4001         if (!ha->loop_id_map)
4002                 goto fail_loop_id_map;
4003         else {
4004                 qla2x00_set_reserved_loop_ids(ha);
4005                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4006                     "loop_id_map=%p.\n", ha->loop_id_map);
4007         }
4008
4009         return 0;
4010
4011 fail_loop_id_map:
4012         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4013 fail_async_pd:
4014         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4015 fail_ex_init_cb:
4016         kfree(ha->npiv_info);
4017 fail_npiv_info:
4018         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4019                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4020         (*rsp)->ring = NULL;
4021         (*rsp)->dma = 0;
4022 fail_rsp_ring:
4023         kfree(*rsp);
4024 fail_rsp:
4025         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4026                 sizeof(request_t), (*req)->ring, (*req)->dma);
4027         (*req)->ring = NULL;
4028         (*req)->dma = 0;
4029 fail_req_ring:
4030         kfree(*req);
4031 fail_req:
4032         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4033                 ha->ct_sns, ha->ct_sns_dma);
4034         ha->ct_sns = NULL;
4035         ha->ct_sns_dma = 0;
4036 fail_free_ms_iocb:
4037         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4038         ha->ms_iocb = NULL;
4039         ha->ms_iocb_dma = 0;
4040
4041         if (ha->sns_cmd)
4042                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4043                     ha->sns_cmd, ha->sns_cmd_dma);
4044 fail_dma_pool:
4045         if (IS_QLA82XX(ha) || ql2xenabledif) {
4046                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4047                 ha->fcp_cmnd_dma_pool = NULL;
4048         }
4049 fail_dl_dma_pool:
4050         if (IS_QLA82XX(ha) || ql2xenabledif) {
4051                 dma_pool_destroy(ha->dl_dma_pool);
4052                 ha->dl_dma_pool = NULL;
4053         }
4054 fail_s_dma_pool:
4055         dma_pool_destroy(ha->s_dma_pool);
4056         ha->s_dma_pool = NULL;
4057 fail_free_nvram:
4058         kfree(ha->nvram);
4059         ha->nvram = NULL;
4060 fail_free_ctx_mempool:
4061         if (ha->ctx_mempool)
4062                 mempool_destroy(ha->ctx_mempool);
4063         ha->ctx_mempool = NULL;
4064 fail_free_srb_mempool:
4065         if (ha->srb_mempool)
4066                 mempool_destroy(ha->srb_mempool);
4067         ha->srb_mempool = NULL;
4068 fail_free_gid_list:
4069         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4070         ha->gid_list,
4071         ha->gid_list_dma);
4072         ha->gid_list = NULL;
4073         ha->gid_list_dma = 0;
4074 fail_free_tgt_mem:
4075         qlt_mem_free(ha);
4076 fail_free_init_cb:
4077         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4078         ha->init_cb_dma);
4079         ha->init_cb = NULL;
4080         ha->init_cb_dma = 0;
4081 fail:
4082         ql_log(ql_log_fatal, NULL, 0x0030,
4083             "Memory allocation failure.\n");
4084         return -ENOMEM;
4085 }
4086
4087 int
4088 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4089 {
4090         int rval;
4091         uint16_t        size, max_cnt, temp;
4092         struct qla_hw_data *ha = vha->hw;
4093
4094         /* Return if we don't need to alloacate any extended logins */
4095         if (!ql2xexlogins)
4096                 return QLA_SUCCESS;
4097
4098         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4099                 return QLA_SUCCESS;
4100
4101         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4102         max_cnt = 0;
4103         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4104         if (rval != QLA_SUCCESS) {
4105                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4106                     "Failed to get exlogin status.\n");
4107                 return rval;
4108         }
4109
4110         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4111         temp *= size;
4112
4113         if (temp != ha->exlogin_size) {
4114                 qla2x00_free_exlogin_buffer(ha);
4115                 ha->exlogin_size = temp;
4116
4117                 ql_log(ql_log_info, vha, 0xd024,
4118                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4119                     max_cnt, size, temp);
4120
4121                 ql_log(ql_log_info, vha, 0xd025,
4122                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4123
4124                 /* Get consistent memory for extended logins */
4125                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4126                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4127                 if (!ha->exlogin_buf) {
4128                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4129                     "Failed to allocate memory for exlogin_buf_dma.\n");
4130                         return -ENOMEM;
4131                 }
4132         }
4133
4134         /* Now configure the dma buffer */
4135         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4136         if (rval) {
4137                 ql_log(ql_log_fatal, vha, 0xd033,
4138                     "Setup extended login buffer  ****FAILED****.\n");
4139                 qla2x00_free_exlogin_buffer(ha);
4140         }
4141
4142         return rval;
4143 }
4144
4145 /*
4146 * qla2x00_free_exlogin_buffer
4147 *
4148 * Input:
4149 *       ha = adapter block pointer
4150 */
4151 void
4152 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4153 {
4154         if (ha->exlogin_buf) {
4155                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4156                     ha->exlogin_buf, ha->exlogin_buf_dma);
4157                 ha->exlogin_buf = NULL;
4158                 ha->exlogin_size = 0;
4159         }
4160 }
4161
4162 static void
4163 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4164 {
4165         u32 temp;
4166         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4167
4168         if (qla_ini_mode_enabled(vha)) {
4169                 if (ql2xiniexchg > max_cnt)
4170                         ql2xiniexchg = max_cnt;
4171
4172                 if (ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4173                         *ret_cnt = ql2xiniexchg;
4174         } else if (qla_tgt_mode_enabled(vha)) {
4175                 if (ql2xexchoffld > max_cnt)
4176                         ql2xexchoffld = max_cnt;
4177
4178                 if (ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4179                         *ret_cnt = ql2xexchoffld;
4180         } else if (qla_dual_mode_enabled(vha)) {
4181                 temp = ql2xiniexchg + ql2xexchoffld;
4182                 if (temp > max_cnt) {
4183                         ql2xiniexchg -= (temp - max_cnt)/2;
4184                         ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4185                         temp = max_cnt;
4186                 }
4187
4188                 if (temp > FW_DEF_EXCHANGES_CNT)
4189                         *ret_cnt = temp;
4190         }
4191 }
4192
4193 int
4194 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4195 {
4196         int rval;
4197         u16 size, max_cnt;
4198         u32 temp;
4199         struct qla_hw_data *ha = vha->hw;
4200
4201         if (!ha->flags.exchoffld_enabled)
4202                 return QLA_SUCCESS;
4203
4204         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4205                 return QLA_SUCCESS;
4206
4207         max_cnt = 0;
4208         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4209         if (rval != QLA_SUCCESS) {
4210                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4211                     "Failed to get exlogin status.\n");
4212                 return rval;
4213         }
4214
4215         qla2x00_number_of_exch(vha, &temp, max_cnt);
4216         temp *= size;
4217
4218         if (temp != ha->exchoffld_size) {
4219                 qla2x00_free_exchoffld_buffer(ha);
4220                 ha->exchoffld_size = temp;
4221
4222                 ql_log(ql_log_info, vha, 0xd016,
4223                     "Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
4224                     max_cnt, size, temp);
4225
4226                 ql_log(ql_log_info, vha, 0xd017,
4227                     "Exchange Buffers requested size = 0x%x\n",
4228                     ha->exchoffld_size);
4229
4230                 /* Get consistent memory for extended logins */
4231                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4232                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4233                 if (!ha->exchoffld_buf) {
4234                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4235                         "Failed to allocate memory for exchoffld_buf_dma.\n");
4236                         return -ENOMEM;
4237                 }
4238         }
4239
4240         /* Now configure the dma buffer */
4241         rval = qla_set_exchoffld_mem_cfg(vha);
4242         if (rval) {
4243                 ql_log(ql_log_fatal, vha, 0xd02e,
4244                     "Setup exchange offload buffer ****FAILED****.\n");
4245                 qla2x00_free_exchoffld_buffer(ha);
4246         } else {
4247                 /* re-adjust number of target exchange */
4248                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4249
4250                 if (qla_ini_mode_enabled(vha))
4251                         icb->exchange_count = 0;
4252                 else
4253                         icb->exchange_count = cpu_to_le16(ql2xexchoffld);
4254         }
4255
4256         return rval;
4257 }
4258
4259 /*
4260 * qla2x00_free_exchoffld_buffer
4261 *
4262 * Input:
4263 *       ha = adapter block pointer
4264 */
4265 void
4266 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4267 {
4268         if (ha->exchoffld_buf) {
4269                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4270                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4271                 ha->exchoffld_buf = NULL;
4272                 ha->exchoffld_size = 0;
4273         }
4274 }
4275
4276 /*
4277 * qla2x00_free_fw_dump
4278 *       Frees fw dump stuff.
4279 *
4280 * Input:
4281 *       ha = adapter block pointer
4282 */
4283 static void
4284 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4285 {
4286         if (ha->fce)
4287                 dma_free_coherent(&ha->pdev->dev,
4288                     FCE_SIZE, ha->fce, ha->fce_dma);
4289
4290         if (ha->eft)
4291                 dma_free_coherent(&ha->pdev->dev,
4292                     EFT_SIZE, ha->eft, ha->eft_dma);
4293
4294         if (ha->fw_dump)
4295                 vfree(ha->fw_dump);
4296         if (ha->fw_dump_template)
4297                 vfree(ha->fw_dump_template);
4298
4299         ha->fce = NULL;
4300         ha->fce_dma = 0;
4301         ha->eft = NULL;
4302         ha->eft_dma = 0;
4303         ha->fw_dumped = 0;
4304         ha->fw_dump_cap_flags = 0;
4305         ha->fw_dump_reading = 0;
4306         ha->fw_dump = NULL;
4307         ha->fw_dump_len = 0;
4308         ha->fw_dump_template = NULL;
4309         ha->fw_dump_template_len = 0;
4310 }
4311
4312 /*
4313 * qla2x00_mem_free
4314 *      Frees all adapter allocated memory.
4315 *
4316 * Input:
4317 *      ha = adapter block pointer.
4318 */
4319 static void
4320 qla2x00_mem_free(struct qla_hw_data *ha)
4321 {
4322         qla2x00_free_fw_dump(ha);
4323
4324         if (ha->mctp_dump)
4325                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4326                     ha->mctp_dump_dma);
4327
4328         if (ha->srb_mempool)
4329                 mempool_destroy(ha->srb_mempool);
4330
4331         if (ha->dcbx_tlv)
4332                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4333                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4334
4335         if (ha->xgmac_data)
4336                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4337                     ha->xgmac_data, ha->xgmac_data_dma);
4338
4339         if (ha->sns_cmd)
4340                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4341                 ha->sns_cmd, ha->sns_cmd_dma);
4342
4343         if (ha->ct_sns)
4344                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4345                 ha->ct_sns, ha->ct_sns_dma);
4346
4347         if (ha->sfp_data)
4348                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
4349
4350         if (ha->ms_iocb)
4351                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4352
4353         if (ha->ex_init_cb)
4354                 dma_pool_free(ha->s_dma_pool,
4355                         ha->ex_init_cb, ha->ex_init_cb_dma);
4356
4357         if (ha->async_pd)
4358                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4359
4360         if (ha->s_dma_pool)
4361                 dma_pool_destroy(ha->s_dma_pool);
4362
4363         if (ha->gid_list)
4364                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4365                 ha->gid_list, ha->gid_list_dma);
4366
4367         if (IS_QLA82XX(ha)) {
4368                 if (!list_empty(&ha->gbl_dsd_list)) {
4369                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4370
4371                         /* clean up allocated prev pool */
4372                         list_for_each_entry_safe(dsd_ptr,
4373                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4374                                 dma_pool_free(ha->dl_dma_pool,
4375                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4376                                 list_del(&dsd_ptr->list);
4377                                 kfree(dsd_ptr);
4378                         }
4379                 }
4380         }
4381
4382         if (ha->dl_dma_pool)
4383                 dma_pool_destroy(ha->dl_dma_pool);
4384
4385         if (ha->fcp_cmnd_dma_pool)
4386                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4387
4388         if (ha->ctx_mempool)
4389                 mempool_destroy(ha->ctx_mempool);
4390
4391         qlt_mem_free(ha);
4392
4393         if (ha->init_cb)
4394                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4395                         ha->init_cb, ha->init_cb_dma);
4396         vfree(ha->optrom_buffer);
4397         kfree(ha->nvram);
4398         kfree(ha->npiv_info);
4399         kfree(ha->swl);
4400         kfree(ha->loop_id_map);
4401
4402         ha->srb_mempool = NULL;
4403         ha->ctx_mempool = NULL;
4404         ha->sns_cmd = NULL;
4405         ha->sns_cmd_dma = 0;
4406         ha->ct_sns = NULL;
4407         ha->ct_sns_dma = 0;
4408         ha->ms_iocb = NULL;
4409         ha->ms_iocb_dma = 0;
4410         ha->init_cb = NULL;
4411         ha->init_cb_dma = 0;
4412         ha->ex_init_cb = NULL;
4413         ha->ex_init_cb_dma = 0;
4414         ha->async_pd = NULL;
4415         ha->async_pd_dma = 0;
4416
4417         ha->s_dma_pool = NULL;
4418         ha->dl_dma_pool = NULL;
4419         ha->fcp_cmnd_dma_pool = NULL;
4420
4421         ha->gid_list = NULL;
4422         ha->gid_list_dma = 0;
4423
4424         ha->tgt.atio_ring = NULL;
4425         ha->tgt.atio_dma = 0;
4426         ha->tgt.tgt_vp_map = NULL;
4427 }
4428
4429 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4430                                                 struct qla_hw_data *ha)
4431 {
4432         struct Scsi_Host *host;
4433         struct scsi_qla_host *vha = NULL;
4434
4435         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4436         if (!host) {
4437                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4438                     "Failed to allocate host from the scsi layer, aborting.\n");
4439                 return NULL;
4440         }
4441
4442         /* Clear our data area */
4443         vha = shost_priv(host);
4444         memset(vha, 0, sizeof(scsi_qla_host_t));
4445
4446         vha->host = host;
4447         vha->host_no = host->host_no;
4448         vha->hw = ha;
4449
4450         INIT_LIST_HEAD(&vha->vp_fcports);
4451         INIT_LIST_HEAD(&vha->work_list);
4452         INIT_LIST_HEAD(&vha->list);
4453         INIT_LIST_HEAD(&vha->qla_cmd_list);
4454         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4455         INIT_LIST_HEAD(&vha->logo_list);
4456         INIT_LIST_HEAD(&vha->plogi_ack_list);
4457         INIT_LIST_HEAD(&vha->qp_list);
4458         INIT_LIST_HEAD(&vha->gnl.fcports);
4459         INIT_LIST_HEAD(&vha->nvme_rport_list);
4460
4461         spin_lock_init(&vha->work_lock);
4462         spin_lock_init(&vha->cmd_list_lock);
4463         init_waitqueue_head(&vha->fcport_waitQ);
4464         init_waitqueue_head(&vha->vref_waitq);
4465
4466         vha->gnl.size = sizeof(struct get_name_list_extended) *
4467                         (ha->max_loop_id + 1);
4468         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4469             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4470         if (!vha->gnl.l) {
4471                 ql_log(ql_log_fatal, vha, 0xd04a,
4472                     "Alloc failed for name list.\n");
4473                 scsi_remove_host(vha->host);
4474                 return NULL;
4475         }
4476
4477         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4478         ql_dbg(ql_dbg_init, vha, 0x0041,
4479             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4480             vha->host, vha->hw, vha,
4481             dev_name(&(ha->pdev->dev)));
4482
4483         return vha;
4484 }
4485
4486 struct qla_work_evt *
4487 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4488 {
4489         struct qla_work_evt *e;
4490         uint8_t bail;
4491
4492         QLA_VHA_MARK_BUSY(vha, bail);
4493         if (bail)
4494                 return NULL;
4495
4496         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4497         if (!e) {
4498                 QLA_VHA_MARK_NOT_BUSY(vha);
4499                 return NULL;
4500         }
4501
4502         INIT_LIST_HEAD(&e->list);
4503         e->type = type;
4504         e->flags = QLA_EVT_FLAG_FREE;
4505         return e;
4506 }
4507
4508 int
4509 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4510 {
4511         unsigned long flags;
4512
4513         spin_lock_irqsave(&vha->work_lock, flags);
4514         list_add_tail(&e->list, &vha->work_list);
4515         spin_unlock_irqrestore(&vha->work_lock, flags);
4516
4517         if (QLA_EARLY_LINKUP(vha->hw))
4518                 schedule_work(&vha->iocb_work);
4519         else
4520                 qla2xxx_wake_dpc(vha);
4521
4522         return QLA_SUCCESS;
4523 }
4524
4525 int
4526 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4527     u32 data)
4528 {
4529         struct qla_work_evt *e;
4530
4531         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4532         if (!e)
4533                 return QLA_FUNCTION_FAILED;
4534
4535         e->u.aen.code = code;
4536         e->u.aen.data = data;
4537         return qla2x00_post_work(vha, e);
4538 }
4539
4540 int
4541 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4542 {
4543         struct qla_work_evt *e;
4544
4545         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4546         if (!e)
4547                 return QLA_FUNCTION_FAILED;
4548
4549         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4550         return qla2x00_post_work(vha, e);
4551 }
4552
4553 #define qla2x00_post_async_work(name, type)     \
4554 int qla2x00_post_async_##name##_work(           \
4555     struct scsi_qla_host *vha,                  \
4556     fc_port_t *fcport, uint16_t *data)          \
4557 {                                               \
4558         struct qla_work_evt *e;                 \
4559                                                 \
4560         e = qla2x00_alloc_work(vha, type);      \
4561         if (!e)                                 \
4562                 return QLA_FUNCTION_FAILED;     \
4563                                                 \
4564         e->u.logio.fcport = fcport;             \
4565         if (data) {                             \
4566                 e->u.logio.data[0] = data[0];   \
4567                 e->u.logio.data[1] = data[1];   \
4568         }                                       \
4569         return qla2x00_post_work(vha, e);       \
4570 }
4571
4572 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4573 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4574 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4575 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4576 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4577
4578 int
4579 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4580 {
4581         struct qla_work_evt *e;
4582
4583         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4584         if (!e)
4585                 return QLA_FUNCTION_FAILED;
4586
4587         e->u.uevent.code = code;
4588         return qla2x00_post_work(vha, e);
4589 }
4590
4591 static void
4592 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4593 {
4594         char event_string[40];
4595         char *envp[] = { event_string, NULL };
4596
4597         switch (code) {
4598         case QLA_UEVENT_CODE_FW_DUMP:
4599                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4600                     vha->host_no);
4601                 break;
4602         default:
4603                 /* do nothing */
4604                 break;
4605         }
4606         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4607 }
4608
4609 int
4610 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4611                         uint32_t *data, int cnt)
4612 {
4613         struct qla_work_evt *e;
4614
4615         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4616         if (!e)
4617                 return QLA_FUNCTION_FAILED;
4618
4619         e->u.aenfx.evtcode = evtcode;
4620         e->u.aenfx.count = cnt;
4621         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4622         return qla2x00_post_work(vha, e);
4623 }
4624
4625 int qla24xx_post_upd_fcport_work(struct scsi_qla_host *vha, fc_port_t *fcport)
4626 {
4627         struct qla_work_evt *e;
4628
4629         e = qla2x00_alloc_work(vha, QLA_EVT_UPD_FCPORT);
4630         if (!e)
4631                 return QLA_FUNCTION_FAILED;
4632
4633         e->u.fcport.fcport = fcport;
4634         return qla2x00_post_work(vha, e);
4635 }
4636
4637 static
4638 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
4639 {
4640         unsigned long flags;
4641         fc_port_t *fcport =  NULL;
4642         struct qlt_plogi_ack_t *pla =
4643             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
4644
4645         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4646         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
4647         if (fcport) {
4648                 fcport->d_id = e->u.new_sess.id;
4649                 if (pla) {
4650                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4651                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
4652                         /* we took an extra ref_count to prevent PLOGI ACK when
4653                          * fcport/sess has not been created.
4654                          */
4655                         pla->ref_count--;
4656                 }
4657         } else {
4658                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4659                 if (fcport) {
4660                         fcport->d_id = e->u.new_sess.id;
4661                         fcport->scan_state = QLA_FCPORT_FOUND;
4662                         fcport->flags |= FCF_FABRIC_DEVICE;
4663                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
4664
4665                         memcpy(fcport->port_name, e->u.new_sess.port_name,
4666                             WWN_SIZE);
4667                         list_add_tail(&fcport->list, &vha->vp_fcports);
4668
4669                         if (pla) {
4670                                 qlt_plogi_ack_link(vha, pla, fcport,
4671                                     QLT_PLOGI_LINK_SAME_WWN);
4672                                 pla->ref_count--;
4673                         }
4674                 }
4675         }
4676         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4677
4678         if (fcport) {
4679                 if (pla)
4680                         qlt_plogi_ack_unref(vha, pla);
4681                 else
4682                         qla24xx_async_gnl(vha, fcport);
4683         }
4684 }
4685
4686 void
4687 qla2x00_do_work(struct scsi_qla_host *vha)
4688 {
4689         struct qla_work_evt *e, *tmp;
4690         unsigned long flags;
4691         LIST_HEAD(work);
4692
4693         spin_lock_irqsave(&vha->work_lock, flags);
4694         list_splice_init(&vha->work_list, &work);
4695         spin_unlock_irqrestore(&vha->work_lock, flags);
4696
4697         list_for_each_entry_safe(e, tmp, &work, list) {
4698                 list_del_init(&e->list);
4699
4700                 switch (e->type) {
4701                 case QLA_EVT_AEN:
4702                         fc_host_post_event(vha->host, fc_get_event_number(),
4703                             e->u.aen.code, e->u.aen.data);
4704                         break;
4705                 case QLA_EVT_IDC_ACK:
4706                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4707                         break;
4708                 case QLA_EVT_ASYNC_LOGIN:
4709                         qla2x00_async_login(vha, e->u.logio.fcport,
4710                             e->u.logio.data);
4711                         break;
4712                 case QLA_EVT_ASYNC_LOGOUT:
4713                         qla2x00_async_logout(vha, e->u.logio.fcport);
4714                         break;
4715                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4716                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4717                             e->u.logio.data);
4718                         break;
4719                 case QLA_EVT_ASYNC_ADISC:
4720                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4721                             e->u.logio.data);
4722                         break;
4723                 case QLA_EVT_ASYNC_ADISC_DONE:
4724                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4725                             e->u.logio.data);
4726                         break;
4727                 case QLA_EVT_UEVENT:
4728                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4729                         break;
4730                 case QLA_EVT_AENFX:
4731                         qlafx00_process_aen(vha, e);
4732                         break;
4733                 case QLA_EVT_GIDPN:
4734                         qla24xx_async_gidpn(vha, e->u.fcport.fcport);
4735                         break;
4736                 case QLA_EVT_GPNID:
4737                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
4738                         break;
4739                 case QLA_EVT_GPNID_DONE:
4740                         qla24xx_async_gpnid_done(vha, e->u.iosb.sp);
4741                         break;
4742                 case QLA_EVT_NEW_SESS:
4743                         qla24xx_create_new_sess(vha, e);
4744                         break;
4745                 case QLA_EVT_GPDB:
4746                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
4747                             e->u.fcport.opt);
4748                         break;
4749                 case QLA_EVT_PRLI:
4750                         qla24xx_async_prli(vha, e->u.fcport.fcport);
4751                         break;
4752                 case QLA_EVT_GPSC:
4753                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
4754                         break;
4755                 case QLA_EVT_UPD_FCPORT:
4756                         qla2x00_update_fcport(vha, e->u.fcport.fcport);
4757                         break;
4758                 case QLA_EVT_GNL:
4759                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
4760                         break;
4761                 case QLA_EVT_NACK:
4762                         qla24xx_do_nack_work(vha, e);
4763                         break;
4764                 }
4765                 if (e->flags & QLA_EVT_FLAG_FREE)
4766                         kfree(e);
4767
4768                 /* For each work completed decrement vha ref count */
4769                 QLA_VHA_MARK_NOT_BUSY(vha);
4770         }
4771 }
4772
4773 /* Relogins all the fcports of a vport
4774  * Context: dpc thread
4775  */
4776 void qla2x00_relogin(struct scsi_qla_host *vha)
4777 {
4778         fc_port_t       *fcport;
4779         int status;
4780         struct event_arg ea;
4781
4782         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4783         /*
4784          * If the port is not ONLINE then try to login
4785          * to it if we haven't run out of retries.
4786          */
4787                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4788                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4789                         fcport->login_retry--;
4790                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4791                                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2108,
4792                                     "%s %8phC DS %d LS %d\n", __func__,
4793                                     fcport->port_name, fcport->disc_state,
4794                                     fcport->fw_login_state);
4795                                 memset(&ea, 0, sizeof(ea));
4796                                 ea.event = FCME_RELOGIN;
4797                                 ea.fcport = fcport;
4798                                 qla2x00_fcport_event_handler(vha, &ea);
4799                         } else {
4800                                 status = qla2x00_local_device_login(vha,
4801                                                                 fcport);
4802                                 if (status == QLA_SUCCESS) {
4803                                         fcport->old_loop_id = fcport->loop_id;
4804                                         ql_dbg(ql_dbg_disc, vha, 0x2003,
4805                                             "Port login OK: logged in ID 0x%x.\n",
4806                                             fcport->loop_id);
4807                                         qla2x00_update_fcport(vha, fcport);
4808                                 } else if (status == 1) {
4809                                         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4810                                         /* retry the login again */
4811                                         ql_dbg(ql_dbg_disc, vha, 0x2007,
4812                                             "Retrying %d login again loop_id 0x%x.\n",
4813                                             fcport->login_retry,
4814                                             fcport->loop_id);
4815                                 } else {
4816                                         fcport->login_retry = 0;
4817                                 }
4818
4819                                 if (fcport->login_retry == 0 &&
4820                                     status != QLA_SUCCESS)
4821                                         qla2x00_clear_loop_id(fcport);
4822                         }
4823                 }
4824                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4825                         break;
4826         }
4827 }
4828
4829 /* Schedule work on any of the dpc-workqueues */
4830 void
4831 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4832 {
4833         struct qla_hw_data *ha = base_vha->hw;
4834
4835         switch (work_code) {
4836         case MBA_IDC_AEN: /* 0x8200 */
4837                 if (ha->dpc_lp_wq)
4838                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4839                 break;
4840
4841         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4842                 if (!ha->flags.nic_core_reset_hdlr_active) {
4843                         if (ha->dpc_hp_wq)
4844                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4845                 } else
4846                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4847                             "NIC Core reset is already active. Skip "
4848                             "scheduling it again.\n");
4849                 break;
4850         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4851                 if (ha->dpc_hp_wq)
4852                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4853                 break;
4854         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4855                 if (ha->dpc_hp_wq)
4856                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4857                 break;
4858         default:
4859                 ql_log(ql_log_warn, base_vha, 0xb05f,
4860                     "Unknown work-code=0x%x.\n", work_code);
4861         }
4862
4863         return;
4864 }
4865
4866 /* Work: Perform NIC Core Unrecoverable state handling */
4867 void
4868 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4869 {
4870         struct qla_hw_data *ha =
4871                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4872         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4873         uint32_t dev_state = 0;
4874
4875         qla83xx_idc_lock(base_vha, 0);
4876         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4877         qla83xx_reset_ownership(base_vha);
4878         if (ha->flags.nic_core_reset_owner) {
4879                 ha->flags.nic_core_reset_owner = 0;
4880                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4881                     QLA8XXX_DEV_FAILED);
4882                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4883                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4884         }
4885         qla83xx_idc_unlock(base_vha, 0);
4886 }
4887
4888 /* Work: Execute IDC state handler */
4889 void
4890 qla83xx_idc_state_handler_work(struct work_struct *work)
4891 {
4892         struct qla_hw_data *ha =
4893                 container_of(work, struct qla_hw_data, idc_state_handler);
4894         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4895         uint32_t dev_state = 0;
4896
4897         qla83xx_idc_lock(base_vha, 0);
4898         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4899         if (dev_state == QLA8XXX_DEV_FAILED ||
4900                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4901                 qla83xx_idc_state_handler(base_vha);
4902         qla83xx_idc_unlock(base_vha, 0);
4903 }
4904
4905 static int
4906 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4907 {
4908         int rval = QLA_SUCCESS;
4909         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4910         uint32_t heart_beat_counter1, heart_beat_counter2;
4911
4912         do {
4913                 if (time_after(jiffies, heart_beat_wait)) {
4914                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4915                             "Nic Core f/w is not alive.\n");
4916                         rval = QLA_FUNCTION_FAILED;
4917                         break;
4918                 }
4919
4920                 qla83xx_idc_lock(base_vha, 0);
4921                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4922                     &heart_beat_counter1);
4923                 qla83xx_idc_unlock(base_vha, 0);
4924                 msleep(100);
4925                 qla83xx_idc_lock(base_vha, 0);
4926                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4927                     &heart_beat_counter2);
4928                 qla83xx_idc_unlock(base_vha, 0);
4929         } while (heart_beat_counter1 == heart_beat_counter2);
4930
4931         return rval;
4932 }
4933
4934 /* Work: Perform NIC Core Reset handling */
4935 void
4936 qla83xx_nic_core_reset_work(struct work_struct *work)
4937 {
4938         struct qla_hw_data *ha =
4939                 container_of(work, struct qla_hw_data, nic_core_reset);
4940         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4941         uint32_t dev_state = 0;
4942
4943         if (IS_QLA2031(ha)) {
4944                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4945                         ql_log(ql_log_warn, base_vha, 0xb081,
4946                             "Failed to dump mctp\n");
4947                 return;
4948         }
4949
4950         if (!ha->flags.nic_core_reset_hdlr_active) {
4951                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4952                         qla83xx_idc_lock(base_vha, 0);
4953                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4954                             &dev_state);
4955                         qla83xx_idc_unlock(base_vha, 0);
4956                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4957                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4958                                     "Nic Core f/w is alive.\n");
4959                                 return;
4960                         }
4961                 }
4962
4963                 ha->flags.nic_core_reset_hdlr_active = 1;
4964                 if (qla83xx_nic_core_reset(base_vha)) {
4965                         /* NIC Core reset failed. */
4966                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4967                             "NIC Core reset failed.\n");
4968                 }
4969                 ha->flags.nic_core_reset_hdlr_active = 0;
4970         }
4971 }
4972
4973 /* Work: Handle 8200 IDC aens */
4974 void
4975 qla83xx_service_idc_aen(struct work_struct *work)
4976 {
4977         struct qla_hw_data *ha =
4978                 container_of(work, struct qla_hw_data, idc_aen);
4979         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4980         uint32_t dev_state, idc_control;
4981
4982         qla83xx_idc_lock(base_vha, 0);
4983         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4984         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4985         qla83xx_idc_unlock(base_vha, 0);
4986         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4987                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4988                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4989                             "Application requested NIC Core Reset.\n");
4990                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4991                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4992                     QLA_SUCCESS) {
4993                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4994                             "Other protocol driver requested NIC Core Reset.\n");
4995                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4996                 }
4997         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4998                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4999                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5000         }
5001 }
5002
5003 static void
5004 qla83xx_wait_logic(void)
5005 {
5006         int i;
5007
5008         /* Yield CPU */
5009         if (!in_interrupt()) {
5010                 /*
5011                  * Wait about 200ms before retrying again.
5012                  * This controls the number of retries for single
5013                  * lock operation.
5014                  */
5015                 msleep(100);
5016                 schedule();
5017         } else {
5018                 for (i = 0; i < 20; i++)
5019                         cpu_relax(); /* This a nop instr on i386 */
5020         }
5021 }
5022
5023 static int
5024 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5025 {
5026         int rval;
5027         uint32_t data;
5028         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5029         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5030         struct qla_hw_data *ha = base_vha->hw;
5031         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5032             "Trying force recovery of the IDC lock.\n");
5033
5034         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5035         if (rval)
5036                 return rval;
5037
5038         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5039                 return QLA_SUCCESS;
5040         } else {
5041                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5042                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5043                     data);
5044                 if (rval)
5045                         return rval;
5046
5047                 msleep(200);
5048
5049                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5050                     &data);
5051                 if (rval)
5052                         return rval;
5053
5054                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5055                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5056                                         ~(idc_lck_rcvry_stage_mask));
5057                         rval = qla83xx_wr_reg(base_vha,
5058                             QLA83XX_IDC_LOCK_RECOVERY, data);
5059                         if (rval)
5060                                 return rval;
5061
5062                         /* Forcefully perform IDC UnLock */
5063                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5064                             &data);
5065                         if (rval)
5066                                 return rval;
5067                         /* Clear lock-id by setting 0xff */
5068                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5069                             0xff);
5070                         if (rval)
5071                                 return rval;
5072                         /* Clear lock-recovery by setting 0x0 */
5073                         rval = qla83xx_wr_reg(base_vha,
5074                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5075                         if (rval)
5076                                 return rval;
5077                 } else
5078                         return QLA_SUCCESS;
5079         }
5080
5081         return rval;
5082 }
5083
5084 static int
5085 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5086 {
5087         int rval = QLA_SUCCESS;
5088         uint32_t o_drv_lockid, n_drv_lockid;
5089         unsigned long lock_recovery_timeout;
5090
5091         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5092 retry_lockid:
5093         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5094         if (rval)
5095                 goto exit;
5096
5097         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5098         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5099                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5100                         return QLA_SUCCESS;
5101                 else
5102                         return QLA_FUNCTION_FAILED;
5103         }
5104
5105         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5106         if (rval)
5107                 goto exit;
5108
5109         if (o_drv_lockid == n_drv_lockid) {
5110                 qla83xx_wait_logic();
5111                 goto retry_lockid;
5112         } else
5113                 return QLA_SUCCESS;
5114
5115 exit:
5116         return rval;
5117 }
5118
5119 void
5120 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5121 {
5122         uint16_t options = (requester_id << 15) | BIT_6;
5123         uint32_t data;
5124         uint32_t lock_owner;
5125         struct qla_hw_data *ha = base_vha->hw;
5126
5127         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5128 retry_lock:
5129         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5130             == QLA_SUCCESS) {
5131                 if (data) {
5132                         /* Setting lock-id to our function-number */
5133                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5134                             ha->portnum);
5135                 } else {
5136                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5137                             &lock_owner);
5138                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5139                             "Failed to acquire IDC lock, acquired by %d, "
5140                             "retrying...\n", lock_owner);
5141
5142                         /* Retry/Perform IDC-Lock recovery */
5143                         if (qla83xx_idc_lock_recovery(base_vha)
5144                             == QLA_SUCCESS) {
5145                                 qla83xx_wait_logic();
5146                                 goto retry_lock;
5147                         } else
5148                                 ql_log(ql_log_warn, base_vha, 0xb075,
5149                                     "IDC Lock recovery FAILED.\n");
5150                 }
5151
5152         }
5153
5154         return;
5155
5156         /* XXX: IDC-lock implementation using access-control mbx */
5157 retry_lock2:
5158         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5159                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5160                     "Failed to acquire IDC lock. retrying...\n");
5161                 /* Retry/Perform IDC-Lock recovery */
5162                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5163                         qla83xx_wait_logic();
5164                         goto retry_lock2;
5165                 } else
5166                         ql_log(ql_log_warn, base_vha, 0xb076,
5167                             "IDC Lock recovery FAILED.\n");
5168         }
5169
5170         return;
5171 }
5172
5173 void
5174 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5175 {
5176 #if 0
5177         uint16_t options = (requester_id << 15) | BIT_7;
5178 #endif
5179         uint16_t retry;
5180         uint32_t data;
5181         struct qla_hw_data *ha = base_vha->hw;
5182
5183         /* IDC-unlock implementation using driver-unlock/lock-id
5184          * remote registers
5185          */
5186         retry = 0;
5187 retry_unlock:
5188         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5189             == QLA_SUCCESS) {
5190                 if (data == ha->portnum) {
5191                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5192                         /* Clearing lock-id by setting 0xff */
5193                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5194                 } else if (retry < 10) {
5195                         /* SV: XXX: IDC unlock retrying needed here? */
5196
5197                         /* Retry for IDC-unlock */
5198                         qla83xx_wait_logic();
5199                         retry++;
5200                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5201                             "Failed to release IDC lock, retrying=%d\n", retry);
5202                         goto retry_unlock;
5203                 }
5204         } else if (retry < 10) {
5205                 /* Retry for IDC-unlock */
5206                 qla83xx_wait_logic();
5207                 retry++;
5208                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5209                     "Failed to read drv-lockid, retrying=%d\n", retry);
5210                 goto retry_unlock;
5211         }
5212
5213         return;
5214
5215 #if 0
5216         /* XXX: IDC-unlock implementation using access-control mbx */
5217         retry = 0;
5218 retry_unlock2:
5219         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5220                 if (retry < 10) {
5221                         /* Retry for IDC-unlock */
5222                         qla83xx_wait_logic();
5223                         retry++;
5224                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5225                             "Failed to release IDC lock, retrying=%d\n", retry);
5226                         goto retry_unlock2;
5227                 }
5228         }
5229
5230         return;
5231 #endif
5232 }
5233
5234 int
5235 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5236 {
5237         int rval = QLA_SUCCESS;
5238         struct qla_hw_data *ha = vha->hw;
5239         uint32_t drv_presence;
5240
5241         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5242         if (rval == QLA_SUCCESS) {
5243                 drv_presence |= (1 << ha->portnum);
5244                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5245                     drv_presence);
5246         }
5247
5248         return rval;
5249 }
5250
5251 int
5252 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5253 {
5254         int rval = QLA_SUCCESS;
5255
5256         qla83xx_idc_lock(vha, 0);
5257         rval = __qla83xx_set_drv_presence(vha);
5258         qla83xx_idc_unlock(vha, 0);
5259
5260         return rval;
5261 }
5262
5263 int
5264 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5265 {
5266         int rval = QLA_SUCCESS;
5267         struct qla_hw_data *ha = vha->hw;
5268         uint32_t drv_presence;
5269
5270         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5271         if (rval == QLA_SUCCESS) {
5272                 drv_presence &= ~(1 << ha->portnum);
5273                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5274                     drv_presence);
5275         }
5276
5277         return rval;
5278 }
5279
5280 int
5281 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5282 {
5283         int rval = QLA_SUCCESS;
5284
5285         qla83xx_idc_lock(vha, 0);
5286         rval = __qla83xx_clear_drv_presence(vha);
5287         qla83xx_idc_unlock(vha, 0);
5288
5289         return rval;
5290 }
5291
5292 static void
5293 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5294 {
5295         struct qla_hw_data *ha = vha->hw;
5296         uint32_t drv_ack, drv_presence;
5297         unsigned long ack_timeout;
5298
5299         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5300         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5301         while (1) {
5302                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5303                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5304                 if ((drv_ack & drv_presence) == drv_presence)
5305                         break;
5306
5307                 if (time_after_eq(jiffies, ack_timeout)) {
5308                         ql_log(ql_log_warn, vha, 0xb067,
5309                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5310                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5311                         /*
5312                          * The function(s) which did not ack in time are forced
5313                          * to withdraw any further participation in the IDC
5314                          * reset.
5315                          */
5316                         if (drv_ack != drv_presence)
5317                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5318                                     drv_ack);
5319                         break;
5320                 }
5321
5322                 qla83xx_idc_unlock(vha, 0);
5323                 msleep(1000);
5324                 qla83xx_idc_lock(vha, 0);
5325         }
5326
5327         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5328         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5329 }
5330
5331 static int
5332 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5333 {
5334         int rval = QLA_SUCCESS;
5335         uint32_t idc_control;
5336
5337         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5338         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5339
5340         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5341         __qla83xx_get_idc_control(vha, &idc_control);
5342         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5343         __qla83xx_set_idc_control(vha, 0);
5344
5345         qla83xx_idc_unlock(vha, 0);
5346         rval = qla83xx_restart_nic_firmware(vha);
5347         qla83xx_idc_lock(vha, 0);
5348
5349         if (rval != QLA_SUCCESS) {
5350                 ql_log(ql_log_fatal, vha, 0xb06a,
5351                     "Failed to restart NIC f/w.\n");
5352                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5353                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5354         } else {
5355                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5356                     "Success in restarting nic f/w.\n");
5357                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5358                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5359         }
5360
5361         return rval;
5362 }
5363
5364 /* Assumes idc_lock always held on entry */
5365 int
5366 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5367 {
5368         struct qla_hw_data *ha = base_vha->hw;
5369         int rval = QLA_SUCCESS;
5370         unsigned long dev_init_timeout;
5371         uint32_t dev_state;
5372
5373         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5374         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5375
5376         while (1) {
5377
5378                 if (time_after_eq(jiffies, dev_init_timeout)) {
5379                         ql_log(ql_log_warn, base_vha, 0xb06e,
5380                             "Initialization TIMEOUT!\n");
5381                         /* Init timeout. Disable further NIC Core
5382                          * communication.
5383                          */
5384                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5385                                 QLA8XXX_DEV_FAILED);
5386                         ql_log(ql_log_info, base_vha, 0xb06f,
5387                             "HW State: FAILED.\n");
5388                 }
5389
5390                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5391                 switch (dev_state) {
5392                 case QLA8XXX_DEV_READY:
5393                         if (ha->flags.nic_core_reset_owner)
5394                                 qla83xx_idc_audit(base_vha,
5395                                     IDC_AUDIT_COMPLETION);
5396                         ha->flags.nic_core_reset_owner = 0;
5397                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5398                             "Reset_owner reset by 0x%x.\n",
5399                             ha->portnum);
5400                         goto exit;
5401                 case QLA8XXX_DEV_COLD:
5402                         if (ha->flags.nic_core_reset_owner)
5403                                 rval = qla83xx_device_bootstrap(base_vha);
5404                         else {
5405                         /* Wait for AEN to change device-state */
5406                                 qla83xx_idc_unlock(base_vha, 0);
5407                                 msleep(1000);
5408                                 qla83xx_idc_lock(base_vha, 0);
5409                         }
5410                         break;
5411                 case QLA8XXX_DEV_INITIALIZING:
5412                         /* Wait for AEN to change device-state */
5413                         qla83xx_idc_unlock(base_vha, 0);
5414                         msleep(1000);
5415                         qla83xx_idc_lock(base_vha, 0);
5416                         break;
5417                 case QLA8XXX_DEV_NEED_RESET:
5418                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5419                                 qla83xx_need_reset_handler(base_vha);
5420                         else {
5421                                 /* Wait for AEN to change device-state */
5422                                 qla83xx_idc_unlock(base_vha, 0);
5423                                 msleep(1000);
5424                                 qla83xx_idc_lock(base_vha, 0);
5425                         }
5426                         /* reset timeout value after need reset handler */
5427                         dev_init_timeout = jiffies +
5428                             (ha->fcoe_dev_init_timeout * HZ);
5429                         break;
5430                 case QLA8XXX_DEV_NEED_QUIESCENT:
5431                         /* XXX: DEBUG for now */
5432                         qla83xx_idc_unlock(base_vha, 0);
5433                         msleep(1000);
5434                         qla83xx_idc_lock(base_vha, 0);
5435                         break;
5436                 case QLA8XXX_DEV_QUIESCENT:
5437                         /* XXX: DEBUG for now */
5438                         if (ha->flags.quiesce_owner)
5439                                 goto exit;
5440
5441                         qla83xx_idc_unlock(base_vha, 0);
5442                         msleep(1000);
5443                         qla83xx_idc_lock(base_vha, 0);
5444                         dev_init_timeout = jiffies +
5445                             (ha->fcoe_dev_init_timeout * HZ);
5446                         break;
5447                 case QLA8XXX_DEV_FAILED:
5448                         if (ha->flags.nic_core_reset_owner)
5449                                 qla83xx_idc_audit(base_vha,
5450                                     IDC_AUDIT_COMPLETION);
5451                         ha->flags.nic_core_reset_owner = 0;
5452                         __qla83xx_clear_drv_presence(base_vha);
5453                         qla83xx_idc_unlock(base_vha, 0);
5454                         qla8xxx_dev_failed_handler(base_vha);
5455                         rval = QLA_FUNCTION_FAILED;
5456                         qla83xx_idc_lock(base_vha, 0);
5457                         goto exit;
5458                 case QLA8XXX_BAD_VALUE:
5459                         qla83xx_idc_unlock(base_vha, 0);
5460                         msleep(1000);
5461                         qla83xx_idc_lock(base_vha, 0);
5462                         break;
5463                 default:
5464                         ql_log(ql_log_warn, base_vha, 0xb071,
5465                             "Unknown Device State: %x.\n", dev_state);
5466                         qla83xx_idc_unlock(base_vha, 0);
5467                         qla8xxx_dev_failed_handler(base_vha);
5468                         rval = QLA_FUNCTION_FAILED;
5469                         qla83xx_idc_lock(base_vha, 0);
5470                         goto exit;
5471                 }
5472         }
5473
5474 exit:
5475         return rval;
5476 }
5477
5478 void
5479 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5480 {
5481         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5482             board_disable);
5483         struct pci_dev *pdev = ha->pdev;
5484         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5485
5486         /*
5487          * if UNLOAD flag is already set, then continue unload,
5488          * where it was set first.
5489          */
5490         if (test_bit(UNLOADING, &base_vha->dpc_flags))
5491                 return;
5492
5493         ql_log(ql_log_warn, base_vha, 0x015b,
5494             "Disabling adapter.\n");
5495
5496         qla2x00_wait_for_sess_deletion(base_vha);
5497
5498         set_bit(UNLOADING, &base_vha->dpc_flags);
5499
5500         qla2x00_delete_all_vps(ha, base_vha);
5501
5502         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5503
5504         qla2x00_dfs_remove(base_vha);
5505
5506         qla84xx_put_chip(base_vha);
5507
5508         if (base_vha->timer_active)
5509                 qla2x00_stop_timer(base_vha);
5510
5511         base_vha->flags.online = 0;
5512
5513         qla2x00_destroy_deferred_work(ha);
5514
5515         /*
5516          * Do not try to stop beacon blink as it will issue a mailbox
5517          * command.
5518          */
5519         qla2x00_free_sysfs_attr(base_vha, false);
5520
5521         fc_remove_host(base_vha->host);
5522
5523         scsi_remove_host(base_vha->host);
5524
5525         base_vha->flags.init_done = 0;
5526         qla25xx_delete_queues(base_vha);
5527         qla2x00_free_fcports(base_vha);
5528         qla2x00_free_irqs(base_vha);
5529         qla2x00_mem_free(ha);
5530         qla82xx_md_free(base_vha);
5531         qla2x00_free_queues(ha);
5532
5533         qla2x00_unmap_iobases(ha);
5534
5535         pci_release_selected_regions(ha->pdev, ha->bars);
5536         pci_disable_pcie_error_reporting(pdev);
5537         pci_disable_device(pdev);
5538
5539         /*
5540          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5541          */
5542 }
5543
5544 /**************************************************************************
5545 * qla2x00_do_dpc
5546 *   This kernel thread is a task that is schedule by the interrupt handler
5547 *   to perform the background processing for interrupts.
5548 *
5549 * Notes:
5550 * This task always run in the context of a kernel thread.  It
5551 * is kick-off by the driver's detect code and starts up
5552 * up one per adapter. It immediately goes to sleep and waits for
5553 * some fibre event.  When either the interrupt handler or
5554 * the timer routine detects a event it will one of the task
5555 * bits then wake us up.
5556 **************************************************************************/
5557 static int
5558 qla2x00_do_dpc(void *data)
5559 {
5560         scsi_qla_host_t *base_vha;
5561         struct qla_hw_data *ha;
5562         uint32_t online;
5563         struct qla_qpair *qpair;
5564
5565         ha = (struct qla_hw_data *)data;
5566         base_vha = pci_get_drvdata(ha->pdev);
5567
5568         set_user_nice(current, MIN_NICE);
5569
5570         set_current_state(TASK_INTERRUPTIBLE);
5571         while (!kthread_should_stop()) {
5572                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5573                     "DPC handler sleeping.\n");
5574
5575                 schedule();
5576
5577                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5578                         goto end_loop;
5579
5580                 if (ha->flags.eeh_busy) {
5581                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5582                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5583                         goto end_loop;
5584                 }
5585
5586                 ha->dpc_active = 1;
5587
5588                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5589                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5590                     base_vha->dpc_flags);
5591
5592                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5593                         break;
5594
5595                 qla2x00_do_work(base_vha);
5596
5597                 if (IS_P3P_TYPE(ha)) {
5598                         if (IS_QLA8044(ha)) {
5599                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5600                                         &base_vha->dpc_flags)) {
5601                                         qla8044_idc_lock(ha);
5602                                         qla8044_wr_direct(base_vha,
5603                                                 QLA8044_CRB_DEV_STATE_INDEX,
5604                                                 QLA8XXX_DEV_FAILED);
5605                                         qla8044_idc_unlock(ha);
5606                                         ql_log(ql_log_info, base_vha, 0x4004,
5607                                                 "HW State: FAILED.\n");
5608                                         qla8044_device_state_handler(base_vha);
5609                                         continue;
5610                                 }
5611
5612                         } else {
5613                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5614                                         &base_vha->dpc_flags)) {
5615                                         qla82xx_idc_lock(ha);
5616                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5617                                                 QLA8XXX_DEV_FAILED);
5618                                         qla82xx_idc_unlock(ha);
5619                                         ql_log(ql_log_info, base_vha, 0x0151,
5620                                                 "HW State: FAILED.\n");
5621                                         qla82xx_device_state_handler(base_vha);
5622                                         continue;
5623                                 }
5624                         }
5625
5626                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5627                                 &base_vha->dpc_flags)) {
5628
5629                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5630                                     "FCoE context reset scheduled.\n");
5631                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5632                                         &base_vha->dpc_flags))) {
5633                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
5634                                                 /* FCoE-ctx reset failed.
5635                                                  * Escalate to chip-reset
5636                                                  */
5637                                                 set_bit(ISP_ABORT_NEEDED,
5638                                                         &base_vha->dpc_flags);
5639                                         }
5640                                         clear_bit(ABORT_ISP_ACTIVE,
5641                                                 &base_vha->dpc_flags);
5642                                 }
5643
5644                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5645                                     "FCoE context reset end.\n");
5646                         }
5647                 } else if (IS_QLAFX00(ha)) {
5648                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
5649                                 &base_vha->dpc_flags)) {
5650                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5651                                     "Firmware Reset Recovery\n");
5652                                 if (qlafx00_reset_initialize(base_vha)) {
5653                                         /* Failed. Abort isp later. */
5654                                         if (!test_bit(UNLOADING,
5655                                             &base_vha->dpc_flags)) {
5656                                                 set_bit(ISP_UNRECOVERABLE,
5657                                                     &base_vha->dpc_flags);
5658                                                 ql_dbg(ql_dbg_dpc, base_vha,
5659                                                     0x4021,
5660                                                     "Reset Recovery Failed\n");
5661                                         }
5662                                 }
5663                         }
5664
5665                         if (test_and_clear_bit(FX00_TARGET_SCAN,
5666                                 &base_vha->dpc_flags)) {
5667                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5668                                     "ISPFx00 Target Scan scheduled\n");
5669                                 if (qlafx00_rescan_isp(base_vha)) {
5670                                         if (!test_bit(UNLOADING,
5671                                             &base_vha->dpc_flags))
5672                                                 set_bit(ISP_UNRECOVERABLE,
5673                                                     &base_vha->dpc_flags);
5674                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
5675                                             "ISPFx00 Target Scan Failed\n");
5676                                 }
5677                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
5678                                     "ISPFx00 Target Scan End\n");
5679                         }
5680                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
5681                                 &base_vha->dpc_flags)) {
5682                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
5683                                     "ISPFx00 Host Info resend scheduled\n");
5684                                 qlafx00_fx_disc(base_vha,
5685                                     &base_vha->hw->mr.fcport,
5686                                     FXDISC_REG_HOST_INFO);
5687                         }
5688                 }
5689
5690                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
5691                                                 &base_vha->dpc_flags)) {
5692
5693                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5694                             "ISP abort scheduled.\n");
5695                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5696                             &base_vha->dpc_flags))) {
5697
5698                                 if (ha->isp_ops->abort_isp(base_vha)) {
5699                                         /* failed. retry later */
5700                                         set_bit(ISP_ABORT_NEEDED,
5701                                             &base_vha->dpc_flags);
5702                                 }
5703                                 clear_bit(ABORT_ISP_ACTIVE,
5704                                                 &base_vha->dpc_flags);
5705                         }
5706
5707                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5708                             "ISP abort end.\n");
5709                 }
5710
5711                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5712                     &base_vha->dpc_flags)) {
5713                         qla2x00_update_fcports(base_vha);
5714                 }
5715
5716                 if (IS_QLAFX00(ha))
5717                         goto loop_resync_check;
5718
5719                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5720                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5721                             "Quiescence mode scheduled.\n");
5722                         if (IS_P3P_TYPE(ha)) {
5723                                 if (IS_QLA82XX(ha))
5724                                         qla82xx_device_state_handler(base_vha);
5725                                 if (IS_QLA8044(ha))
5726                                         qla8044_device_state_handler(base_vha);
5727                                 clear_bit(ISP_QUIESCE_NEEDED,
5728                                     &base_vha->dpc_flags);
5729                                 if (!ha->flags.quiesce_owner) {
5730                                         qla2x00_perform_loop_resync(base_vha);
5731                                         if (IS_QLA82XX(ha)) {
5732                                                 qla82xx_idc_lock(ha);
5733                                                 qla82xx_clear_qsnt_ready(
5734                                                     base_vha);
5735                                                 qla82xx_idc_unlock(ha);
5736                                         } else if (IS_QLA8044(ha)) {
5737                                                 qla8044_idc_lock(ha);
5738                                                 qla8044_clear_qsnt_ready(
5739                                                     base_vha);
5740                                                 qla8044_idc_unlock(ha);
5741                                         }
5742                                 }
5743                         } else {
5744                                 clear_bit(ISP_QUIESCE_NEEDED,
5745                                     &base_vha->dpc_flags);
5746                                 qla2x00_quiesce_io(base_vha);
5747                         }
5748                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5749                             "Quiescence mode end.\n");
5750                 }
5751
5752                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5753                                 &base_vha->dpc_flags) &&
5754                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5755
5756                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5757                             "Reset marker scheduled.\n");
5758                         qla2x00_rst_aen(base_vha);
5759                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5760                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5761                             "Reset marker end.\n");
5762                 }
5763
5764                 /* Retry each device up to login retry count */
5765                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5766                                                 &base_vha->dpc_flags)) &&
5767                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5768                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5769
5770                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5771                             "Relogin scheduled.\n");
5772                         qla2x00_relogin(base_vha);
5773                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5774                             "Relogin end.\n");
5775                 }
5776 loop_resync_check:
5777                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5778                     &base_vha->dpc_flags)) {
5779
5780                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5781                             "Loop resync scheduled.\n");
5782
5783                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5784                             &base_vha->dpc_flags))) {
5785
5786                                 qla2x00_loop_resync(base_vha);
5787
5788                                 clear_bit(LOOP_RESYNC_ACTIVE,
5789                                                 &base_vha->dpc_flags);
5790                         }
5791
5792                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5793                             "Loop resync end.\n");
5794                 }
5795
5796                 if (IS_QLAFX00(ha))
5797                         goto intr_on_check;
5798
5799                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5800                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5801                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5802                         qla2xxx_flash_npiv_conf(base_vha);
5803                 }
5804
5805 intr_on_check:
5806                 if (!ha->interrupts_on)
5807                         ha->isp_ops->enable_intrs(ha);
5808
5809                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5810                                         &base_vha->dpc_flags)) {
5811                         if (ha->beacon_blink_led == 1)
5812                                 ha->isp_ops->beacon_blink(base_vha);
5813                 }
5814
5815                 /* qpair online check */
5816                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
5817                     &base_vha->dpc_flags)) {
5818                         if (ha->flags.eeh_busy ||
5819                             ha->flags.pci_channel_io_perm_failure)
5820                                 online = 0;
5821                         else
5822                                 online = 1;
5823
5824                         mutex_lock(&ha->mq_lock);
5825                         list_for_each_entry(qpair, &base_vha->qp_list,
5826                             qp_list_elem)
5827                         qpair->online = online;
5828                         mutex_unlock(&ha->mq_lock);
5829                 }
5830
5831                 if (!IS_QLAFX00(ha))
5832                         qla2x00_do_dpc_all_vps(base_vha);
5833
5834                 ha->dpc_active = 0;
5835 end_loop:
5836                 set_current_state(TASK_INTERRUPTIBLE);
5837         } /* End of while(1) */
5838         __set_current_state(TASK_RUNNING);
5839
5840         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5841             "DPC handler exiting.\n");
5842
5843         /*
5844          * Make sure that nobody tries to wake us up again.
5845          */
5846         ha->dpc_active = 0;
5847
5848         /* Cleanup any residual CTX SRBs. */
5849         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5850
5851         return 0;
5852 }
5853
5854 void
5855 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5856 {
5857         struct qla_hw_data *ha = vha->hw;
5858         struct task_struct *t = ha->dpc_thread;
5859
5860         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5861                 wake_up_process(t);
5862 }
5863
5864 /*
5865 *  qla2x00_rst_aen
5866 *      Processes asynchronous reset.
5867 *
5868 * Input:
5869 *      ha  = adapter block pointer.
5870 */
5871 static void
5872 qla2x00_rst_aen(scsi_qla_host_t *vha)
5873 {
5874         if (vha->flags.online && !vha->flags.reset_active &&
5875             !atomic_read(&vha->loop_down_timer) &&
5876             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5877                 do {
5878                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5879
5880                         /*
5881                          * Issue marker command only when we are going to start
5882                          * the I/O.
5883                          */
5884                         vha->marker_needed = 1;
5885                 } while (!atomic_read(&vha->loop_down_timer) &&
5886                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5887         }
5888 }
5889
5890 /**************************************************************************
5891 *   qla2x00_timer
5892 *
5893 * Description:
5894 *   One second timer
5895 *
5896 * Context: Interrupt
5897 ***************************************************************************/
5898 void
5899 qla2x00_timer(scsi_qla_host_t *vha)
5900 {
5901         unsigned long   cpu_flags = 0;
5902         int             start_dpc = 0;
5903         int             index;
5904         srb_t           *sp;
5905         uint16_t        w;
5906         struct qla_hw_data *ha = vha->hw;
5907         struct req_que *req;
5908
5909         if (ha->flags.eeh_busy) {
5910                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5911                     "EEH = %d, restarting timer.\n",
5912                     ha->flags.eeh_busy);
5913                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5914                 return;
5915         }
5916
5917         /*
5918          * Hardware read to raise pending EEH errors during mailbox waits. If
5919          * the read returns -1 then disable the board.
5920          */
5921         if (!pci_channel_offline(ha->pdev)) {
5922                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5923                 qla2x00_check_reg16_for_disconnect(vha, w);
5924         }
5925
5926         /* Make sure qla82xx_watchdog is run only for physical port */
5927         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5928                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5929                         start_dpc++;
5930                 if (IS_QLA82XX(ha))
5931                         qla82xx_watchdog(vha);
5932                 else if (IS_QLA8044(ha))
5933                         qla8044_watchdog(vha);
5934         }
5935
5936         if (!vha->vp_idx && IS_QLAFX00(ha))
5937                 qlafx00_timer_routine(vha);
5938
5939         /* Loop down handler. */
5940         if (atomic_read(&vha->loop_down_timer) > 0 &&
5941             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5942             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5943                 && vha->flags.online) {
5944
5945                 if (atomic_read(&vha->loop_down_timer) ==
5946                     vha->loop_down_abort_time) {
5947
5948                         ql_log(ql_log_info, vha, 0x6008,
5949                             "Loop down - aborting the queues before time expires.\n");
5950
5951                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5952                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5953
5954                         /*
5955                          * Schedule an ISP abort to return any FCP2-device
5956                          * commands.
5957                          */
5958                         /* NPIV - scan physical port only */
5959                         if (!vha->vp_idx) {
5960                                 spin_lock_irqsave(&ha->hardware_lock,
5961                                     cpu_flags);
5962                                 req = ha->req_q_map[0];
5963                                 for (index = 1;
5964                                     index < req->num_outstanding_cmds;
5965                                     index++) {
5966                                         fc_port_t *sfcp;
5967
5968                                         sp = req->outstanding_cmds[index];
5969                                         if (!sp)
5970                                                 continue;
5971                                         if (sp->cmd_type != TYPE_SRB)
5972                                                 continue;
5973                                         if (sp->type != SRB_SCSI_CMD)
5974                                                 continue;
5975                                         sfcp = sp->fcport;
5976                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5977                                                 continue;
5978
5979                                         if (IS_QLA82XX(ha))
5980                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5981                                                         &vha->dpc_flags);
5982                                         else
5983                                                 set_bit(ISP_ABORT_NEEDED,
5984                                                         &vha->dpc_flags);
5985                                         break;
5986                                 }
5987                                 spin_unlock_irqrestore(&ha->hardware_lock,
5988                                                                 cpu_flags);
5989                         }
5990                         start_dpc++;
5991                 }
5992
5993                 /* if the loop has been down for 4 minutes, reinit adapter */
5994                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5995                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5996                                 ql_log(ql_log_warn, vha, 0x6009,
5997                                     "Loop down - aborting ISP.\n");
5998
5999                                 if (IS_QLA82XX(ha))
6000                                         set_bit(FCOE_CTX_RESET_NEEDED,
6001                                                 &vha->dpc_flags);
6002                                 else
6003                                         set_bit(ISP_ABORT_NEEDED,
6004                                                 &vha->dpc_flags);
6005                         }
6006                 }
6007                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6008                     "Loop down - seconds remaining %d.\n",
6009                     atomic_read(&vha->loop_down_timer));
6010         }
6011         /* Check if beacon LED needs to be blinked for physical host only */
6012         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6013                 /* There is no beacon_blink function for ISP82xx */
6014                 if (!IS_P3P_TYPE(ha)) {
6015                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6016                         start_dpc++;
6017                 }
6018         }
6019
6020         /* Process any deferred work. */
6021         if (!list_empty(&vha->work_list))
6022                 start_dpc++;
6023
6024         /*
6025          * FC-NVME
6026          * see if the active AEN count has changed from what was last reported.
6027          */
6028         if (atomic_read(&vha->nvme_active_aen_cnt) != vha->nvme_last_rptd_aen) {
6029                 vha->nvme_last_rptd_aen =
6030                     atomic_read(&vha->nvme_active_aen_cnt);
6031                 ql_log(ql_log_info, vha, 0x3002,
6032                     "reporting new aen count of %d to the fw\n",
6033                     vha->nvme_last_rptd_aen);
6034         }
6035
6036         /* Schedule the DPC routine if needed */
6037         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6038             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6039             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6040             start_dpc ||
6041             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6042             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6043             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6044             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6045             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6046             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6047                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6048                     "isp_abort_needed=%d loop_resync_needed=%d "
6049                     "fcport_update_needed=%d start_dpc=%d "
6050                     "reset_marker_needed=%d",
6051                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6052                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6053                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6054                     start_dpc,
6055                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6056                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6057                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6058                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6059                     "relogin_needed=%d.\n",
6060                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6061                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6062                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6063                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6064                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6065                 qla2xxx_wake_dpc(vha);
6066         }
6067
6068         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6069 }
6070
6071 /* Firmware interface routines. */
6072
6073 #define FW_BLOBS        11
6074 #define FW_ISP21XX      0
6075 #define FW_ISP22XX      1
6076 #define FW_ISP2300      2
6077 #define FW_ISP2322      3
6078 #define FW_ISP24XX      4
6079 #define FW_ISP25XX      5
6080 #define FW_ISP81XX      6
6081 #define FW_ISP82XX      7
6082 #define FW_ISP2031      8
6083 #define FW_ISP8031      9
6084 #define FW_ISP27XX      10
6085
6086 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6087 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6088 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6089 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6090 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6091 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6092 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6093 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6094 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6095 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6096 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6097
6098
6099 static DEFINE_MUTEX(qla_fw_lock);
6100
6101 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
6102         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6103         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6104         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6105         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6106         { .name = FW_FILE_ISP24XX, },
6107         { .name = FW_FILE_ISP25XX, },
6108         { .name = FW_FILE_ISP81XX, },
6109         { .name = FW_FILE_ISP82XX, },
6110         { .name = FW_FILE_ISP2031, },
6111         { .name = FW_FILE_ISP8031, },
6112         { .name = FW_FILE_ISP27XX, },
6113 };
6114
6115 struct fw_blob *
6116 qla2x00_request_firmware(scsi_qla_host_t *vha)
6117 {
6118         struct qla_hw_data *ha = vha->hw;
6119         struct fw_blob *blob;
6120
6121         if (IS_QLA2100(ha)) {
6122                 blob = &qla_fw_blobs[FW_ISP21XX];
6123         } else if (IS_QLA2200(ha)) {
6124                 blob = &qla_fw_blobs[FW_ISP22XX];
6125         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6126                 blob = &qla_fw_blobs[FW_ISP2300];
6127         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6128                 blob = &qla_fw_blobs[FW_ISP2322];
6129         } else if (IS_QLA24XX_TYPE(ha)) {
6130                 blob = &qla_fw_blobs[FW_ISP24XX];
6131         } else if (IS_QLA25XX(ha)) {
6132                 blob = &qla_fw_blobs[FW_ISP25XX];
6133         } else if (IS_QLA81XX(ha)) {
6134                 blob = &qla_fw_blobs[FW_ISP81XX];
6135         } else if (IS_QLA82XX(ha)) {
6136                 blob = &qla_fw_blobs[FW_ISP82XX];
6137         } else if (IS_QLA2031(ha)) {
6138                 blob = &qla_fw_blobs[FW_ISP2031];
6139         } else if (IS_QLA8031(ha)) {
6140                 blob = &qla_fw_blobs[FW_ISP8031];
6141         } else if (IS_QLA27XX(ha)) {
6142                 blob = &qla_fw_blobs[FW_ISP27XX];
6143         } else {
6144                 return NULL;
6145         }
6146
6147         mutex_lock(&qla_fw_lock);
6148         if (blob->fw)
6149                 goto out;
6150
6151         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6152                 ql_log(ql_log_warn, vha, 0x0063,
6153                     "Failed to load firmware image (%s).\n", blob->name);
6154                 blob->fw = NULL;
6155                 blob = NULL;
6156                 goto out;
6157         }
6158
6159 out:
6160         mutex_unlock(&qla_fw_lock);
6161         return blob;
6162 }
6163
6164 static void
6165 qla2x00_release_firmware(void)
6166 {
6167         int idx;
6168
6169         mutex_lock(&qla_fw_lock);
6170         for (idx = 0; idx < FW_BLOBS; idx++)
6171                 release_firmware(qla_fw_blobs[idx].fw);
6172         mutex_unlock(&qla_fw_lock);
6173 }
6174
6175 static pci_ers_result_t
6176 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6177 {
6178         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6179         struct qla_hw_data *ha = vha->hw;
6180
6181         ql_dbg(ql_dbg_aer, vha, 0x9000,
6182             "PCI error detected, state %x.\n", state);
6183
6184         switch (state) {
6185         case pci_channel_io_normal:
6186                 ha->flags.eeh_busy = 0;
6187                 if (ql2xmqsupport) {
6188                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6189                         qla2xxx_wake_dpc(vha);
6190                 }
6191                 return PCI_ERS_RESULT_CAN_RECOVER;
6192         case pci_channel_io_frozen:
6193                 ha->flags.eeh_busy = 1;
6194                 /* For ISP82XX complete any pending mailbox cmd */
6195                 if (IS_QLA82XX(ha)) {
6196                         ha->flags.isp82xx_fw_hung = 1;
6197                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
6198                         qla82xx_clear_pending_mbx(vha);
6199                 }
6200                 qla2x00_free_irqs(vha);
6201                 pci_disable_device(pdev);
6202                 /* Return back all IOs */
6203                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6204                 if (ql2xmqsupport) {
6205                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6206                         qla2xxx_wake_dpc(vha);
6207                 }
6208                 return PCI_ERS_RESULT_NEED_RESET;
6209         case pci_channel_io_perm_failure:
6210                 ha->flags.pci_channel_io_perm_failure = 1;
6211                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6212                 if (ql2xmqsupport) {
6213                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6214                         qla2xxx_wake_dpc(vha);
6215                 }
6216                 return PCI_ERS_RESULT_DISCONNECT;
6217         }
6218         return PCI_ERS_RESULT_NEED_RESET;
6219 }
6220
6221 static pci_ers_result_t
6222 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6223 {
6224         int risc_paused = 0;
6225         uint32_t stat;
6226         unsigned long flags;
6227         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6228         struct qla_hw_data *ha = base_vha->hw;
6229         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6230         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6231
6232         if (IS_QLA82XX(ha))
6233                 return PCI_ERS_RESULT_RECOVERED;
6234
6235         spin_lock_irqsave(&ha->hardware_lock, flags);
6236         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6237                 stat = RD_REG_DWORD(&reg->hccr);
6238                 if (stat & HCCR_RISC_PAUSE)
6239                         risc_paused = 1;
6240         } else if (IS_QLA23XX(ha)) {
6241                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
6242                 if (stat & HSR_RISC_PAUSED)
6243                         risc_paused = 1;
6244         } else if (IS_FWI2_CAPABLE(ha)) {
6245                 stat = RD_REG_DWORD(&reg24->host_status);
6246                 if (stat & HSRX_RISC_PAUSED)
6247                         risc_paused = 1;
6248         }
6249         spin_unlock_irqrestore(&ha->hardware_lock, flags);
6250
6251         if (risc_paused) {
6252                 ql_log(ql_log_info, base_vha, 0x9003,
6253                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
6254                 ha->isp_ops->fw_dump(base_vha, 0);
6255
6256                 return PCI_ERS_RESULT_NEED_RESET;
6257         } else
6258                 return PCI_ERS_RESULT_RECOVERED;
6259 }
6260
6261 static uint32_t
6262 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
6263 {
6264         uint32_t rval = QLA_FUNCTION_FAILED;
6265         uint32_t drv_active = 0;
6266         struct qla_hw_data *ha = base_vha->hw;
6267         int fn;
6268         struct pci_dev *other_pdev = NULL;
6269
6270         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
6271             "Entered %s.\n", __func__);
6272
6273         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6274
6275         if (base_vha->flags.online) {
6276                 /* Abort all outstanding commands,
6277                  * so as to be requeued later */
6278                 qla2x00_abort_isp_cleanup(base_vha);
6279         }
6280
6281
6282         fn = PCI_FUNC(ha->pdev->devfn);
6283         while (fn > 0) {
6284                 fn--;
6285                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
6286                     "Finding pci device at function = 0x%x.\n", fn);
6287                 other_pdev =
6288                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
6289                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
6290                     fn));
6291
6292                 if (!other_pdev)
6293                         continue;
6294                 if (atomic_read(&other_pdev->enable_cnt)) {
6295                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
6296                             "Found PCI func available and enable at 0x%x.\n",
6297                             fn);
6298                         pci_dev_put(other_pdev);
6299                         break;
6300                 }
6301                 pci_dev_put(other_pdev);
6302         }
6303
6304         if (!fn) {
6305                 /* Reset owner */
6306                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
6307                     "This devfn is reset owner = 0x%x.\n",
6308                     ha->pdev->devfn);
6309                 qla82xx_idc_lock(ha);
6310
6311                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6312                     QLA8XXX_DEV_INITIALIZING);
6313
6314                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
6315                     QLA82XX_IDC_VERSION);
6316
6317                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6318                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6319                     "drv_active = 0x%x.\n", drv_active);
6320
6321                 qla82xx_idc_unlock(ha);
6322                 /* Reset if device is not already reset
6323                  * drv_active would be 0 if a reset has already been done
6324                  */
6325                 if (drv_active)
6326                         rval = qla82xx_start_firmware(base_vha);
6327                 else
6328                         rval = QLA_SUCCESS;
6329                 qla82xx_idc_lock(ha);
6330
6331                 if (rval != QLA_SUCCESS) {
6332                         ql_log(ql_log_info, base_vha, 0x900b,
6333                             "HW State: FAILED.\n");
6334                         qla82xx_clear_drv_active(ha);
6335                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6336                             QLA8XXX_DEV_FAILED);
6337                 } else {
6338                         ql_log(ql_log_info, base_vha, 0x900c,
6339                             "HW State: READY.\n");
6340                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6341                             QLA8XXX_DEV_READY);
6342                         qla82xx_idc_unlock(ha);
6343                         ha->flags.isp82xx_fw_hung = 0;
6344                         rval = qla82xx_restart_isp(base_vha);
6345                         qla82xx_idc_lock(ha);
6346                         /* Clear driver state register */
6347                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6348                         qla82xx_set_drv_active(base_vha);
6349                 }
6350                 qla82xx_idc_unlock(ha);
6351         } else {
6352                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6353                     "This devfn is not reset owner = 0x%x.\n",
6354                     ha->pdev->devfn);
6355                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6356                     QLA8XXX_DEV_READY)) {
6357                         ha->flags.isp82xx_fw_hung = 0;
6358                         rval = qla82xx_restart_isp(base_vha);
6359                         qla82xx_idc_lock(ha);
6360                         qla82xx_set_drv_active(base_vha);
6361                         qla82xx_idc_unlock(ha);
6362                 }
6363         }
6364         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6365
6366         return rval;
6367 }
6368
6369 static pci_ers_result_t
6370 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6371 {
6372         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6373         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6374         struct qla_hw_data *ha = base_vha->hw;
6375         struct rsp_que *rsp;
6376         int rc, retries = 10;
6377
6378         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6379             "Slot Reset.\n");
6380
6381         /* Workaround: qla2xxx driver which access hardware earlier
6382          * needs error state to be pci_channel_io_online.
6383          * Otherwise mailbox command timesout.
6384          */
6385         pdev->error_state = pci_channel_io_normal;
6386
6387         pci_restore_state(pdev);
6388
6389         /* pci_restore_state() clears the saved_state flag of the device
6390          * save restored state which resets saved_state flag
6391          */
6392         pci_save_state(pdev);
6393
6394         if (ha->mem_only)
6395                 rc = pci_enable_device_mem(pdev);
6396         else
6397                 rc = pci_enable_device(pdev);
6398
6399         if (rc) {
6400                 ql_log(ql_log_warn, base_vha, 0x9005,
6401                     "Can't re-enable PCI device after reset.\n");
6402                 goto exit_slot_reset;
6403         }
6404
6405         rsp = ha->rsp_q_map[0];
6406         if (qla2x00_request_irqs(ha, rsp))
6407                 goto exit_slot_reset;
6408
6409         if (ha->isp_ops->pci_config(base_vha))
6410                 goto exit_slot_reset;
6411
6412         if (IS_QLA82XX(ha)) {
6413                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6414                         ret = PCI_ERS_RESULT_RECOVERED;
6415                         goto exit_slot_reset;
6416                 } else
6417                         goto exit_slot_reset;
6418         }
6419
6420         while (ha->flags.mbox_busy && retries--)
6421                 msleep(1000);
6422
6423         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6424         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6425                 ret =  PCI_ERS_RESULT_RECOVERED;
6426         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6427
6428
6429 exit_slot_reset:
6430         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6431             "slot_reset return %x.\n", ret);
6432
6433         return ret;
6434 }
6435
6436 static void
6437 qla2xxx_pci_resume(struct pci_dev *pdev)
6438 {
6439         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6440         struct qla_hw_data *ha = base_vha->hw;
6441         int ret;
6442
6443         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6444             "pci_resume.\n");
6445
6446         ret = qla2x00_wait_for_hba_online(base_vha);
6447         if (ret != QLA_SUCCESS) {
6448                 ql_log(ql_log_fatal, base_vha, 0x9002,
6449                     "The device failed to resume I/O from slot/link_reset.\n");
6450         }
6451
6452         pci_cleanup_aer_uncorrect_error_status(pdev);
6453
6454         ha->flags.eeh_busy = 0;
6455 }
6456
6457 static void
6458 qla83xx_disable_laser(scsi_qla_host_t *vha)
6459 {
6460         uint32_t reg, data, fn;
6461         struct qla_hw_data *ha = vha->hw;
6462         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
6463
6464         /* pci func #/port # */
6465         ql_dbg(ql_dbg_init, vha, 0x004b,
6466             "Disabling Laser for hba: %p\n", vha);
6467
6468         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
6469                 (BIT_15|BIT_14|BIT_13|BIT_12));
6470
6471         fn = (fn >> 12);
6472
6473         if (fn & 1)
6474                 reg = PORT_1_2031;
6475         else
6476                 reg = PORT_0_2031;
6477
6478         data = LASER_OFF_2031;
6479
6480         qla83xx_wr_reg(vha, reg, data);
6481 }
6482
6483 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6484 {
6485         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6486
6487         return blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev);
6488 }
6489
6490 static const struct pci_error_handlers qla2xxx_err_handler = {
6491         .error_detected = qla2xxx_pci_error_detected,
6492         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6493         .slot_reset = qla2xxx_pci_slot_reset,
6494         .resume = qla2xxx_pci_resume,
6495 };
6496
6497 static struct pci_device_id qla2xxx_pci_tbl[] = {
6498         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6499         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6500         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6501         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6502         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6503         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6504         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6505         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6506         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6507         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6508         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6509         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6510         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6511         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6512         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6513         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6514         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6515         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6516         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6517         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6518         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6519         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6520         { 0 },
6521 };
6522 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6523
6524 static struct pci_driver qla2xxx_pci_driver = {
6525         .name           = QLA2XXX_DRIVER_NAME,
6526         .driver         = {
6527                 .owner          = THIS_MODULE,
6528         },
6529         .id_table       = qla2xxx_pci_tbl,
6530         .probe          = qla2x00_probe_one,
6531         .remove         = qla2x00_remove_one,
6532         .shutdown       = qla2x00_shutdown,
6533         .err_handler    = &qla2xxx_err_handler,
6534 };
6535
6536 static const struct file_operations apidev_fops = {
6537         .owner = THIS_MODULE,
6538         .llseek = noop_llseek,
6539 };
6540
6541 /**
6542  * qla2x00_module_init - Module initialization.
6543  **/
6544 static int __init
6545 qla2x00_module_init(void)
6546 {
6547         int ret = 0;
6548
6549         /* Allocate cache for SRBs. */
6550         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6551             SLAB_HWCACHE_ALIGN, NULL);
6552         if (srb_cachep == NULL) {
6553                 ql_log(ql_log_fatal, NULL, 0x0001,
6554                     "Unable to allocate SRB cache...Failing load!.\n");
6555                 return -ENOMEM;
6556         }
6557
6558         /* Initialize target kmem_cache and mem_pools */
6559         ret = qlt_init();
6560         if (ret < 0) {
6561                 kmem_cache_destroy(srb_cachep);
6562                 return ret;
6563         } else if (ret > 0) {
6564                 /*
6565                  * If initiator mode is explictly disabled by qlt_init(),
6566                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6567                  * performing scsi_scan_target() during LOOP UP event.
6568                  */
6569                 qla2xxx_transport_functions.disable_target_scan = 1;
6570                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6571         }
6572
6573         /* Derive version string. */
6574         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6575         if (ql2xextended_error_logging)
6576                 strcat(qla2x00_version_str, "-debug");
6577
6578         qla2xxx_transport_template =
6579             fc_attach_transport(&qla2xxx_transport_functions);
6580         if (!qla2xxx_transport_template) {
6581                 kmem_cache_destroy(srb_cachep);
6582                 ql_log(ql_log_fatal, NULL, 0x0002,
6583                     "fc_attach_transport failed...Failing load!.\n");
6584                 qlt_exit();
6585                 return -ENODEV;
6586         }
6587
6588         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6589         if (apidev_major < 0) {
6590                 ql_log(ql_log_fatal, NULL, 0x0003,
6591                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6592         }
6593
6594         qla2xxx_transport_vport_template =
6595             fc_attach_transport(&qla2xxx_transport_vport_functions);
6596         if (!qla2xxx_transport_vport_template) {
6597                 kmem_cache_destroy(srb_cachep);
6598                 qlt_exit();
6599                 fc_release_transport(qla2xxx_transport_template);
6600                 ql_log(ql_log_fatal, NULL, 0x0004,
6601                     "fc_attach_transport vport failed...Failing load!.\n");
6602                 return -ENODEV;
6603         }
6604         ql_log(ql_log_info, NULL, 0x0005,
6605             "QLogic Fibre Channel HBA Driver: %s.\n",
6606             qla2x00_version_str);
6607         ret = pci_register_driver(&qla2xxx_pci_driver);
6608         if (ret) {
6609                 kmem_cache_destroy(srb_cachep);
6610                 qlt_exit();
6611                 fc_release_transport(qla2xxx_transport_template);
6612                 fc_release_transport(qla2xxx_transport_vport_template);
6613                 ql_log(ql_log_fatal, NULL, 0x0006,
6614                     "pci_register_driver failed...ret=%d Failing load!.\n",
6615                     ret);
6616         }
6617         return ret;
6618 }
6619
6620 /**
6621  * qla2x00_module_exit - Module cleanup.
6622  **/
6623 static void __exit
6624 qla2x00_module_exit(void)
6625 {
6626         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6627         pci_unregister_driver(&qla2xxx_pci_driver);
6628         qla2x00_release_firmware();
6629         kmem_cache_destroy(srb_cachep);
6630         qlt_exit();
6631         if (ctx_cachep)
6632                 kmem_cache_destroy(ctx_cachep);
6633         fc_release_transport(qla2xxx_transport_template);
6634         fc_release_transport(qla2xxx_transport_vport_template);
6635 }
6636
6637 module_init(qla2x00_module_init);
6638 module_exit(qla2x00_module_exit);
6639
6640 MODULE_AUTHOR("QLogic Corporation");
6641 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6642 MODULE_LICENSE("GPL");
6643 MODULE_VERSION(QLA2XXX_VERSION);
6644 MODULE_FIRMWARE(FW_FILE_ISP21XX);
6645 MODULE_FIRMWARE(FW_FILE_ISP22XX);
6646 MODULE_FIRMWARE(FW_FILE_ISP2300);
6647 MODULE_FIRMWARE(FW_FILE_ISP2322);
6648 MODULE_FIRMWARE(FW_FILE_ISP24XX);
6649 MODULE_FIRMWARE(FW_FILE_ISP25XX);