drivers/scsi/be2iscsi/be_main.c

   1 /*
   2  * Copyright 2017 Broadcom. All Rights Reserved.
   3  * The term "Broadcom" refers to Broadcom Limited and/or its subsidiaries.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation. The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@broadcom.com
  12  *
  13  */
  14
  15 #include <linux/reboot.h>
  16 #include <linux/delay.h>
  17 #include <linux/slab.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/blkdev.h>
  20 #include <linux/pci.h>
  21 #include <linux/string.h>
  22 #include <linux/kernel.h>
  23 #include <linux/semaphore.h>
  24 #include <linux/iscsi_boot_sysfs.h>
  25 #include <linux/module.h>
  26 #include <linux/bsg-lib.h>
  27 #include <linux/irq_poll.h>
  28
  29 #include <scsi/libiscsi.h>
  30 #include <scsi/scsi_bsg_iscsi.h>
  31 #include <scsi/scsi_netlink.h>
  32 #include <scsi/scsi_transport_iscsi.h>
  33 #include <scsi/scsi_transport.h>
  34 #include <scsi/scsi_cmnd.h>
  35 #include <scsi/scsi_device.h>
  36 #include <scsi/scsi_host.h>
  37 #include <scsi/scsi.h>
  38 #include "be_main.h"
  39 #include "be_iscsi.h"
  40 #include "be_mgmt.h"
  41 #include "be_cmds.h"
  42
  43 static unsigned int be_iopoll_budget = 10;
  44 static unsigned int be_max_phys_size = 64;
  45 static unsigned int enable_msix = 1;
  46
  47 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
  48 MODULE_VERSION(BUILD_STR);
  49 MODULE_AUTHOR("Emulex Corporation");
  50 MODULE_LICENSE("GPL");
  51 module_param(be_iopoll_budget, int, 0);
  52 module_param(enable_msix, int, 0);
  53 module_param(be_max_phys_size, uint, S_IRUGO);
  54 MODULE_PARM_DESC(be_max_phys_size,
  55                 "Maximum Size (In Kilobytes) of physically contiguous "
  56                 "memory that can be allocated. Range is 16 - 128");
  57
  58 #define beiscsi_disp_param(_name)\
  59 static ssize_t  \
  60 beiscsi_##_name##_disp(struct device *dev,\
  61                         struct device_attribute *attrib, char *buf)     \
  62 {       \
  63         struct Scsi_Host *shost = class_to_shost(dev);\
  64         struct beiscsi_hba *phba = iscsi_host_priv(shost); \
  65         return snprintf(buf, PAGE_SIZE, "%d\n",\
  66                         phba->attr_##_name);\
  67 }
  68
  69 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
  70 static int \
  71 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
  72 {\
  73         if (val >= _minval && val <= _maxval) {\
  74                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
  75                             "BA_%d : beiscsi_"#_name" updated "\
  76                             "from 0x%x ==> 0x%x\n",\
  77                             phba->attr_##_name, val); \
  78                 phba->attr_##_name = val;\
  79                 return 0;\
  80         } \
  81         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
  82                     "BA_%d beiscsi_"#_name" attribute "\
  83                     "cannot be updated to 0x%x, "\
  84                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
  85                 return -EINVAL;\
  86 }
  87
  88 #define beiscsi_store_param(_name)  \
  89 static ssize_t \
  90 beiscsi_##_name##_store(struct device *dev,\
  91                          struct device_attribute *attr, const char *buf,\
  92                          size_t count) \
  93 { \
  94         struct Scsi_Host  *shost = class_to_shost(dev);\
  95         struct beiscsi_hba *phba = iscsi_host_priv(shost);\
  96         uint32_t param_val = 0;\
  97         if (!isdigit(buf[0]))\
  98                 return -EINVAL;\
  99         if (sscanf(buf, "%i", &param_val) != 1)\
 100                 return -EINVAL;\
 101         if (beiscsi_##_name##_change(phba, param_val) == 0) \
 102                 return strlen(buf);\
 103         else \
 104                 return -EINVAL;\
 105 }
 106
 107 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
 108 static int \
 109 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
 110 { \
 111         if (val >= _minval && val <= _maxval) {\
 112                 phba->attr_##_name = val;\
 113                 return 0;\
 114         } \
 115         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
 116                     "BA_%d beiscsi_"#_name" attribute " \
 117                     "cannot be updated to 0x%x, "\
 118                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
 119         phba->attr_##_name = _defval;\
 120         return -EINVAL;\
 121 }
 122
 123 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
 124 static uint beiscsi_##_name = _defval;\
 125 module_param(beiscsi_##_name, uint, S_IRUGO);\
 126 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
 127 beiscsi_disp_param(_name)\
 128 beiscsi_change_param(_name, _minval, _maxval, _defval)\
 129 beiscsi_store_param(_name)\
 130 beiscsi_init_param(_name, _minval, _maxval, _defval)\
 131 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
 132               beiscsi_##_name##_disp, beiscsi_##_name##_store)
 133
 134 /*
 135  * When new log level added update the
 136  * the MAX allowed value for log_enable
 137  */
 138 BEISCSI_RW_ATTR(log_enable, 0x00,
 139                 0xFF, 0x00, "Enable logging Bit Mask\n"
 140                 "\t\t\t\tInitialization Events  : 0x01\n"
 141                 "\t\t\t\tMailbox Events         : 0x02\n"
 142                 "\t\t\t\tMiscellaneous Events   : 0x04\n"
 143                 "\t\t\t\tError Handling         : 0x08\n"
 144                 "\t\t\t\tIO Path Events         : 0x10\n"
 145                 "\t\t\t\tConfiguration Path     : 0x20\n"
 146                 "\t\t\t\tiSCSI Protocol         : 0x40\n");
 147
 148 DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
 149 DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
 150 DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
 151 DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
 152 DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
 153              beiscsi_active_session_disp, NULL);
 154 DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
 155              beiscsi_free_session_disp, NULL);
 156 struct device_attribute *beiscsi_attrs[] = {
 157         &dev_attr_beiscsi_log_enable,
 158         &dev_attr_beiscsi_drvr_ver,
 159         &dev_attr_beiscsi_adapter_family,
 160         &dev_attr_beiscsi_fw_ver,
 161         &dev_attr_beiscsi_active_session_count,
 162         &dev_attr_beiscsi_free_session_count,
 163         &dev_attr_beiscsi_phys_port,
 164         NULL,
 165 };
 166
 167 static char const *cqe_desc[] = {
 168         "RESERVED_DESC",
 169         "SOL_CMD_COMPLETE",
 170         "SOL_CMD_KILLED_DATA_DIGEST_ERR",
 171         "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
 172         "CXN_KILLED_BURST_LEN_MISMATCH",
 173         "CXN_KILLED_AHS_RCVD",
 174         "CXN_KILLED_HDR_DIGEST_ERR",
 175         "CXN_KILLED_UNKNOWN_HDR",
 176         "CXN_KILLED_STALE_ITT_TTT_RCVD",
 177         "CXN_KILLED_INVALID_ITT_TTT_RCVD",
 178         "CXN_KILLED_RST_RCVD",
 179         "CXN_KILLED_TIMED_OUT",
 180         "CXN_KILLED_RST_SENT",
 181         "CXN_KILLED_FIN_RCVD",
 182         "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
 183         "CXN_KILLED_BAD_WRB_INDEX_ERROR",
 184         "CXN_KILLED_OVER_RUN_RESIDUAL",
 185         "CXN_KILLED_UNDER_RUN_RESIDUAL",
 186         "CMD_KILLED_INVALID_STATSN_RCVD",
 187         "CMD_KILLED_INVALID_R2T_RCVD",
 188         "CMD_CXN_KILLED_LUN_INVALID",
 189         "CMD_CXN_KILLED_ICD_INVALID",
 190         "CMD_CXN_KILLED_ITT_INVALID",
 191         "CMD_CXN_KILLED_SEQ_OUTOFORDER",
 192         "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
 193         "CXN_INVALIDATE_NOTIFY",
 194         "CXN_INVALIDATE_INDEX_NOTIFY",
 195         "CMD_INVALIDATED_NOTIFY",
 196         "UNSOL_HDR_NOTIFY",
 197         "UNSOL_DATA_NOTIFY",
 198         "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
 199         "DRIVERMSG_NOTIFY",
 200         "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
 201         "SOL_CMD_KILLED_DIF_ERR",
 202         "CXN_KILLED_SYN_RCVD",
 203         "CXN_KILLED_IMM_DATA_RCVD"
 204 };
 205
 206 static int beiscsi_slave_configure(struct scsi_device *sdev)
 207 {
 208         blk_queue_max_segment_size(sdev->request_queue, 65536);
 209         return 0;
 210 }
 211
 212 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
 213 {
 214         struct iscsi_task *abrt_task = (struct iscsi_task *)sc->SCp.ptr;
 215         struct iscsi_cls_session *cls_session;
 216         struct beiscsi_io_task *abrt_io_task;
 217         struct beiscsi_conn *beiscsi_conn;
 218         struct iscsi_session *session;
 219         struct invldt_cmd_tbl inv_tbl;
 220         struct beiscsi_hba *phba;
 221         struct iscsi_conn *conn;
 222         int rc;
 223
 224         cls_session = starget_to_session(scsi_target(sc->device));
 225         session = cls_session->dd_data;
 226
 227         /* check if we raced, task just got cleaned up under us */
 228         spin_lock_bh(&session->back_lock);
 229         if (!abrt_task || !abrt_task->sc) {
 230                 spin_unlock_bh(&session->back_lock);
 231                 return SUCCESS;
 232         }
 233         /* get a task ref till FW processes the req for the ICD used */
 234         __iscsi_get_task(abrt_task);
 235         abrt_io_task = abrt_task->dd_data;
 236         conn = abrt_task->conn;
 237         beiscsi_conn = conn->dd_data;
 238         phba = beiscsi_conn->phba;
 239         /* mark WRB invalid which have been not processed by FW yet */
 240         if (is_chip_be2_be3r(phba)) {
 241                 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 242                               abrt_io_task->pwrb_handle->pwrb, 1);
 243         } else {
 244                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, invld,
 245                               abrt_io_task->pwrb_handle->pwrb, 1);
 246         }
 247         inv_tbl.cid = beiscsi_conn->beiscsi_conn_cid;
 248         inv_tbl.icd = abrt_io_task->psgl_handle->sgl_index;
 249         spin_unlock_bh(&session->back_lock);
 250
 251         rc = beiscsi_mgmt_invalidate_icds(phba, &inv_tbl, 1);
 252         iscsi_put_task(abrt_task);
 253         if (rc) {
 254                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 255                             "BM_%d : sc %p invalidation failed %d\n",
 256                             sc, rc);
 257                 return FAILED;
 258         }
 259
 260         return iscsi_eh_abort(sc);
 261 }
 262
 263 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
 264 {
 265         struct beiscsi_invldt_cmd_tbl {
 266                 struct invldt_cmd_tbl tbl[BE_INVLDT_CMD_TBL_SZ];
 267                 struct iscsi_task *task[BE_INVLDT_CMD_TBL_SZ];
 268         } *inv_tbl;
 269         struct iscsi_cls_session *cls_session;
 270         struct beiscsi_conn *beiscsi_conn;
 271         struct beiscsi_io_task *io_task;
 272         struct iscsi_session *session;
 273         struct beiscsi_hba *phba;
 274         struct iscsi_conn *conn;
 275         struct iscsi_task *task;
 276         unsigned int i, nents;
 277         int rc, more = 0;
 278
 279         cls_session = starget_to_session(scsi_target(sc->device));
 280         session = cls_session->dd_data;
 281
 282         spin_lock_bh(&session->frwd_lock);
 283         if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
 284                 spin_unlock_bh(&session->frwd_lock);
 285                 return FAILED;
 286         }
 287
 288         conn = session->leadconn;
 289         beiscsi_conn = conn->dd_data;
 290         phba = beiscsi_conn->phba;
 291
 292         inv_tbl = kzalloc(sizeof(*inv_tbl), GFP_ATOMIC);
 293         if (!inv_tbl) {
 294                 spin_unlock_bh(&session->frwd_lock);
 295                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 296                             "BM_%d : invldt_cmd_tbl alloc failed\n");
 297                 return FAILED;
 298         }
 299         nents = 0;
 300         /* take back_lock to prevent task from getting cleaned up under us */
 301         spin_lock(&session->back_lock);
 302         for (i = 0; i < conn->session->cmds_max; i++) {
 303                 task = conn->session->cmds[i];
 304                 if (!task->sc)
 305                         continue;
 306
 307                 if (sc->device->lun != task->sc->device->lun)
 308                         continue;
 309                 /**
 310                  * Can't fit in more cmds? Normally this won't happen b'coz
 311                  * BEISCSI_CMD_PER_LUN is same as BE_INVLDT_CMD_TBL_SZ.
 312                  */
 313                 if (nents == BE_INVLDT_CMD_TBL_SZ) {
 314                         more = 1;
 315                         break;
 316                 }
 317
 318                 /* get a task ref till FW processes the req for the ICD used */
 319                 __iscsi_get_task(task);
 320                 io_task = task->dd_data;
 321                 /* mark WRB invalid which have been not processed by FW yet */
 322                 if (is_chip_be2_be3r(phba)) {
 323                         AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 324                                       io_task->pwrb_handle->pwrb, 1);
 325                 } else {
 326                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, invld,
 327                                       io_task->pwrb_handle->pwrb, 1);
 328                 }
 329
 330                 inv_tbl->tbl[nents].cid = beiscsi_conn->beiscsi_conn_cid;
 331                 inv_tbl->tbl[nents].icd = io_task->psgl_handle->sgl_index;
 332                 inv_tbl->task[nents] = task;
 333                 nents++;
 334         }
 335         spin_unlock(&session->back_lock);
 336         spin_unlock_bh(&session->frwd_lock);
 337
 338         rc = SUCCESS;
 339         if (!nents)
 340                 goto end_reset;
 341
 342         if (more) {
 343                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 344                             "BM_%d : number of cmds exceeds size of invalidation table\n");
 345                 rc = FAILED;
 346                 goto end_reset;
 347         }
 348
 349         if (beiscsi_mgmt_invalidate_icds(phba, &inv_tbl->tbl[0], nents)) {
 350                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 351                             "BM_%d : cid %u scmds invalidation failed\n",
 352                             beiscsi_conn->beiscsi_conn_cid);
 353                 rc = FAILED;
 354         }
 355
 356 end_reset:
 357         for (i = 0; i < nents; i++)
 358                 iscsi_put_task(inv_tbl->task[i]);
 359         kfree(inv_tbl);
 360
 361         if (rc == SUCCESS)
 362                 rc = iscsi_eh_device_reset(sc);
 363         return rc;
 364 }
 365
 366 /*------------------- PCI Driver operations and data ----------------- */
 367 static const struct pci_device_id beiscsi_pci_id_table[] = {
 368         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 369         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 370         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 371         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 372         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 373         { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
 374         { 0 }
 375 };
 376 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
 377
 378
 379 static struct scsi_host_template beiscsi_sht = {
 380         .module = THIS_MODULE,
 381         .name = "Emulex 10Gbe open-iscsi Initiator Driver",
 382         .proc_name = DRV_NAME,
 383         .queuecommand = iscsi_queuecommand,
 384         .change_queue_depth = scsi_change_queue_depth,
 385         .slave_configure = beiscsi_slave_configure,
 386         .target_alloc = iscsi_target_alloc,
 387         .eh_timed_out = iscsi_eh_cmd_timed_out,
 388         .eh_abort_handler = beiscsi_eh_abort,
 389         .eh_device_reset_handler = beiscsi_eh_device_reset,
 390         .eh_target_reset_handler = iscsi_eh_session_reset,
 391         .shost_attrs = beiscsi_attrs,
 392         .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
 393         .can_queue = BE2_IO_DEPTH,
 394         .this_id = -1,
 395         .max_sectors = BEISCSI_MAX_SECTORS,
 396         .cmd_per_lun = BEISCSI_CMD_PER_LUN,
 397         .use_clustering = ENABLE_CLUSTERING,
 398         .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
 399         .track_queue_depth = 1,
 400 };
 401
 402 static struct scsi_transport_template *beiscsi_scsi_transport;
 403
 404 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
 405 {
 406         struct beiscsi_hba *phba;
 407         struct Scsi_Host *shost;
 408
 409         shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
 410         if (!shost) {
 411                 dev_err(&pcidev->dev,
 412                         "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
 413                 return NULL;
 414         }
 415         shost->max_id = BE2_MAX_SESSIONS;
 416         shost->max_channel = 0;
 417         shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
 418         shost->max_lun = BEISCSI_NUM_MAX_LUN;
 419         shost->transportt = beiscsi_scsi_transport;
 420         phba = iscsi_host_priv(shost);
 421         memset(phba, 0, sizeof(*phba));
 422         phba->shost = shost;
 423         phba->pcidev = pci_dev_get(pcidev);
 424         pci_set_drvdata(pcidev, phba);
 425         phba->interface_handle = 0xFFFFFFFF;
 426
 427         return phba;
 428 }
 429
 430 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
 431 {
 432         if (phba->csr_va) {
 433                 iounmap(phba->csr_va);
 434                 phba->csr_va = NULL;
 435         }
 436         if (phba->db_va) {
 437                 iounmap(phba->db_va);
 438                 phba->db_va = NULL;
 439         }
 440         if (phba->pci_va) {
 441                 iounmap(phba->pci_va);
 442                 phba->pci_va = NULL;
 443         }
 444 }
 445
 446 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
 447                                 struct pci_dev *pcidev)
 448 {
 449         u8 __iomem *addr;
 450         int pcicfg_reg;
 451
 452         addr = ioremap_nocache(pci_resource_start(pcidev, 2),
 453                                pci_resource_len(pcidev, 2));
 454         if (addr == NULL)
 455                 return -ENOMEM;
 456         phba->ctrl.csr = addr;
 457         phba->csr_va = addr;
 458         phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
 459
 460         addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
 461         if (addr == NULL)
 462                 goto pci_map_err;
 463         phba->ctrl.db = addr;
 464         phba->db_va = addr;
 465         phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);
 466
 467         if (phba->generation == BE_GEN2)
 468                 pcicfg_reg = 1;
 469         else
 470                 pcicfg_reg = 0;
 471
 472         addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
 473                                pci_resource_len(pcidev, pcicfg_reg));
 474
 475         if (addr == NULL)
 476                 goto pci_map_err;
 477         phba->ctrl.pcicfg = addr;
 478         phba->pci_va = addr;
 479         phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
 480         return 0;
 481
 482 pci_map_err:
 483         beiscsi_unmap_pci_function(phba);
 484         return -ENOMEM;
 485 }
 486
 487 static int beiscsi_enable_pci(struct pci_dev *pcidev)
 488 {
 489         int ret;
 490
 491         ret = pci_enable_device(pcidev);
 492         if (ret) {
 493                 dev_err(&pcidev->dev,
 494                         "beiscsi_enable_pci - enable device failed\n");
 495                 return ret;
 496         }
 497
 498         ret = pci_request_regions(pcidev, DRV_NAME);
 499         if (ret) {
 500                 dev_err(&pcidev->dev,
 501                                 "beiscsi_enable_pci - request region failed\n");
 502                 goto pci_dev_disable;
 503         }
 504
 505         pci_set_master(pcidev);
 506         ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
 507         if (ret) {
 508                 ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
 509                 if (ret) {
 510                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 511                         goto pci_region_release;
 512                 } else {
 513                         ret = pci_set_consistent_dma_mask(pcidev,
 514                                                           DMA_BIT_MASK(32));
 515                 }
 516         } else {
 517                 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
 518                 if (ret) {
 519                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 520                         goto pci_region_release;
 521                 }
 522         }
 523         return 0;
 524
 525 pci_region_release:
 526         pci_release_regions(pcidev);
 527 pci_dev_disable:
 528         pci_disable_device(pcidev);
 529
 530         return ret;
 531 }
 532
 533 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
 534 {
 535         struct be_ctrl_info *ctrl = &phba->ctrl;
 536         struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
 537         struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
 538         int status = 0;
 539
 540         ctrl->pdev = pdev;
 541         status = beiscsi_map_pci_bars(phba, pdev);
 542         if (status)
 543                 return status;
 544         mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
 545         mbox_mem_alloc->va = pci_alloc_consistent(pdev,
 546                                                   mbox_mem_alloc->size,
 547                                                   &mbox_mem_alloc->dma);
 548         if (!mbox_mem_alloc->va) {
 549                 beiscsi_unmap_pci_function(phba);
 550                 return -ENOMEM;
 551         }
 552
 553         mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
 554         mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
 555         mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
 556         memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 557         mutex_init(&ctrl->mbox_lock);
 558         spin_lock_init(&phba->ctrl.mcc_lock);
 559
 560         return status;
 561 }
 562
 563 /**
 564  * beiscsi_get_params()- Set the config paramters
 565  * @phba: ptr  device priv structure
 566  **/
 567 static void beiscsi_get_params(struct beiscsi_hba *phba)
 568 {
 569         uint32_t total_cid_count = 0;
 570         uint32_t total_icd_count = 0;
 571         uint8_t ulp_num = 0;
 572
 573         total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
 574                           BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
 575
 576         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
 577                 uint32_t align_mask = 0;
 578                 uint32_t icd_post_per_page = 0;
 579                 uint32_t icd_count_unavailable = 0;
 580                 uint32_t icd_start = 0, icd_count = 0;
 581                 uint32_t icd_start_align = 0, icd_count_align = 0;
 582
 583                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
 584                         icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
 585                         icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 586
 587                         /* Get ICD count that can be posted on each page */
 588                         icd_post_per_page = (PAGE_SIZE / (BE2_SGE *
 589                                              sizeof(struct iscsi_sge)));
 590                         align_mask = (icd_post_per_page - 1);
 591
 592                         /* Check if icd_start is aligned ICD per page posting */
 593                         if (icd_start % icd_post_per_page) {
 594                                 icd_start_align = ((icd_start +
 595                                                     icd_post_per_page) &
 596                                                     ~(align_mask));
 597                                 phba->fw_config.
 598                                         iscsi_icd_start[ulp_num] =
 599                                         icd_start_align;
 600                         }
 601
 602                         icd_count_align = (icd_count & ~align_mask);
 603
 604                         /* ICD discarded in the process of alignment */
 605                         if (icd_start_align)
 606                                 icd_count_unavailable = ((icd_start_align -
 607                                                           icd_start) +
 608                                                          (icd_count -
 609                                                           icd_count_align));
 610
 611                         /* Updated ICD count available */
 612                         phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
 613                                         icd_count_unavailable);
 614
 615                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
 616                                         "BM_%d : Aligned ICD values\n"
 617                                         "\t ICD Start : %d\n"
 618                                         "\t ICD Count : %d\n"
 619                                         "\t ICD Discarded : %d\n",
 620                                         phba->fw_config.
 621                                         iscsi_icd_start[ulp_num],
 622                                         phba->fw_config.
 623                                         iscsi_icd_count[ulp_num],
 624                                         icd_count_unavailable);
 625                         break;
 626                 }
 627         }
 628
 629         total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 630         phba->params.ios_per_ctrl = (total_icd_count -
 631                                     (total_cid_count +
 632                                      BE2_TMFS + BE2_NOPOUT_REQ));
 633         phba->params.cxns_per_ctrl = total_cid_count;
 634         phba->params.icds_per_ctrl = total_icd_count;
 635         phba->params.num_sge_per_io = BE2_SGE;
 636         phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
 637         phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
 638         phba->params.num_eq_entries = 1024;
 639         phba->params.num_cq_entries = 1024;
 640         phba->params.wrbs_per_cxn = 256;
 641 }
 642
 643 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
 644                            unsigned int id, unsigned int clr_interrupt,
 645                            unsigned int num_processed,
 646                            unsigned char rearm, unsigned char event)
 647 {
 648         u32 val = 0;
 649
 650         if (rearm)
 651                 val |= 1 << DB_EQ_REARM_SHIFT;
 652         if (clr_interrupt)
 653                 val |= 1 << DB_EQ_CLR_SHIFT;
 654         if (event)
 655                 val |= 1 << DB_EQ_EVNT_SHIFT;
 656
 657         val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
 658         /* Setting lower order EQ_ID Bits */
 659         val |= (id & DB_EQ_RING_ID_LOW_MASK);
 660
 661         /* Setting Higher order EQ_ID Bits */
 662         val |= (((id >> DB_EQ_HIGH_FEILD_SHIFT) &
 663                   DB_EQ_RING_ID_HIGH_MASK)
 664                   << DB_EQ_HIGH_SET_SHIFT);
 665
 666         iowrite32(val, phba->db_va + DB_EQ_OFFSET);
 667 }
 668
 669 /**
 670  * be_isr_mcc - The isr routine of the driver.
 671  * @irq: Not used
 672  * @dev_id: Pointer to host adapter structure
 673  */
 674 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
 675 {
 676         struct beiscsi_hba *phba;
 677         struct be_eq_entry *eqe;
 678         struct be_queue_info *eq;
 679         struct be_queue_info *mcc;
 680         unsigned int mcc_events;
 681         struct be_eq_obj *pbe_eq;
 682
 683         pbe_eq = dev_id;
 684         eq = &pbe_eq->q;
 685         phba =  pbe_eq->phba;
 686         mcc = &phba->ctrl.mcc_obj.cq;
 687         eqe = queue_tail_node(eq);
 688
 689         mcc_events = 0;
 690         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 691                                 & EQE_VALID_MASK) {
 692                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 693                      resource_id) / 32] &
 694                      EQE_RESID_MASK) >> 16) == mcc->id) {
 695                         mcc_events++;
 696                 }
 697                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 698                 queue_tail_inc(eq);
 699                 eqe = queue_tail_node(eq);
 700         }
 701
 702         if (mcc_events) {
 703                 queue_work(phba->wq, &pbe_eq->mcc_work);
 704                 hwi_ring_eq_db(phba, eq->id, 1, mcc_events, 1, 1);
 705         }
 706         return IRQ_HANDLED;
 707 }
 708
 709 /**
 710  * be_isr_msix - The isr routine of the driver.
 711  * @irq: Not used
 712  * @dev_id: Pointer to host adapter structure
 713  */
 714 static irqreturn_t be_isr_msix(int irq, void *dev_id)
 715 {
 716         struct beiscsi_hba *phba;
 717         struct be_queue_info *eq;
 718         struct be_eq_obj *pbe_eq;
 719
 720         pbe_eq = dev_id;
 721         eq = &pbe_eq->q;
 722
 723         phba = pbe_eq->phba;
 724         /* disable interrupt till iopoll completes */
 725         hwi_ring_eq_db(phba, eq->id, 1, 0, 0, 1);
 726         irq_poll_sched(&pbe_eq->iopoll);
 727
 728         return IRQ_HANDLED;
 729 }
 730
 731 /**
 732  * be_isr - The isr routine of the driver.
 733  * @irq: Not used
 734  * @dev_id: Pointer to host adapter structure
 735  */
 736 static irqreturn_t be_isr(int irq, void *dev_id)
 737 {
 738         struct beiscsi_hba *phba;
 739         struct hwi_controller *phwi_ctrlr;
 740         struct hwi_context_memory *phwi_context;
 741         struct be_eq_entry *eqe;
 742         struct be_queue_info *eq;
 743         struct be_queue_info *mcc;
 744         unsigned int mcc_events, io_events;
 745         struct be_ctrl_info *ctrl;
 746         struct be_eq_obj *pbe_eq;
 747         int isr, rearm;
 748
 749         phba = dev_id;
 750         ctrl = &phba->ctrl;
 751         isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
 752                        (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
 753         if (!isr)
 754                 return IRQ_NONE;
 755
 756         phwi_ctrlr = phba->phwi_ctrlr;
 757         phwi_context = phwi_ctrlr->phwi_ctxt;
 758         pbe_eq = &phwi_context->be_eq[0];
 759
 760         eq = &phwi_context->be_eq[0].q;
 761         mcc = &phba->ctrl.mcc_obj.cq;
 762         eqe = queue_tail_node(eq);
 763
 764         io_events = 0;
 765         mcc_events = 0;
 766         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 767                                 & EQE_VALID_MASK) {
 768                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 769                       resource_id) / 32] & EQE_RESID_MASK) >> 16) == mcc->id)
 770                         mcc_events++;
 771                 else
 772                         io_events++;
 773                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 774                 queue_tail_inc(eq);
 775                 eqe = queue_tail_node(eq);
 776         }
 777         if (!io_events && !mcc_events)
 778                 return IRQ_NONE;
 779
 780         /* no need to rearm if interrupt is only for IOs */
 781         rearm = 0;
 782         if (mcc_events) {
 783                 queue_work(phba->wq, &pbe_eq->mcc_work);
 784                 /* rearm for MCCQ */
 785                 rearm = 1;
 786         }
 787         if (io_events)
 788                 irq_poll_sched(&pbe_eq->iopoll);
 789         hwi_ring_eq_db(phba, eq->id, 0, (io_events + mcc_events), rearm, 1);
 790         return IRQ_HANDLED;
 791 }
 792
 793 static void beiscsi_free_irqs(struct beiscsi_hba *phba)
 794 {
 795         struct hwi_context_memory *phwi_context;
 796         int i;
 797
 798         if (!phba->pcidev->msix_enabled) {
 799                 if (phba->pcidev->irq)
 800                         free_irq(phba->pcidev->irq, phba);
 801                 return;
 802         }
 803
 804         phwi_context = phba->phwi_ctrlr->phwi_ctxt;
 805         for (i = 0; i <= phba->num_cpus; i++) {
 806                 free_irq(pci_irq_vector(phba->pcidev, i),
 807                          &phwi_context->be_eq[i]);
 808                 kfree(phba->msi_name[i]);
 809         }
 810 }
 811
 812 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
 813 {
 814         struct pci_dev *pcidev = phba->pcidev;
 815         struct hwi_controller *phwi_ctrlr;
 816         struct hwi_context_memory *phwi_context;
 817         int ret, i, j;
 818
 819         phwi_ctrlr = phba->phwi_ctrlr;
 820         phwi_context = phwi_ctrlr->phwi_ctxt;
 821
 822         if (pcidev->msix_enabled) {
 823                 for (i = 0; i < phba->num_cpus; i++) {
 824                         phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
 825                                                     GFP_KERNEL);
 826                         if (!phba->msi_name[i]) {
 827                                 ret = -ENOMEM;
 828                                 goto free_msix_irqs;
 829                         }
 830
 831                         sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
 832                                 phba->shost->host_no, i);
 833                         ret = request_irq(pci_irq_vector(pcidev, i),
 834                                           be_isr_msix, 0, phba->msi_name[i],
 835                                           &phwi_context->be_eq[i]);
 836                         if (ret) {
 837                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
 838                                             "BM_%d : beiscsi_init_irqs-Failed to"
 839                                             "register msix for i = %d\n",
 840                                             i);
 841                                 kfree(phba->msi_name[i]);
 842                                 goto free_msix_irqs;
 843                         }
 844                 }
 845                 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
 846                 if (!phba->msi_name[i]) {
 847                         ret = -ENOMEM;
 848                         goto free_msix_irqs;
 849                 }
 850                 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
 851                         phba->shost->host_no);
 852                 ret = request_irq(pci_irq_vector(pcidev, i), be_isr_mcc, 0,
 853                                   phba->msi_name[i], &phwi_context->be_eq[i]);
 854                 if (ret) {
 855                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
 856                                     "BM_%d : beiscsi_init_irqs-"
 857                                     "Failed to register beiscsi_msix_mcc\n");
 858                         kfree(phba->msi_name[i]);
 859                         goto free_msix_irqs;
 860                 }
 861
 862         } else {
 863                 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
 864                                   "beiscsi", phba);
 865                 if (ret) {
 866                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
 867                                     "BM_%d : beiscsi_init_irqs-"
 868                                     "Failed to register irq\\n");
 869                         return ret;
 870                 }
 871         }
 872         return 0;
 873 free_msix_irqs:
 874         for (j = i - 1; j >= 0; j--) {
 875                 free_irq(pci_irq_vector(pcidev, i), &phwi_context->be_eq[j]);
 876                 kfree(phba->msi_name[j]);
 877         }
 878         return ret;
 879 }
 880
 881 void hwi_ring_cq_db(struct beiscsi_hba *phba,
 882                            unsigned int id, unsigned int num_processed,
 883                            unsigned char rearm)
 884 {
 885         u32 val = 0;
 886
 887         if (rearm)
 888                 val |= 1 << DB_CQ_REARM_SHIFT;
 889
 890         val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
 891
 892         /* Setting lower order CQ_ID Bits */
 893         val |= (id & DB_CQ_RING_ID_LOW_MASK);
 894
 895         /* Setting Higher order CQ_ID Bits */
 896         val |= (((id >> DB_CQ_HIGH_FEILD_SHIFT) &
 897                   DB_CQ_RING_ID_HIGH_MASK)
 898                   << DB_CQ_HIGH_SET_SHIFT);
 899
 900         iowrite32(val, phba->db_va + DB_CQ_OFFSET);
 901 }
 902
 903 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
 904 {
 905         struct sgl_handle *psgl_handle;
 906         unsigned long flags;
 907
 908         spin_lock_irqsave(&phba->io_sgl_lock, flags);
 909         if (phba->io_sgl_hndl_avbl) {
 910                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
 911                             "BM_%d : In alloc_io_sgl_handle,"
 912                             " io_sgl_alloc_index=%d\n",
 913                             phba->io_sgl_alloc_index);
 914
 915                 psgl_handle = phba->io_sgl_hndl_base[phba->
 916                                                 io_sgl_alloc_index];
 917                 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
 918                 phba->io_sgl_hndl_avbl--;
 919                 if (phba->io_sgl_alloc_index == (phba->params.
 920                                                  ios_per_ctrl - 1))
 921                         phba->io_sgl_alloc_index = 0;
 922                 else
 923                         phba->io_sgl_alloc_index++;
 924         } else
 925                 psgl_handle = NULL;
 926         spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
 927         return psgl_handle;
 928 }
 929
 930 static void
 931 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
 932 {
 933         unsigned long flags;
 934
 935         spin_lock_irqsave(&phba->io_sgl_lock, flags);
 936         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
 937                     "BM_%d : In free_,io_sgl_free_index=%d\n",
 938                     phba->io_sgl_free_index);
 939
 940         if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
 941                 /*
 942                  * this can happen if clean_task is called on a task that
 943                  * failed in xmit_task or alloc_pdu.
 944                  */
 945                  beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
 946                              "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
 947                              "value there=%p\n", phba->io_sgl_free_index,
 948                              phba->io_sgl_hndl_base
 949                              [phba->io_sgl_free_index]);
 950                  spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
 951                 return;
 952         }
 953         phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
 954         phba->io_sgl_hndl_avbl++;
 955         if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
 956                 phba->io_sgl_free_index = 0;
 957         else
 958                 phba->io_sgl_free_index++;
 959         spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
 960 }
 961
 962 static inline struct wrb_handle *
 963 beiscsi_get_wrb_handle(struct hwi_wrb_context *pwrb_context,
 964                        unsigned int wrbs_per_cxn)
 965 {
 966         struct wrb_handle *pwrb_handle;
 967         unsigned long flags;
 968
 969         spin_lock_irqsave(&pwrb_context->wrb_lock, flags);
 970         if (!pwrb_context->wrb_handles_available) {
 971                 spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
 972                 return NULL;
 973         }
 974         pwrb_handle = pwrb_context->pwrb_handle_base[pwrb_context->alloc_index];
 975         pwrb_context->wrb_handles_available--;
 976         if (pwrb_context->alloc_index == (wrbs_per_cxn - 1))
 977                 pwrb_context->alloc_index = 0;
 978         else
 979                 pwrb_context->alloc_index++;
 980         spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
 981
 982         if (pwrb_handle)
 983                 memset(pwrb_handle->pwrb, 0, sizeof(*pwrb_handle->pwrb));
 984
 985         return pwrb_handle;
 986 }
 987
 988 /**
 989  * alloc_wrb_handle - To allocate a wrb handle
 990  * @phba: The hba pointer
 991  * @cid: The cid to use for allocation
 992  * @pwrb_context: ptr to ptr to wrb context
 993  *
 994  * This happens under session_lock until submission to chip
 995  */
 996 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid,
 997                                     struct hwi_wrb_context **pcontext)
 998 {
 999         struct hwi_wrb_context *pwrb_context;
1000         struct hwi_controller *phwi_ctrlr;
1001         uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
1002
1003         phwi_ctrlr = phba->phwi_ctrlr;
1004         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1005         /* return the context address */
1006         *pcontext = pwrb_context;
1007         return beiscsi_get_wrb_handle(pwrb_context, phba->params.wrbs_per_cxn);
1008 }
1009
1010 static inline void
1011 beiscsi_put_wrb_handle(struct hwi_wrb_context *pwrb_context,
1012                        struct wrb_handle *pwrb_handle,
1013                        unsigned int wrbs_per_cxn)
1014 {
1015         unsigned long flags;
1016
1017         spin_lock_irqsave(&pwrb_context->wrb_lock, flags);
1018         pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1019         pwrb_context->wrb_handles_available++;
1020         if (pwrb_context->free_index == (wrbs_per_cxn - 1))
1021                 pwrb_context->free_index = 0;
1022         else
1023                 pwrb_context->free_index++;
1024         pwrb_handle->pio_handle = NULL;
1025         spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
1026 }
1027
1028 /**
1029  * free_wrb_handle - To free the wrb handle back to pool
1030  * @phba: The hba pointer
1031  * @pwrb_context: The context to free from
1032  * @pwrb_handle: The wrb_handle to free
1033  *
1034  * This happens under session_lock until submission to chip
1035  */
1036 static void
1037 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1038                 struct wrb_handle *pwrb_handle)
1039 {
1040         beiscsi_put_wrb_handle(pwrb_context,
1041                                pwrb_handle,
1042                                phba->params.wrbs_per_cxn);
1043         beiscsi_log(phba, KERN_INFO,
1044                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1045                     "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1046                     "wrb_handles_available=%d\n",
1047                     pwrb_handle, pwrb_context->free_index,
1048                     pwrb_context->wrb_handles_available);
1049 }
1050
1051 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1052 {
1053         struct sgl_handle *psgl_handle;
1054         unsigned long flags;
1055
1056         spin_lock_irqsave(&phba->mgmt_sgl_lock, flags);
1057         if (phba->eh_sgl_hndl_avbl) {
1058                 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1059                 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1060                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1061                             "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1062                             phba->eh_sgl_alloc_index,
1063                             phba->eh_sgl_alloc_index);
1064
1065                 phba->eh_sgl_hndl_avbl--;
1066                 if (phba->eh_sgl_alloc_index ==
1067                     (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1068                      1))
1069                         phba->eh_sgl_alloc_index = 0;
1070                 else
1071                         phba->eh_sgl_alloc_index++;
1072         } else
1073                 psgl_handle = NULL;
1074         spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1075         return psgl_handle;
1076 }
1077
1078 void
1079 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1080 {
1081         unsigned long flags;
1082
1083         spin_lock_irqsave(&phba->mgmt_sgl_lock, flags);
1084         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1085                     "BM_%d : In  free_mgmt_sgl_handle,"
1086                     "eh_sgl_free_index=%d\n",
1087                     phba->eh_sgl_free_index);
1088
1089         if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1090                 /*
1091                  * this can happen if clean_task is called on a task that
1092                  * failed in xmit_task or alloc_pdu.
1093                  */
1094                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1095                             "BM_%d : Double Free in eh SGL ,"
1096                             "eh_sgl_free_index=%d\n",
1097                             phba->eh_sgl_free_index);
1098                 spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1099                 return;
1100         }
1101         phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1102         phba->eh_sgl_hndl_avbl++;
1103         if (phba->eh_sgl_free_index ==
1104             (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1105                 phba->eh_sgl_free_index = 0;
1106         else
1107                 phba->eh_sgl_free_index++;
1108         spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1109 }
1110
1111 static void
1112 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1113                 struct iscsi_task *task,
1114                 struct common_sol_cqe *csol_cqe)
1115 {
1116         struct beiscsi_io_task *io_task = task->dd_data;
1117         struct be_status_bhs *sts_bhs =
1118                                 (struct be_status_bhs *)io_task->cmd_bhs;
1119         struct iscsi_conn *conn = beiscsi_conn->conn;
1120         unsigned char *sense;
1121         u32 resid = 0, exp_cmdsn, max_cmdsn;
1122         u8 rsp, status, flags;
1123
1124         exp_cmdsn = csol_cqe->exp_cmdsn;
1125         max_cmdsn = (csol_cqe->exp_cmdsn +
1126                      csol_cqe->cmd_wnd - 1);
1127         rsp = csol_cqe->i_resp;
1128         status = csol_cqe->i_sts;
1129         flags = csol_cqe->i_flags;
1130         resid = csol_cqe->res_cnt;
1131
1132         if (!task->sc) {
1133                 if (io_task->scsi_cmnd) {
1134                         scsi_dma_unmap(io_task->scsi_cmnd);
1135                         io_task->scsi_cmnd = NULL;
1136                 }
1137
1138                 return;
1139         }
1140         task->sc->result = (DID_OK << 16) | status;
1141         if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1142                 task->sc->result = DID_ERROR << 16;
1143                 goto unmap;
1144         }
1145
1146         /* bidi not initially supported */
1147         if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1148                 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1149                         task->sc->result = DID_ERROR << 16;
1150
1151                 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1152                         scsi_set_resid(task->sc, resid);
1153                         if (!status && (scsi_bufflen(task->sc) - resid <
1154                             task->sc->underflow))
1155                                 task->sc->result = DID_ERROR << 16;
1156                 }
1157         }
1158
1159         if (status == SAM_STAT_CHECK_CONDITION) {
1160                 u16 sense_len;
1161                 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1162
1163                 sense = sts_bhs->sense_info + sizeof(unsigned short);
1164                 sense_len = be16_to_cpu(*slen);
1165                 memcpy(task->sc->sense_buffer, sense,
1166                        min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1167         }
1168
1169         if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1170                 conn->rxdata_octets += resid;
1171 unmap:
1172         if (io_task->scsi_cmnd) {
1173                 scsi_dma_unmap(io_task->scsi_cmnd);
1174                 io_task->scsi_cmnd = NULL;
1175         }
1176         iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1177 }
1178
1179 static void
1180 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1181                     struct iscsi_task *task,
1182                     struct common_sol_cqe *csol_cqe)
1183 {
1184         struct iscsi_logout_rsp *hdr;
1185         struct beiscsi_io_task *io_task = task->dd_data;
1186         struct iscsi_conn *conn = beiscsi_conn->conn;
1187
1188         hdr = (struct iscsi_logout_rsp *)task->hdr;
1189         hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1190         hdr->t2wait = 5;
1191         hdr->t2retain = 0;
1192         hdr->flags = csol_cqe->i_flags;
1193         hdr->response = csol_cqe->i_resp;
1194         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1195         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1196                                      csol_cqe->cmd_wnd - 1);
1197
1198         hdr->dlength[0] = 0;
1199         hdr->dlength[1] = 0;
1200         hdr->dlength[2] = 0;
1201         hdr->hlength = 0;
1202         hdr->itt = io_task->libiscsi_itt;
1203         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1204 }
1205
1206 static void
1207 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1208                  struct iscsi_task *task,
1209                  struct common_sol_cqe *csol_cqe)
1210 {
1211         struct iscsi_tm_rsp *hdr;
1212         struct iscsi_conn *conn = beiscsi_conn->conn;
1213         struct beiscsi_io_task *io_task = task->dd_data;
1214
1215         hdr = (struct iscsi_tm_rsp *)task->hdr;
1216         hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1217         hdr->flags = csol_cqe->i_flags;
1218         hdr->response = csol_cqe->i_resp;
1219         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1220         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1221                                      csol_cqe->cmd_wnd - 1);
1222
1223         hdr->itt = io_task->libiscsi_itt;
1224         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1225 }
1226
1227 static void
1228 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1229                        struct beiscsi_hba *phba, struct sol_cqe *psol)
1230 {
1231         struct hwi_wrb_context *pwrb_context;
1232         uint16_t wrb_index, cid, cri_index;
1233         struct hwi_controller *phwi_ctrlr;
1234         struct wrb_handle *pwrb_handle;
1235         struct iscsi_session *session;
1236         struct iscsi_task *task;
1237
1238         phwi_ctrlr = phba->phwi_ctrlr;
1239         if (is_chip_be2_be3r(phba)) {
1240                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1241                                           wrb_idx, psol);
1242                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1243                                     cid, psol);
1244         } else {
1245                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1246                                           wrb_idx, psol);
1247                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1248                                     cid, psol);
1249         }
1250
1251         cri_index = BE_GET_CRI_FROM_CID(cid);
1252         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1253         pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1254         session = beiscsi_conn->conn->session;
1255         spin_lock_bh(&session->back_lock);
1256         task = pwrb_handle->pio_handle;
1257         if (task)
1258                 __iscsi_put_task(task);
1259         spin_unlock_bh(&session->back_lock);
1260 }
1261
1262 static void
1263 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1264                         struct iscsi_task *task,
1265                         struct common_sol_cqe *csol_cqe)
1266 {
1267         struct iscsi_nopin *hdr;
1268         struct iscsi_conn *conn = beiscsi_conn->conn;
1269         struct beiscsi_io_task *io_task = task->dd_data;
1270
1271         hdr = (struct iscsi_nopin *)task->hdr;
1272         hdr->flags = csol_cqe->i_flags;
1273         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1274         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1275                                      csol_cqe->cmd_wnd - 1);
1276
1277         hdr->opcode = ISCSI_OP_NOOP_IN;
1278         hdr->itt = io_task->libiscsi_itt;
1279         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1280 }
1281
1282 static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1283                 struct sol_cqe *psol,
1284                 struct common_sol_cqe *csol_cqe)
1285 {
1286         if (is_chip_be2_be3r(phba)) {
1287                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1288                                                     i_exp_cmd_sn, psol);
1289                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1290                                                   i_res_cnt, psol);
1291                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1292                                                   i_cmd_wnd, psol);
1293                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1294                                                     wrb_index, psol);
1295                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1296                                               cid, psol);
1297                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1298                                                  hw_sts, psol);
1299                 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1300                                                  i_resp, psol);
1301                 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1302                                                 i_sts, psol);
1303                 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1304                                                   i_flags, psol);
1305         } else {
1306                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1307                                                     i_exp_cmd_sn, psol);
1308                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1309                                                   i_res_cnt, psol);
1310                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1311                                                     wrb_index, psol);
1312                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1313                                               cid, psol);
1314                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1315                                                  hw_sts, psol);
1316                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1317                                                   i_cmd_wnd, psol);
1318                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1319                                   cmd_cmpl, psol))
1320                         csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1321                                                         i_sts, psol);
1322                 else
1323                         csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1324                                                          i_sts, psol);
1325                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1326                                   u, psol))
1327                         csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1328
1329                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1330                                   o, psol))
1331                         csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
1332         }
1333 }
1334
1335
1336 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1337                              struct beiscsi_hba *phba, struct sol_cqe *psol)
1338 {
1339         struct iscsi_conn *conn = beiscsi_conn->conn;
1340         struct iscsi_session *session = conn->session;
1341         struct common_sol_cqe csol_cqe = {0};
1342         struct hwi_wrb_context *pwrb_context;
1343         struct hwi_controller *phwi_ctrlr;
1344         struct wrb_handle *pwrb_handle;
1345         struct iscsi_task *task;
1346         uint16_t cri_index = 0;
1347         uint8_t type;
1348
1349         phwi_ctrlr = phba->phwi_ctrlr;
1350
1351         /* Copy the elements to a common structure */
1352         adapter_get_sol_cqe(phba, psol, &csol_cqe);
1353
1354         cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1355         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1356
1357         pwrb_handle = pwrb_context->pwrb_handle_basestd[
1358                       csol_cqe.wrb_index];
1359
1360         spin_lock_bh(&session->back_lock);
1361         task = pwrb_handle->pio_handle;
1362         if (!task) {
1363                 spin_unlock_bh(&session->back_lock);
1364                 return;
1365         }
1366         type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1367
1368         switch (type) {
1369         case HWH_TYPE_IO:
1370         case HWH_TYPE_IO_RD:
1371                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1372                      ISCSI_OP_NOOP_OUT)
1373                         be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1374                 else
1375                         be_complete_io(beiscsi_conn, task, &csol_cqe);
1376                 break;
1377
1378         case HWH_TYPE_LOGOUT:
1379                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1380                         be_complete_logout(beiscsi_conn, task, &csol_cqe);
1381                 else
1382                         be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1383                 break;
1384
1385         case HWH_TYPE_LOGIN:
1386                 beiscsi_log(phba, KERN_ERR,
1387                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1388                             "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1389                             " hwi_complete_cmd- Solicited path\n");
1390                 break;
1391
1392         case HWH_TYPE_NOP:
1393                 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1394                 break;
1395
1396         default:
1397                 beiscsi_log(phba, KERN_WARNING,
1398                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1399                             "BM_%d : In hwi_complete_cmd, unknown type = %d"
1400                             "wrb_index 0x%x CID 0x%x\n", type,
1401                             csol_cqe.wrb_index,
1402                             csol_cqe.cid);
1403                 break;
1404         }
1405
1406         spin_unlock_bh(&session->back_lock);
1407 }
1408
1409 /**
1410  * ASYNC PDUs include
1411  * a. Unsolicited NOP-In (target initiated NOP-In)
1412  * b. ASYNC Messages
1413  * c. Reject PDU
1414  * d. Login response
1415  * These headers arrive unprocessed by the EP firmware.
1416  * iSCSI layer processes them.
1417  */
1418 static unsigned int
1419 beiscsi_complete_pdu(struct beiscsi_conn *beiscsi_conn,
1420                 struct pdu_base *phdr, void *pdata, unsigned int dlen)
1421 {
1422         struct beiscsi_hba *phba = beiscsi_conn->phba;
1423         struct iscsi_conn *conn = beiscsi_conn->conn;
1424         struct beiscsi_io_task *io_task;
1425         struct iscsi_hdr *login_hdr;
1426         struct iscsi_task *task;
1427         u8 code;
1428
1429         code = AMAP_GET_BITS(struct amap_pdu_base, opcode, phdr);
1430         switch (code) {
1431         case ISCSI_OP_NOOP_IN:
1432                 pdata = NULL;
1433                 dlen = 0;
1434                 break;
1435         case ISCSI_OP_ASYNC_EVENT:
1436                 break;
1437         case ISCSI_OP_REJECT:
1438                 WARN_ON(!pdata);
1439                 WARN_ON(!(dlen == 48));
1440                 beiscsi_log(phba, KERN_ERR,
1441                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1442                             "BM_%d : In ISCSI_OP_REJECT\n");
1443                 break;
1444         case ISCSI_OP_LOGIN_RSP:
1445         case ISCSI_OP_TEXT_RSP:
1446                 task = conn->login_task;
1447                 io_task = task->dd_data;
1448                 login_hdr = (struct iscsi_hdr *)phdr;
1449                 login_hdr->itt = io_task->libiscsi_itt;
1450                 break;
1451         default:
1452                 beiscsi_log(phba, KERN_WARNING,
1453                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1454                             "BM_%d : unrecognized async PDU opcode 0x%x\n",
1455                             code);
1456                 return 1;
1457         }
1458         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)phdr, pdata, dlen);
1459         return 0;
1460 }
1461
1462 static inline void
1463 beiscsi_hdl_put_handle(struct hd_async_context *pasync_ctx,
1464                          struct hd_async_handle *pasync_handle)
1465 {
1466         pasync_handle->is_final = 0;
1467         pasync_handle->buffer_len = 0;
1468         pasync_handle->in_use = 0;
1469         list_del_init(&pasync_handle->link);
1470 }
1471
1472 static void
1473 beiscsi_hdl_purge_handles(struct beiscsi_hba *phba,
1474                           struct hd_async_context *pasync_ctx,
1475                           u16 cri)
1476 {
1477         struct hd_async_handle *pasync_handle, *tmp_handle;
1478         struct list_head *plist;
1479
1480         plist  = &pasync_ctx->async_entry[cri].wq.list;
1481         list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link)
1482                 beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
1483
1484         INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wq.list);
1485         pasync_ctx->async_entry[cri].wq.hdr_len = 0;
1486         pasync_ctx->async_entry[cri].wq.bytes_received = 0;
1487         pasync_ctx->async_entry[cri].wq.bytes_needed = 0;
1488 }
1489
1490 static struct hd_async_handle *
1491 beiscsi_hdl_get_handle(struct beiscsi_conn *beiscsi_conn,
1492                        struct hd_async_context *pasync_ctx,
1493                        struct i_t_dpdu_cqe *pdpdu_cqe,
1494                        u8 *header)
1495 {
1496         struct beiscsi_hba *phba = beiscsi_conn->phba;
1497         struct hd_async_handle *pasync_handle;
1498         struct be_bus_address phys_addr;
1499         u16 cid, code, ci, cri;
1500         u8 final, error = 0;
1501         u32 dpl;
1502
1503         cid = beiscsi_conn->beiscsi_conn_cid;
1504         cri = BE_GET_ASYNC_CRI_FROM_CID(cid);
1505         /**
1506          * This function is invoked to get the right async_handle structure
1507          * from a given DEF PDU CQ entry.
1508          *
1509          * - index in CQ entry gives the vertical index
1510          * - address in CQ entry is the offset where the DMA last ended
1511          * - final - no more notifications for this PDU
1512          */
1513         if (is_chip_be2_be3r(phba)) {
1514                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1515                                     dpl, pdpdu_cqe);
1516                 ci = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1517                                       index, pdpdu_cqe);
1518                 final = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1519                                       final, pdpdu_cqe);
1520         } else {
1521                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1522                                     dpl, pdpdu_cqe);
1523                 ci = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1524                                       index, pdpdu_cqe);
1525                 final = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1526                                       final, pdpdu_cqe);
1527         }
1528
1529         /**
1530          * DB addr Hi/Lo is same for BE and SKH.
1531          * Subtract the dataplacementlength to get to the base.
1532          */
1533         phys_addr.u.a32.address_lo = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1534                                                    db_addr_lo, pdpdu_cqe);
1535         phys_addr.u.a32.address_lo -= dpl;
1536         phys_addr.u.a32.address_hi = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1537                                                    db_addr_hi, pdpdu_cqe);
1538
1539         code = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe, code, pdpdu_cqe);
1540         switch (code) {
1541         case UNSOL_HDR_NOTIFY:
1542                 pasync_handle = pasync_ctx->async_entry[ci].header;
1543                 *header = 1;
1544                 break;
1545         case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
1546                 error = 1;
1547         case UNSOL_DATA_NOTIFY:
1548                 pasync_handle = pasync_ctx->async_entry[ci].data;
1549                 break;
1550         /* called only for above codes */
1551         default:
1552                 return NULL;
1553         }
1554
1555         if (pasync_handle->pa.u.a64.address != phys_addr.u.a64.address ||
1556             pasync_handle->index != ci) {
1557                 /* driver bug - if ci does not match async handle index */
1558                 error = 1;
1559                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1560                             "BM_%d : cid %u async PDU handle mismatch - addr in %cQE %llx at %u:addr in CQE %llx ci %u\n",
1561                             cid, pasync_handle->is_header ? 'H' : 'D',
1562                             pasync_handle->pa.u.a64.address,
1563                             pasync_handle->index,
1564                             phys_addr.u.a64.address, ci);
1565                 /* FW has stale address - attempt continuing by dropping */
1566         }
1567
1568         /**
1569          * DEF PDU header and data buffers with errors should be simply
1570          * dropped as there are no consumers for it.
1571          */
1572         if (error) {
1573                 beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
1574                 return NULL;
1575         }
1576
1577         if (pasync_handle->in_use || !list_empty(&pasync_handle->link)) {
1578                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1579                             "BM_%d : cid %d async PDU handle in use - code %d ci %d addr %llx\n",
1580                             cid, code, ci, phys_addr.u.a64.address);
1581                 beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1582         }
1583
1584         list_del_init(&pasync_handle->link);
1585         /**
1586          * Each CID is associated with unique CRI.
1587          * ASYNC_CRI_FROM_CID mapping and CRI_FROM_CID are totaly different.
1588          **/
1589         pasync_handle->cri = cri;
1590         pasync_handle->is_final = final;
1591         pasync_handle->buffer_len = dpl;
1592         pasync_handle->in_use = 1;
1593
1594         return pasync_handle;
1595 }
1596
1597 static unsigned int
1598 beiscsi_hdl_fwd_pdu(struct beiscsi_conn *beiscsi_conn,
1599                     struct hd_async_context *pasync_ctx,
1600                     u16 cri)
1601 {
1602         struct iscsi_session *session = beiscsi_conn->conn->session;
1603         struct hd_async_handle *pasync_handle, *plast_handle;
1604         struct beiscsi_hba *phba = beiscsi_conn->phba;
1605         void *phdr = NULL, *pdata = NULL;
1606         u32 dlen = 0, status = 0;
1607         struct list_head *plist;
1608
1609         plist = &pasync_ctx->async_entry[cri].wq.list;
1610         plast_handle = NULL;
1611         list_for_each_entry(pasync_handle, plist, link) {
1612                 plast_handle = pasync_handle;
1613                 /* get the header, the first entry */
1614                 if (!phdr) {
1615                         phdr = pasync_handle->pbuffer;
1616                         continue;
1617                 }
1618                 /* use first buffer to collect all the data */
1619                 if (!pdata) {
1620                         pdata = pasync_handle->pbuffer;
1621                         dlen = pasync_handle->buffer_len;
1622                         continue;
1623                 }
1624                 if (!pasync_handle->buffer_len ||
1625                     (dlen + pasync_handle->buffer_len) >
1626                     pasync_ctx->async_data.buffer_size)
1627                         break;
1628                 memcpy(pdata + dlen, pasync_handle->pbuffer,
1629                        pasync_handle->buffer_len);
1630                 dlen += pasync_handle->buffer_len;
1631         }
1632
1633         if (!plast_handle->is_final) {
1634                 /* last handle should have final PDU notification from FW */
1635                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1636                             "BM_%d : cid %u %p fwd async PDU opcode %x with last handle missing - HL%u:DN%u:DR%u\n",
1637                             beiscsi_conn->beiscsi_conn_cid, plast_handle,
1638                             AMAP_GET_BITS(struct amap_pdu_base, opcode, phdr),
1639                             pasync_ctx->async_entry[cri].wq.hdr_len,
1640                             pasync_ctx->async_entry[cri].wq.bytes_needed,
1641                             pasync_ctx->async_entry[cri].wq.bytes_received);
1642         }
1643         spin_lock_bh(&session->back_lock);
1644         status = beiscsi_complete_pdu(beiscsi_conn, phdr, pdata, dlen);
1645         spin_unlock_bh(&session->back_lock);
1646         beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1647         return status;
1648 }
1649
1650 static unsigned int
1651 beiscsi_hdl_gather_pdu(struct beiscsi_conn *beiscsi_conn,
1652                        struct hd_async_context *pasync_ctx,
1653                        struct hd_async_handle *pasync_handle)
1654 {
1655         unsigned int bytes_needed = 0, status = 0;
1656         u16 cri = pasync_handle->cri;
1657         struct cri_wait_queue *wq;
1658         struct beiscsi_hba *phba;
1659         struct pdu_base *ppdu;
1660         char *err = "";
1661
1662         phba = beiscsi_conn->phba;
1663         wq = &pasync_ctx->async_entry[cri].wq;
1664         if (pasync_handle->is_header) {
1665                 /* check if PDU hdr is rcv'd when old hdr not completed */
1666                 if (wq->hdr_len) {
1667                         err = "incomplete";
1668                         goto drop_pdu;
1669                 }
1670                 ppdu = pasync_handle->pbuffer;
1671                 bytes_needed = AMAP_GET_BITS(struct amap_pdu_base,
1672                                              data_len_hi, ppdu);
1673                 bytes_needed <<= 16;
1674                 bytes_needed |= be16_to_cpu(AMAP_GET_BITS(struct amap_pdu_base,
1675                                                           data_len_lo, ppdu));
1676                 wq->hdr_len = pasync_handle->buffer_len;
1677                 wq->bytes_received = 0;
1678                 wq->bytes_needed = bytes_needed;
1679                 list_add_tail(&pasync_handle->link, &wq->list);
1680                 if (!bytes_needed)
1681                         status = beiscsi_hdl_fwd_pdu(beiscsi_conn,
1682                                                      pasync_ctx, cri);
1683         } else {
1684                 /* check if data received has header and is needed */
1685                 if (!wq->hdr_len || !wq->bytes_needed) {
1686                         err = "header less";
1687                         goto drop_pdu;
1688                 }
1689                 wq->bytes_received += pasync_handle->buffer_len;
1690                 /* Something got overwritten? Better catch it here. */
1691                 if (wq->bytes_received > wq->bytes_needed) {
1692                         err = "overflow";
1693                         goto drop_pdu;
1694                 }
1695                 list_add_tail(&pasync_handle->link, &wq->list);
1696                 if (wq->bytes_received == wq->bytes_needed)
1697                         status = beiscsi_hdl_fwd_pdu(beiscsi_conn,
1698                                                      pasync_ctx, cri);
1699         }
1700         return status;
1701
1702 drop_pdu:
1703         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1704                     "BM_%d : cid %u async PDU %s - def-%c:HL%u:DN%u:DR%u\n",
1705                     beiscsi_conn->beiscsi_conn_cid, err,
1706                     pasync_handle->is_header ? 'H' : 'D',
1707                     wq->hdr_len, wq->bytes_needed,
1708                     pasync_handle->buffer_len);
1709         /* discard this handle */
1710         beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
1711         /* free all the other handles in cri_wait_queue */
1712         beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1713         /* try continuing */
1714         return status;
1715 }
1716
1717 static void
1718 beiscsi_hdq_post_handles(struct beiscsi_hba *phba,
1719                          u8 header, u8 ulp_num, u16 nbuf)
1720 {
1721         struct hd_async_handle *pasync_handle;
1722         struct hd_async_context *pasync_ctx;
1723         struct hwi_controller *phwi_ctrlr;
1724         struct phys_addr *pasync_sge;
1725         u32 ring_id, doorbell = 0;
1726         u32 doorbell_offset;
1727         u16 prod, pi;
1728
1729         phwi_ctrlr = phba->phwi_ctrlr;
1730         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1731         if (header) {
1732                 pasync_sge = pasync_ctx->async_header.ring_base;
1733                 pi = pasync_ctx->async_header.pi;
1734                 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1735                 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1736                                         doorbell_offset;
1737         } else {
1738                 pasync_sge = pasync_ctx->async_data.ring_base;
1739                 pi = pasync_ctx->async_data.pi;
1740                 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1741                 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1742                                         doorbell_offset;
1743         }
1744
1745         for (prod = 0; prod < nbuf; prod++) {
1746                 if (header)
1747                         pasync_handle = pasync_ctx->async_entry[pi].header;
1748                 else
1749                         pasync_handle = pasync_ctx->async_entry[pi].data;
1750                 WARN_ON(pasync_handle->is_header != header);
1751                 WARN_ON(pasync_handle->index != pi);
1752                 /* setup the ring only once */
1753                 if (nbuf == pasync_ctx->num_entries) {
1754                         /* note hi is lo */
1755                         pasync_sge[pi].hi = pasync_handle->pa.u.a32.address_lo;
1756                         pasync_sge[pi].lo = pasync_handle->pa.u.a32.address_hi;
1757                 }
1758                 if (++pi == pasync_ctx->num_entries)
1759                         pi = 0;
1760         }
1761
1762         if (header)
1763                 pasync_ctx->async_header.pi = pi;
1764         else
1765                 pasync_ctx->async_data.pi = pi;
1766
1767         doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1768         doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1769         doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1770         doorbell |= (prod & DB_DEF_PDU_CQPROC_MASK) << DB_DEF_PDU_CQPROC_SHIFT;
1771         iowrite32(doorbell, phba->db_va + doorbell_offset);
1772 }
1773
1774 static void
1775 beiscsi_hdq_process_compl(struct beiscsi_conn *beiscsi_conn,
1776                           struct i_t_dpdu_cqe *pdpdu_cqe)
1777 {
1778         struct beiscsi_hba *phba = beiscsi_conn->phba;
1779         struct hd_async_handle *pasync_handle = NULL;
1780         struct hd_async_context *pasync_ctx;
1781         struct hwi_controller *phwi_ctrlr;
1782         u8 ulp_num, consumed, header = 0;
1783         u16 cid_cri;
1784
1785         phwi_ctrlr = phba->phwi_ctrlr;
1786         cid_cri = BE_GET_CRI_FROM_CID(beiscsi_conn->beiscsi_conn_cid);
1787         ulp_num = BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, cid_cri);
1788         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1789         pasync_handle = beiscsi_hdl_get_handle(beiscsi_conn, pasync_ctx,
1790                                                pdpdu_cqe, &header);
1791         if (is_chip_be2_be3r(phba))
1792                 consumed = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1793                                          num_cons, pdpdu_cqe);
1794         else
1795                 consumed = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1796                                          num_cons, pdpdu_cqe);
1797         if (pasync_handle)
1798                 beiscsi_hdl_gather_pdu(beiscsi_conn, pasync_ctx, pasync_handle);
1799         /* num_cons indicates number of 8 RQEs consumed */
1800         if (consumed)
1801                 beiscsi_hdq_post_handles(phba, header, ulp_num, 8 * consumed);
1802 }
1803
1804 void beiscsi_process_mcc_cq(struct beiscsi_hba *phba)
1805 {
1806         struct be_queue_info *mcc_cq;
1807         struct  be_mcc_compl *mcc_compl;
1808         unsigned int num_processed = 0;
1809
1810         mcc_cq = &phba->ctrl.mcc_obj.cq;
1811         mcc_compl = queue_tail_node(mcc_cq);
1812         mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1813         while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
1814                 if (beiscsi_hba_in_error(phba))
1815                         return;
1816
1817                 if (num_processed >= 32) {
1818                         hwi_ring_cq_db(phba, mcc_cq->id,
1819                                         num_processed, 0);
1820                         num_processed = 0;
1821                 }
1822                 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
1823                         beiscsi_process_async_event(phba, mcc_compl);
1824                 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
1825                         beiscsi_process_mcc_compl(&phba->ctrl, mcc_compl);
1826                 }
1827
1828                 mcc_compl->flags = 0;
1829                 queue_tail_inc(mcc_cq);
1830                 mcc_compl = queue_tail_node(mcc_cq);
1831                 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1832                 num_processed++;
1833         }
1834
1835         if (num_processed > 0)
1836                 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1);
1837 }
1838
1839 static void beiscsi_mcc_work(struct work_struct *work)
1840 {
1841         struct be_eq_obj *pbe_eq;
1842         struct beiscsi_hba *phba;
1843
1844         pbe_eq = container_of(work, struct be_eq_obj, mcc_work);
1845         phba = pbe_eq->phba;
1846         beiscsi_process_mcc_cq(phba);
1847         /* rearm EQ for further interrupts */
1848         if (!beiscsi_hba_in_error(phba))
1849                 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
1850 }
1851
1852 /**
1853  * beiscsi_process_cq()- Process the Completion Queue
1854  * @pbe_eq: Event Q on which the Completion has come
1855  * @budget: Max number of events to processed
1856  *
1857  * return
1858  *     Number of Completion Entries processed.
1859  **/
1860 unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq, int budget)
1861 {
1862         struct be_queue_info *cq;
1863         struct sol_cqe *sol;
1864         struct dmsg_cqe *dmsg;
1865         unsigned int total = 0;
1866         unsigned int num_processed = 0;
1867         unsigned short code = 0, cid = 0;
1868         uint16_t cri_index = 0;
1869         struct beiscsi_conn *beiscsi_conn;
1870         struct beiscsi_endpoint *beiscsi_ep;
1871         struct iscsi_endpoint *ep;
1872         struct beiscsi_hba *phba;
1873
1874         cq = pbe_eq->cq;
1875         sol = queue_tail_node(cq);
1876         phba = pbe_eq->phba;
1877
1878         while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
1879                CQE_VALID_MASK) {
1880                 if (beiscsi_hba_in_error(phba))
1881                         return 0;
1882
1883                 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
1884
1885                  code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
1886                          32] & CQE_CODE_MASK);
1887
1888                  /* Get the CID */
1889                 if (is_chip_be2_be3r(phba)) {
1890                         cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
1891                 } else {
1892                         if ((code == DRIVERMSG_NOTIFY) ||
1893                             (code == UNSOL_HDR_NOTIFY) ||
1894                             (code == UNSOL_DATA_NOTIFY))
1895                                 cid = AMAP_GET_BITS(
1896                                                     struct amap_i_t_dpdu_cqe_v2,
1897                                                     cid, sol);
1898                          else
1899                                  cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1900                                                      cid, sol);
1901                 }
1902
1903                 cri_index = BE_GET_CRI_FROM_CID(cid);
1904                 ep = phba->ep_array[cri_index];
1905
1906                 if (ep == NULL) {
1907                         /* connection has already been freed
1908                          * just move on to next one
1909                          */
1910                         beiscsi_log(phba, KERN_WARNING,
1911                                     BEISCSI_LOG_INIT,
1912                                     "BM_%d : proc cqe of disconn ep: cid %d\n",
1913                                     cid);
1914                         goto proc_next_cqe;
1915                 }
1916
1917                 beiscsi_ep = ep->dd_data;
1918                 beiscsi_conn = beiscsi_ep->conn;
1919
1920                 /* replenish cq */
1921                 if (num_processed == 32) {
1922                         hwi_ring_cq_db(phba, cq->id, 32, 0);
1923                         num_processed = 0;
1924                 }
1925                 total++;
1926
1927                 switch (code) {
1928                 case SOL_CMD_COMPLETE:
1929                         hwi_complete_cmd(beiscsi_conn, phba, sol);
1930                         break;
1931                 case DRIVERMSG_NOTIFY:
1932                         beiscsi_log(phba, KERN_INFO,
1933                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1934                                     "BM_%d : Received %s[%d] on CID : %d\n",
1935                                     cqe_desc[code], code, cid);
1936
1937                         dmsg = (struct dmsg_cqe *)sol;
1938                         hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
1939                         break;
1940                 case UNSOL_HDR_NOTIFY:
1941                         beiscsi_log(phba, KERN_INFO,
1942                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1943                                     "BM_%d : Received %s[%d] on CID : %d\n",
1944                                     cqe_desc[code], code, cid);
1945
1946                         spin_lock_bh(&phba->async_pdu_lock);
1947                         beiscsi_hdq_process_compl(beiscsi_conn,
1948                                                   (struct i_t_dpdu_cqe *)sol);
1949                         spin_unlock_bh(&phba->async_pdu_lock);
1950                         break;
1951                 case UNSOL_DATA_NOTIFY:
1952                         beiscsi_log(phba, KERN_INFO,
1953                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1954                                     "BM_%d : Received %s[%d] on CID : %d\n",
1955                                     cqe_desc[code], code, cid);
1956
1957                         spin_lock_bh(&phba->async_pdu_lock);
1958                         beiscsi_hdq_process_compl(beiscsi_conn,
1959                                                   (struct i_t_dpdu_cqe *)sol);
1960                         spin_unlock_bh(&phba->async_pdu_lock);
1961                         break;
1962                 case CXN_INVALIDATE_INDEX_NOTIFY:
1963                 case CMD_INVALIDATED_NOTIFY:
1964                 case CXN_INVALIDATE_NOTIFY:
1965                         beiscsi_log(phba, KERN_ERR,
1966                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1967                                     "BM_%d : Ignoring %s[%d] on CID : %d\n",
1968                                     cqe_desc[code], code, cid);
1969                         break;
1970                 case CXN_KILLED_HDR_DIGEST_ERR:
1971                 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
1972                         beiscsi_log(phba, KERN_ERR,
1973                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1974                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
1975                                     cqe_desc[code], code,  cid);
1976                         break;
1977                 case CMD_KILLED_INVALID_STATSN_RCVD:
1978                 case CMD_KILLED_INVALID_R2T_RCVD:
1979                 case CMD_CXN_KILLED_LUN_INVALID:
1980                 case CMD_CXN_KILLED_ICD_INVALID:
1981                 case CMD_CXN_KILLED_ITT_INVALID:
1982                 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
1983                 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
1984                         beiscsi_log(phba, KERN_ERR,
1985                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1986                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
1987                                     cqe_desc[code], code,  cid);
1988                         break;
1989                 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
1990                         beiscsi_log(phba, KERN_ERR,
1991                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1992                                     "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
1993                                     cqe_desc[code], code, cid);
1994                         spin_lock_bh(&phba->async_pdu_lock);
1995                         /* driver consumes the entry and drops the contents */
1996                         beiscsi_hdq_process_compl(beiscsi_conn,
1997                                                   (struct i_t_dpdu_cqe *)sol);
1998                         spin_unlock_bh(&phba->async_pdu_lock);
1999                         break;
2000                 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2001                 case CXN_KILLED_BURST_LEN_MISMATCH:
2002                 case CXN_KILLED_AHS_RCVD:
2003                 case CXN_KILLED_UNKNOWN_HDR:
2004                 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2005                 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2006                 case CXN_KILLED_TIMED_OUT:
2007                 case CXN_KILLED_FIN_RCVD:
2008                 case CXN_KILLED_RST_SENT:
2009                 case CXN_KILLED_RST_RCVD:
2010                 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2011                 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2012                 case CXN_KILLED_OVER_RUN_RESIDUAL:
2013                 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2014                 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2015                         beiscsi_log(phba, KERN_ERR,
2016                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2017                                     "BM_%d : Event %s[%d] received on CID : %d\n",
2018                                     cqe_desc[code], code, cid);
2019                         if (beiscsi_conn)
2020                                 iscsi_conn_failure(beiscsi_conn->conn,
2021                                                    ISCSI_ERR_CONN_FAILED);
2022                         break;
2023                 default:
2024                         beiscsi_log(phba, KERN_ERR,
2025                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2026                                     "BM_%d : Invalid CQE Event Received Code : %d"
2027                                     "CID 0x%x...\n",
2028                                     code, cid);
2029                         break;
2030                 }
2031
2032 proc_next_cqe:
2033                 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2034                 queue_tail_inc(cq);
2035                 sol = queue_tail_node(cq);
2036                 num_processed++;
2037                 if (total == budget)
2038                         break;
2039         }
2040
2041         hwi_ring_cq_db(phba, cq->id, num_processed, 1);
2042         return total;
2043 }
2044
2045 static int be_iopoll(struct irq_poll *iop, int budget)
2046 {
2047         unsigned int ret, io_events;
2048         struct beiscsi_hba *phba;
2049         struct be_eq_obj *pbe_eq;
2050         struct be_eq_entry *eqe = NULL;
2051         struct be_queue_info *eq;
2052
2053         pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2054         phba = pbe_eq->phba;
2055         if (beiscsi_hba_in_error(phba)) {
2056                 irq_poll_complete(iop);
2057                 return 0;
2058         }
2059
2060         io_events = 0;
2061         eq = &pbe_eq->q;
2062         eqe = queue_tail_node(eq);
2063         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] &
2064                         EQE_VALID_MASK) {
2065                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
2066                 queue_tail_inc(eq);
2067                 eqe = queue_tail_node(eq);
2068                 io_events++;
2069         }
2070         hwi_ring_eq_db(phba, eq->id, 1, io_events, 0, 1);
2071
2072         ret = beiscsi_process_cq(pbe_eq, budget);
2073         pbe_eq->cq_count += ret;
2074         if (ret < budget) {
2075                 irq_poll_complete(iop);
2076                 beiscsi_log(phba, KERN_INFO,
2077                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2078                             "BM_%d : rearm pbe_eq->q.id =%d ret %d\n",
2079                             pbe_eq->q.id, ret);
2080                 if (!beiscsi_hba_in_error(phba))
2081                         hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2082         }
2083         return ret;
2084 }
2085
2086 static void
2087 hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2088                   unsigned int num_sg, struct beiscsi_io_task *io_task)
2089 {
2090         struct iscsi_sge *psgl;
2091         unsigned int sg_len, index;
2092         unsigned int sge_len = 0;
2093         unsigned long long addr;
2094         struct scatterlist *l_sg;
2095         unsigned int offset;
2096
2097         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2098                       io_task->bhs_pa.u.a32.address_lo);
2099         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2100                       io_task->bhs_pa.u.a32.address_hi);
2101
2102         l_sg = sg;
2103         for (index = 0; (index < num_sg) && (index < 2); index++,
2104                         sg = sg_next(sg)) {
2105                 if (index == 0) {
2106                         sg_len = sg_dma_len(sg);
2107                         addr = (u64) sg_dma_address(sg);
2108                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2109                                       sge0_addr_lo, pwrb,
2110                                       lower_32_bits(addr));
2111                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2112                                       sge0_addr_hi, pwrb,
2113                                       upper_32_bits(addr));
2114                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2115                                       sge0_len, pwrb,
2116                                       sg_len);
2117                         sge_len = sg_len;
2118                 } else {
2119                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2120                                       pwrb, sge_len);
2121                         sg_len = sg_dma_len(sg);
2122                         addr = (u64) sg_dma_address(sg);
2123                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2124                                       sge1_addr_lo, pwrb,
2125                                       lower_32_bits(addr));
2126                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2127                                       sge1_addr_hi, pwrb,
2128                                       upper_32_bits(addr));
2129                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2130                                       sge1_len, pwrb,
2131                                       sg_len);
2132                 }
2133         }
2134         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2135         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2136
2137         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2138
2139         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2140                       io_task->bhs_pa.u.a32.address_hi);
2141         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2142                       io_task->bhs_pa.u.a32.address_lo);
2143
2144         if (num_sg == 1) {
2145                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2146                               1);
2147                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2148                               0);
2149         } else if (num_sg == 2) {
2150                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2151                               0);
2152                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2153                               1);
2154         } else {
2155                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2156                               0);
2157                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2158                               0);
2159         }
2160
2161         sg = l_sg;
2162         psgl++;
2163         psgl++;
2164         offset = 0;
2165         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2166                 sg_len = sg_dma_len(sg);
2167                 addr = (u64) sg_dma_address(sg);
2168                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2169                               lower_32_bits(addr));
2170                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2171                               upper_32_bits(addr));
2172                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2173                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2174                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2175                 offset += sg_len;
2176         }
2177         psgl--;
2178         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2179 }
2180
2181 static void
2182 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2183               unsigned int num_sg, struct beiscsi_io_task *io_task)
2184 {
2185         struct iscsi_sge *psgl;
2186         unsigned int sg_len, index;
2187         unsigned int sge_len = 0;
2188         unsigned long long addr;
2189         struct scatterlist *l_sg;
2190         unsigned int offset;
2191
2192         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2193                                       io_task->bhs_pa.u.a32.address_lo);
2194         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2195                                       io_task->bhs_pa.u.a32.address_hi);
2196
2197         l_sg = sg;
2198         for (index = 0; (index < num_sg) && (index < 2); index++,
2199                                                          sg = sg_next(sg)) {
2200                 if (index == 0) {
2201                         sg_len = sg_dma_len(sg);
2202                         addr = (u64) sg_dma_address(sg);
2203                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2204                                                 ((u32)(addr & 0xFFFFFFFF)));
2205                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2206                                                         ((u32)(addr >> 32)));
2207                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2208                                                         sg_len);
2209                         sge_len = sg_len;
2210                 } else {
2211                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2212                                                         pwrb, sge_len);
2213                         sg_len = sg_dma_len(sg);
2214                         addr = (u64) sg_dma_address(sg);
2215                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2216                                                 ((u32)(addr & 0xFFFFFFFF)));
2217                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2218                                                         ((u32)(addr >> 32)));
2219                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2220                                                         sg_len);
2221                 }
2222         }
2223         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2224         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2225
2226         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2227
2228         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2229                         io_task->bhs_pa.u.a32.address_hi);
2230         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2231                         io_task->bhs_pa.u.a32.address_lo);
2232
2233         if (num_sg == 1) {
2234                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2235                                                                 1);
2236                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2237                                                                 0);
2238         } else if (num_sg == 2) {
2239                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2240                                                                 0);
2241                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2242                                                                 1);
2243         } else {
2244                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2245                                                                 0);
2246                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2247                                                                 0);
2248         }
2249         sg = l_sg;
2250         psgl++;
2251         psgl++;
2252         offset = 0;
2253         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2254                 sg_len = sg_dma_len(sg);
2255                 addr = (u64) sg_dma_address(sg);
2256                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2257                                                 (addr & 0xFFFFFFFF));
2258                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2259                                                 (addr >> 32));
2260                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2261                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2262                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2263                 offset += sg_len;
2264         }
2265         psgl--;
2266         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2267 }
2268
2269 /**
2270  * hwi_write_buffer()- Populate the WRB with task info
2271  * @pwrb: ptr to the WRB entry
2272  * @task: iscsi task which is to be executed
2273  **/
2274 static int hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2275 {
2276         struct iscsi_sge *psgl;
2277         struct beiscsi_io_task *io_task = task->dd_data;
2278         struct beiscsi_conn *beiscsi_conn = io_task->conn;
2279         struct beiscsi_hba *phba = beiscsi_conn->phba;
2280         uint8_t dsp_value = 0;
2281
2282         io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2283         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2284                                 io_task->bhs_pa.u.a32.address_lo);
2285         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2286                                 io_task->bhs_pa.u.a32.address_hi);
2287
2288         if (task->data) {
2289
2290                 /* Check for the data_count */
2291                 dsp_value = (task->data_count) ? 1 : 0;
2292
2293                 if (is_chip_be2_be3r(phba))
2294                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2295                                       pwrb, dsp_value);
2296                 else
2297                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2298                                       pwrb, dsp_value);
2299
2300                 /* Map addr only if there is data_count */
2301                 if (dsp_value) {
2302                         io_task->mtask_addr = pci_map_single(phba->pcidev,
2303                                                              task->data,
2304                                                              task->data_count,
2305                                                              PCI_DMA_TODEVICE);
2306                         if (pci_dma_mapping_error(phba->pcidev,
2307                                                   io_task->mtask_addr))
2308                                 return -ENOMEM;
2309                         io_task->mtask_data_count = task->data_count;
2310                 } else
2311                         io_task->mtask_addr = 0;
2312
2313                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2314                               lower_32_bits(io_task->mtask_addr));
2315                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2316                               upper_32_bits(io_task->mtask_addr));
2317                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2318                                                 task->data_count);
2319
2320                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2321         } else {
2322                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2323                 io_task->mtask_addr = 0;
2324         }
2325
2326         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2327
2328         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2329
2330         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2331                       io_task->bhs_pa.u.a32.address_hi);
2332         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2333                       io_task->bhs_pa.u.a32.address_lo);
2334         if (task->data) {
2335                 psgl++;
2336                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2337                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2338                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2339                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2340                 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2341                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2342
2343                 psgl++;
2344                 if (task->data) {
2345                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2346                                       lower_32_bits(io_task->mtask_addr));
2347                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2348                                       upper_32_bits(io_task->mtask_addr));
2349                 }
2350                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2351         }
2352         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2353         return 0;
2354 }
2355
2356 /**
2357  * beiscsi_find_mem_req()- Find mem needed
2358  * @phba: ptr to HBA struct
2359  **/
2360 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2361 {
2362         uint8_t mem_descr_index, ulp_num;
2363         unsigned int num_async_pdu_buf_pages;
2364         unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2365         unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2366
2367         phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2368
2369         phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2370                                                  BE_ISCSI_PDU_HEADER_SIZE;
2371         phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2372                                             sizeof(struct hwi_context_memory);
2373
2374
2375         phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2376             * (phba->params.wrbs_per_cxn)
2377             * phba->params.cxns_per_ctrl;
2378         wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
2379                                  (phba->params.wrbs_per_cxn);
2380         phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2381                                 phba->params.cxns_per_ctrl);
2382
2383         phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2384                 phba->params.icds_per_ctrl;
2385         phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2386                 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2387         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2388                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2389
2390                         num_async_pdu_buf_sgl_pages =
2391                                 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2392                                                phba, ulp_num) *
2393                                                sizeof(struct phys_addr));
2394
2395                         num_async_pdu_buf_pages =
2396                                 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2397                                                phba, ulp_num) *
2398                                                phba->params.defpdu_hdr_sz);
2399
2400                         num_async_pdu_data_pages =
2401                                 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2402                                                phba, ulp_num) *
2403                                                phba->params.defpdu_data_sz);
2404
2405                         num_async_pdu_data_sgl_pages =
2406                                 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2407                                                phba, ulp_num) *
2408                                                sizeof(struct phys_addr));
2409
2410                         mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2411                                           (ulp_num * MEM_DESCR_OFFSET));
2412                         phba->mem_req[mem_descr_index] =
2413                                         BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2414                                         BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2415
2416                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2417                                           (ulp_num * MEM_DESCR_OFFSET));
2418                         phba->mem_req[mem_descr_index] =
2419                                           num_async_pdu_buf_pages *
2420                                           PAGE_SIZE;
2421
2422                         mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2423                                           (ulp_num * MEM_DESCR_OFFSET));
2424                         phba->mem_req[mem_descr_index] =
2425                                           num_async_pdu_data_pages *
2426                                           PAGE_SIZE;
2427
2428                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2429                                           (ulp_num * MEM_DESCR_OFFSET));
2430                         phba->mem_req[mem_descr_index] =
2431                                           num_async_pdu_buf_sgl_pages *
2432                                           PAGE_SIZE;
2433
2434                         mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2435                                           (ulp_num * MEM_DESCR_OFFSET));
2436                         phba->mem_req[mem_descr_index] =
2437                                           num_async_pdu_data_sgl_pages *
2438                                           PAGE_SIZE;
2439
2440                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2441                                           (ulp_num * MEM_DESCR_OFFSET));
2442                         phba->mem_req[mem_descr_index] =
2443                                 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2444                                 sizeof(struct hd_async_handle);
2445
2446                         mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2447                                           (ulp_num * MEM_DESCR_OFFSET));
2448                         phba->mem_req[mem_descr_index] =
2449                                 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2450                                 sizeof(struct hd_async_handle);
2451
2452                         mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2453                                           (ulp_num * MEM_DESCR_OFFSET));
2454                         phba->mem_req[mem_descr_index] =
2455                                 sizeof(struct hd_async_context) +
2456                                 (BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2457                                  sizeof(struct hd_async_entry));
2458                 }
2459         }
2460 }
2461
2462 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2463 {
2464         dma_addr_t bus_add;
2465         struct hwi_controller *phwi_ctrlr;
2466         struct be_mem_descriptor *mem_descr;
2467         struct mem_array *mem_arr, *mem_arr_orig;
2468         unsigned int i, j, alloc_size, curr_alloc_size;
2469
2470         phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2471         if (!phba->phwi_ctrlr)
2472                 return -ENOMEM;
2473
2474         /* Allocate memory for wrb_context */
2475         phwi_ctrlr = phba->phwi_ctrlr;
2476         phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2477                                           phba->params.cxns_per_ctrl,
2478                                           GFP_KERNEL);
2479         if (!phwi_ctrlr->wrb_context) {
2480                 kfree(phba->phwi_ctrlr);
2481                 return -ENOMEM;
2482         }
2483
2484         phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2485                                  GFP_KERNEL);
2486         if (!phba->init_mem) {
2487                 kfree(phwi_ctrlr->wrb_context);
2488                 kfree(phba->phwi_ctrlr);
2489                 return -ENOMEM;
2490         }
2491
2492         mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2493                                GFP_KERNEL);
2494         if (!mem_arr_orig) {
2495                 kfree(phba->init_mem);
2496                 kfree(phwi_ctrlr->wrb_context);
2497                 kfree(phba->phwi_ctrlr);
2498                 return -ENOMEM;
2499         }
2500
2501         mem_descr = phba->init_mem;
2502         for (i = 0; i < SE_MEM_MAX; i++) {
2503                 if (!phba->mem_req[i]) {
2504                         mem_descr->mem_array = NULL;
2505                         mem_descr++;
2506                         continue;
2507                 }
2508
2509                 j = 0;
2510                 mem_arr = mem_arr_orig;
2511                 alloc_size = phba->mem_req[i];
2512                 memset(mem_arr, 0, sizeof(struct mem_array) *
2513                        BEISCSI_MAX_FRAGS_INIT);
2514                 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2515                 do {
2516                         mem_arr->virtual_address = pci_alloc_consistent(
2517                                                         phba->pcidev,
2518                                                         curr_alloc_size,
2519                                                         &bus_add);
2520                         if (!mem_arr->virtual_address) {
2521                                 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2522                                         goto free_mem;
2523                                 if (curr_alloc_size -
2524                                         rounddown_pow_of_two(curr_alloc_size))
2525                                         curr_alloc_size = rounddown_pow_of_two
2526                                                              (curr_alloc_size);
2527                                 else
2528                                         curr_alloc_size = curr_alloc_size / 2;
2529                         } else {
2530                                 mem_arr->bus_address.u.
2531                                     a64.address = (__u64) bus_add;
2532                                 mem_arr->size = curr_alloc_size;
2533                                 alloc_size -= curr_alloc_size;
2534                                 curr_alloc_size = min(be_max_phys_size *
2535                                                       1024, alloc_size);
2536                                 j++;
2537                                 mem_arr++;
2538                         }
2539                 } while (alloc_size);
2540                 mem_descr->num_elements = j;
2541                 mem_descr->size_in_bytes = phba->mem_req[i];
2542                 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2543                                                GFP_KERNEL);
2544                 if (!mem_descr->mem_array)
2545                         goto free_mem;
2546
2547                 memcpy(mem_descr->mem_array, mem_arr_orig,
2548                        sizeof(struct mem_array) * j);
2549                 mem_descr++;
2550         }
2551         kfree(mem_arr_orig);
2552         return 0;
2553 free_mem:
2554         mem_descr->num_elements = j;
2555         while ((i) || (j)) {
2556                 for (j = mem_descr->num_elements; j > 0; j--) {
2557                         pci_free_consistent(phba->pcidev,
2558                                             mem_descr->mem_array[j - 1].size,
2559                                             mem_descr->mem_array[j - 1].
2560                                             virtual_address,
2561                                             (unsigned long)mem_descr->
2562                                             mem_array[j - 1].
2563                                             bus_address.u.a64.address);
2564                 }
2565                 if (i) {
2566                         i--;
2567                         kfree(mem_descr->mem_array);
2568                         mem_descr--;
2569                 }
2570         }
2571         kfree(mem_arr_orig);
2572         kfree(phba->init_mem);
2573         kfree(phba->phwi_ctrlr->wrb_context);
2574         kfree(phba->phwi_ctrlr);
2575         return -ENOMEM;
2576 }
2577
2578 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2579 {
2580         beiscsi_find_mem_req(phba);
2581         return beiscsi_alloc_mem(phba);
2582 }
2583
2584 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2585 {
2586         struct pdu_data_out *pdata_out;
2587         struct pdu_nop_out *pnop_out;
2588         struct be_mem_descriptor *mem_descr;
2589
2590         mem_descr = phba->init_mem;
2591         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2592         pdata_out =
2593             (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2594         memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2595
2596         AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2597                       IIOC_SCSI_DATA);
2598
2599         pnop_out =
2600             (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2601                                    virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2602
2603         memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2604         AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2605         AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2606         AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2607 }
2608
2609 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2610 {
2611         struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2612         struct hwi_context_memory *phwi_ctxt;
2613         struct wrb_handle *pwrb_handle = NULL;
2614         struct hwi_controller *phwi_ctrlr;
2615         struct hwi_wrb_context *pwrb_context;
2616         struct iscsi_wrb *pwrb = NULL;
2617         unsigned int num_cxn_wrbh = 0;
2618         unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2619
2620         mem_descr_wrbh = phba->init_mem;
2621         mem_descr_wrbh += HWI_MEM_WRBH;
2622
2623         mem_descr_wrb = phba->init_mem;
2624         mem_descr_wrb += HWI_MEM_WRB;
2625         phwi_ctrlr = phba->phwi_ctrlr;
2626
2627         /* Allocate memory for WRBQ */
2628         phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2629         phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
2630                                      phba->params.cxns_per_ctrl,
2631                                      GFP_KERNEL);
2632         if (!phwi_ctxt->be_wrbq) {
2633                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2634                             "BM_%d : WRBQ Mem Alloc Failed\n");
2635                 return -ENOMEM;
2636         }
2637
2638         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2639                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2640                 pwrb_context->pwrb_handle_base =
2641                                 kzalloc(sizeof(struct wrb_handle *) *
2642                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2643                 if (!pwrb_context->pwrb_handle_base) {
2644                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2645                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2646                         goto init_wrb_hndl_failed;
2647                 }
2648                 pwrb_context->pwrb_handle_basestd =
2649                                 kzalloc(sizeof(struct wrb_handle *) *
2650                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2651                 if (!pwrb_context->pwrb_handle_basestd) {
2652                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2653                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2654                         goto init_wrb_hndl_failed;
2655                 }
2656                 if (!num_cxn_wrbh) {
2657                         pwrb_handle =
2658                                 mem_descr_wrbh->mem_array[idx].virtual_address;
2659                         num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2660                                         ((sizeof(struct wrb_handle)) *
2661                                          phba->params.wrbs_per_cxn));
2662                         idx++;
2663                 }
2664                 pwrb_context->alloc_index = 0;
2665                 pwrb_context->wrb_handles_available = 0;
2666                 pwrb_context->free_index = 0;
2667
2668                 if (num_cxn_wrbh) {
2669                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2670                                 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2671                                 pwrb_context->pwrb_handle_basestd[j] =
2672                                                                 pwrb_handle;
2673                                 pwrb_context->wrb_handles_available++;
2674                                 pwrb_handle->wrb_index = j;
2675                                 pwrb_handle++;
2676                         }
2677                         num_cxn_wrbh--;
2678                 }
2679                 spin_lock_init(&pwrb_context->wrb_lock);
2680         }
2681         idx = 0;
2682         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2683                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2684                 if (!num_cxn_wrb) {
2685                         pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2686                         num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2687                                 ((sizeof(struct iscsi_wrb) *
2688                                   phba->params.wrbs_per_cxn));
2689                         idx++;
2690                 }
2691
2692                 if (num_cxn_wrb) {
2693                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2694                                 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2695                                 pwrb_handle->pwrb = pwrb;
2696                                 pwrb++;
2697                         }
2698                         num_cxn_wrb--;
2699                 }
2700         }
2701         return 0;
2702 init_wrb_hndl_failed:
2703         for (j = index; j > 0; j--) {
2704                 pwrb_context = &phwi_ctrlr->wrb_context[j];
2705                 kfree(pwrb_context->pwrb_handle_base);
2706                 kfree(pwrb_context->pwrb_handle_basestd);
2707         }
2708         return -ENOMEM;
2709 }
2710
2711 static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2712 {
2713         uint8_t ulp_num;
2714         struct hwi_controller *phwi_ctrlr;
2715         struct hba_parameters *p = &phba->params;
2716         struct hd_async_context *pasync_ctx;
2717         struct hd_async_handle *pasync_header_h, *pasync_data_h;
2718         unsigned int index, idx, num_per_mem, num_async_data;
2719         struct be_mem_descriptor *mem_descr;
2720
2721         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2722                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2723                         /* get async_ctx for each ULP */
2724                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2725                         mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2726                                      (ulp_num * MEM_DESCR_OFFSET));
2727
2728                         phwi_ctrlr = phba->phwi_ctrlr;
2729                         phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2730                                 (struct hd_async_context *)
2731                                  mem_descr->mem_array[0].virtual_address;
2732
2733                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2734                         memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2735
2736                         pasync_ctx->async_entry =
2737                                         (struct hd_async_entry *)
2738                                         ((long unsigned int)pasync_ctx +
2739                                         sizeof(struct hd_async_context));
2740
2741                         pasync_ctx->num_entries = BEISCSI_ASYNC_HDQ_SIZE(phba,
2742                                                   ulp_num);
2743                         /* setup header buffers */
2744                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2745                         mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2746                                 (ulp_num * MEM_DESCR_OFFSET);
2747                         if (mem_descr->mem_array[0].virtual_address) {
2748                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2749                                             "BM_%d : hwi_init_async_pdu_ctx"
2750                                             " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2751                                             ulp_num,
2752                                             mem_descr->mem_array[0].
2753                                             virtual_address);
2754                         } else
2755                                 beiscsi_log(phba, KERN_WARNING,
2756                                             BEISCSI_LOG_INIT,
2757                                             "BM_%d : No Virtual address for ULP : %d\n",
2758                                             ulp_num);
2759
2760                         pasync_ctx->async_header.pi = 0;
2761                         pasync_ctx->async_header.buffer_size = p->defpdu_hdr_sz;
2762                         pasync_ctx->async_header.va_base =
2763                                 mem_descr->mem_array[0].virtual_address;
2764
2765                         pasync_ctx->async_header.pa_base.u.a64.address =
2766                                 mem_descr->mem_array[0].
2767                                 bus_address.u.a64.address;
2768
2769                         /* setup header buffer sgls */
2770                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2771                         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2772                                      (ulp_num * MEM_DESCR_OFFSET);
2773                         if (mem_descr->mem_array[0].virtual_address) {
2774                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2775                                             "BM_%d : hwi_init_async_pdu_ctx"
2776                                             " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
2777                                             ulp_num,
2778                                             mem_descr->mem_array[0].
2779                                             virtual_address);
2780                         } else
2781                                 beiscsi_log(phba, KERN_WARNING,
2782                                             BEISCSI_LOG_INIT,
2783                                             "BM_%d : No Virtual address for ULP : %d\n",
2784                                             ulp_num);
2785
2786                         pasync_ctx->async_header.ring_base =
2787                                 mem_descr->mem_array[0].virtual_address;
2788
2789                         /* setup header buffer handles */
2790                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2791                         mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2792                                      (ulp_num * MEM_DESCR_OFFSET);
2793                         if (mem_descr->mem_array[0].virtual_address) {
2794                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2795                                             "BM_%d : hwi_init_async_pdu_ctx"
2796                                             " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
2797                                             ulp_num,
2798                                             mem_descr->mem_array[0].
2799                                             virtual_address);
2800                         } else
2801                                 beiscsi_log(phba, KERN_WARNING,
2802                                             BEISCSI_LOG_INIT,
2803                                             "BM_%d : No Virtual address for ULP : %d\n",
2804                                             ulp_num);
2805
2806                         pasync_ctx->async_header.handle_base =
2807                                 mem_descr->mem_array[0].virtual_address;
2808
2809                         /* setup data buffer sgls */
2810                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2811                         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
2812                                      (ulp_num * MEM_DESCR_OFFSET);
2813                         if (mem_descr->mem_array[0].virtual_address) {
2814                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2815                                             "BM_%d : hwi_init_async_pdu_ctx"
2816                                             " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
2817                                             ulp_num,
2818                                             mem_descr->mem_array[0].
2819                                             virtual_address);
2820                         } else
2821                                 beiscsi_log(phba, KERN_WARNING,
2822                                             BEISCSI_LOG_INIT,
2823                                             "BM_%d : No Virtual address for ULP : %d\n",
2824                                             ulp_num);
2825
2826                         pasync_ctx->async_data.ring_base =
2827                                 mem_descr->mem_array[0].virtual_address;
2828
2829                         /* setup data buffer handles */
2830                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2831                         mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2832                                      (ulp_num * MEM_DESCR_OFFSET);
2833                         if (!mem_descr->mem_array[0].virtual_address)
2834                                 beiscsi_log(phba, KERN_WARNING,
2835                                             BEISCSI_LOG_INIT,
2836                                             "BM_%d : No Virtual address for ULP : %d\n",
2837                                             ulp_num);
2838
2839                         pasync_ctx->async_data.handle_base =
2840                                 mem_descr->mem_array[0].virtual_address;
2841
2842                         pasync_header_h =
2843                                 (struct hd_async_handle *)
2844                                 pasync_ctx->async_header.handle_base;
2845                         pasync_data_h =
2846                                 (struct hd_async_handle *)
2847                                 pasync_ctx->async_data.handle_base;
2848
2849                         /* setup data buffers */
2850                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2851                         mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2852                                      (ulp_num * MEM_DESCR_OFFSET);
2853                         if (mem_descr->mem_array[0].virtual_address) {
2854                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2855                                             "BM_%d : hwi_init_async_pdu_ctx"
2856                                             " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
2857                                             ulp_num,
2858                                             mem_descr->mem_array[0].
2859                                             virtual_address);
2860                         } else
2861                                 beiscsi_log(phba, KERN_WARNING,
2862                                             BEISCSI_LOG_INIT,
2863                                             "BM_%d : No Virtual address for ULP : %d\n",
2864                                             ulp_num);
2865
2866                         idx = 0;
2867                         pasync_ctx->async_data.pi = 0;
2868                         pasync_ctx->async_data.buffer_size = p->defpdu_data_sz;
2869                         pasync_ctx->async_data.va_base =
2870                                 mem_descr->mem_array[idx].virtual_address;
2871                         pasync_ctx->async_data.pa_base.u.a64.address =
2872                                 mem_descr->mem_array[idx].
2873                                 bus_address.u.a64.address;
2874
2875                         num_async_data = ((mem_descr->mem_array[idx].size) /
2876                                         phba->params.defpdu_data_sz);
2877                         num_per_mem = 0;
2878
2879                         for (index = 0; index < BEISCSI_ASYNC_HDQ_SIZE
2880                                         (phba, ulp_num); index++) {
2881                                 pasync_header_h->cri = -1;
2882                                 pasync_header_h->is_header = 1;
2883                                 pasync_header_h->index = index;
2884                                 INIT_LIST_HEAD(&pasync_header_h->link);
2885                                 pasync_header_h->pbuffer =
2886                                         (void *)((unsigned long)
2887                                                  (pasync_ctx->
2888                                                   async_header.va_base) +
2889                                                  (p->defpdu_hdr_sz * index));
2890
2891                                 pasync_header_h->pa.u.a64.address =
2892                                         pasync_ctx->async_header.pa_base.u.a64.
2893                                         address + (p->defpdu_hdr_sz * index);
2894
2895                                 pasync_ctx->async_entry[index].header =
2896                                         pasync_header_h;
2897                                 pasync_header_h++;
2898                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
2899                                                 wq.list);
2900
2901                                 pasync_data_h->cri = -1;
2902                                 pasync_data_h->is_header = 0;
2903                                 pasync_data_h->index = index;
2904                                 INIT_LIST_HEAD(&pasync_data_h->link);
2905
2906                                 if (!num_async_data) {
2907                                         num_per_mem = 0;
2908                                         idx++;
2909                                         pasync_ctx->async_data.va_base =
2910                                                 mem_descr->mem_array[idx].
2911                                                 virtual_address;
2912                                         pasync_ctx->async_data.pa_base.u.
2913                                                 a64.address =
2914                                                 mem_descr->mem_array[idx].
2915                                                 bus_address.u.a64.address;
2916                                         num_async_data =
2917                                                 ((mem_descr->mem_array[idx].
2918                                                   size) /
2919                                                  phba->params.defpdu_data_sz);
2920                                 }
2921                                 pasync_data_h->pbuffer =
2922                                         (void *)((unsigned long)
2923                                         (pasync_ctx->async_data.va_base) +
2924                                         (p->defpdu_data_sz * num_per_mem));
2925
2926                                 pasync_data_h->pa.u.a64.address =
2927                                         pasync_ctx->async_data.pa_base.u.a64.
2928                                         address + (p->defpdu_data_sz *
2929                                         num_per_mem);
2930                                 num_per_mem++;
2931                                 num_async_data--;
2932
2933                                 pasync_ctx->async_entry[index].data =
2934                                         pasync_data_h;
2935                                 pasync_data_h++;
2936                         }
2937                 }
2938         }
2939
2940         return 0;
2941 }
2942
2943 static int
2944 be_sgl_create_contiguous(void *virtual_address,
2945                          u64 physical_address, u32 length,
2946                          struct be_dma_mem *sgl)
2947 {
2948         WARN_ON(!virtual_address);
2949         WARN_ON(!physical_address);
2950         WARN_ON(!length);
2951         WARN_ON(!sgl);
2952
2953         sgl->va = virtual_address;
2954         sgl->dma = (unsigned long)physical_address;
2955         sgl->size = length;
2956
2957         return 0;
2958 }
2959
2960 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
2961 {
2962         memset(sgl, 0, sizeof(*sgl));
2963 }
2964
2965 static void
2966 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
2967                      struct mem_array *pmem, struct be_dma_mem *sgl)
2968 {
2969         if (sgl->va)
2970                 be_sgl_destroy_contiguous(sgl);
2971
2972         be_sgl_create_contiguous(pmem->virtual_address,
2973                                  pmem->bus_address.u.a64.address,
2974                                  pmem->size, sgl);
2975 }
2976
2977 static void
2978 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
2979                            struct mem_array *pmem, struct be_dma_mem *sgl)
2980 {
2981         if (sgl->va)
2982                 be_sgl_destroy_contiguous(sgl);
2983
2984         be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
2985                                  pmem->bus_address.u.a64.address,
2986                                  pmem->size, sgl);
2987 }
2988
2989 static int be_fill_queue(struct be_queue_info *q,
2990                 u16 len, u16 entry_size, void *vaddress)
2991 {
2992         struct be_dma_mem *mem = &q->dma_mem;
2993
2994         memset(q, 0, sizeof(*q));
2995         q->len = len;
2996         q->entry_size = entry_size;
2997         mem->size = len * entry_size;
2998         mem->va = vaddress;
2999         if (!mem->va)
3000                 return -ENOMEM;
3001         memset(mem->va, 0, mem->size);
3002         return 0;
3003 }
3004
3005 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
3006                              struct hwi_context_memory *phwi_context)
3007 {
3008         int ret = -ENOMEM, eq_for_mcc;
3009         unsigned int i, num_eq_pages;
3010         struct be_queue_info *eq;
3011         struct be_dma_mem *mem;
3012         void *eq_vaddress;
3013         dma_addr_t paddr;
3014
3015         num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3016                                       sizeof(struct be_eq_entry));
3017
3018         if (phba->pcidev->msix_enabled)
3019                 eq_for_mcc = 1;
3020         else
3021                 eq_for_mcc = 0;
3022         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3023                 eq = &phwi_context->be_eq[i].q;
3024                 mem = &eq->dma_mem;
3025                 phwi_context->be_eq[i].phba = phba;
3026                 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3027                                                    num_eq_pages * PAGE_SIZE,
3028                                                    &paddr);
3029                 if (!eq_vaddress) {
3030                         ret = -ENOMEM;
3031                         goto create_eq_error;
3032                 }
3033
3034                 mem->va = eq_vaddress;
3035                 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3036                                     sizeof(struct be_eq_entry), eq_vaddress);
3037                 if (ret) {
3038                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3039                                     "BM_%d : be_fill_queue Failed for EQ\n");
3040                         goto create_eq_error;
3041                 }
3042
3043                 mem->dma = paddr;
3044                 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3045                                             phwi_context->cur_eqd);
3046                 if (ret) {
3047                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3048                                     "BM_%d : beiscsi_cmd_eq_create"
3049                                     "Failed for EQ\n");
3050                         goto create_eq_error;
3051                 }
3052
3053                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3054                             "BM_%d : eqid = %d\n",
3055                             phwi_context->be_eq[i].q.id);
3056         }
3057         return 0;
3058
3059 create_eq_error:
3060         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3061                 eq = &phwi_context->be_eq[i].q;
3062                 mem = &eq->dma_mem;
3063                 if (mem->va)
3064                         pci_free_consistent(phba->pcidev, num_eq_pages
3065                                             * PAGE_SIZE,
3066                                             mem->va, mem->dma);
3067         }
3068         return ret;
3069 }
3070
3071 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3072                              struct hwi_context_memory *phwi_context)
3073 {
3074         unsigned int i, num_cq_pages;
3075         struct be_queue_info *cq, *eq;
3076         struct be_dma_mem *mem;
3077         struct be_eq_obj *pbe_eq;
3078         void *cq_vaddress;
3079         int ret = -ENOMEM;
3080         dma_addr_t paddr;
3081
3082         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3083                                       sizeof(struct sol_cqe));
3084
3085         for (i = 0; i < phba->num_cpus; i++) {
3086                 cq = &phwi_context->be_cq[i];
3087                 eq = &phwi_context->be_eq[i].q;
3088                 pbe_eq = &phwi_context->be_eq[i];
3089                 pbe_eq->cq = cq;
3090                 pbe_eq->phba = phba;
3091                 mem = &cq->dma_mem;
3092                 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3093                                                    num_cq_pages * PAGE_SIZE,
3094                                                    &paddr);
3095                 if (!cq_vaddress) {
3096                         ret = -ENOMEM;
3097                         goto create_cq_error;
3098                 }
3099
3100                 ret = be_fill_queue(cq, phba->params.num_cq_entries,
3101                                     sizeof(struct sol_cqe), cq_vaddress);
3102                 if (ret) {
3103                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3104                                     "BM_%d : be_fill_queue Failed "
3105                                     "for ISCSI CQ\n");
3106                         goto create_cq_error;
3107                 }
3108
3109                 mem->dma = paddr;
3110                 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3111                                             false, 0);
3112                 if (ret) {
3113                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3114                                     "BM_%d : beiscsi_cmd_eq_create"
3115                                     "Failed for ISCSI CQ\n");
3116                         goto create_cq_error;
3117                 }
3118                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3119                             "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3120                             "iSCSI CQ CREATED\n", cq->id, eq->id);
3121         }
3122         return 0;
3123
3124 create_cq_error:
3125         for (i = 0; i < phba->num_cpus; i++) {
3126                 cq = &phwi_context->be_cq[i];
3127                 mem = &cq->dma_mem;
3128                 if (mem->va)
3129                         pci_free_consistent(phba->pcidev, num_cq_pages
3130                                             * PAGE_SIZE,
3131                                             mem->va, mem->dma);
3132         }
3133         return ret;
3134 }
3135
3136 static int
3137 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3138                        struct hwi_context_memory *phwi_context,
3139                        struct hwi_controller *phwi_ctrlr,
3140                        unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3141 {
3142         unsigned int idx;
3143         int ret;
3144         struct be_queue_info *dq, *cq;
3145         struct be_dma_mem *mem;
3146         struct be_mem_descriptor *mem_descr;
3147         void *dq_vaddress;
3148
3149         idx = 0;
3150         dq = &phwi_context->be_def_hdrq[ulp_num];
3151         cq = &phwi_context->be_cq[0];
3152         mem = &dq->dma_mem;
3153         mem_descr = phba->init_mem;
3154         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3155                     (ulp_num * MEM_DESCR_OFFSET);
3156         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3157         ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3158                             sizeof(struct phys_addr),
3159                             sizeof(struct phys_addr), dq_vaddress);
3160         if (ret) {
3161                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3162                             "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3163                             ulp_num);
3164
3165                 return ret;
3166         }
3167         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3168                                   bus_address.u.a64.address;
3169         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3170                                               def_pdu_ring_sz,
3171                                               phba->params.defpdu_hdr_sz,
3172                                               BEISCSI_DEFQ_HDR, ulp_num);
3173         if (ret) {
3174                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3175                             "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3176                             ulp_num);
3177
3178                 return ret;
3179         }
3180
3181         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3182                     "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3183                     ulp_num,
3184                     phwi_context->be_def_hdrq[ulp_num].id);
3185         return 0;
3186 }
3187
3188 static int
3189 beiscsi_create_def_data(struct beiscsi_hba *phba,
3190                         struct hwi_context_memory *phwi_context,
3191                         struct hwi_controller *phwi_ctrlr,
3192                         unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3193 {
3194         unsigned int idx;
3195         int ret;
3196         struct be_queue_info *dataq, *cq;
3197         struct be_dma_mem *mem;
3198         struct be_mem_descriptor *mem_descr;
3199         void *dq_vaddress;
3200
3201         idx = 0;
3202         dataq = &phwi_context->be_def_dataq[ulp_num];
3203         cq = &phwi_context->be_cq[0];
3204         mem = &dataq->dma_mem;
3205         mem_descr = phba->init_mem;
3206         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3207                     (ulp_num * MEM_DESCR_OFFSET);
3208         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3209         ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3210                             sizeof(struct phys_addr),
3211                             sizeof(struct phys_addr), dq_vaddress);
3212         if (ret) {
3213                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3214                             "BM_%d : be_fill_queue Failed for DEF PDU "
3215                             "DATA on ULP : %d\n",
3216                             ulp_num);
3217
3218                 return ret;
3219         }
3220         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3221                                   bus_address.u.a64.address;
3222         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3223                                               def_pdu_ring_sz,
3224                                               phba->params.defpdu_data_sz,
3225                                               BEISCSI_DEFQ_DATA, ulp_num);
3226         if (ret) {
3227                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3228                             "BM_%d be_cmd_create_default_pdu_queue"
3229                             " Failed for DEF PDU DATA on ULP : %d\n",
3230                             ulp_num);
3231                 return ret;
3232         }
3233
3234         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3235                     "BM_%d : iscsi def data id on ULP : %d is  %d\n",
3236                     ulp_num,
3237                     phwi_context->be_def_dataq[ulp_num].id);
3238
3239         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3240                     "BM_%d : DEFAULT PDU DATA RING CREATED"
3241                     "on ULP : %d\n", ulp_num);
3242         return 0;
3243 }
3244
3245
3246 static int
3247 beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3248 {
3249         struct be_mem_descriptor *mem_descr;
3250         struct mem_array *pm_arr;
3251         struct be_dma_mem sgl;
3252         int status, ulp_num;
3253
3254         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3255                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3256                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3257                         mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3258                                     (ulp_num * MEM_DESCR_OFFSET);
3259                         pm_arr = mem_descr->mem_array;
3260
3261                         hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3262                         status = be_cmd_iscsi_post_template_hdr(
3263                                  &phba->ctrl, &sgl);
3264
3265                         if (status != 0) {
3266                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3267                                             "BM_%d : Post Template HDR Failed for"
3268                                             "ULP_%d\n", ulp_num);
3269                                 return status;
3270                         }
3271
3272                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3273                                     "BM_%d : Template HDR Pages Posted for"
3274                                     "ULP_%d\n", ulp_num);
3275                 }
3276         }
3277         return 0;
3278 }
3279
3280 static int
3281 beiscsi_post_pages(struct beiscsi_hba *phba)
3282 {
3283         struct be_mem_descriptor *mem_descr;
3284         struct mem_array *pm_arr;
3285         unsigned int page_offset, i;
3286         struct be_dma_mem sgl;
3287         int status, ulp_num = 0;
3288
3289         mem_descr = phba->init_mem;
3290         mem_descr += HWI_MEM_SGE;
3291         pm_arr = mem_descr->mem_array;
3292
3293         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3294                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3295                         break;
3296
3297         page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3298                         phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3299         for (i = 0; i < mem_descr->num_elements; i++) {
3300                 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3301                 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3302                                                 page_offset,
3303                                                 (pm_arr->size / PAGE_SIZE));
3304                 page_offset += pm_arr->size / PAGE_SIZE;
3305                 if (status != 0) {
3306                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3307                                     "BM_%d : post sgl failed.\n");
3308                         return status;
3309                 }
3310                 pm_arr++;
3311         }
3312         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3313                     "BM_%d : POSTED PAGES\n");
3314         return 0;
3315 }
3316
3317 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3318 {
3319         struct be_dma_mem *mem = &q->dma_mem;
3320         if (mem->va) {
3321                 pci_free_consistent(phba->pcidev, mem->size,
3322                         mem->va, mem->dma);
3323                 mem->va = NULL;
3324         }
3325 }
3326
3327 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3328                 u16 len, u16 entry_size)
3329 {
3330         struct be_dma_mem *mem = &q->dma_mem;
3331
3332         memset(q, 0, sizeof(*q));
3333         q->len = len;
3334         q->entry_size = entry_size;
3335         mem->size = len * entry_size;
3336         mem->va = pci_zalloc_consistent(phba->pcidev, mem->size, &mem->dma);
3337         if (!mem->va)
3338                 return -ENOMEM;
3339         return 0;
3340 }
3341
3342 static int
3343 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3344                          struct hwi_context_memory *phwi_context,
3345                          struct hwi_controller *phwi_ctrlr)
3346 {
3347         unsigned int num_wrb_rings;
3348         u64 pa_addr_lo;
3349         unsigned int idx, num, i, ulp_num;
3350         struct mem_array *pwrb_arr;
3351         void *wrb_vaddr;
3352         struct be_dma_mem sgl;
3353         struct be_mem_descriptor *mem_descr;
3354         struct hwi_wrb_context *pwrb_context;
3355         int status;
3356         uint8_t ulp_count = 0, ulp_base_num = 0;
3357         uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
3358
3359         idx = 0;
3360         mem_descr = phba->init_mem;
3361         mem_descr += HWI_MEM_WRB;
3362         pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3363                            GFP_KERNEL);
3364         if (!pwrb_arr) {
3365                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3366                             "BM_%d : Memory alloc failed in create wrb ring.\n");
3367                 return -ENOMEM;
3368         }
3369         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3370         pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3371         num_wrb_rings = mem_descr->mem_array[idx].size /
3372                 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3373
3374         for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3375                 if (num_wrb_rings) {
3376                         pwrb_arr[num].virtual_address = wrb_vaddr;
3377                         pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3378                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3379                                             sizeof(struct iscsi_wrb);
3380                         wrb_vaddr += pwrb_arr[num].size;
3381                         pa_addr_lo += pwrb_arr[num].size;
3382                         num_wrb_rings--;
3383                 } else {
3384                         idx++;
3385                         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3386                         pa_addr_lo = mem_descr->mem_array[idx].\
3387                                         bus_address.u.a64.address;
3388                         num_wrb_rings = mem_descr->mem_array[idx].size /
3389                                         (phba->params.wrbs_per_cxn *
3390                                         sizeof(struct iscsi_wrb));
3391                         pwrb_arr[num].virtual_address = wrb_vaddr;
3392                         pwrb_arr[num].bus_address.u.a64.address\
3393                                                 = pa_addr_lo;
3394                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3395                                                  sizeof(struct iscsi_wrb);
3396                         wrb_vaddr += pwrb_arr[num].size;
3397                         pa_addr_lo   += pwrb_arr[num].size;
3398                         num_wrb_rings--;
3399                 }
3400         }
3401
3402         /* Get the ULP Count */
3403         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3404                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3405                         ulp_count++;
3406                         ulp_base_num = ulp_num;
3407                         cid_count_ulp[ulp_num] =
3408                                 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3409                 }
3410
3411         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3412                 if (ulp_count > 1) {
3413                         ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3414
3415                         if (!cid_count_ulp[ulp_base_num])
3416                                 ulp_base_num = (ulp_base_num + 1) %
3417                                                 BEISCSI_ULP_COUNT;
3418
3419                         cid_count_ulp[ulp_base_num]--;
3420                 }
3421
3422
3423                 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3424                 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3425                                             &phwi_context->be_wrbq[i],
3426                                             &phwi_ctrlr->wrb_context[i],
3427                                             ulp_base_num);
3428                 if (status != 0) {
3429                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3430                                     "BM_%d : wrbq create failed.");
3431                         kfree(pwrb_arr);
3432                         return status;
3433                 }
3434                 pwrb_context = &phwi_ctrlr->wrb_context[i];
3435                 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3436         }
3437         kfree(pwrb_arr);
3438         return 0;
3439 }
3440
3441 static void free_wrb_handles(struct beiscsi_hba *phba)
3442 {
3443         unsigned int index;
3444         struct hwi_controller *phwi_ctrlr;
3445         struct hwi_wrb_context *pwrb_context;
3446
3447         phwi_ctrlr = phba->phwi_ctrlr;
3448         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3449                 pwrb_context = &phwi_ctrlr->wrb_context[index];
3450                 kfree(pwrb_context->pwrb_handle_base);
3451                 kfree(pwrb_context->pwrb_handle_basestd);
3452         }
3453 }
3454
3455 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3456 {
3457         struct be_ctrl_info *ctrl = &phba->ctrl;
3458         struct be_dma_mem *ptag_mem;
3459         struct be_queue_info *q;
3460         int i, tag;
3461
3462         q = &phba->ctrl.mcc_obj.q;
3463         for (i = 0; i < MAX_MCC_CMD; i++) {
3464                 tag = i + 1;
3465                 if (!test_bit(MCC_TAG_STATE_RUNNING,
3466                               &ctrl->ptag_state[tag].tag_state))
3467                         continue;
3468
3469                 if (test_bit(MCC_TAG_STATE_TIMEOUT,
3470                              &ctrl->ptag_state[tag].tag_state)) {
3471                         ptag_mem = &ctrl->ptag_state[tag].tag_mem_state;
3472                         if (ptag_mem->size) {
3473                                 pci_free_consistent(ctrl->pdev,
3474                                                     ptag_mem->size,
3475                                                     ptag_mem->va,
3476                                                     ptag_mem->dma);
3477                                 ptag_mem->size = 0;
3478                         }
3479                         continue;
3480                 }
3481                 /**
3482                  * If MCC is still active and waiting then wake up the process.
3483                  * We are here only because port is going offline. The process
3484                  * sees that (BEISCSI_HBA_ONLINE is cleared) and EIO error is
3485                  * returned for the operation and allocated memory cleaned up.
3486                  */
3487                 if (waitqueue_active(&ctrl->mcc_wait[tag])) {
3488                         ctrl->mcc_tag_status[tag] = MCC_STATUS_FAILED;
3489                         ctrl->mcc_tag_status[tag] |= CQE_VALID_MASK;
3490                         wake_up_interruptible(&ctrl->mcc_wait[tag]);
3491                         /*
3492                          * Control tag info gets reinitialized in enable
3493                          * so wait for the process to clear running state.
3494                          */
3495                         while (test_bit(MCC_TAG_STATE_RUNNING,
3496                                         &ctrl->ptag_state[tag].tag_state))
3497                                 schedule_timeout_uninterruptible(HZ);
3498                 }
3499                 /**
3500                  * For MCC with tag_states MCC_TAG_STATE_ASYNC and
3501                  * MCC_TAG_STATE_IGNORE nothing needs to done.
3502                  */
3503         }
3504         if (q->created) {
3505                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3506                 be_queue_free(phba, q);
3507         }
3508
3509         q = &phba->ctrl.mcc_obj.cq;
3510         if (q->created) {
3511                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3512                 be_queue_free(phba, q);
3513         }
3514 }
3515
3516 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3517                                 struct hwi_context_memory *phwi_context)
3518 {
3519         struct be_queue_info *q, *cq;
3520         struct be_ctrl_info *ctrl = &phba->ctrl;
3521
3522         /* Alloc MCC compl queue */
3523         cq = &phba->ctrl.mcc_obj.cq;
3524         if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3525                         sizeof(struct be_mcc_compl)))
3526                 goto err;
3527         /* Ask BE to create MCC compl queue; */
3528         if (phba->pcidev->msix_enabled) {
3529                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3530                                          [phba->num_cpus].q, false, true, 0))
3531                 goto mcc_cq_free;
3532         } else {
3533                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3534                                           false, true, 0))
3535                 goto mcc_cq_free;
3536         }
3537
3538         /* Alloc MCC queue */
3539         q = &phba->ctrl.mcc_obj.q;
3540         if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3541                 goto mcc_cq_destroy;
3542
3543         /* Ask BE to create MCC queue */
3544         if (beiscsi_cmd_mccq_create(phba, q, cq))
3545                 goto mcc_q_free;
3546
3547         return 0;
3548
3549 mcc_q_free:
3550         be_queue_free(phba, q);
3551 mcc_cq_destroy:
3552         beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3553 mcc_cq_free:
3554         be_queue_free(phba, cq);
3555 err:
3556         return -ENOMEM;
3557 }
3558
3559 static void be2iscsi_enable_msix(struct beiscsi_hba *phba)
3560 {
3561         int nvec = 1;
3562
3563         switch (phba->generation) {
3564         case BE_GEN2:
3565         case BE_GEN3:
3566                 nvec = BEISCSI_MAX_NUM_CPUS + 1;
3567                 break;
3568         case BE_GEN4:
3569                 nvec = phba->fw_config.eqid_count;
3570                 break;
3571         default:
3572                 nvec = 2;
3573                 break;
3574         }
3575
3576         /* if eqid_count == 1 fall back to INTX */
3577         if (enable_msix && nvec > 1) {
3578                 const struct irq_affinity desc = { .post_vectors = 1 };
3579
3580                 if (pci_alloc_irq_vectors_affinity(phba->pcidev, 2, nvec,
3581                                 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, &desc) < 0) {
3582                         phba->num_cpus = nvec - 1;
3583                         return;
3584                 }
3585         }
3586
3587         phba->num_cpus = 1;
3588 }
3589
3590 static void hwi_purge_eq(struct beiscsi_hba *phba)
3591 {
3592         struct hwi_controller *phwi_ctrlr;
3593         struct hwi_context_memory *phwi_context;
3594         struct be_queue_info *eq;
3595         struct be_eq_entry *eqe = NULL;
3596         int i, eq_msix;
3597         unsigned int num_processed;
3598
3599         if (beiscsi_hba_in_error(phba))
3600                 return;
3601
3602         phwi_ctrlr = phba->phwi_ctrlr;
3603         phwi_context = phwi_ctrlr->phwi_ctxt;
3604         if (phba->pcidev->msix_enabled)
3605                 eq_msix = 1;
3606         else
3607                 eq_msix = 0;
3608
3609         for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
3610                 eq = &phwi_context->be_eq[i].q;
3611                 eqe = queue_tail_node(eq);
3612                 num_processed = 0;
3613                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
3614                                         & EQE_VALID_MASK) {
3615                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
3616                         queue_tail_inc(eq);
3617                         eqe = queue_tail_node(eq);
3618                         num_processed++;
3619                 }
3620
3621                 if (num_processed)
3622                         hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
3623         }
3624 }
3625
3626 static void hwi_cleanup_port(struct beiscsi_hba *phba)
3627 {
3628         struct be_queue_info *q;
3629         struct be_ctrl_info *ctrl = &phba->ctrl;
3630         struct hwi_controller *phwi_ctrlr;
3631         struct hwi_context_memory *phwi_context;
3632         int i, eq_for_mcc, ulp_num;
3633
3634         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3635                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3636                         beiscsi_cmd_iscsi_cleanup(phba, ulp_num);
3637
3638         /**
3639          * Purge all EQ entries that may have been left out. This is to
3640          * workaround a problem we've seen occasionally where driver gets an
3641          * interrupt with EQ entry bit set after stopping the controller.
3642          */
3643         hwi_purge_eq(phba);
3644
3645         phwi_ctrlr = phba->phwi_ctrlr;
3646         phwi_context = phwi_ctrlr->phwi_ctxt;
3647
3648         be_cmd_iscsi_remove_template_hdr(ctrl);
3649
3650         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3651                 q = &phwi_context->be_wrbq[i];
3652                 if (q->created)
3653                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3654         }
3655         kfree(phwi_context->be_wrbq);
3656         free_wrb_handles(phba);
3657
3658         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3659                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3660
3661                         q = &phwi_context->be_def_hdrq[ulp_num];
3662                         if (q->created)
3663                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3664
3665                         q = &phwi_context->be_def_dataq[ulp_num];
3666                         if (q->created)
3667                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3668                 }
3669         }
3670
3671         beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3672
3673         for (i = 0; i < (phba->num_cpus); i++) {
3674                 q = &phwi_context->be_cq[i];
3675                 if (q->created) {
3676                         be_queue_free(phba, q);
3677                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3678                 }
3679         }
3680
3681         be_mcc_queues_destroy(phba);
3682         if (phba->pcidev->msix_enabled)
3683                 eq_for_mcc = 1;
3684         else
3685                 eq_for_mcc = 0;
3686         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3687                 q = &phwi_context->be_eq[i].q;
3688                 if (q->created) {
3689                         be_queue_free(phba, q);
3690                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3691                 }
3692         }
3693         /* this ensures complete FW cleanup */
3694         beiscsi_cmd_function_reset(phba);
3695         /* last communication, indicate driver is unloading */
3696         beiscsi_cmd_special_wrb(&phba->ctrl, 0);
3697 }
3698
3699 static int hwi_init_port(struct beiscsi_hba *phba)
3700 {
3701         struct hwi_controller *phwi_ctrlr;
3702         struct hwi_context_memory *phwi_context;
3703         unsigned int def_pdu_ring_sz;
3704         struct be_ctrl_info *ctrl = &phba->ctrl;
3705         int status, ulp_num;
3706         u16 nbufs;
3707
3708         phwi_ctrlr = phba->phwi_ctrlr;
3709         phwi_context = phwi_ctrlr->phwi_ctxt;
3710         phwi_context->max_eqd = 128;
3711         phwi_context->min_eqd = 0;
3712         phwi_context->cur_eqd = 32;
3713         /* set port optic state to unknown */
3714         phba->optic_state = 0xff;
3715
3716         status = beiscsi_create_eqs(phba, phwi_context);
3717         if (status != 0) {
3718                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3719                             "BM_%d : EQ not created\n");
3720                 goto error;
3721         }
3722
3723         status = be_mcc_queues_create(phba, phwi_context);
3724         if (status != 0)
3725                 goto error;
3726
3727         status = beiscsi_check_supported_fw(ctrl, phba);
3728         if (status != 0) {
3729                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3730                             "BM_%d : Unsupported fw version\n");
3731                 goto error;
3732         }
3733
3734         status = beiscsi_create_cqs(phba, phwi_context);
3735         if (status != 0) {
3736                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3737                             "BM_%d : CQ not created\n");
3738                 goto error;
3739         }
3740
3741         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3742                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3743                         nbufs = phwi_context->pasync_ctx[ulp_num]->num_entries;
3744                         def_pdu_ring_sz = nbufs * sizeof(struct phys_addr);
3745
3746                         status = beiscsi_create_def_hdr(phba, phwi_context,
3747                                                         phwi_ctrlr,
3748                                                         def_pdu_ring_sz,
3749                                                         ulp_num);
3750                         if (status != 0) {
3751                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3752                                             "BM_%d : Default Header not created for ULP : %d\n",
3753                                             ulp_num);
3754                                 goto error;
3755                         }
3756
3757                         status = beiscsi_create_def_data(phba, phwi_context,
3758                                                          phwi_ctrlr,
3759                                                          def_pdu_ring_sz,
3760                                                          ulp_num);
3761                         if (status != 0) {
3762                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3763                                             "BM_%d : Default Data not created for ULP : %d\n",
3764                                             ulp_num);
3765                                 goto error;
3766                         }
3767                         /**
3768                          * Now that the default PDU rings have been created,
3769                          * let EP know about it.
3770                          */
3771                         beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_HDR,
3772                                                  ulp_num, nbufs);
3773                         beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_DATA,
3774                                                  ulp_num, nbufs);
3775                 }
3776         }
3777
3778         status = beiscsi_post_pages(phba);
3779         if (status != 0) {
3780                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3781                             "BM_%d : Post SGL Pages Failed\n");
3782                 goto error;
3783         }
3784
3785         status = beiscsi_post_template_hdr(phba);
3786         if (status != 0) {
3787                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3788                             "BM_%d : Template HDR Posting for CXN Failed\n");
3789         }
3790
3791         status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3792         if (status != 0) {
3793                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3794                             "BM_%d : WRB Rings not created\n");
3795                 goto error;
3796         }
3797
3798         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3799                 uint16_t async_arr_idx = 0;
3800
3801                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3802                         uint16_t cri = 0;
3803                         struct hd_async_context *pasync_ctx;
3804
3805                         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3806                                      phwi_ctrlr, ulp_num);
3807                         for (cri = 0; cri <
3808                              phba->params.cxns_per_ctrl; cri++) {
3809                                 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3810                                                (phwi_ctrlr, cri))
3811                                         pasync_ctx->cid_to_async_cri_map[
3812                                         phwi_ctrlr->wrb_context[cri].cid] =
3813                                         async_arr_idx++;
3814                         }
3815                 }
3816         }
3817
3818         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3819                     "BM_%d : hwi_init_port success\n");
3820         return 0;
3821
3822 error:
3823         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3824                     "BM_%d : hwi_init_port failed");
3825         hwi_cleanup_port(phba);
3826         return status;
3827 }
3828
3829 static int hwi_init_controller(struct beiscsi_hba *phba)
3830 {
3831         struct hwi_controller *phwi_ctrlr;
3832
3833         phwi_ctrlr = phba->phwi_ctrlr;
3834         if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3835                 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3836                     init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3837                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3838                             "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
3839                             phwi_ctrlr->phwi_ctxt);
3840         } else {
3841                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3842                             "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3843                             "than one element.Failing to load\n");
3844                 return -ENOMEM;
3845         }
3846
3847         iscsi_init_global_templates(phba);
3848         if (beiscsi_init_wrb_handle(phba))
3849                 return -ENOMEM;
3850
3851         if (hwi_init_async_pdu_ctx(phba)) {
3852                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3853                             "BM_%d : hwi_init_async_pdu_ctx failed\n");
3854                 return -ENOMEM;
3855         }
3856
3857         if (hwi_init_port(phba) != 0) {
3858                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3859                             "BM_%d : hwi_init_controller failed\n");
3860
3861                 return -ENOMEM;
3862         }
3863         return 0;
3864 }
3865
3866 static void beiscsi_free_mem(struct beiscsi_hba *phba)
3867 {
3868         struct be_mem_descriptor *mem_descr;
3869         int i, j;
3870
3871         mem_descr = phba->init_mem;
3872         i = 0;
3873         j = 0;
3874         for (i = 0; i < SE_MEM_MAX; i++) {
3875                 for (j = mem_descr->num_elements; j > 0; j--) {
3876                         pci_free_consistent(phba->pcidev,
3877                           mem_descr->mem_array[j - 1].size,
3878                           mem_descr->mem_array[j - 1].virtual_address,
3879                           (unsigned long)mem_descr->mem_array[j - 1].
3880                           bus_address.u.a64.address);
3881                 }
3882
3883                 kfree(mem_descr->mem_array);
3884                 mem_descr++;
3885         }
3886         kfree(phba->init_mem);
3887         kfree(phba->phwi_ctrlr->wrb_context);
3888         kfree(phba->phwi_ctrlr);
3889 }
3890
3891 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3892 {
3893         struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
3894         struct sgl_handle *psgl_handle;
3895         struct iscsi_sge *pfrag;
3896         unsigned int arr_index, i, idx;
3897         unsigned int ulp_icd_start, ulp_num = 0;
3898
3899         phba->io_sgl_hndl_avbl = 0;
3900         phba->eh_sgl_hndl_avbl = 0;
3901
3902         mem_descr_sglh = phba->init_mem;
3903         mem_descr_sglh += HWI_MEM_SGLH;
3904         if (1 == mem_descr_sglh->num_elements) {
3905                 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3906                                                  phba->params.ios_per_ctrl,
3907                                                  GFP_KERNEL);
3908                 if (!phba->io_sgl_hndl_base) {
3909                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3910                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
3911                         return -ENOMEM;
3912                 }
3913                 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3914                                                  (phba->params.icds_per_ctrl -
3915                                                  phba->params.ios_per_ctrl),
3916                                                  GFP_KERNEL);
3917                 if (!phba->eh_sgl_hndl_base) {
3918                         kfree(phba->io_sgl_hndl_base);
3919                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3920                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
3921                         return -ENOMEM;
3922                 }
3923         } else {
3924                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3925                             "BM_%d : HWI_MEM_SGLH is more than one element."
3926                             "Failing to load\n");
3927                 return -ENOMEM;
3928         }
3929
3930         arr_index = 0;
3931         idx = 0;
3932         while (idx < mem_descr_sglh->num_elements) {
3933                 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
3934
3935                 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
3936                       sizeof(struct sgl_handle)); i++) {
3937                         if (arr_index < phba->params.ios_per_ctrl) {
3938                                 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
3939                                 phba->io_sgl_hndl_avbl++;
3940                                 arr_index++;
3941                         } else {
3942                                 phba->eh_sgl_hndl_base[arr_index -
3943                                         phba->params.ios_per_ctrl] =
3944                                                                 psgl_handle;
3945                                 arr_index++;
3946                                 phba->eh_sgl_hndl_avbl++;
3947                         }
3948                         psgl_handle++;
3949                 }
3950                 idx++;
3951         }
3952         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3953                     "BM_%d : phba->io_sgl_hndl_avbl=%d"
3954                     "phba->eh_sgl_hndl_avbl=%d\n",
3955                     phba->io_sgl_hndl_avbl,
3956                     phba->eh_sgl_hndl_avbl);
3957
3958         mem_descr_sg = phba->init_mem;
3959         mem_descr_sg += HWI_MEM_SGE;
3960         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3961                     "\n BM_%d : mem_descr_sg->num_elements=%d\n",
3962                     mem_descr_sg->num_elements);
3963
3964         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3965                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3966                         break;
3967
3968         ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
3969
3970         arr_index = 0;
3971         idx = 0;
3972         while (idx < mem_descr_sg->num_elements) {
3973                 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
3974
3975                 for (i = 0;
3976                      i < (mem_descr_sg->mem_array[idx].size) /
3977                      (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
3978                      i++) {
3979                         if (arr_index < phba->params.ios_per_ctrl)
3980                                 psgl_handle = phba->io_sgl_hndl_base[arr_index];
3981                         else
3982                                 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
3983                                                 phba->params.ios_per_ctrl];
3984                         psgl_handle->pfrag = pfrag;
3985                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
3986                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
3987                         pfrag += phba->params.num_sge_per_io;
3988                         psgl_handle->sgl_index = ulp_icd_start + arr_index++;
3989                 }
3990                 idx++;
3991         }
3992         phba->io_sgl_free_index = 0;
3993         phba->io_sgl_alloc_index = 0;
3994         phba->eh_sgl_free_index = 0;
3995         phba->eh_sgl_alloc_index = 0;
3996         return 0;
3997 }
3998
3999 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
4000 {
4001         int ret;
4002         uint16_t i, ulp_num;
4003         struct ulp_cid_info *ptr_cid_info = NULL;
4004
4005         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4006                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4007                         ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
4008                                                GFP_KERNEL);
4009
4010                         if (!ptr_cid_info) {
4011                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4012                                             "BM_%d : Failed to allocate memory"
4013                                             "for ULP_CID_INFO for ULP : %d\n",
4014                                             ulp_num);
4015                                 ret = -ENOMEM;
4016                                 goto free_memory;
4017
4018                         }
4019
4020                         /* Allocate memory for CID array */
4021                         ptr_cid_info->cid_array =
4022                                 kcalloc(BEISCSI_GET_CID_COUNT(phba, ulp_num),
4023                                         sizeof(*ptr_cid_info->cid_array),
4024                                         GFP_KERNEL);
4025                         if (!ptr_cid_info->cid_array) {
4026                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4027                                             "BM_%d : Failed to allocate memory"
4028                                             "for CID_ARRAY for ULP : %d\n",
4029                                             ulp_num);
4030                                 kfree(ptr_cid_info);
4031                                 ptr_cid_info = NULL;
4032                                 ret = -ENOMEM;
4033
4034                                 goto free_memory;
4035                         }
4036                         ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4037                                                    phba, ulp_num);
4038
4039                         /* Save the cid_info_array ptr */
4040                         phba->cid_array_info[ulp_num] = ptr_cid_info;
4041                 }
4042         }
4043         phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
4044                                  phba->params.cxns_per_ctrl, GFP_KERNEL);
4045         if (!phba->ep_array) {
4046                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4047                             "BM_%d : Failed to allocate memory in "
4048                             "hba_setup_cid_tbls\n");
4049                 ret = -ENOMEM;
4050
4051                 goto free_memory;
4052         }
4053
4054         phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
4055                                    phba->params.cxns_per_ctrl, GFP_KERNEL);
4056         if (!phba->conn_table) {
4057                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4058                             "BM_%d : Failed to allocate memory in"
4059                             "hba_setup_cid_tbls\n");
4060
4061                 kfree(phba->ep_array);
4062                 phba->ep_array = NULL;
4063                 ret = -ENOMEM;
4064
4065                 goto free_memory;
4066         }
4067
4068         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4069                 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4070
4071                 ptr_cid_info = phba->cid_array_info[ulp_num];
4072                 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4073                         phba->phwi_ctrlr->wrb_context[i].cid;
4074
4075         }
4076
4077         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4078                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4079                         ptr_cid_info = phba->cid_array_info[ulp_num];
4080
4081                         ptr_cid_info->cid_alloc = 0;
4082                         ptr_cid_info->cid_free = 0;
4083                 }
4084         }
4085         return 0;
4086
4087 free_memory:
4088         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4089                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4090                         ptr_cid_info = phba->cid_array_info[ulp_num];
4091
4092                         if (ptr_cid_info) {
4093                                 kfree(ptr_cid_info->cid_array);
4094                                 kfree(ptr_cid_info);
4095                                 phba->cid_array_info[ulp_num] = NULL;
4096                         }
4097                 }
4098         }
4099
4100         return ret;
4101 }
4102
4103 static void hwi_enable_intr(struct beiscsi_hba *phba)
4104 {
4105         struct be_ctrl_info *ctrl = &phba->ctrl;
4106         struct hwi_controller *phwi_ctrlr;
4107         struct hwi_context_memory *phwi_context;
4108         struct be_queue_info *eq;
4109         u8 __iomem *addr;
4110         u32 reg, i;
4111         u32 enabled;
4112
4113         phwi_ctrlr = phba->phwi_ctrlr;
4114         phwi_context = phwi_ctrlr->phwi_ctxt;
4115
4116         addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4117                         PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4118         reg = ioread32(addr);
4119
4120         enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4121         if (!enabled) {
4122                 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4123                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4124                             "BM_%d : reg =x%08x addr=%p\n", reg, addr);
4125                 iowrite32(reg, addr);
4126         }
4127
4128         if (!phba->pcidev->msix_enabled) {
4129                 eq = &phwi_context->be_eq[0].q;
4130                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4131                             "BM_%d : eq->id=%d\n", eq->id);
4132
4133                 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4134         } else {
4135                 for (i = 0; i <= phba->num_cpus; i++) {
4136                         eq = &phwi_context->be_eq[i].q;
4137                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4138                                     "BM_%d : eq->id=%d\n", eq->id);
4139                         hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4140                 }
4141         }
4142 }
4143
4144 static void hwi_disable_intr(struct beiscsi_hba *phba)
4145 {
4146         struct be_ctrl_info *ctrl = &phba->ctrl;
4147
4148         u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4149         u32 reg = ioread32(addr);
4150
4151         u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4152         if (enabled) {
4153                 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4154                 iowrite32(reg, addr);
4155         } else
4156                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4157                             "BM_%d : In hwi_disable_intr, Already Disabled\n");
4158 }
4159
4160 static int beiscsi_init_port(struct beiscsi_hba *phba)
4161 {
4162         int ret;
4163
4164         ret = hwi_init_controller(phba);
4165         if (ret < 0) {
4166                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4167                             "BM_%d : init controller failed\n");
4168                 return ret;
4169         }
4170         ret = beiscsi_init_sgl_handle(phba);
4171         if (ret < 0) {
4172                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4173                             "BM_%d : init sgl handles failed\n");
4174                 goto cleanup_port;
4175         }
4176
4177         ret = hba_setup_cid_tbls(phba);
4178         if (ret < 0) {
4179                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4180                             "BM_%d : setup CID table failed\n");
4181                 kfree(phba->io_sgl_hndl_base);
4182                 kfree(phba->eh_sgl_hndl_base);
4183                 goto cleanup_port;
4184         }
4185         return ret;
4186
4187 cleanup_port:
4188         hwi_cleanup_port(phba);
4189         return ret;
4190 }
4191
4192 static void beiscsi_cleanup_port(struct beiscsi_hba *phba)
4193 {
4194         struct ulp_cid_info *ptr_cid_info = NULL;
4195         int ulp_num;
4196
4197         kfree(phba->io_sgl_hndl_base);
4198         kfree(phba->eh_sgl_hndl_base);
4199         kfree(phba->ep_array);
4200         kfree(phba->conn_table);
4201
4202         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4203                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4204                         ptr_cid_info = phba->cid_array_info[ulp_num];
4205
4206                         if (ptr_cid_info) {
4207                                 kfree(ptr_cid_info->cid_array);
4208                                 kfree(ptr_cid_info);
4209                                 phba->cid_array_info[ulp_num] = NULL;
4210                         }
4211                 }
4212         }
4213 }
4214
4215 /**
4216  * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4217  * @beiscsi_conn: ptr to the conn to be cleaned up
4218  * @task: ptr to iscsi_task resource to be freed.
4219  *
4220  * Free driver mgmt resources binded to CXN.
4221  **/
4222 void
4223 beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4224                                 struct iscsi_task *task)
4225 {
4226         struct beiscsi_io_task *io_task;
4227         struct beiscsi_hba *phba = beiscsi_conn->phba;
4228         struct hwi_wrb_context *pwrb_context;
4229         struct hwi_controller *phwi_ctrlr;
4230         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4231                                 beiscsi_conn->beiscsi_conn_cid);
4232
4233         phwi_ctrlr = phba->phwi_ctrlr;
4234         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4235
4236         io_task = task->dd_data;
4237
4238         if (io_task->pwrb_handle) {
4239                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4240                 io_task->pwrb_handle = NULL;
4241         }
4242
4243         if (io_task->psgl_handle) {
4244                 free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4245                 io_task->psgl_handle = NULL;
4246         }
4247
4248         if (io_task->mtask_addr) {
4249                 pci_unmap_single(phba->pcidev,
4250                                  io_task->mtask_addr,
4251                                  io_task->mtask_data_count,
4252                                  PCI_DMA_TODEVICE);
4253                 io_task->mtask_addr = 0;
4254         }
4255 }
4256
4257 /**
4258  * beiscsi_cleanup_task()- Free driver resources of the task
4259  * @task: ptr to the iscsi task
4260  *
4261  **/
4262 static void beiscsi_cleanup_task(struct iscsi_task *task)
4263 {
4264         struct beiscsi_io_task *io_task = task->dd_data;
4265         struct iscsi_conn *conn = task->conn;
4266         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4267         struct beiscsi_hba *phba = beiscsi_conn->phba;
4268         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4269         struct hwi_wrb_context *pwrb_context;
4270         struct hwi_controller *phwi_ctrlr;
4271         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4272                              beiscsi_conn->beiscsi_conn_cid);
4273
4274         phwi_ctrlr = phba->phwi_ctrlr;
4275         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4276
4277         if (io_task->cmd_bhs) {
4278                 dma_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4279                               io_task->bhs_pa.u.a64.address);
4280                 io_task->cmd_bhs = NULL;
4281                 task->hdr = NULL;
4282         }
4283
4284         if (task->sc) {
4285                 if (io_task->pwrb_handle) {
4286                         free_wrb_handle(phba, pwrb_context,
4287                                         io_task->pwrb_handle);
4288                         io_task->pwrb_handle = NULL;
4289                 }
4290
4291                 if (io_task->psgl_handle) {
4292                         free_io_sgl_handle(phba, io_task->psgl_handle);
4293                         io_task->psgl_handle = NULL;
4294                 }
4295
4296                 if (io_task->scsi_cmnd) {
4297                         if (io_task->num_sg)
4298                                 scsi_dma_unmap(io_task->scsi_cmnd);
4299                         io_task->scsi_cmnd = NULL;
4300                 }
4301         } else {
4302                 if (!beiscsi_conn->login_in_progress)
4303                         beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4304         }
4305 }
4306
4307 void
4308 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4309                            struct beiscsi_offload_params *params)
4310 {
4311         struct wrb_handle *pwrb_handle;
4312         struct hwi_wrb_context *pwrb_context = NULL;
4313         struct beiscsi_hba *phba = beiscsi_conn->phba;
4314         struct iscsi_task *task = beiscsi_conn->task;
4315         struct iscsi_session *session = task->conn->session;
4316         u32 doorbell = 0;
4317
4318         /*
4319          * We can always use 0 here because it is reserved by libiscsi for
4320          * login/startup related tasks.
4321          */
4322         beiscsi_conn->login_in_progress = 0;
4323         spin_lock_bh(&session->back_lock);
4324         beiscsi_cleanup_task(task);
4325         spin_unlock_bh(&session->back_lock);
4326
4327         pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid,
4328                                        &pwrb_context);
4329
4330         /* Check for the adapter family */
4331         if (is_chip_be2_be3r(phba))
4332                 beiscsi_offload_cxn_v0(params, pwrb_handle,
4333                                        phba->init_mem,
4334                                        pwrb_context);
4335         else
4336                 beiscsi_offload_cxn_v2(params, pwrb_handle,
4337                                        pwrb_context);
4338
4339         be_dws_le_to_cpu(pwrb_handle->pwrb,
4340                          sizeof(struct iscsi_target_context_update_wrb));
4341
4342         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4343         doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4344                              << DB_DEF_PDU_WRB_INDEX_SHIFT;
4345         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4346         iowrite32(doorbell, phba->db_va +
4347                   beiscsi_conn->doorbell_offset);
4348
4349         /*
4350          * There is no completion for CONTEXT_UPDATE. The completion of next
4351          * WRB posted guarantees FW's processing and DMA'ing of it.
4352          * Use beiscsi_put_wrb_handle to put it back in the pool which makes
4353          * sure zero'ing or reuse of the WRB only after wrbs_per_cxn.
4354          */
4355         beiscsi_put_wrb_handle(pwrb_context, pwrb_handle,
4356                                phba->params.wrbs_per_cxn);
4357         beiscsi_log(phba, KERN_INFO,
4358                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4359                     "BM_%d : put CONTEXT_UPDATE pwrb_handle=%p free_index=0x%x wrb_handles_available=%d\n",
4360                     pwrb_handle, pwrb_context->free_index,
4361                     pwrb_context->wrb_handles_available);
4362 }
4363
4364 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4365                               int *index, int *age)
4366 {
4367         *index = (int)itt;
4368         if (age)
4369                 *age = conn->session->age;
4370 }
4371
4372 /**
4373  * beiscsi_alloc_pdu - allocates pdu and related resources
4374  * @task: libiscsi task
4375  * @opcode: opcode of pdu for task
4376  *
4377  * This is called with the session lock held. It will allocate
4378  * the wrb and sgl if needed for the command. And it will prep
4379  * the pdu's itt. beiscsi_parse_pdu will later translate
4380  * the pdu itt to the libiscsi task itt.
4381  */
4382 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4383 {
4384         struct beiscsi_io_task *io_task = task->dd_data;
4385         struct iscsi_conn *conn = task->conn;
4386         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4387         struct beiscsi_hba *phba = beiscsi_conn->phba;
4388         struct hwi_wrb_context *pwrb_context;
4389         struct hwi_controller *phwi_ctrlr;
4390         itt_t itt;
4391         uint16_t cri_index = 0;
4392         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4393         dma_addr_t paddr;
4394
4395         io_task->cmd_bhs = dma_pool_alloc(beiscsi_sess->bhs_pool,
4396                                           GFP_ATOMIC, &paddr);
4397         if (!io_task->cmd_bhs)
4398                 return -ENOMEM;
4399         io_task->bhs_pa.u.a64.address = paddr;
4400         io_task->libiscsi_itt = (itt_t)task->itt;
4401         io_task->conn = beiscsi_conn;
4402
4403         task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4404         task->hdr_max = sizeof(struct be_cmd_bhs);
4405         io_task->psgl_handle = NULL;
4406         io_task->pwrb_handle = NULL;
4407
4408         if (task->sc) {
4409                 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4410                 if (!io_task->psgl_handle) {
4411                         beiscsi_log(phba, KERN_ERR,
4412                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4413                                     "BM_%d : Alloc of IO_SGL_ICD Failed"
4414                                     "for the CID : %d\n",
4415                                     beiscsi_conn->beiscsi_conn_cid);
4416                         goto free_hndls;
4417                 }
4418                 io_task->pwrb_handle = alloc_wrb_handle(phba,
4419                                         beiscsi_conn->beiscsi_conn_cid,
4420                                         &io_task->pwrb_context);
4421                 if (!io_task->pwrb_handle) {
4422                         beiscsi_log(phba, KERN_ERR,
4423                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4424                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4425                                     "for the CID : %d\n",
4426                                     beiscsi_conn->beiscsi_conn_cid);
4427                         goto free_io_hndls;
4428                 }
4429         } else {
4430                 io_task->scsi_cmnd = NULL;
4431                 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4432                         beiscsi_conn->task = task;
4433                         if (!beiscsi_conn->login_in_progress) {
4434                                 io_task->psgl_handle = (struct sgl_handle *)
4435                                                 alloc_mgmt_sgl_handle(phba);
4436                                 if (!io_task->psgl_handle) {
4437                                         beiscsi_log(phba, KERN_ERR,
4438                                                     BEISCSI_LOG_IO |
4439                                                     BEISCSI_LOG_CONFIG,
4440                                                     "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4441                                                     "for the CID : %d\n",
4442                                                     beiscsi_conn->
4443                                                     beiscsi_conn_cid);
4444                                         goto free_hndls;
4445                                 }
4446
4447                                 beiscsi_conn->login_in_progress = 1;
4448                                 beiscsi_conn->plogin_sgl_handle =
4449                                                         io_task->psgl_handle;
4450                                 io_task->pwrb_handle =
4451                                         alloc_wrb_handle(phba,
4452                                         beiscsi_conn->beiscsi_conn_cid,
4453                                         &io_task->pwrb_context);
4454                                 if (!io_task->pwrb_handle) {
4455                                         beiscsi_log(phba, KERN_ERR,
4456                                                     BEISCSI_LOG_IO |
4457                                                     BEISCSI_LOG_CONFIG,
4458                                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4459                                                     "for the CID : %d\n",
4460                                                     beiscsi_conn->
4461                                                     beiscsi_conn_cid);
4462                                         goto free_mgmt_hndls;
4463                                 }
4464                                 beiscsi_conn->plogin_wrb_handle =
4465                                                         io_task->pwrb_handle;
4466
4467                         } else {
4468                                 io_task->psgl_handle =
4469                                                 beiscsi_conn->plogin_sgl_handle;
4470                                 io_task->pwrb_handle =
4471                                                 beiscsi_conn->plogin_wrb_handle;
4472                         }
4473                 } else {
4474                         io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4475                         if (!io_task->psgl_handle) {
4476                                 beiscsi_log(phba, KERN_ERR,
4477                                             BEISCSI_LOG_IO |
4478                                             BEISCSI_LOG_CONFIG,
4479                                             "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4480                                             "for the CID : %d\n",
4481                                             beiscsi_conn->
4482                                             beiscsi_conn_cid);
4483                                 goto free_hndls;
4484                         }
4485                         io_task->pwrb_handle =
4486                                         alloc_wrb_handle(phba,
4487                                         beiscsi_conn->beiscsi_conn_cid,
4488                                         &io_task->pwrb_context);
4489                         if (!io_task->pwrb_handle) {
4490                                 beiscsi_log(phba, KERN_ERR,
4491                                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4492                                             "BM_%d : Alloc of WRB_HANDLE Failed"
4493                                             "for the CID : %d\n",
4494                                             beiscsi_conn->beiscsi_conn_cid);
4495                                 goto free_mgmt_hndls;
4496                         }
4497
4498                 }
4499         }
4500         itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4501                                  wrb_index << 16) | (unsigned int)
4502                                 (io_task->psgl_handle->sgl_index));
4503         io_task->pwrb_handle->pio_handle = task;
4504
4505         io_task->cmd_bhs->iscsi_hdr.itt = itt;
4506         return 0;
4507
4508 free_io_hndls:
4509         free_io_sgl_handle(phba, io_task->psgl_handle);
4510         goto free_hndls;
4511 free_mgmt_hndls:
4512         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4513         io_task->psgl_handle = NULL;
4514 free_hndls:
4515         phwi_ctrlr = phba->phwi_ctrlr;
4516         cri_index = BE_GET_CRI_FROM_CID(
4517         beiscsi_conn->beiscsi_conn_cid);
4518         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4519         if (io_task->pwrb_handle)
4520                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4521         io_task->pwrb_handle = NULL;
4522         dma_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4523                       io_task->bhs_pa.u.a64.address);
4524         io_task->cmd_bhs = NULL;
4525         return -ENOMEM;
4526 }
4527 static int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4528                        unsigned int num_sg, unsigned int xferlen,
4529                        unsigned int writedir)
4530 {
4531
4532         struct beiscsi_io_task *io_task = task->dd_data;
4533         struct iscsi_conn *conn = task->conn;
4534         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4535         struct beiscsi_hba *phba = beiscsi_conn->phba;
4536         struct iscsi_wrb *pwrb = NULL;
4537         unsigned int doorbell = 0;
4538
4539         pwrb = io_task->pwrb_handle->pwrb;
4540
4541         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4542
4543         if (writedir) {
4544                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4545                               INI_WR_CMD);
4546                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4547         } else {
4548                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4549                               INI_RD_CMD);
4550                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4551         }
4552
4553         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4554                                           type, pwrb);
4555
4556         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4557                       cpu_to_be16(*(unsigned short *)
4558                       &io_task->cmd_bhs->iscsi_hdr.lun));
4559         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4560         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4561                       io_task->pwrb_handle->wrb_index);
4562         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4563                       be32_to_cpu(task->cmdsn));
4564         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4565                       io_task->psgl_handle->sgl_index);
4566
4567         hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4568         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4569                       io_task->pwrb_handle->wrb_index);
4570         if (io_task->pwrb_context->plast_wrb)
4571                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
4572                               io_task->pwrb_context->plast_wrb,
4573                               io_task->pwrb_handle->wrb_index);
4574         io_task->pwrb_context->plast_wrb = pwrb;
4575
4576         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4577
4578         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4579         doorbell |= (io_task->pwrb_handle->wrb_index &
4580                      DB_DEF_PDU_WRB_INDEX_MASK) <<
4581                      DB_DEF_PDU_WRB_INDEX_SHIFT;
4582         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4583         iowrite32(doorbell, phba->db_va +
4584                   beiscsi_conn->doorbell_offset);
4585         return 0;
4586 }
4587
4588 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4589                           unsigned int num_sg, unsigned int xferlen,
4590                           unsigned int writedir)
4591 {
4592
4593         struct beiscsi_io_task *io_task = task->dd_data;
4594         struct iscsi_conn *conn = task->conn;
4595         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4596         struct beiscsi_hba *phba = beiscsi_conn->phba;
4597         struct iscsi_wrb *pwrb = NULL;
4598         unsigned int doorbell = 0;
4599
4600         pwrb = io_task->pwrb_handle->pwrb;
4601         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4602
4603         if (writedir) {
4604                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4605                               INI_WR_CMD);
4606                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
4607         } else {
4608                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4609                               INI_RD_CMD);
4610                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4611         }
4612
4613         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
4614                                           type, pwrb);
4615
4616         AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4617                       cpu_to_be16(*(unsigned short *)
4618                                   &io_task->cmd_bhs->iscsi_hdr.lun));
4619         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4620         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4621                       io_task->pwrb_handle->wrb_index);
4622         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4623                       be32_to_cpu(task->cmdsn));
4624         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4625                       io_task->psgl_handle->sgl_index);
4626
4627         hwi_write_sgl(pwrb, sg, num_sg, io_task);
4628
4629         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4630                       io_task->pwrb_handle->wrb_index);
4631         if (io_task->pwrb_context->plast_wrb)
4632                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
4633                               io_task->pwrb_context->plast_wrb,
4634                               io_task->pwrb_handle->wrb_index);
4635         io_task->pwrb_context->plast_wrb = pwrb;
4636
4637         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4638
4639         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4640         doorbell |= (io_task->pwrb_handle->wrb_index &
4641                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4642         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4643
4644         iowrite32(doorbell, phba->db_va +
4645                   beiscsi_conn->doorbell_offset);
4646         return 0;
4647 }
4648
4649 static int beiscsi_mtask(struct iscsi_task *task)
4650 {
4651         struct beiscsi_io_task *io_task = task->dd_data;
4652         struct iscsi_conn *conn = task->conn;
4653         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4654         struct beiscsi_hba *phba = beiscsi_conn->phba;
4655         struct iscsi_wrb *pwrb = NULL;
4656         unsigned int doorbell = 0;
4657         unsigned int cid;
4658         unsigned int pwrb_typeoffset = 0;
4659         int ret = 0;
4660
4661         cid = beiscsi_conn->beiscsi_conn_cid;
4662         pwrb = io_task->pwrb_handle->pwrb;
4663
4664         if (is_chip_be2_be3r(phba)) {
4665                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4666                               be32_to_cpu(task->cmdsn));
4667                 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4668                               io_task->pwrb_handle->wrb_index);
4669                 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4670                               io_task->psgl_handle->sgl_index);
4671                 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4672                               task->data_count);
4673                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4674                               io_task->pwrb_handle->wrb_index);
4675                 if (io_task->pwrb_context->plast_wrb)
4676                         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
4677                                       io_task->pwrb_context->plast_wrb,
4678                                       io_task->pwrb_handle->wrb_index);
4679                 io_task->pwrb_context->plast_wrb = pwrb;
4680
4681                 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
4682         } else {
4683                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4684                               be32_to_cpu(task->cmdsn));
4685                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4686                               io_task->pwrb_handle->wrb_index);
4687                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4688                               io_task->psgl_handle->sgl_index);
4689                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
4690                               task->data_count);
4691                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4692                               io_task->pwrb_handle->wrb_index);
4693                 if (io_task->pwrb_context->plast_wrb)
4694                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
4695                                       io_task->pwrb_context->plast_wrb,
4696                                       io_task->pwrb_handle->wrb_index);
4697                 io_task->pwrb_context->plast_wrb = pwrb;
4698
4699                 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
4700         }
4701
4702
4703         switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4704         case ISCSI_OP_LOGIN:
4705                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
4706                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4707                 ret = hwi_write_buffer(pwrb, task);
4708                 break;
4709         case ISCSI_OP_NOOP_OUT:
4710                 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
4711                         ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4712                         if (is_chip_be2_be3r(phba))
4713                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
4714                                               dmsg, pwrb, 1);
4715                         else
4716                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4717                                               dmsg, pwrb, 1);
4718                 } else {
4719                         ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
4720                         if (is_chip_be2_be3r(phba))
4721                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
4722                                               dmsg, pwrb, 0);
4723                         else
4724                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4725                                               dmsg, pwrb, 0);
4726                 }
4727                 ret = hwi_write_buffer(pwrb, task);
4728                 break;
4729         case ISCSI_OP_TEXT:
4730                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4731                 ret = hwi_write_buffer(pwrb, task);
4732                 break;
4733         case ISCSI_OP_SCSI_TMFUNC:
4734                 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
4735                 ret = hwi_write_buffer(pwrb, task);
4736                 break;
4737         case ISCSI_OP_LOGOUT:
4738                 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
4739                 ret = hwi_write_buffer(pwrb, task);
4740                 break;
4741
4742         default:
4743                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4744                             "BM_%d : opcode =%d Not supported\n",
4745                             task->hdr->opcode & ISCSI_OPCODE_MASK);
4746
4747                 return -EINVAL;
4748         }
4749
4750         if (ret)
4751                 return ret;
4752
4753         /* Set the task type */
4754         io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
4755                 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
4756                 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
4757
4758         doorbell |= cid & DB_WRB_POST_CID_MASK;
4759         doorbell |= (io_task->pwrb_handle->wrb_index &
4760                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4761         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4762         iowrite32(doorbell, phba->db_va +
4763                   beiscsi_conn->doorbell_offset);
4764         return 0;
4765 }
4766
4767 static int beiscsi_task_xmit(struct iscsi_task *task)
4768 {
4769         struct beiscsi_io_task *io_task = task->dd_data;
4770         struct scsi_cmnd *sc = task->sc;
4771         struct beiscsi_hba *phba;
4772         struct scatterlist *sg;
4773         int num_sg;
4774         unsigned int  writedir = 0, xferlen = 0;
4775
4776         phba = io_task->conn->phba;
4777         /**
4778          * HBA in error includes BEISCSI_HBA_FW_TIMEOUT. IO path might be
4779          * operational if FW still gets heartbeat from EP FW. Is management
4780          * path really needed to continue further?
4781          */
4782         if (!beiscsi_hba_is_online(phba))
4783                 return -EIO;
4784
4785         if (!io_task->conn->login_in_progress)
4786                 task->hdr->exp_statsn = 0;
4787
4788         if (!sc)
4789                 return beiscsi_mtask(task);
4790
4791         io_task->scsi_cmnd = sc;
4792         io_task->num_sg = 0;
4793         num_sg = scsi_dma_map(sc);
4794         if (num_sg < 0) {
4795                 beiscsi_log(phba, KERN_ERR,
4796                             BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
4797                             "BM_%d : scsi_dma_map Failed "
4798                             "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
4799                             be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
4800                             io_task->libiscsi_itt, scsi_bufflen(sc));
4801
4802                 return num_sg;
4803         }
4804         /**
4805          * For scsi cmd task, check num_sg before unmapping in cleanup_task.
4806          * For management task, cleanup_task checks mtask_addr before unmapping.
4807          */
4808         io_task->num_sg = num_sg;
4809         xferlen = scsi_bufflen(sc);
4810         sg = scsi_sglist(sc);
4811         if (sc->sc_data_direction == DMA_TO_DEVICE)
4812                 writedir = 1;
4813          else
4814                 writedir = 0;
4815
4816          return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
4817 }
4818
4819 /**
4820  * beiscsi_bsg_request - handle bsg request from ISCSI transport
4821  * @job: job to handle
4822  */
4823 static int beiscsi_bsg_request(struct bsg_job *job)
4824 {
4825         struct Scsi_Host *shost;
4826         struct beiscsi_hba *phba;
4827         struct iscsi_bsg_request *bsg_req = job->request;
4828         int rc = -EINVAL;
4829         unsigned int tag;
4830         struct be_dma_mem nonemb_cmd;
4831         struct be_cmd_resp_hdr *resp;
4832         struct iscsi_bsg_reply *bsg_reply = job->reply;
4833         unsigned short status, extd_status;
4834
4835         shost = iscsi_job_to_shost(job);
4836         phba = iscsi_host_priv(shost);
4837
4838         if (!beiscsi_hba_is_online(phba)) {
4839                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
4840                             "BM_%d : HBA in error 0x%lx\n", phba->state);
4841                 return -ENXIO;
4842         }
4843
4844         switch (bsg_req->msgcode) {
4845         case ISCSI_BSG_HST_VENDOR:
4846                 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
4847                                         job->request_payload.payload_len,
4848                                         &nonemb_cmd.dma);
4849                 if (nonemb_cmd.va == NULL) {
4850                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4851                                     "BM_%d : Failed to allocate memory for "
4852                                     "beiscsi_bsg_request\n");
4853                         return -ENOMEM;
4854                 }
4855                 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
4856                                                   &nonemb_cmd);
4857                 if (!tag) {
4858                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4859                                     "BM_%d : MBX Tag Allocation Failed\n");
4860
4861                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4862                                             nonemb_cmd.va, nonemb_cmd.dma);
4863                         return -EAGAIN;
4864                 }
4865
4866                 rc = wait_event_interruptible_timeout(
4867                                         phba->ctrl.mcc_wait[tag],
4868                                         phba->ctrl.mcc_tag_status[tag],
4869                                         msecs_to_jiffies(
4870                                         BEISCSI_HOST_MBX_TIMEOUT));
4871
4872                 if (!test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
4873                         clear_bit(MCC_TAG_STATE_RUNNING,
4874                                   &phba->ctrl.ptag_state[tag].tag_state);
4875                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4876                                             nonemb_cmd.va, nonemb_cmd.dma);
4877                         return -EIO;
4878                 }
4879                 extd_status = (phba->ctrl.mcc_tag_status[tag] &
4880                                CQE_STATUS_ADDL_MASK) >> CQE_STATUS_ADDL_SHIFT;
4881                 status = phba->ctrl.mcc_tag_status[tag] & CQE_STATUS_MASK;
4882                 free_mcc_wrb(&phba->ctrl, tag);
4883                 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
4884                 sg_copy_from_buffer(job->reply_payload.sg_list,
4885                                     job->reply_payload.sg_cnt,
4886                                     nonemb_cmd.va, (resp->response_length
4887                                     + sizeof(*resp)));
4888                 bsg_reply->reply_payload_rcv_len = resp->response_length;
4889                 bsg_reply->result = status;
4890                 bsg_job_done(job, bsg_reply->result,
4891                              bsg_reply->reply_payload_rcv_len);
4892                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4893                                     nonemb_cmd.va, nonemb_cmd.dma);
4894                 if (status || extd_status) {
4895                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4896                                     "BM_%d : MBX Cmd Failed"
4897                                     " status = %d extd_status = %d\n",
4898                                     status, extd_status);
4899
4900                         return -EIO;
4901                 } else {
4902                         rc = 0;
4903                 }
4904                 break;
4905
4906         default:
4907                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4908                                 "BM_%d : Unsupported bsg command: 0x%x\n",
4909                                 bsg_req->msgcode);
4910                 break;
4911         }
4912
4913         return rc;
4914 }
4915
4916 static void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
4917 {
4918         /* Set the logging parameter */
4919         beiscsi_log_enable_init(phba, beiscsi_log_enable);
4920 }
4921
4922 void beiscsi_start_boot_work(struct beiscsi_hba *phba, unsigned int s_handle)
4923 {
4924         if (phba->boot_struct.boot_kset)
4925                 return;
4926
4927         /* skip if boot work is already in progress */
4928         if (test_and_set_bit(BEISCSI_HBA_BOOT_WORK, &phba->state))
4929                 return;
4930
4931         phba->boot_struct.retry = 3;
4932         phba->boot_struct.tag = 0;
4933         phba->boot_struct.s_handle = s_handle;
4934         phba->boot_struct.action = BEISCSI_BOOT_GET_SHANDLE;
4935         schedule_work(&phba->boot_work);
4936 }
4937
4938 /**
4939  * Boot flag info for iscsi-utilities
4940  * Bit 0 Block valid flag
4941  * Bit 1 Firmware booting selected
4942  */
4943 #define BEISCSI_SYSFS_ISCSI_BOOT_FLAGS  3
4944
4945 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
4946 {
4947         struct beiscsi_hba *phba = data;
4948         struct mgmt_session_info *boot_sess = &phba->boot_struct.boot_sess;
4949         struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
4950         char *str = buf;
4951         int rc = -EPERM;
4952
4953         switch (type) {
4954         case ISCSI_BOOT_TGT_NAME:
4955                 rc = sprintf(buf, "%.*s\n",
4956                             (int)strlen(boot_sess->target_name),
4957                             (char *)&boot_sess->target_name);
4958                 break;
4959         case ISCSI_BOOT_TGT_IP_ADDR:
4960                 if (boot_conn->dest_ipaddr.ip_type == BEISCSI_IP_TYPE_V4)
4961                         rc = sprintf(buf, "%pI4\n",
4962                                 (char *)&boot_conn->dest_ipaddr.addr);
4963                 else
4964                         rc = sprintf(str, "%pI6\n",
4965                                 (char *)&boot_conn->dest_ipaddr.addr);
4966                 break;
4967         case ISCSI_BOOT_TGT_PORT:
4968                 rc = sprintf(str, "%d\n", boot_conn->dest_port);
4969                 break;
4970
4971         case ISCSI_BOOT_TGT_CHAP_NAME:
4972                 rc = sprintf(str,  "%.*s\n",
4973                              boot_conn->negotiated_login_options.auth_data.chap.
4974                              target_chap_name_length,
4975                              (char *)&boot_conn->negotiated_login_options.
4976                              auth_data.chap.target_chap_name);
4977                 break;
4978         case ISCSI_BOOT_TGT_CHAP_SECRET:
4979                 rc = sprintf(str,  "%.*s\n",
4980                              boot_conn->negotiated_login_options.auth_data.chap.
4981                              target_secret_length,
4982                              (char *)&boot_conn->negotiated_login_options.
4983                              auth_data.chap.target_secret);
4984                 break;
4985         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
4986                 rc = sprintf(str,  "%.*s\n",
4987                              boot_conn->negotiated_login_options.auth_data.chap.
4988                              intr_chap_name_length,
4989                              (char *)&boot_conn->negotiated_login_options.
4990                              auth_data.chap.intr_chap_name);
4991                 break;
4992         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
4993                 rc = sprintf(str,  "%.*s\n",
4994                              boot_conn->negotiated_login_options.auth_data.chap.
4995                              intr_secret_length,
4996                              (char *)&boot_conn->negotiated_login_options.
4997                              auth_data.chap.intr_secret);
4998                 break;
4999         case ISCSI_BOOT_TGT_FLAGS:
5000                 rc = sprintf(str, "%d\n", BEISCSI_SYSFS_ISCSI_BOOT_FLAGS);
5001                 break;
5002         case ISCSI_BOOT_TGT_NIC_ASSOC:
5003                 rc = sprintf(str, "0\n");
5004                 break;
5005         }
5006         return rc;
5007 }
5008
5009 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
5010 {
5011         struct beiscsi_hba *phba = data;
5012         char *str = buf;
5013         int rc = -EPERM;
5014
5015         switch (type) {
5016         case ISCSI_BOOT_INI_INITIATOR_NAME:
5017                 rc = sprintf(str, "%s\n",
5018                              phba->boot_struct.boot_sess.initiator_iscsiname);
5019                 break;
5020         }
5021         return rc;
5022 }
5023
5024 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
5025 {
5026         struct beiscsi_hba *phba = data;
5027         char *str = buf;
5028         int rc = -EPERM;
5029
5030         switch (type) {
5031         case ISCSI_BOOT_ETH_FLAGS:
5032                 rc = sprintf(str, "%d\n", BEISCSI_SYSFS_ISCSI_BOOT_FLAGS);
5033                 break;
5034         case ISCSI_BOOT_ETH_INDEX:
5035                 rc = sprintf(str, "0\n");
5036                 break;
5037         case ISCSI_BOOT_ETH_MAC:
5038                 rc  = beiscsi_get_macaddr(str, phba);
5039                 break;
5040         }
5041         return rc;
5042 }
5043
5044 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
5045 {
5046         umode_t rc = 0;
5047
5048         switch (type) {
5049         case ISCSI_BOOT_TGT_NAME:
5050         case ISCSI_BOOT_TGT_IP_ADDR:
5051         case ISCSI_BOOT_TGT_PORT:
5052         case ISCSI_BOOT_TGT_CHAP_NAME:
5053         case ISCSI_BOOT_TGT_CHAP_SECRET:
5054         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
5055         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
5056         case ISCSI_BOOT_TGT_NIC_ASSOC:
5057         case ISCSI_BOOT_TGT_FLAGS:
5058                 rc = S_IRUGO;
5059                 break;
5060         }
5061         return rc;
5062 }
5063
5064 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
5065 {
5066         umode_t rc = 0;
5067
5068         switch (type) {
5069         case ISCSI_BOOT_INI_INITIATOR_NAME:
5070                 rc = S_IRUGO;
5071                 break;
5072         }
5073         return rc;
5074 }
5075
5076 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
5077 {
5078         umode_t rc = 0;
5079
5080         switch (type) {
5081         case ISCSI_BOOT_ETH_FLAGS:
5082         case ISCSI_BOOT_ETH_MAC:
5083         case ISCSI_BOOT_ETH_INDEX:
5084                 rc = S_IRUGO;
5085                 break;
5086         }
5087         return rc;
5088 }
5089
5090 static void beiscsi_boot_kobj_release(void *data)
5091 {
5092         struct beiscsi_hba *phba = data;
5093
5094         scsi_host_put(phba->shost);
5095 }
5096
5097 static int beiscsi_boot_create_kset(struct beiscsi_hba *phba)
5098 {
5099         struct boot_struct *bs = &phba->boot_struct;
5100         struct iscsi_boot_kobj *boot_kobj;
5101
5102         if (bs->boot_kset) {
5103                 __beiscsi_log(phba, KERN_ERR,
5104                               "BM_%d: boot_kset already created\n");
5105                 return 0;
5106         }
5107
5108         bs->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
5109         if (!bs->boot_kset) {
5110                 __beiscsi_log(phba, KERN_ERR,
5111                               "BM_%d: boot_kset alloc failed\n");
5112                 return -ENOMEM;
5113         }
5114
5115         /* get shost ref because the show function will refer phba */
5116         if (!scsi_host_get(phba->shost))
5117                 goto free_kset;
5118
5119         boot_kobj = iscsi_boot_create_target(bs->boot_kset, 0, phba,
5120                                              beiscsi_show_boot_tgt_info,
5121                                              beiscsi_tgt_get_attr_visibility,
5122                                              beiscsi_boot_kobj_release);
5123         if (!boot_kobj)
5124                 goto put_shost;
5125
5126         if (!scsi_host_get(phba->shost))
5127                 goto free_kset;
5128
5129         boot_kobj = iscsi_boot_create_initiator(bs->boot_kset, 0, phba,
5130                                                 beiscsi_show_boot_ini_info,
5131                                                 beiscsi_ini_get_attr_visibility,
5132                                                 beiscsi_boot_kobj_release);
5133         if (!boot_kobj)
5134                 goto put_shost;
5135
5136         if (!scsi_host_get(phba->shost))
5137                 goto free_kset;
5138
5139         boot_kobj = iscsi_boot_create_ethernet(bs->boot_kset, 0, phba,
5140                                                beiscsi_show_boot_eth_info,
5141                                                beiscsi_eth_get_attr_visibility,
5142                                                beiscsi_boot_kobj_release);
5143         if (!boot_kobj)
5144                 goto put_shost;
5145
5146         return 0;
5147
5148 put_shost:
5149         scsi_host_put(phba->shost);
5150 free_kset:
5151         iscsi_boot_destroy_kset(bs->boot_kset);
5152         bs->boot_kset = NULL;
5153         return -ENOMEM;
5154 }
5155
5156 static void beiscsi_boot_work(struct work_struct *work)
5157 {
5158         struct beiscsi_hba *phba =
5159                 container_of(work, struct beiscsi_hba, boot_work);
5160         struct boot_struct *bs = &phba->boot_struct;
5161         unsigned int tag = 0;
5162
5163         if (!beiscsi_hba_is_online(phba))
5164                 return;
5165
5166         beiscsi_log(phba, KERN_INFO,
5167                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
5168                     "BM_%d : %s action %d\n",
5169                     __func__, phba->boot_struct.action);
5170
5171         switch (phba->boot_struct.action) {
5172         case BEISCSI_BOOT_REOPEN_SESS:
5173                 tag = beiscsi_boot_reopen_sess(phba);
5174                 break;
5175         case BEISCSI_BOOT_GET_SHANDLE:
5176                 tag = __beiscsi_boot_get_shandle(phba, 1);
5177                 break;
5178         case BEISCSI_BOOT_GET_SINFO:
5179                 tag = beiscsi_boot_get_sinfo(phba);
5180                 break;
5181         case BEISCSI_BOOT_LOGOUT_SESS:
5182                 tag = beiscsi_boot_logout_sess(phba);
5183                 break;
5184         case BEISCSI_BOOT_CREATE_KSET:
5185                 beiscsi_boot_create_kset(phba);
5186                 /**
5187                  * updated boot_kset is made visible to all before
5188                  * ending the boot work.
5189                  */
5190                 mb();
5191                 clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
5192                 return;
5193         }
5194         if (!tag) {
5195                 if (bs->retry--)
5196                         schedule_work(&phba->boot_work);
5197                 else
5198                         clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
5199         }
5200 }
5201
5202 static void beiscsi_eqd_update_work(struct work_struct *work)
5203 {
5204         struct hwi_context_memory *phwi_context;
5205         struct be_set_eqd set_eqd[MAX_CPUS];
5206         struct hwi_controller *phwi_ctrlr;
5207         struct be_eq_obj *pbe_eq;
5208         struct beiscsi_hba *phba;
5209         unsigned int pps, delta;
5210         struct be_aic_obj *aic;
5211         int eqd, i, num = 0;
5212         unsigned long now;
5213
5214         phba = container_of(work, struct beiscsi_hba, eqd_update.work);
5215         if (!beiscsi_hba_is_online(phba))
5216                 return;
5217
5218         phwi_ctrlr = phba->phwi_ctrlr;
5219         phwi_context = phwi_ctrlr->phwi_ctxt;
5220
5221         for (i = 0; i <= phba->num_cpus; i++) {
5222                 aic = &phba->aic_obj[i];
5223                 pbe_eq = &phwi_context->be_eq[i];
5224                 now = jiffies;
5225                 if (!aic->jiffies || time_before(now, aic->jiffies) ||
5226                     pbe_eq->cq_count < aic->eq_prev) {
5227                         aic->jiffies = now;
5228                         aic->eq_prev = pbe_eq->cq_count;
5229                         continue;
5230                 }
5231                 delta = jiffies_to_msecs(now - aic->jiffies);
5232                 pps = (((u32)(pbe_eq->cq_count - aic->eq_prev) * 1000) / delta);
5233                 eqd = (pps / 1500) << 2;
5234
5235                 if (eqd < 8)
5236                         eqd = 0;
5237                 eqd = min_t(u32, eqd, phwi_context->max_eqd);
5238                 eqd = max_t(u32, eqd, phwi_context->min_eqd);
5239
5240                 aic->jiffies = now;
5241                 aic->eq_prev = pbe_eq->cq_count;
5242
5243                 if (eqd != aic->prev_eqd) {
5244                         set_eqd[num].delay_multiplier = (eqd * 65)/100;
5245                         set_eqd[num].eq_id = pbe_eq->q.id;
5246                         aic->prev_eqd = eqd;
5247                         num++;
5248                 }
5249         }
5250         if (num)
5251                 /* completion of this is ignored */
5252                 beiscsi_modify_eq_delay(phba, set_eqd, num);
5253
5254         schedule_delayed_work(&phba->eqd_update,
5255                               msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5256 }
5257
5258 static void beiscsi_hw_tpe_check(unsigned long ptr)
5259 {
5260         struct beiscsi_hba *phba;
5261         u32 wait;
5262
5263         phba = (struct beiscsi_hba *)ptr;
5264         /* if not TPE, do nothing */
5265         if (!beiscsi_detect_tpe(phba))
5266                 return;
5267
5268         /* wait default 4000ms before recovering */
5269         wait = 4000;
5270         if (phba->ue2rp > BEISCSI_UE_DETECT_INTERVAL)
5271                 wait = phba->ue2rp - BEISCSI_UE_DETECT_INTERVAL;
5272         queue_delayed_work(phba->wq, &phba->recover_port,
5273                            msecs_to_jiffies(wait));
5274 }
5275
5276 static void beiscsi_hw_health_check(unsigned long ptr)
5277 {
5278         struct beiscsi_hba *phba;
5279
5280         phba = (struct beiscsi_hba *)ptr;
5281         beiscsi_detect_ue(phba);
5282         if (beiscsi_detect_ue(phba)) {
5283                 __beiscsi_log(phba, KERN_ERR,
5284                               "BM_%d : port in error: %lx\n", phba->state);
5285                 /* sessions are no longer valid, so first fail the sessions */
5286                 queue_work(phba->wq, &phba->sess_work);
5287
5288                 /* detect UER supported */
5289                 if (!test_bit(BEISCSI_HBA_UER_SUPP, &phba->state))
5290                         return;
5291                 /* modify this timer to check TPE */
5292                 phba->hw_check.function = beiscsi_hw_tpe_check;
5293         }
5294
5295         mod_timer(&phba->hw_check,
5296                   jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5297 }
5298
5299 /*
5300  * beiscsi_enable_port()- Enables the disabled port.
5301  * Only port resources freed in disable function are reallocated.
5302  * This is called in HBA error handling path.
5303  *
5304  * @phba: Instance of driver private structure
5305  *
5306  **/
5307 static int beiscsi_enable_port(struct beiscsi_hba *phba)
5308 {
5309         struct hwi_context_memory *phwi_context;
5310         struct hwi_controller *phwi_ctrlr;
5311         struct be_eq_obj *pbe_eq;
5312         int ret, i;
5313
5314         if (test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
5315                 __beiscsi_log(phba, KERN_ERR,
5316                               "BM_%d : %s : port is online %lx\n",
5317                               __func__, phba->state);
5318                 return 0;
5319         }
5320
5321         ret = beiscsi_init_sliport(phba);
5322         if (ret)
5323                 return ret;
5324
5325         be2iscsi_enable_msix(phba);
5326
5327         beiscsi_get_params(phba);
5328         /* Re-enable UER. If different TPE occurs then it is recoverable. */
5329         beiscsi_set_uer_feature(phba);
5330
5331         phba->shost->max_id = phba->params.cxns_per_ctrl;
5332         phba->shost->can_queue = phba->params.ios_per_ctrl;
5333         ret = beiscsi_init_port(phba);
5334         if (ret < 0) {
5335                 __beiscsi_log(phba, KERN_ERR,
5336                               "BM_%d : init port failed\n");
5337                 goto disable_msix;
5338         }
5339
5340         for (i = 0; i < MAX_MCC_CMD; i++) {
5341                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5342                 phba->ctrl.mcc_tag[i] = i + 1;
5343                 phba->ctrl.mcc_tag_status[i + 1] = 0;
5344                 phba->ctrl.mcc_tag_available++;
5345         }
5346
5347         phwi_ctrlr = phba->phwi_ctrlr;
5348         phwi_context = phwi_ctrlr->phwi_ctxt;
5349         for (i = 0; i < phba->num_cpus; i++) {
5350                 pbe_eq = &phwi_context->be_eq[i];
5351                 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget, be_iopoll);
5352         }
5353
5354         i = (phba->pcidev->msix_enabled) ? i : 0;
5355         /* Work item for MCC handling */
5356         pbe_eq = &phwi_context->be_eq[i];
5357         INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work);
5358
5359         ret = beiscsi_init_irqs(phba);
5360         if (ret < 0) {
5361                 __beiscsi_log(phba, KERN_ERR,
5362                               "BM_%d : setup IRQs failed %d\n", ret);
5363                 goto cleanup_port;
5364         }
5365         hwi_enable_intr(phba);
5366         /* port operational: clear all error bits */
5367         set_bit(BEISCSI_HBA_ONLINE, &phba->state);
5368         __beiscsi_log(phba, KERN_INFO,
5369                       "BM_%d : port online: 0x%lx\n", phba->state);
5370
5371         /* start hw_check timer and eqd_update work */
5372         schedule_delayed_work(&phba->eqd_update,
5373                               msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5374
5375         /**
5376          * Timer function gets modified for TPE detection.
5377          * Always reinit to do health check first.
5378          */
5379         phba->hw_check.function = beiscsi_hw_health_check;
5380         mod_timer(&phba->hw_check,
5381                   jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5382         return 0;
5383
5384 cleanup_port:
5385         for (i = 0; i < phba->num_cpus; i++) {
5386                 pbe_eq = &phwi_context->be_eq[i];
5387                 irq_poll_disable(&pbe_eq->iopoll);
5388         }
5389         hwi_cleanup_port(phba);
5390
5391 disable_msix:
5392         pci_free_irq_vectors(phba->pcidev);
5393         return ret;
5394 }
5395
5396 /*
5397  * beiscsi_disable_port()- Disable port and cleanup driver resources.
5398  * This is called in HBA error handling and driver removal.
5399  * @phba: Instance Priv structure
5400  * @unload: indicate driver is unloading
5401  *
5402  * Free the OS and HW resources held by the driver
5403  **/
5404 static void beiscsi_disable_port(struct beiscsi_hba *phba, int unload)
5405 {
5406         struct hwi_context_memory *phwi_context;
5407         struct hwi_controller *phwi_ctrlr;
5408         struct be_eq_obj *pbe_eq;
5409         unsigned int i;
5410
5411         if (!test_and_clear_bit(BEISCSI_HBA_ONLINE, &phba->state))
5412                 return;
5413
5414         phwi_ctrlr = phba->phwi_ctrlr;
5415         phwi_context = phwi_ctrlr->phwi_ctxt;
5416         hwi_disable_intr(phba);
5417         beiscsi_free_irqs(phba);
5418         pci_free_irq_vectors(phba->pcidev);
5419
5420         for (i = 0; i < phba->num_cpus; i++) {
5421                 pbe_eq = &phwi_context->be_eq[i];
5422                 irq_poll_disable(&pbe_eq->iopoll);
5423         }
5424         cancel_delayed_work_sync(&phba->eqd_update);
5425         cancel_work_sync(&phba->boot_work);
5426         /* WQ might be running cancel queued mcc_work if we are not exiting */
5427         if (!unload && beiscsi_hba_in_error(phba)) {
5428                 pbe_eq = &phwi_context->be_eq[i];
5429                 cancel_work_sync(&pbe_eq->mcc_work);
5430         }
5431         hwi_cleanup_port(phba);
5432         beiscsi_cleanup_port(phba);
5433 }
5434
5435 static void beiscsi_sess_work(struct work_struct *work)
5436 {
5437         struct beiscsi_hba *phba;
5438
5439         phba = container_of(work, struct beiscsi_hba, sess_work);
5440         /*
5441          * This work gets scheduled only in case of HBA error.
5442          * Old sessions are gone so need to be re-established.
5443          * iscsi_session_failure needs process context hence this work.
5444          */
5445         iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
5446 }
5447
5448 static void beiscsi_recover_port(struct work_struct *work)
5449 {
5450         struct beiscsi_hba *phba;
5451
5452         phba = container_of(work, struct beiscsi_hba, recover_port.work);
5453         beiscsi_disable_port(phba, 0);
5454         beiscsi_enable_port(phba);
5455 }
5456
5457 static pci_ers_result_t beiscsi_eeh_err_detected(struct pci_dev *pdev,
5458                 pci_channel_state_t state)
5459 {
5460         struct beiscsi_hba *phba = NULL;
5461
5462         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5463         set_bit(BEISCSI_HBA_PCI_ERR, &phba->state);
5464
5465         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5466                     "BM_%d : EEH error detected\n");
5467
5468         /* first stop UE detection when PCI error detected */
5469         del_timer_sync(&phba->hw_check);
5470         cancel_delayed_work_sync(&phba->recover_port);
5471
5472         /* sessions are no longer valid, so first fail the sessions */
5473         iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
5474         beiscsi_disable_port(phba, 0);
5475
5476         if (state == pci_channel_io_perm_failure) {
5477                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5478                             "BM_%d : EEH : State PERM Failure");
5479                 return PCI_ERS_RESULT_DISCONNECT;
5480         }
5481
5482         pci_disable_device(pdev);
5483
5484         /* The error could cause the FW to trigger a flash debug dump.
5485          * Resetting the card while flash dump is in progress
5486          * can cause it not to recover; wait for it to finish.
5487          * Wait only for first function as it is needed only once per
5488          * adapter.
5489          **/
5490         if (pdev->devfn == 0)
5491                 ssleep(30);
5492
5493         return PCI_ERS_RESULT_NEED_RESET;
5494 }
5495
5496 static pci_ers_result_t beiscsi_eeh_reset(struct pci_dev *pdev)
5497 {
5498         struct beiscsi_hba *phba = NULL;
5499         int status = 0;
5500
5501         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5502
5503         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5504                     "BM_%d : EEH Reset\n");
5505
5506         status = pci_enable_device(pdev);
5507         if (status)
5508                 return PCI_ERS_RESULT_DISCONNECT;
5509
5510         pci_set_master(pdev);
5511         pci_set_power_state(pdev, PCI_D0);
5512         pci_restore_state(pdev);
5513
5514         status = beiscsi_check_fw_rdy(phba);
5515         if (status) {
5516                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5517                             "BM_%d : EEH Reset Completed\n");
5518         } else {
5519                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5520                             "BM_%d : EEH Reset Completion Failure\n");
5521                 return PCI_ERS_RESULT_DISCONNECT;
5522         }
5523
5524         pci_cleanup_aer_uncorrect_error_status(pdev);
5525         return PCI_ERS_RESULT_RECOVERED;
5526 }
5527
5528 static void beiscsi_eeh_resume(struct pci_dev *pdev)
5529 {
5530         struct beiscsi_hba *phba;
5531         int ret;
5532
5533         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5534         pci_save_state(pdev);
5535
5536         ret = beiscsi_enable_port(phba);
5537         if (ret)
5538                 __beiscsi_log(phba, KERN_ERR,
5539                               "BM_%d : AER EEH resume failed\n");
5540 }
5541
5542 static int beiscsi_dev_probe(struct pci_dev *pcidev,
5543                              const struct pci_device_id *id)
5544 {
5545         struct hwi_context_memory *phwi_context;
5546         struct hwi_controller *phwi_ctrlr;
5547         struct beiscsi_hba *phba = NULL;
5548         struct be_eq_obj *pbe_eq;
5549         unsigned int s_handle;
5550         char wq_name[20];
5551         int ret, i;
5552
5553         ret = beiscsi_enable_pci(pcidev);
5554         if (ret < 0) {
5555                 dev_err(&pcidev->dev,
5556                         "beiscsi_dev_probe - Failed to enable pci device\n");
5557                 return ret;
5558         }
5559
5560         phba = beiscsi_hba_alloc(pcidev);
5561         if (!phba) {
5562                 dev_err(&pcidev->dev,
5563                         "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
5564                 ret = -ENOMEM;
5565                 goto disable_pci;
5566         }
5567
5568         /* Enable EEH reporting */
5569         ret = pci_enable_pcie_error_reporting(pcidev);
5570         if (ret)
5571                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5572                             "BM_%d : PCIe Error Reporting "
5573                             "Enabling Failed\n");
5574
5575         pci_save_state(pcidev);
5576
5577         /* Initialize Driver configuration Paramters */
5578         beiscsi_hba_attrs_init(phba);
5579
5580         phba->mac_addr_set = false;
5581
5582         switch (pcidev->device) {
5583         case BE_DEVICE_ID1:
5584         case OC_DEVICE_ID1:
5585         case OC_DEVICE_ID2:
5586                 phba->generation = BE_GEN2;
5587                 phba->iotask_fn = beiscsi_iotask;
5588                 dev_warn(&pcidev->dev,
5589                          "Obsolete/Unsupported BE2 Adapter Family\n");
5590                 break;
5591         case BE_DEVICE_ID2:
5592         case OC_DEVICE_ID3:
5593                 phba->generation = BE_GEN3;
5594                 phba->iotask_fn = beiscsi_iotask;
5595                 break;
5596         case OC_SKH_ID1:
5597                 phba->generation = BE_GEN4;
5598                 phba->iotask_fn = beiscsi_iotask_v2;
5599                 break;
5600         default:
5601                 phba->generation = 0;
5602         }
5603
5604         ret = be_ctrl_init(phba, pcidev);
5605         if (ret) {
5606                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5607                             "BM_%d : be_ctrl_init failed\n");
5608                 goto free_hba;
5609         }
5610
5611         ret = beiscsi_init_sliport(phba);
5612         if (ret)
5613                 goto free_hba;
5614
5615         spin_lock_init(&phba->io_sgl_lock);
5616         spin_lock_init(&phba->mgmt_sgl_lock);
5617         spin_lock_init(&phba->async_pdu_lock);
5618         ret = beiscsi_get_fw_config(&phba->ctrl, phba);
5619         if (ret != 0) {
5620                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5621                             "BM_%d : Error getting fw config\n");
5622                 goto free_port;
5623         }
5624         beiscsi_get_port_name(&phba->ctrl, phba);
5625         beiscsi_get_params(phba);
5626         beiscsi_set_uer_feature(phba);
5627
5628         be2iscsi_enable_msix(phba);
5629
5630         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5631                     "BM_%d : num_cpus = %d\n",
5632                     phba->num_cpus);
5633
5634         phba->shost->max_id = phba->params.cxns_per_ctrl;
5635         phba->shost->can_queue = phba->params.ios_per_ctrl;
5636         ret = beiscsi_get_memory(phba);
5637         if (ret < 0) {
5638                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5639                             "BM_%d : alloc host mem failed\n");
5640                 goto free_port;
5641         }
5642
5643         ret = beiscsi_init_port(phba);
5644         if (ret < 0) {
5645                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5646                             "BM_%d : init port failed\n");
5647                 beiscsi_free_mem(phba);
5648                 goto free_port;
5649         }
5650
5651         for (i = 0; i < MAX_MCC_CMD; i++) {
5652                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5653                 phba->ctrl.mcc_tag[i] = i + 1;
5654                 phba->ctrl.mcc_tag_status[i + 1] = 0;
5655                 phba->ctrl.mcc_tag_available++;
5656                 memset(&phba->ctrl.ptag_state[i].tag_mem_state, 0,
5657                        sizeof(struct be_dma_mem));
5658         }
5659
5660         phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5661
5662         snprintf(wq_name, sizeof(wq_name), "beiscsi_%02x_wq",
5663                  phba->shost->host_no);
5664         phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, wq_name);
5665         if (!phba->wq) {
5666                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5667                             "BM_%d : beiscsi_dev_probe-"
5668                             "Failed to allocate work queue\n");
5669                 ret = -ENOMEM;
5670                 goto free_twq;
5671         }
5672
5673         INIT_DELAYED_WORK(&phba->eqd_update, beiscsi_eqd_update_work);
5674
5675         phwi_ctrlr = phba->phwi_ctrlr;
5676         phwi_context = phwi_ctrlr->phwi_ctxt;
5677
5678         for (i = 0; i < phba->num_cpus; i++) {
5679                 pbe_eq = &phwi_context->be_eq[i];
5680                 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget, be_iopoll);
5681         }
5682
5683         i = (phba->pcidev->msix_enabled) ? i : 0;
5684         /* Work item for MCC handling */
5685         pbe_eq = &phwi_context->be_eq[i];
5686         INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work);
5687
5688         ret = beiscsi_init_irqs(phba);
5689         if (ret < 0) {
5690                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5691                             "BM_%d : beiscsi_dev_probe-"
5692                             "Failed to beiscsi_init_irqs\n");
5693                 goto disable_iopoll;
5694         }
5695         hwi_enable_intr(phba);
5696
5697         ret = iscsi_host_add(phba->shost, &phba->pcidev->dev);
5698         if (ret)
5699                 goto free_irqs;
5700
5701         /* set online bit after port is operational */
5702         set_bit(BEISCSI_HBA_ONLINE, &phba->state);
5703         __beiscsi_log(phba, KERN_INFO,
5704                       "BM_%d : port online: 0x%lx\n", phba->state);
5705
5706         INIT_WORK(&phba->boot_work, beiscsi_boot_work);
5707         ret = beiscsi_boot_get_shandle(phba, &s_handle);
5708         if (ret > 0) {
5709                 beiscsi_start_boot_work(phba, s_handle);
5710                 /**
5711                  * Set this bit after starting the work to let
5712                  * probe handle it first.
5713                  * ASYNC event can too schedule this work.
5714                  */
5715                 set_bit(BEISCSI_HBA_BOOT_FOUND, &phba->state);
5716         }
5717
5718         beiscsi_iface_create_default(phba);
5719         schedule_delayed_work(&phba->eqd_update,
5720                               msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5721
5722         INIT_WORK(&phba->sess_work, beiscsi_sess_work);
5723         INIT_DELAYED_WORK(&phba->recover_port, beiscsi_recover_port);
5724         /**
5725          * Start UE detection here. UE before this will cause stall in probe
5726          * and eventually fail the probe.
5727          */
5728         init_timer(&phba->hw_check);
5729         phba->hw_check.function = beiscsi_hw_health_check;
5730         phba->hw_check.data = (unsigned long)phba;
5731         mod_timer(&phba->hw_check,
5732                   jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5733         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5734                     "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5735         return 0;
5736
5737 free_irqs:
5738         hwi_disable_intr(phba);
5739         beiscsi_free_irqs(phba);
5740 disable_iopoll:
5741         for (i = 0; i < phba->num_cpus; i++) {
5742                 pbe_eq = &phwi_context->be_eq[i];
5743                 irq_poll_disable(&pbe_eq->iopoll);
5744         }
5745         destroy_workqueue(phba->wq);
5746 free_twq:
5747         hwi_cleanup_port(phba);
5748         beiscsi_cleanup_port(phba);
5749         beiscsi_free_mem(phba);
5750 free_port:
5751         pci_free_consistent(phba->pcidev,
5752                             phba->ctrl.mbox_mem_alloced.size,
5753                             phba->ctrl.mbox_mem_alloced.va,
5754                             phba->ctrl.mbox_mem_alloced.dma);
5755         beiscsi_unmap_pci_function(phba);
5756 free_hba:
5757         pci_disable_msix(phba->pcidev);
5758         pci_dev_put(phba->pcidev);
5759         iscsi_host_free(phba->shost);
5760         pci_set_drvdata(pcidev, NULL);
5761 disable_pci:
5762         pci_release_regions(pcidev);
5763         pci_disable_device(pcidev);
5764         return ret;
5765 }
5766
5767 static void beiscsi_remove(struct pci_dev *pcidev)
5768 {
5769         struct beiscsi_hba *phba = NULL;
5770
5771         phba = pci_get_drvdata(pcidev);
5772         if (!phba) {
5773                 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5774                 return;
5775         }
5776
5777         /* first stop UE detection before unloading */
5778         del_timer_sync(&phba->hw_check);
5779         cancel_delayed_work_sync(&phba->recover_port);
5780         cancel_work_sync(&phba->sess_work);
5781
5782         beiscsi_iface_destroy_default(phba);
5783         iscsi_host_remove(phba->shost);
5784         beiscsi_disable_port(phba, 1);
5785
5786         /* after cancelling boot_work */
5787         iscsi_boot_destroy_kset(phba->boot_struct.boot_kset);
5788
5789         /* free all resources */
5790         destroy_workqueue(phba->wq);
5791         beiscsi_free_mem(phba);
5792
5793         /* ctrl uninit */
5794         beiscsi_unmap_pci_function(phba);
5795         pci_free_consistent(phba->pcidev,
5796                             phba->ctrl.mbox_mem_alloced.size,
5797                             phba->ctrl.mbox_mem_alloced.va,
5798                             phba->ctrl.mbox_mem_alloced.dma);
5799
5800         pci_dev_put(phba->pcidev);
5801         iscsi_host_free(phba->shost);
5802         pci_disable_pcie_error_reporting(pcidev);
5803         pci_set_drvdata(pcidev, NULL);
5804         pci_release_regions(pcidev);
5805         pci_disable_device(pcidev);
5806 }
5807
5808
5809 static struct pci_error_handlers beiscsi_eeh_handlers = {
5810         .error_detected = beiscsi_eeh_err_detected,
5811         .slot_reset = beiscsi_eeh_reset,
5812         .resume = beiscsi_eeh_resume,
5813 };
5814
5815 struct iscsi_transport beiscsi_iscsi_transport = {
5816         .owner = THIS_MODULE,
5817         .name = DRV_NAME,
5818         .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5819                 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
5820         .create_session = beiscsi_session_create,
5821         .destroy_session = beiscsi_session_destroy,
5822         .create_conn = beiscsi_conn_create,
5823         .bind_conn = beiscsi_conn_bind,
5824         .destroy_conn = iscsi_conn_teardown,
5825         .attr_is_visible = beiscsi_attr_is_visible,
5826         .set_iface_param = beiscsi_iface_set_param,
5827         .get_iface_param = beiscsi_iface_get_param,
5828         .set_param = beiscsi_set_param,
5829         .get_conn_param = iscsi_conn_get_param,
5830         .get_session_param = iscsi_session_get_param,
5831         .get_host_param = beiscsi_get_host_param,
5832         .start_conn = beiscsi_conn_start,
5833         .stop_conn = iscsi_conn_stop,
5834         .send_pdu = iscsi_conn_send_pdu,
5835         .xmit_task = beiscsi_task_xmit,
5836         .cleanup_task = beiscsi_cleanup_task,
5837         .alloc_pdu = beiscsi_alloc_pdu,
5838         .parse_pdu_itt = beiscsi_parse_pdu,
5839         .get_stats = beiscsi_conn_get_stats,
5840         .get_ep_param = beiscsi_ep_get_param,
5841         .ep_connect = beiscsi_ep_connect,
5842         .ep_poll = beiscsi_ep_poll,
5843         .ep_disconnect = beiscsi_ep_disconnect,
5844         .session_recovery_timedout = iscsi_session_recovery_timedout,
5845         .bsg_request = beiscsi_bsg_request,
5846 };
5847
5848 static struct pci_driver beiscsi_pci_driver = {
5849         .name = DRV_NAME,
5850         .probe = beiscsi_dev_probe,
5851         .remove = beiscsi_remove,
5852         .id_table = beiscsi_pci_id_table,
5853         .err_handler = &beiscsi_eeh_handlers
5854 };
5855
5856 static int __init beiscsi_module_init(void)
5857 {
5858         int ret;
5859
5860         beiscsi_scsi_transport =
5861                         iscsi_register_transport(&beiscsi_iscsi_transport);
5862         if (!beiscsi_scsi_transport) {
5863                 printk(KERN_ERR
5864                        "beiscsi_module_init - Unable to  register beiscsi transport.\n");
5865                 return -ENOMEM;
5866         }
5867         printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5868                &beiscsi_iscsi_transport);
5869
5870         ret = pci_register_driver(&beiscsi_pci_driver);
5871         if (ret) {
5872                 printk(KERN_ERR
5873                        "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
5874                 goto unregister_iscsi_transport;
5875         }
5876         return 0;
5877
5878 unregister_iscsi_transport:
5879         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5880         return ret;
5881 }
5882
5883 static void __exit beiscsi_module_exit(void)
5884 {
5885         pci_unregister_driver(&beiscsi_pci_driver);
5886         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5887 }
5888
5889 module_init(beiscsi_module_init);
5890 module_exit(beiscsi_module_exit);