[IPV6]: Support IPV6_{RECV,}TCLASS socket options / ancillary data.
[sfrench/cifs-2.6.git] / drivers / scsi / aic7xxx / aic7xxx_osm_pci.c
1 /*
2  * Linux driver attachment glue for PCI based controllers.
3  *
4  * Copyright (c) 2000-2001 Adaptec Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer,
12  *    without modification.
13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14  *    substantially similar to the "NO WARRANTY" disclaimer below
15  *    ("Disclaimer") and any redistribution must be conditioned upon
16  *    including a substantially similar Disclaimer requirement for further
17  *    binary redistribution.
18  * 3. Neither the names of the above-listed copyright holders nor the names
19  *    of any contributors may be used to endorse or promote products derived
20  *    from this software without specific prior written permission.
21  *
22  * Alternatively, this software may be distributed under the terms of the
23  * GNU General Public License ("GPL") version 2 as published by the Free
24  * Software Foundation.
25  *
26  * NO WARRANTY
27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGES.
38  *
39  * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c#47 $
40  */
41
42 #include "aic7xxx_osm.h"
43 #include "aic7xxx_pci.h"
44
45 static int      ahc_linux_pci_dev_probe(struct pci_dev *pdev,
46                                         const struct pci_device_id *ent);
47 static int      ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc,
48                                                 u_long *base);
49 static int      ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc,
50                                                  u_long *bus_addr,
51                                                  uint8_t __iomem **maddr);
52 static void     ahc_linux_pci_dev_remove(struct pci_dev *pdev);
53
54 /* Define the macro locally since it's different for different class of chips.
55 */
56 #define ID(x)   ID_C(x, PCI_CLASS_STORAGE_SCSI)
57
58 static struct pci_device_id ahc_linux_pci_id_table[] = {
59         /* aic7850 based controllers */
60         ID(ID_AHA_2902_04_10_15_20C_30C),
61         /* aic7860 based controllers */
62         ID(ID_AHA_2930CU),
63         ID(ID_AHA_1480A & ID_DEV_VENDOR_MASK),
64         ID(ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK),
65         ID(ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK),
66         ID(ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK),
67         /* aic7870 based controllers */
68         ID(ID_AHA_2940),
69         ID(ID_AHA_3940),
70         ID(ID_AHA_398X),
71         ID(ID_AHA_2944),
72         ID(ID_AHA_3944),
73         ID(ID_AHA_4944),
74         /* aic7880 based controllers */
75         ID(ID_AHA_2940U & ID_DEV_VENDOR_MASK),
76         ID(ID_AHA_3940U & ID_DEV_VENDOR_MASK),
77         ID(ID_AHA_2944U & ID_DEV_VENDOR_MASK),
78         ID(ID_AHA_3944U & ID_DEV_VENDOR_MASK),
79         ID(ID_AHA_398XU & ID_DEV_VENDOR_MASK),
80         ID(ID_AHA_4944U & ID_DEV_VENDOR_MASK),
81         ID(ID_AHA_2930U & ID_DEV_VENDOR_MASK),
82         ID(ID_AHA_2940U_PRO & ID_DEV_VENDOR_MASK),
83         ID(ID_AHA_2940U_CN & ID_DEV_VENDOR_MASK),
84         /* aic7890 based controllers */
85         ID(ID_AHA_2930U2),
86         ID(ID_AHA_2940U2B),
87         ID(ID_AHA_2940U2_OEM),
88         ID(ID_AHA_2940U2),
89         ID(ID_AHA_2950U2B),
90         ID16(ID_AIC7890_ARO & ID_AIC7895_ARO_MASK),
91         ID(ID_AAA_131U2),
92         /* aic7890 based controllers */
93         ID(ID_AHA_29160),
94         ID(ID_AHA_29160_CPQ),
95         ID(ID_AHA_29160N),
96         ID(ID_AHA_29160C),
97         ID(ID_AHA_29160B),
98         ID(ID_AHA_19160B),
99         ID(ID_AIC7892_ARO),
100         /* aic7892 based controllers */
101         ID(ID_AHA_2940U_DUAL),
102         ID(ID_AHA_3940AU),
103         ID(ID_AHA_3944AU),
104         ID(ID_AIC7895_ARO),
105         ID(ID_AHA_3950U2B_0),
106         ID(ID_AHA_3950U2B_1),
107         ID(ID_AHA_3950U2D_0),
108         ID(ID_AHA_3950U2D_1),
109         ID(ID_AIC7896_ARO),
110         /* aic7899 based controllers */
111         ID(ID_AHA_3960D),
112         ID(ID_AHA_3960D_CPQ),
113         ID(ID_AIC7899_ARO),
114         /* Generic chip probes for devices we don't know exactly. */
115         ID(ID_AIC7850 & ID_DEV_VENDOR_MASK),
116         ID(ID_AIC7855 & ID_DEV_VENDOR_MASK),
117         ID(ID_AIC7859 & ID_DEV_VENDOR_MASK),
118         ID(ID_AIC7860 & ID_DEV_VENDOR_MASK),
119         ID(ID_AIC7870 & ID_DEV_VENDOR_MASK),
120         ID(ID_AIC7880 & ID_DEV_VENDOR_MASK),
121         ID16(ID_AIC7890 & ID_9005_GENERIC_MASK),
122         ID16(ID_AIC7892 & ID_9005_GENERIC_MASK),
123         ID(ID_AIC7895 & ID_DEV_VENDOR_MASK),
124         ID16(ID_AIC7896 & ID_9005_GENERIC_MASK),
125         ID16(ID_AIC7899 & ID_9005_GENERIC_MASK),
126         ID(ID_AIC7810 & ID_DEV_VENDOR_MASK),
127         ID(ID_AIC7815 & ID_DEV_VENDOR_MASK),
128         { 0 }
129 };
130
131 MODULE_DEVICE_TABLE(pci, ahc_linux_pci_id_table);
132
133 struct pci_driver aic7xxx_pci_driver = {
134         .name           = "aic7xxx",
135         .probe          = ahc_linux_pci_dev_probe,
136         .remove         = ahc_linux_pci_dev_remove,
137         .id_table       = ahc_linux_pci_id_table
138 };
139
140 static void
141 ahc_linux_pci_dev_remove(struct pci_dev *pdev)
142 {
143         struct ahc_softc *ahc = pci_get_drvdata(pdev);
144         u_long s;
145
146         ahc_lock(ahc, &s);
147         ahc_intr_enable(ahc, FALSE);
148         ahc_unlock(ahc, &s);
149         ahc_free(ahc);
150 }
151
152 static int
153 ahc_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
154 {
155         char             buf[80];
156         const uint64_t   mask_39bit = 0x7FFFFFFFFFULL;
157         struct           ahc_softc *ahc;
158         ahc_dev_softc_t  pci;
159         struct           ahc_pci_identity *entry;
160         char            *name;
161         int              error;
162
163         pci = pdev;
164         entry = ahc_find_pci_device(pci);
165         if (entry == NULL)
166                 return (-ENODEV);
167
168         /*
169          * Allocate a softc for this card and
170          * set it up for attachment by our
171          * common detect routine.
172          */
173         sprintf(buf, "ahc_pci:%d:%d:%d",
174                 ahc_get_pci_bus(pci),
175                 ahc_get_pci_slot(pci),
176                 ahc_get_pci_function(pci));
177         name = malloc(strlen(buf) + 1, M_DEVBUF, M_NOWAIT);
178         if (name == NULL)
179                 return (-ENOMEM);
180         strcpy(name, buf);
181         ahc = ahc_alloc(NULL, name);
182         if (ahc == NULL)
183                 return (-ENOMEM);
184         if (pci_enable_device(pdev)) {
185                 ahc_free(ahc);
186                 return (-ENODEV);
187         }
188         pci_set_master(pdev);
189
190         if (sizeof(dma_addr_t) > 4
191          && ahc_linux_get_memsize() > 0x80000000
192          && pci_set_dma_mask(pdev, mask_39bit) == 0) {
193                 ahc->flags |= AHC_39BIT_ADDRESSING;
194         } else {
195                 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
196                         printk(KERN_WARNING "aic7xxx: No suitable DMA available.\n");
197                         return (-ENODEV);
198                 }
199         }
200         ahc->dev_softc = pci;
201         error = ahc_pci_config(ahc, entry);
202         if (error != 0) {
203                 ahc_free(ahc);
204                 return (-error);
205         }
206         pci_set_drvdata(pdev, ahc);
207         ahc_linux_register_host(ahc, &aic7xxx_driver_template);
208         return (0);
209 }
210
211 int
212 ahc_linux_pci_init(void)
213 {
214         /* Translate error or zero return into zero or one */
215         return pci_module_init(&aic7xxx_pci_driver) ? 0 : 1;
216 }
217
218 void
219 ahc_linux_pci_exit(void)
220 {
221         pci_unregister_driver(&aic7xxx_pci_driver);
222 }
223
224 static int
225 ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc, u_long *base)
226 {
227         if (aic7xxx_allow_memio == 0)
228                 return (ENOMEM);
229
230         *base = pci_resource_start(ahc->dev_softc, 0);
231         if (*base == 0)
232                 return (ENOMEM);
233         if (request_region(*base, 256, "aic7xxx") == 0)
234                 return (ENOMEM);
235         return (0);
236 }
237
238 static int
239 ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc,
240                                  u_long *bus_addr,
241                                  uint8_t __iomem **maddr)
242 {
243         u_long  start;
244         int     error;
245
246         error = 0;
247         start = pci_resource_start(ahc->dev_softc, 1);
248         if (start != 0) {
249                 *bus_addr = start;
250                 if (request_mem_region(start, 0x1000, "aic7xxx") == 0)
251                         error = ENOMEM;
252                 if (error == 0) {
253                         *maddr = ioremap_nocache(start, 256);
254                         if (*maddr == NULL) {
255                                 error = ENOMEM;
256                                 release_mem_region(start, 0x1000);
257                         }
258                 }
259         } else
260                 error = ENOMEM;
261         return (error);
262 }
263
264 int
265 ahc_pci_map_registers(struct ahc_softc *ahc)
266 {
267         uint32_t command;
268         u_long   base;
269         uint8_t __iomem *maddr;
270         int      error;
271
272         /*
273          * If its allowed, we prefer memory mapped access.
274          */
275         command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, 4);
276         command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
277         base = 0;
278         maddr = NULL;
279         error = ahc_linux_pci_reserve_mem_region(ahc, &base, &maddr);
280         if (error == 0) {
281                 ahc->platform_data->mem_busaddr = base;
282                 ahc->tag = BUS_SPACE_MEMIO;
283                 ahc->bsh.maddr = maddr;
284                 ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
285                                      command | PCIM_CMD_MEMEN, 4);
286
287                 /*
288                  * Do a quick test to see if memory mapped
289                  * I/O is functioning correctly.
290                  */
291                 if (ahc_pci_test_register_access(ahc) != 0) {
292
293                         printf("aic7xxx: PCI Device %d:%d:%d "
294                                "failed memory mapped test.  Using PIO.\n",
295                                ahc_get_pci_bus(ahc->dev_softc),
296                                ahc_get_pci_slot(ahc->dev_softc),
297                                ahc_get_pci_function(ahc->dev_softc));
298                         iounmap(maddr);
299                         release_mem_region(ahc->platform_data->mem_busaddr,
300                                            0x1000);
301                         ahc->bsh.maddr = NULL;
302                         maddr = NULL;
303                 } else
304                         command |= PCIM_CMD_MEMEN;
305         } else {
306                 printf("aic7xxx: PCI%d:%d:%d MEM region 0x%lx "
307                        "unavailable. Cannot memory map device.\n",
308                        ahc_get_pci_bus(ahc->dev_softc),
309                        ahc_get_pci_slot(ahc->dev_softc),
310                        ahc_get_pci_function(ahc->dev_softc),
311                        base);
312         }
313
314         /*
315          * We always prefer memory mapped access.
316          */
317         if (maddr == NULL) {
318
319                 error = ahc_linux_pci_reserve_io_region(ahc, &base);
320                 if (error == 0) {
321                         ahc->tag = BUS_SPACE_PIO;
322                         ahc->bsh.ioport = base;
323                         command |= PCIM_CMD_PORTEN;
324                 } else {
325                         printf("aic7xxx: PCI%d:%d:%d IO region 0x%lx[0..255] "
326                                "unavailable. Cannot map device.\n",
327                                ahc_get_pci_bus(ahc->dev_softc),
328                                ahc_get_pci_slot(ahc->dev_softc),
329                                ahc_get_pci_function(ahc->dev_softc),
330                                base);
331                 }
332         }
333         ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND, command, 4);
334         return (error);
335 }
336
337 int
338 ahc_pci_map_int(struct ahc_softc *ahc)
339 {
340         int error;
341
342         error = request_irq(ahc->dev_softc->irq, ahc_linux_isr,
343                             SA_SHIRQ, "aic7xxx", ahc);
344         if (error == 0)
345                 ahc->platform_data->irq = ahc->dev_softc->irq;
346         
347         return (-error);
348 }
349