Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
[sfrench/cifs-2.6.git] / drivers / pinctrl / uniphier / pinctrl-uniphier.h
1 /*
2  * Copyright (C) 2015-2017 Socionext Inc.
3  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15
16 #ifndef __PINCTRL_UNIPHIER_H__
17 #define __PINCTRL_UNIPHIER_H__
18
19 #include <linux/bitops.h>
20 #include <linux/bug.h>
21 #include <linux/kernel.h>
22 #include <linux/types.h>
23
24 struct platform_device;
25
26 /* input enable control register bit */
27 #define UNIPHIER_PIN_IECTRL_SHIFT       0
28 #define UNIPHIER_PIN_IECTRL_BITS        8
29 #define UNIPHIER_PIN_IECTRL_MASK        ((1UL << (UNIPHIER_PIN_IECTRL_BITS)) \
30                                          - 1)
31
32 /* drive strength control register number */
33 #define UNIPHIER_PIN_DRVCTRL_SHIFT      ((UNIPHIER_PIN_IECTRL_SHIFT) + \
34                                         (UNIPHIER_PIN_IECTRL_BITS))
35 #define UNIPHIER_PIN_DRVCTRL_BITS       9
36 #define UNIPHIER_PIN_DRVCTRL_MASK       ((1UL << (UNIPHIER_PIN_DRVCTRL_BITS)) \
37                                          - 1)
38
39 /* drive control type */
40 #define UNIPHIER_PIN_DRV_TYPE_SHIFT     ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
41                                          (UNIPHIER_PIN_DRVCTRL_BITS))
42 #define UNIPHIER_PIN_DRV_TYPE_BITS      3
43 #define UNIPHIER_PIN_DRV_TYPE_MASK      ((1UL << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
44                                          - 1)
45
46 /* pull-up / pull-down register number */
47 #define UNIPHIER_PIN_PUPDCTRL_SHIFT     ((UNIPHIER_PIN_DRV_TYPE_SHIFT) + \
48                                          (UNIPHIER_PIN_DRV_TYPE_BITS))
49 #define UNIPHIER_PIN_PUPDCTRL_BITS      9
50 #define UNIPHIER_PIN_PUPDCTRL_MASK      ((1UL << (UNIPHIER_PIN_PUPDCTRL_BITS))\
51                                          - 1)
52
53 /* direction of pull register */
54 #define UNIPHIER_PIN_PULL_DIR_SHIFT     ((UNIPHIER_PIN_PUPDCTRL_SHIFT) + \
55                                          (UNIPHIER_PIN_PUPDCTRL_BITS))
56 #define UNIPHIER_PIN_PULL_DIR_BITS      3
57 #define UNIPHIER_PIN_PULL_DIR_MASK      ((1UL << (UNIPHIER_PIN_PULL_DIR_BITS))\
58                                          - 1)
59
60 #if UNIPHIER_PIN_PULL_DIR_SHIFT + UNIPHIER_PIN_PULL_DIR_BITS > BITS_PER_LONG
61 #error "unable to pack pin attributes."
62 #endif
63
64 #define UNIPHIER_PIN_IECTRL_NONE        (UNIPHIER_PIN_IECTRL_MASK)
65
66 /* drive control type */
67 enum uniphier_pin_drv_type {
68         UNIPHIER_PIN_DRV_1BIT,          /* 2 level control: 4/8 mA */
69         UNIPHIER_PIN_DRV_2BIT,          /* 4 level control: 8/12/16/20 mA */
70         UNIPHIER_PIN_DRV_3BIT,          /* 8 level control: 4/5/7/9/11/12/14/16 mA */
71         UNIPHIER_PIN_DRV_FIXED4,        /* fixed to 4mA */
72         UNIPHIER_PIN_DRV_FIXED5,        /* fixed to 5mA */
73         UNIPHIER_PIN_DRV_FIXED8,        /* fixed to 8mA */
74         UNIPHIER_PIN_DRV_NONE,          /* no support (input only pin) */
75 };
76
77 /* direction of pull register (no pin supports bi-directional pull biasing) */
78 enum uniphier_pin_pull_dir {
79         UNIPHIER_PIN_PULL_UP,           /* pull-up or disabled */
80         UNIPHIER_PIN_PULL_DOWN,         /* pull-down or disabled */
81         UNIPHIER_PIN_PULL_UP_FIXED,     /* always pull-up */
82         UNIPHIER_PIN_PULL_DOWN_FIXED,   /* always pull-down */
83         UNIPHIER_PIN_PULL_NONE,         /* no pull register */
84 };
85
86 #define UNIPHIER_PIN_IECTRL(x) \
87         (((x) & (UNIPHIER_PIN_IECTRL_MASK)) << (UNIPHIER_PIN_IECTRL_SHIFT))
88 #define UNIPHIER_PIN_DRVCTRL(x) \
89         (((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
90 #define UNIPHIER_PIN_DRV_TYPE(x) \
91         (((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
92 #define UNIPHIER_PIN_PUPDCTRL(x) \
93         (((x) & (UNIPHIER_PIN_PUPDCTRL_MASK)) << (UNIPHIER_PIN_PUPDCTRL_SHIFT))
94 #define UNIPHIER_PIN_PULL_DIR(x) \
95         (((x) & (UNIPHIER_PIN_PULL_DIR_MASK)) << (UNIPHIER_PIN_PULL_DIR_SHIFT))
96
97 #define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_type, pupdctrl, pull_dir)\
98                                 (UNIPHIER_PIN_IECTRL(iectrl) |          \
99                                  UNIPHIER_PIN_DRVCTRL(drvctrl) |        \
100                                  UNIPHIER_PIN_DRV_TYPE(drv_type) |      \
101                                  UNIPHIER_PIN_PUPDCTRL(pupdctrl) |      \
102                                  UNIPHIER_PIN_PULL_DIR(pull_dir))
103
104 static inline unsigned int uniphier_pin_get_iectrl(void *drv_data)
105 {
106         return ((unsigned long)drv_data >> UNIPHIER_PIN_IECTRL_SHIFT) &
107                                                 UNIPHIER_PIN_IECTRL_MASK;
108 }
109
110 static inline unsigned int uniphier_pin_get_drvctrl(void *drv_data)
111 {
112         return ((unsigned long)drv_data >> UNIPHIER_PIN_DRVCTRL_SHIFT) &
113                                                 UNIPHIER_PIN_DRVCTRL_MASK;
114 }
115
116 static inline unsigned int uniphier_pin_get_drv_type(void *drv_data)
117 {
118         return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
119                                                 UNIPHIER_PIN_DRV_TYPE_MASK;
120 }
121
122 static inline unsigned int uniphier_pin_get_pupdctrl(void *drv_data)
123 {
124         return ((unsigned long)drv_data >> UNIPHIER_PIN_PUPDCTRL_SHIFT) &
125                                                 UNIPHIER_PIN_PUPDCTRL_MASK;
126 }
127
128 static inline unsigned int uniphier_pin_get_pull_dir(void *drv_data)
129 {
130         return ((unsigned long)drv_data >> UNIPHIER_PIN_PULL_DIR_SHIFT) &
131                                                 UNIPHIER_PIN_PULL_DIR_MASK;
132 }
133
134 enum uniphier_pinmux_gpio_range_type {
135         UNIPHIER_PINMUX_GPIO_RANGE_PORT,
136         UNIPHIER_PINMUX_GPIO_RANGE_IRQ,
137         UNIPHIER_PINMUX_GPIO_RANGE_NONE,
138 };
139
140 struct uniphier_pinctrl_group {
141         const char *name;
142         const unsigned *pins;
143         unsigned num_pins;
144         const int *muxvals;
145         enum uniphier_pinmux_gpio_range_type range_type;
146 };
147
148 struct uniphier_pinmux_function {
149         const char *name;
150         const char * const *groups;
151         unsigned num_groups;
152 };
153
154 struct uniphier_pinctrl_socdata {
155         const struct pinctrl_pin_desc *pins;
156         unsigned int npins;
157         const struct uniphier_pinctrl_group *groups;
158         int groups_count;
159         const struct uniphier_pinmux_function *functions;
160         int functions_count;
161         unsigned int caps;
162 #define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL     BIT(1)
163 #define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE   BIT(0)
164 };
165
166 #define UNIPHIER_PINCTRL_PIN(a, b, c, d, e, f, g)                       \
167 {                                                                       \
168         .number = a,                                                    \
169         .name = b,                                                      \
170         .drv_data = (void *)UNIPHIER_PIN_ATTR_PACKED(c, d, e, f, g),    \
171 }
172
173 #define __UNIPHIER_PINCTRL_GROUP(grp, type)                             \
174         {                                                               \
175                 .name = #grp,                                           \
176                 .pins = grp##_pins,                                     \
177                 .num_pins = ARRAY_SIZE(grp##_pins),                     \
178                 .muxvals = grp##_muxvals +                              \
179                         BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) !=     \
180                                           ARRAY_SIZE(grp##_muxvals)),   \
181                 .range_type = type,                                     \
182         }
183
184 #define UNIPHIER_PINCTRL_GROUP(grp)                                     \
185         __UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_NONE)
186
187 #define UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(grp)                     \
188         __UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_PORT)
189
190 #define UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(grp)                      \
191         __UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_IRQ)
192
193 #define UNIPHIER_PINCTRL_GROUP_SINGLE(grp, array, ofst)                 \
194         {                                                               \
195                 .name = #grp,                                           \
196                 .pins = array##_pins + ofst,                            \
197                 .num_pins = 1,                                          \
198                 .muxvals = array##_muxvals + ofst,                      \
199         }
200
201 #define UNIPHIER_PINMUX_FUNCTION(func)                                  \
202         {                                                               \
203                 .name = #func,                                          \
204                 .groups = func##_groups,                                \
205                 .num_groups = ARRAY_SIZE(func##_groups),                \
206         }
207
208 int uniphier_pinctrl_probe(struct platform_device *pdev,
209                            struct uniphier_pinctrl_socdata *socdata);
210
211 #endif /* __PINCTRL_UNIPHIER_H__ */