2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
3 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #include "mt76x02_regs.h"
20 #include "mt76x02_mac.h"
21 #include "mt76x02_util.h"
23 enum mt76x02_cipher_type
24 mt76x02_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data)
26 memset(key_data, 0, 32);
28 return MT_CIPHER_NONE;
31 return MT_CIPHER_NONE;
33 memcpy(key_data, key->key, key->keylen);
35 switch (key->cipher) {
36 case WLAN_CIPHER_SUITE_WEP40:
37 return MT_CIPHER_WEP40;
38 case WLAN_CIPHER_SUITE_WEP104:
39 return MT_CIPHER_WEP104;
40 case WLAN_CIPHER_SUITE_TKIP:
41 return MT_CIPHER_TKIP;
42 case WLAN_CIPHER_SUITE_CCMP:
43 return MT_CIPHER_AES_CCMP;
45 return MT_CIPHER_NONE;
48 EXPORT_SYMBOL_GPL(mt76x02_mac_get_key_info);
50 int mt76x02_mac_shared_key_setup(struct mt76_dev *dev, u8 vif_idx, u8 key_idx,
51 struct ieee80211_key_conf *key)
53 enum mt76x02_cipher_type cipher;
57 cipher = mt76x02_mac_get_key_info(key, key_data);
58 if (cipher == MT_CIPHER_NONE && key)
61 val = __mt76_rr(dev, MT_SKEY_MODE(vif_idx));
62 val &= ~(MT_SKEY_MODE_MASK << MT_SKEY_MODE_SHIFT(vif_idx, key_idx));
63 val |= cipher << MT_SKEY_MODE_SHIFT(vif_idx, key_idx);
64 __mt76_wr(dev, MT_SKEY_MODE(vif_idx), val);
66 __mt76_wr_copy(dev, MT_SKEY(vif_idx, key_idx), key_data,
71 EXPORT_SYMBOL_GPL(mt76x02_mac_shared_key_setup);
73 int mt76x02_mac_wcid_set_key(struct mt76_dev *dev, u8 idx,
74 struct ieee80211_key_conf *key)
76 enum mt76x02_cipher_type cipher;
80 cipher = mt76x02_mac_get_key_info(key, key_data);
81 if (cipher == MT_CIPHER_NONE && key)
84 __mt76_wr_copy(dev, MT_WCID_KEY(idx), key_data, sizeof(key_data));
85 __mt76_rmw_field(dev, MT_WCID_ATTR(idx), MT_WCID_ATTR_PKEY_MODE, cipher);
87 memset(iv_data, 0, sizeof(iv_data));
89 __mt76_rmw_field(dev, MT_WCID_ATTR(idx), MT_WCID_ATTR_PAIRWISE,
90 !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
91 iv_data[3] = key->keyidx << 6;
92 if (cipher >= MT_CIPHER_TKIP)
96 __mt76_wr_copy(dev, MT_WCID_IV(idx), iv_data, sizeof(iv_data));
100 EXPORT_SYMBOL_GPL(mt76x02_mac_wcid_set_key);
102 void mt76x02_mac_wcid_setup(struct mt76_dev *dev, u8 idx, u8 vif_idx, u8 *mac)
104 struct mt76_wcid_addr addr = {};
107 attr = FIELD_PREP(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) |
108 FIELD_PREP(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8));
110 __mt76_wr(dev, MT_WCID_ATTR(idx), attr);
112 __mt76_wr(dev, MT_WCID_TX_RATE(idx), 0);
113 __mt76_wr(dev, MT_WCID_TX_RATE(idx) + 4, 0);
119 memcpy(addr.macaddr, mac, ETH_ALEN);
121 __mt76_wr_copy(dev, MT_WCID_ADDR(idx), &addr, sizeof(addr));
123 EXPORT_SYMBOL_GPL(mt76x02_mac_wcid_setup);
125 void mt76x02_mac_wcid_set_drop(struct mt76_dev *dev, u8 idx, bool drop)
127 u32 val = __mt76_rr(dev, MT_WCID_DROP(idx));
128 u32 bit = MT_WCID_DROP_MASK(idx);
130 /* prevent unnecessary writes */
131 if ((val & bit) != (bit * drop))
132 __mt76_wr(dev, MT_WCID_DROP(idx), (val & ~bit) | (bit * drop));
134 EXPORT_SYMBOL_GPL(mt76x02_mac_wcid_set_drop);
136 void mt76x02_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq)
138 struct mt76_txq *mtxq;
143 mtxq = (struct mt76_txq *) txq->drv_priv;
145 struct mt76x02_sta *sta;
147 sta = (struct mt76x02_sta *) txq->sta->drv_priv;
148 mtxq->wcid = &sta->wcid;
150 struct mt76x02_vif *mvif;
152 mvif = (struct mt76x02_vif *) txq->vif->drv_priv;
153 mtxq->wcid = &mvif->group_wcid;
156 mt76_txq_init(dev, txq);
158 EXPORT_SYMBOL_GPL(mt76x02_txq_init);
160 void mt76x02_mac_fill_txwi(struct mt76x02_txwi *txwi, struct sk_buff *skb,
161 struct ieee80211_sta *sta, int len, u8 nss)
163 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
164 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
167 if (info->flags & IEEE80211_TX_CTL_LDPC)
168 txwi->rate |= cpu_to_le16(MT_RXWI_RATE_LDPC);
169 if ((info->flags & IEEE80211_TX_CTL_STBC) && nss == 1)
170 txwi->rate |= cpu_to_le16(MT_RXWI_RATE_STBC);
171 if (nss > 1 && sta && sta->smps_mode == IEEE80211_SMPS_DYNAMIC)
172 txwi_flags |= MT_TXWI_FLAGS_MMPS;
173 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
174 txwi->ack_ctl |= MT_TXWI_ACK_CTL_REQ;
175 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
176 txwi->ack_ctl |= MT_TXWI_ACK_CTL_NSEQ;
177 if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
178 txwi->pktid |= MT_TXWI_PKTID_PROBE;
179 if ((info->flags & IEEE80211_TX_CTL_AMPDU) && sta) {
180 u8 ba_size = IEEE80211_MIN_AMPDU_BUF;
182 ba_size <<= sta->ht_cap.ampdu_factor;
183 ba_size = min_t(int, 63, ba_size - 1);
184 if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
186 txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size);
188 txwi_flags |= MT_TXWI_FLAGS_AMPDU |
189 FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY,
190 sta->ht_cap.ampdu_density);
193 if (ieee80211_is_probe_resp(hdr->frame_control) ||
194 ieee80211_is_beacon(hdr->frame_control))
195 txwi_flags |= MT_TXWI_FLAGS_TS;
197 txwi->flags |= cpu_to_le16(txwi_flags);
198 txwi->len_ctl = cpu_to_le16(len);
200 EXPORT_SYMBOL_GPL(mt76x02_mac_fill_txwi);
203 mt76x02_mac_tx_rate_val(struct mt76_dev *dev,
204 const struct ieee80211_tx_rate *rate, u8 *nss_val)
211 if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
212 rate_idx = rate->idx;
213 nss = 1 + (rate->idx >> 4);
214 phy = MT_PHY_TYPE_VHT;
215 if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH)
217 else if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
219 } else if (rate->flags & IEEE80211_TX_RC_MCS) {
220 rate_idx = rate->idx;
221 nss = 1 + (rate->idx >> 3);
222 phy = MT_PHY_TYPE_HT;
223 if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD)
224 phy = MT_PHY_TYPE_HT_GF;
225 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
228 const struct ieee80211_rate *r;
229 int band = dev->chandef.chan->band;
232 r = &dev->hw->wiphy->bands[band]->bitrates[rate->idx];
233 if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
234 val = r->hw_value_short;
239 rate_idx = val & 0xff;
243 rateval = FIELD_PREP(MT_RXWI_RATE_INDEX, rate_idx);
244 rateval |= FIELD_PREP(MT_RXWI_RATE_PHY, phy);
245 rateval |= FIELD_PREP(MT_RXWI_RATE_BW, bw);
246 if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
247 rateval |= MT_RXWI_RATE_SGI;
250 return cpu_to_le16(rateval);
252 EXPORT_SYMBOL_GPL(mt76x02_mac_tx_rate_val);
254 void mt76x02_mac_wcid_set_rate(struct mt76_dev *dev, struct mt76_wcid *wcid,
255 const struct ieee80211_tx_rate *rate)
257 spin_lock_bh(&dev->lock);
258 wcid->tx_rate = mt76x02_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss);
259 wcid->tx_rate_set = true;
260 spin_unlock_bh(&dev->lock);
263 bool mt76x02_mac_load_tx_status(struct mt76_dev *dev,
264 struct mt76x02_tx_status *stat)
268 stat2 = __mt76_rr(dev, MT_TX_STAT_FIFO_EXT);
269 stat1 = __mt76_rr(dev, MT_TX_STAT_FIFO);
271 stat->valid = !!(stat1 & MT_TX_STAT_FIFO_VALID);
275 stat->success = !!(stat1 & MT_TX_STAT_FIFO_SUCCESS);
276 stat->aggr = !!(stat1 & MT_TX_STAT_FIFO_AGGR);
277 stat->ack_req = !!(stat1 & MT_TX_STAT_FIFO_ACKREQ);
278 stat->wcid = FIELD_GET(MT_TX_STAT_FIFO_WCID, stat1);
279 stat->rate = FIELD_GET(MT_TX_STAT_FIFO_RATE, stat1);
281 stat->retry = FIELD_GET(MT_TX_STAT_FIFO_EXT_RETRY, stat2);
282 stat->pktid = FIELD_GET(MT_TX_STAT_FIFO_EXT_PKTID, stat2);
286 EXPORT_SYMBOL_GPL(mt76x02_mac_load_tx_status);
289 mt76x02_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate,
290 enum nl80211_band band)
292 u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
298 switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) {
299 case MT_PHY_TYPE_OFDM:
300 if (band == NL80211_BAND_2GHZ)
305 case MT_PHY_TYPE_CCK:
311 case MT_PHY_TYPE_HT_GF:
312 txrate->flags |= IEEE80211_TX_RC_GREEN_FIELD;
315 txrate->flags |= IEEE80211_TX_RC_MCS;
318 case MT_PHY_TYPE_VHT:
319 txrate->flags |= IEEE80211_TX_RC_VHT_MCS;
326 switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) {
330 txrate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
333 txrate->flags |= IEEE80211_TX_RC_80_MHZ_WIDTH;
339 if (rate & MT_RXWI_RATE_SGI)
340 txrate->flags |= IEEE80211_TX_RC_SHORT_GI;
345 void mt76x02_mac_write_txwi(struct mt76_dev *dev, struct mt76x02_txwi *txwi,
346 struct sk_buff *skb, struct mt76_wcid *wcid,
347 struct ieee80211_sta *sta, int len)
349 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
350 struct ieee80211_tx_rate *rate = &info->control.rates[0];
351 struct ieee80211_key_conf *key = info->control.hw_key;
352 u16 rate_ht_mask = FIELD_PREP(MT_RXWI_RATE_PHY, BIT(1) | BIT(2));
354 s8 txpwr_adj, max_txpwr_adj;
355 u8 ccmp_pn[8], nstreams = dev->chainmask & 0xf;
357 memset(txwi, 0, sizeof(*txwi));
360 txwi->wcid = wcid->idx;
366 if (wcid && wcid->sw_iv && key) {
367 u64 pn = atomic64_inc_return(&key->tx_pn);
369 ccmp_pn[1] = pn >> 8;
371 ccmp_pn[3] = 0x20 | (key->keyidx << 6);
372 ccmp_pn[4] = pn >> 16;
373 ccmp_pn[5] = pn >> 24;
374 ccmp_pn[6] = pn >> 32;
375 ccmp_pn[7] = pn >> 40;
376 txwi->iv = *((__le32 *)&ccmp_pn[0]);
377 txwi->eiv = *((__le32 *)&ccmp_pn[1]);
380 spin_lock_bh(&dev->lock);
381 if (wcid && (rate->idx < 0 || !rate->count)) {
382 txwi->rate = wcid->tx_rate;
383 max_txpwr_adj = wcid->max_txpwr_adj;
384 nss = wcid->tx_rate_nss;
386 txwi->rate = mt76x02_mac_tx_rate_val(dev, rate, &nss);
387 max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate);
389 spin_unlock_bh(&dev->lock);
391 if (dev->drv->get_tx_txpwr_adj) {
392 txpwr_adj = dev->drv->get_tx_txpwr_adj(dev, dev->txpower_conf,
394 txwi->ctl2 = FIELD_PREP(MT_TX_PWR_ADJ, txpwr_adj);
397 if (nstreams > 1 && mt76_rev(dev) >= MT76XX_REV_E4)
398 txwi->txstream = 0x13;
399 else if (nstreams > 1 && mt76_rev(dev) >= MT76XX_REV_E3 &&
400 !(txwi->rate & cpu_to_le16(rate_ht_mask)))
401 txwi->txstream = 0x93;
403 mt76x02_mac_fill_txwi(txwi, skb, sta, len, nss);
405 EXPORT_SYMBOL_GPL(mt76x02_mac_write_txwi);
408 mt76x02_mac_fill_tx_status(struct mt76_dev *dev,
409 struct ieee80211_tx_info *info,
410 struct mt76x02_tx_status *st, int n_frames)
412 struct ieee80211_tx_rate *rate = info->status.rates;
413 int cur_idx, last_rate;
419 last_rate = min_t(int, st->retry, IEEE80211_TX_MAX_RATES - 1);
420 mt76x02_mac_process_tx_rate(&rate[last_rate], st->rate,
421 dev->chandef.chan->band);
422 if (last_rate < IEEE80211_TX_MAX_RATES - 1)
423 rate[last_rate + 1].idx = -1;
425 cur_idx = rate[last_rate].idx + last_rate;
426 for (i = 0; i <= last_rate; i++) {
427 rate[i].flags = rate[last_rate].flags;
428 rate[i].idx = max_t(int, 0, cur_idx - i);
431 rate[last_rate].count = st->retry + 1 - last_rate;
433 info->status.ampdu_len = n_frames;
434 info->status.ampdu_ack_len = st->success ? n_frames : 0;
436 if (st->pktid & MT_TXWI_PKTID_PROBE)
437 info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE;
440 info->flags |= IEEE80211_TX_CTL_AMPDU |
441 IEEE80211_TX_STAT_AMPDU;
444 info->flags |= IEEE80211_TX_CTL_NO_ACK;
445 else if (st->success)
446 info->flags |= IEEE80211_TX_STAT_ACK;
449 void mt76x02_send_tx_status(struct mt76_dev *dev,
450 struct mt76x02_tx_status *stat, u8 *update)
452 struct ieee80211_tx_info info = {};
453 struct ieee80211_sta *sta = NULL;
454 struct mt76_wcid *wcid = NULL;
455 struct mt76x02_sta *msta = NULL;
458 if (stat->wcid < ARRAY_SIZE(dev->wcid))
459 wcid = rcu_dereference(dev->wcid[stat->wcid]);
464 priv = msta = container_of(wcid, struct mt76x02_sta, wcid);
465 sta = container_of(priv, struct ieee80211_sta,
469 if (msta && stat->aggr) {
470 u32 stat_val, stat_cache;
472 stat_val = stat->rate;
473 stat_val |= ((u32) stat->retry) << 16;
474 stat_cache = msta->status.rate;
475 stat_cache |= ((u32) msta->status.retry) << 16;
477 if (*update == 0 && stat_val == stat_cache &&
478 stat->wcid == msta->status.wcid && msta->n_frames < 32) {
483 mt76x02_mac_fill_tx_status(dev, &info, &msta->status,
486 msta->status = *stat;
490 mt76x02_mac_fill_tx_status(dev, &info, stat, 1);
494 ieee80211_tx_status_noskb(dev->hw, sta, &info);
499 EXPORT_SYMBOL_GPL(mt76x02_send_tx_status);
502 mt76x02_mac_process_rate(struct mt76_rx_status *status, u16 rate)
504 u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
506 switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) {
507 case MT_PHY_TYPE_OFDM:
511 if (status->band == NL80211_BAND_2GHZ)
514 status->rate_idx = idx;
516 case MT_PHY_TYPE_CCK:
519 status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
525 status->rate_idx = idx;
527 case MT_PHY_TYPE_HT_GF:
528 status->enc_flags |= RX_ENC_FLAG_HT_GF;
531 status->encoding = RX_ENC_HT;
532 status->rate_idx = idx;
534 case MT_PHY_TYPE_VHT:
535 status->encoding = RX_ENC_VHT;
536 status->rate_idx = FIELD_GET(MT_RATE_INDEX_VHT_IDX, idx);
537 status->nss = FIELD_GET(MT_RATE_INDEX_VHT_NSS, idx) + 1;
543 if (rate & MT_RXWI_RATE_LDPC)
544 status->enc_flags |= RX_ENC_FLAG_LDPC;
546 if (rate & MT_RXWI_RATE_SGI)
547 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
549 if (rate & MT_RXWI_RATE_STBC)
550 status->enc_flags |= 1 << RX_ENC_FLAG_STBC_SHIFT;
552 switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) {
556 status->bw = RATE_INFO_BW_40;
559 status->bw = RATE_INFO_BW_80;
567 EXPORT_SYMBOL_GPL(mt76x02_mac_process_rate);
569 void mt76x02_mac_setaddr(struct mt76_dev *dev, u8 *addr)
571 ether_addr_copy(dev->macaddr, addr);
573 if (!is_valid_ether_addr(dev->macaddr)) {
574 eth_random_addr(dev->macaddr);
576 "Invalid MAC address, using random address %pM\n",
580 __mt76_wr(dev, MT_MAC_ADDR_DW0, get_unaligned_le32(dev->macaddr));
581 __mt76_wr(dev, MT_MAC_ADDR_DW1,
582 get_unaligned_le16(dev->macaddr + 4) |
583 FIELD_PREP(MT_MAC_ADDR_DW1_U2ME_MASK, 0xff));
585 EXPORT_SYMBOL_GPL(mt76x02_mac_setaddr);