2 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
3 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
4 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
18 #include <linux/etherdevice.h>
21 mt76_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate,
22 enum nl80211_band band)
24 u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
30 switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) {
31 case MT_PHY_TYPE_OFDM:
32 if (band == NL80211_BAND_2GHZ)
43 case MT_PHY_TYPE_HT_GF:
44 txrate->flags |= IEEE80211_TX_RC_GREEN_FIELD;
47 txrate->flags |= IEEE80211_TX_RC_MCS;
51 txrate->flags |= IEEE80211_TX_RC_VHT_MCS;
59 switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) {
63 txrate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
66 txrate->flags |= IEEE80211_TX_RC_80_MHZ_WIDTH;
73 if (rate & MT_RXWI_RATE_SGI)
74 txrate->flags |= IEEE80211_TX_RC_SHORT_GI;
78 mt76_mac_fill_tx_status(struct mt76x0_dev *dev, struct ieee80211_tx_info *info,
79 struct mt76_tx_status *st, int n_frames)
81 struct ieee80211_tx_rate *rate = info->status.rates;
82 int cur_idx, last_rate;
88 last_rate = min_t(int, st->retry, IEEE80211_TX_MAX_RATES - 1);
89 mt76_mac_process_tx_rate(&rate[last_rate], st->rate,
90 dev->mt76.chandef.chan->band);
91 if (last_rate < IEEE80211_TX_MAX_RATES - 1)
92 rate[last_rate + 1].idx = -1;
94 cur_idx = rate[last_rate].idx + last_rate;
95 for (i = 0; i <= last_rate; i++) {
96 rate[i].flags = rate[last_rate].flags;
97 rate[i].idx = max_t(int, 0, cur_idx - i);
101 rate[last_rate - 1].count = st->retry + 1 - last_rate;
103 info->status.ampdu_len = n_frames;
104 info->status.ampdu_ack_len = st->success ? n_frames : 0;
106 if (st->pktid & MT_TXWI_PKTID_PROBE)
107 info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE;
110 info->flags |= IEEE80211_TX_CTL_AMPDU |
111 IEEE80211_TX_STAT_AMPDU;
114 info->flags |= IEEE80211_TX_CTL_NO_ACK;
115 else if (st->success)
116 info->flags |= IEEE80211_TX_STAT_ACK;
119 u16 mt76_mac_tx_rate_val(struct mt76x0_dev *dev,
120 const struct ieee80211_tx_rate *rate, u8 *nss_val)
127 if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
128 rate_idx = rate->idx;
129 nss = 1 + (rate->idx >> 4);
130 phy = MT_PHY_TYPE_VHT;
131 if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH)
133 else if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
135 } else if (rate->flags & IEEE80211_TX_RC_MCS) {
136 rate_idx = rate->idx;
137 nss = 1 + (rate->idx >> 3);
138 phy = MT_PHY_TYPE_HT;
139 if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD)
140 phy = MT_PHY_TYPE_HT_GF;
141 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
144 const struct ieee80211_rate *r;
145 int band = dev->mt76.chandef.chan->band;
148 r = &dev->mt76.hw->wiphy->bands[band]->bitrates[rate->idx];
149 if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
150 val = r->hw_value_short;
155 rate_idx = val & 0xff;
159 rateval = FIELD_PREP(MT_RXWI_RATE_INDEX, rate_idx);
160 rateval |= FIELD_PREP(MT_RXWI_RATE_PHY, phy);
161 rateval |= FIELD_PREP(MT_RXWI_RATE_BW, bw);
162 if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
163 rateval |= MT_RXWI_RATE_SGI;
166 return cpu_to_le16(rateval);
169 void mt76_mac_wcid_set_rate(struct mt76x0_dev *dev, struct mt76_wcid *wcid,
170 const struct ieee80211_tx_rate *rate)
174 spin_lock_irqsave(&dev->mt76.lock, flags);
175 wcid->tx_rate = mt76_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss);
176 wcid->tx_rate_set = true;
177 spin_unlock_irqrestore(&dev->mt76.lock, flags);
180 struct mt76_tx_status mt76x0_mac_fetch_tx_status(struct mt76x0_dev *dev)
182 struct mt76_tx_status stat = {};
185 stat2 = mt76_rr(dev, MT_TX_STAT_FIFO_EXT);
186 stat1 = mt76_rr(dev, MT_TX_STAT_FIFO);
188 stat.valid = !!(stat1 & MT_TX_STAT_FIFO_VALID);
189 stat.success = !!(stat1 & MT_TX_STAT_FIFO_SUCCESS);
190 stat.aggr = !!(stat1 & MT_TX_STAT_FIFO_AGGR);
191 stat.ack_req = !!(stat1 & MT_TX_STAT_FIFO_ACKREQ);
192 stat.wcid = FIELD_GET(MT_TX_STAT_FIFO_WCID, stat1);
193 stat.rate = FIELD_GET(MT_TX_STAT_FIFO_RATE, stat1);
195 stat.retry = FIELD_GET(MT_TX_STAT_FIFO_EXT_RETRY, stat2);
196 stat.pktid = FIELD_GET(MT_TX_STAT_FIFO_EXT_PKTID, stat2);
201 void mt76_send_tx_status(struct mt76x0_dev *dev, struct mt76_tx_status *stat, u8 *update)
203 struct ieee80211_tx_info info = {};
204 struct ieee80211_sta *sta = NULL;
205 struct mt76_wcid *wcid = NULL;
206 struct mt76_sta *msta = NULL;
209 if (stat->wcid < ARRAY_SIZE(dev->wcid))
210 wcid = rcu_dereference(dev->wcid[stat->wcid]);
214 priv = msta = container_of(wcid, struct mt76_sta, wcid);
215 sta = container_of(priv, struct ieee80211_sta, drv_priv);
218 if (msta && stat->aggr) {
219 u32 stat_val, stat_cache;
221 stat_val = stat->rate;
222 stat_val |= ((u32) stat->retry) << 16;
223 stat_cache = msta->status.rate;
224 stat_cache |= ((u32) msta->status.retry) << 16;
226 if (*update == 0 && stat_val == stat_cache &&
227 stat->wcid == msta->status.wcid && msta->n_frames < 32) {
232 mt76_mac_fill_tx_status(dev, &info, &msta->status,
234 msta->status = *stat;
238 mt76_mac_fill_tx_status(dev, &info, stat, 1);
242 spin_lock_bh(&dev->mac_lock);
243 ieee80211_tx_status_noskb(dev->mt76.hw, sta, &info);
244 spin_unlock_bh(&dev->mac_lock);
249 void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot,
252 int mode = ht_mode & IEEE80211_HT_OP_MODE_PROTECTION;
253 bool non_gf = !!(ht_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
258 prot[0] = MT_PROT_NAV_SHORT |
259 MT_PROT_TXOP_ALLOW_ALL |
263 prot[1] |= MT_PROT_CTRL_CTS2SELF;
265 prot[2] = prot[4] = MT_PROT_NAV_SHORT | MT_PROT_TXOP_ALLOW_BW20;
266 prot[3] = prot[5] = MT_PROT_NAV_SHORT | MT_PROT_TXOP_ALLOW_ALL;
269 prot[2] |= MT_PROT_RATE_CCK_11;
270 prot[3] |= MT_PROT_RATE_CCK_11;
271 prot[4] |= MT_PROT_RATE_CCK_11;
272 prot[5] |= MT_PROT_RATE_CCK_11;
274 prot[2] |= MT_PROT_RATE_OFDM_24;
275 prot[3] |= MT_PROT_RATE_DUP_OFDM_24;
276 prot[4] |= MT_PROT_RATE_OFDM_24;
277 prot[5] |= MT_PROT_RATE_DUP_OFDM_24;
281 case IEEE80211_HT_OP_MODE_PROTECTION_NONE:
284 case IEEE80211_HT_OP_MODE_PROTECTION_NONMEMBER:
285 ht_rts[0] = ht_rts[1] = ht_rts[2] = ht_rts[3] = true;
288 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
289 ht_rts[1] = ht_rts[3] = true;
292 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
293 ht_rts[0] = ht_rts[1] = ht_rts[2] = ht_rts[3] = true;
298 ht_rts[2] = ht_rts[3] = true;
300 for (i = 0; i < 4; i++)
302 prot[i + 2] |= MT_PROT_CTRL_RTS_CTS;
304 for (i = 0; i < 6; i++)
305 mt76_wr(dev, MT_CCK_PROT_CFG + i * 4, prot[i]);
308 void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb)
311 mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
313 mt76_clear(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
316 void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval)
318 u32 val = mt76_rr(dev, MT_BEACON_TIME_CFG);
320 val &= ~(MT_BEACON_TIME_CFG_TIMER_EN |
321 MT_BEACON_TIME_CFG_SYNC_MODE |
322 MT_BEACON_TIME_CFG_TBTT_EN);
325 mt76_wr(dev, MT_BEACON_TIME_CFG, val);
329 val &= ~MT_BEACON_TIME_CFG_INTVAL;
330 val |= FIELD_PREP(MT_BEACON_TIME_CFG_INTVAL, interval << 4) |
331 MT_BEACON_TIME_CFG_TIMER_EN |
332 MT_BEACON_TIME_CFG_SYNC_MODE |
333 MT_BEACON_TIME_CFG_TBTT_EN;
336 static void mt76x0_check_mac_err(struct mt76x0_dev *dev)
338 u32 val = mt76_rr(dev, 0x10f4);
340 if (!(val & BIT(29)) || !(val & (BIT(7) | BIT(5))))
343 dev_err(dev->mt76.dev, "Error: MAC specific condition occurred\n");
345 mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
347 mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
349 void mt76x0_mac_work(struct work_struct *work)
351 struct mt76x0_dev *dev = container_of(work, struct mt76x0_dev,
358 { MT_RX_STA_CNT0, 3, dev->stats.rx_stat },
359 { MT_TX_STA_CNT0, 3, dev->stats.tx_stat },
360 { MT_TX_AGG_STAT, 1, dev->stats.aggr_stat },
361 { MT_MPDU_DENSITY_CNT, 1, dev->stats.zero_len_del },
362 { MT_TX_AGG_CNT_BASE0, 8, &dev->stats.aggr_n[0] },
363 { MT_TX_AGG_CNT_BASE1, 8, &dev->stats.aggr_n[16] },
368 /* Note: using MCU_RANDOM_READ is actually slower then reading all the
369 * registers by hand. MCU takes ca. 20ms to complete read of 24
370 * registers while reading them one by one will takes roughly
377 for (i = 0; i < ARRAY_SIZE(spans); i++)
378 for (j = 0; j < spans[i].span; j++) {
379 u32 val = mt76_rr(dev, spans[i].addr_base + j * 4);
381 spans[i].stat_base[j * 2] += val & 0xffff;
382 spans[i].stat_base[j * 2 + 1] += val >> 16;
384 /* Calculate average AMPDU length */
385 if (spans[i].addr_base != MT_TX_AGG_CNT_BASE0 &&
386 spans[i].addr_base != MT_TX_AGG_CNT_BASE1)
389 n += (val >> 16) + (val & 0xffff);
390 sum += (val & 0xffff) * (1 + k * 2) +
391 (val >> 16) * (2 + k * 2);
395 atomic_set(&dev->avg_ampdu_len, n ? DIV_ROUND_CLOSEST(sum, n) : 1);
397 mt76x0_check_mac_err(dev);
399 ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mac_work, 10 * HZ);
403 mt76x0_mac_wcid_setup(struct mt76x0_dev *dev, u8 idx, u8 vif_idx, u8 *mac)
405 u8 zmac[ETH_ALEN] = {};
408 attr = FIELD_PREP(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) |
409 FIELD_PREP(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8));
411 mt76_wr(dev, MT_WCID_ATTR(idx), attr);
414 memcpy(zmac, mac, sizeof(zmac));
416 mt76x0_addr_wr(dev, MT_WCID_ADDR(idx), zmac);
419 void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev)
421 struct ieee80211_sta *sta;
422 struct mt76_wcid *wcid;
430 for (i = 0; i < ARRAY_SIZE(dev->wcid); i++) {
431 wcid = rcu_dereference(dev->wcid[i]);
435 msta = container_of(wcid, struct mt76_sta, wcid);
436 sta = container_of(msta, struct ieee80211_sta, drv_priv);
438 min_factor = min(min_factor, sta->ht_cap.ampdu_factor);
442 mt76_wr(dev, MT_MAX_LEN_CFG, 0xa0fff |
443 FIELD_PREP(MT_MAX_LEN_CFG_AMPDU, min_factor));
447 mt76_mac_process_rate(struct ieee80211_rx_status *status, u16 rate)
449 u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
451 switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) {
452 case MT_PHY_TYPE_OFDM:
456 if (status->band == NL80211_BAND_2GHZ)
459 status->rate_idx = idx;
461 case MT_PHY_TYPE_CCK:
464 status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
470 status->rate_idx = idx;
472 case MT_PHY_TYPE_HT_GF:
473 status->enc_flags |= RX_ENC_FLAG_HT_GF;
476 status->encoding = RX_ENC_HT;
477 status->rate_idx = idx;
479 case MT_PHY_TYPE_VHT:
480 status->encoding = RX_ENC_VHT;
481 status->rate_idx = FIELD_GET(MT_RATE_INDEX_VHT_IDX, idx);
482 status->nss = FIELD_GET(MT_RATE_INDEX_VHT_NSS, idx) + 1;
489 if (rate & MT_RXWI_RATE_LDPC)
490 status->enc_flags |= RX_ENC_FLAG_LDPC;
492 if (rate & MT_RXWI_RATE_SGI)
493 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
495 if (rate & MT_RXWI_RATE_STBC)
496 status->enc_flags |= 1 << RX_ENC_FLAG_STBC_SHIFT;
498 switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) {
502 status->bw = RATE_INFO_BW_40;
505 status->bw = RATE_INFO_BW_80;
514 mt76x0_rx_monitor_beacon(struct mt76x0_dev *dev, struct mt76x0_rxwi *rxwi,
517 dev->bcn_phy_mode = FIELD_GET(MT_RXWI_RATE_PHY, rate);
518 dev->avg_rssi = ((dev->avg_rssi * 15) / 16 + (rssi << 8)) / 256;
522 mt76x0_rx_is_our_beacon(struct mt76x0_dev *dev, u8 *data)
524 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)data;
526 return ieee80211_is_beacon(hdr->frame_control) &&
527 ether_addr_equal(hdr->addr2, dev->ap_bssid);
530 u32 mt76_mac_process_rx(struct mt76x0_dev *dev, struct sk_buff *skb,
533 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
534 struct mt76x0_rxwi *rxwi = rxi;
535 u32 len, ctl = le32_to_cpu(rxwi->ctl);
536 u16 rate = le16_to_cpu(rxwi->rate);
539 len = FIELD_GET(MT_RXWI_CTL_MPDU_LEN, ctl);
540 if (WARN_ON(len < 10))
543 if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_DECRYPT)) {
544 status->flag |= RX_FLAG_DECRYPTED;
545 status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED;
548 status->chains = BIT(0);
549 rssi = mt76x0_phy_get_rssi(dev, rxwi);
550 status->chain_signal[0] = status->signal = rssi;
551 status->freq = dev->mt76.chandef.chan->center_freq;
552 status->band = dev->mt76.chandef.chan->band;
554 mt76_mac_process_rate(status, rate);
556 spin_lock_bh(&dev->con_mon_lock);
557 if (mt76x0_rx_is_our_beacon(dev, data)) {
558 mt76x0_rx_monitor_beacon(dev, rxwi, rate, rssi);
559 } else if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_U2M)) {
560 if (dev->avg_rssi == 0)
561 dev->avg_rssi = rssi;
563 dev->avg_rssi = (dev->avg_rssi * 15) / 16 + rssi / 16;
566 spin_unlock_bh(&dev->con_mon_lock);
571 static enum mt76_cipher_type
572 mt76_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data)
574 memset(key_data, 0, 32);
576 return MT_CIPHER_NONE;
578 if (key->keylen > 32)
579 return MT_CIPHER_NONE;
581 memcpy(key_data, key->key, key->keylen);
583 switch (key->cipher) {
584 case WLAN_CIPHER_SUITE_WEP40:
585 return MT_CIPHER_WEP40;
586 case WLAN_CIPHER_SUITE_WEP104:
587 return MT_CIPHER_WEP104;
588 case WLAN_CIPHER_SUITE_TKIP:
589 return MT_CIPHER_TKIP;
590 case WLAN_CIPHER_SUITE_CCMP:
591 return MT_CIPHER_AES_CCMP;
593 return MT_CIPHER_NONE;
597 int mt76_mac_wcid_set_key(struct mt76x0_dev *dev, u8 idx,
598 struct ieee80211_key_conf *key)
600 enum mt76_cipher_type cipher;
605 cipher = mt76_mac_get_key_info(key, key_data);
606 if (cipher == MT_CIPHER_NONE && key)
609 trace_set_key(&dev->mt76, idx);
611 mt76_wr_copy(dev, MT_WCID_KEY(idx), key_data, sizeof(key_data));
613 memset(iv_data, 0, sizeof(iv_data));
615 iv_data[3] = key->keyidx << 6;
616 if (cipher >= MT_CIPHER_TKIP) {
617 /* Note: start with 1 to comply with spec,
618 * (see comment on common/cmm_wpa.c:4291).
624 mt76_wr_copy(dev, MT_WCID_IV(idx), iv_data, sizeof(iv_data));
626 val = mt76_rr(dev, MT_WCID_ATTR(idx));
627 val &= ~MT_WCID_ATTR_PKEY_MODE & ~MT_WCID_ATTR_PKEY_MODE_EXT;
628 val |= FIELD_PREP(MT_WCID_ATTR_PKEY_MODE, cipher & 7) |
629 FIELD_PREP(MT_WCID_ATTR_PKEY_MODE_EXT, cipher >> 3);
630 val &= ~MT_WCID_ATTR_PAIRWISE;
631 val |= MT_WCID_ATTR_PAIRWISE *
632 !!(key && key->flags & IEEE80211_KEY_FLAG_PAIRWISE);
633 mt76_wr(dev, MT_WCID_ATTR(idx), val);
638 int mt76_mac_shared_key_setup(struct mt76x0_dev *dev, u8 vif_idx, u8 key_idx,
639 struct ieee80211_key_conf *key)
641 enum mt76_cipher_type cipher;
645 cipher = mt76_mac_get_key_info(key, key_data);
646 if (cipher == MT_CIPHER_NONE && key)
649 trace_set_shared_key(&dev->mt76, vif_idx, key_idx);
651 mt76_wr_copy(dev, MT_SKEY(vif_idx, key_idx),
652 key_data, sizeof(key_data));
654 val = mt76_rr(dev, MT_SKEY_MODE(vif_idx));
655 val &= ~(MT_SKEY_MODE_MASK << MT_SKEY_MODE_SHIFT(vif_idx, key_idx));
656 val |= cipher << MT_SKEY_MODE_SHIFT(vif_idx, key_idx);
657 mt76_wr(dev, MT_SKEY_MODE(vif_idx), val);