drivers/net/wireless/iwlwifi/iwl-eeprom.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22  * USA
  23  *
  24  * The full GNU General Public License is included in this distribution
  25  * in the file called LICENSE.GPL.
  26  *
  27  * Contact Information:
  28  *  Intel Linux Wireless <ilw@linux.intel.com>
  29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30  *
  31  * BSD LICENSE
  32  *
  33  * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
  34  * All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  *
  40  *  * Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  *  * Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in
  44  *    the documentation and/or other materials provided with the
  45  *    distribution.
  46  *  * Neither the name Intel Corporation nor the names of its
  47  *    contributors may be used to endorse or promote products derived
  48  *    from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  *****************************************************************************/
  62
  63
  64 #include <linux/kernel.h>
  65 #include <linux/module.h>
  66 #include <linux/init.h>
  67
  68 #include <net/mac80211.h>
  69
  70 #include "iwl-commands.h"
  71 #include "iwl-dev.h"
  72 #include "iwl-core.h"
  73 #include "iwl-debug.h"
  74 #include "iwl-eeprom.h"
  75 #include "iwl-io.h"
  76
  77 /************************** EEPROM BANDS ****************************
  78  *
  79  * The iwl_eeprom_band definitions below provide the mapping from the
  80  * EEPROM contents to the specific channel number supported for each
  81  * band.
  82  *
  83  * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  84  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  85  * The specific geography and calibration information for that channel
  86  * is contained in the eeprom map itself.
  87  *
  88  * During init, we copy the eeprom information and channel map
  89  * information into priv->channel_info_24/52 and priv->channel_map_24/52
  90  *
  91  * channel_map_24/52 provides the index in the channel_info array for a
  92  * given channel.  We have to have two separate maps as there is channel
  93  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  94  * band_2
  95  *
  96  * A value of 0xff stored in the channel_map indicates that the channel
  97  * is not supported by the hardware at all.
  98  *
  99  * A value of 0xfe in the channel_map indicates that the channel is not
 100  * valid for Tx with the current hardware.  This means that
 101  * while the system can tune and receive on a given channel, it may not
 102  * be able to associate or transmit any frames on that
 103  * channel.  There is no corresponding channel information for that
 104  * entry.
 105  *
 106  *********************************************************************/
 107
 108 /* 2.4 GHz */
 109 const u8 iwl_eeprom_band_1[14] = {
 110         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 111 };
 112
 113 /* 5.2 GHz bands */
 114 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
 115         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
 116 };
 117
 118 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
 119         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 120 };
 121
 122 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
 123         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 124 };
 125
 126 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
 127         145, 149, 153, 157, 161, 165
 128 };
 129
 130 static const u8 iwl_eeprom_band_6[] = {       /* 2.4 ht40 channel */
 131         1, 2, 3, 4, 5, 6, 7
 132 };
 133
 134 static const u8 iwl_eeprom_band_7[] = {       /* 5.2 ht40 channel */
 135         36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
 136 };
 137
 138 /**
 139  * struct iwl_txpwr_section: eeprom section information
 140  * @offset: indirect address into eeprom image
 141  * @count: number of "struct iwl_eeprom_enhanced_txpwr" in this section
 142  * @band: band type for the section
 143  * @is_common - true: common section, false: channel section
 144  * @is_cck - true: cck section, false: not cck section
 145  * @is_ht_40 - true: all channel in the section are HT40 channel,
 146  *             false: legacy or HT 20 MHz
 147  *             ignore if it is common section
 148  * @iwl_eeprom_section_channel: channel array in the section,
 149  *             ignore if common section
 150  */
 151 struct iwl_txpwr_section {
 152         u32 offset;
 153         u8 count;
 154         enum ieee80211_band band;
 155         bool is_common;
 156         bool is_cck;
 157         bool is_ht40;
 158         u8 iwl_eeprom_section_channel[EEPROM_MAX_TXPOWER_SECTION_ELEMENTS];
 159 };
 160
 161 /**
 162  * section 1 - 3 are regulatory tx power apply to all channels based on
 163  *    modulation: CCK, OFDM
 164  *    Band: 2.4GHz, 5.2GHz
 165  * section 4 - 10 are regulatory tx power apply to specified channels
 166  *    For example:
 167  *      1L - Channel 1 Legacy
 168  *      1HT - Channel 1 HT
 169  *      (1,+1) - Channel 1 HT40 "_above_"
 170  *
 171  * Section 1: all CCK channels
 172  * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40) channels
 173  * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
 174  * Section 4: 2.4 GHz 20MHz channels: 1L, 1HT, 2L, 2HT, 10L, 10HT, 11L, 11HT
 175  * Section 5: 2.4 GHz 40MHz channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1)
 176  * Section 6: 5.2 GHz 20MHz channels: 36L, 64L, 100L, 36HT, 64HT, 100HT
 177  * Section 7: 5.2 GHz 40MHz channels: (36,+1) (60,+1) (100,+1)
 178  * Section 8: 2.4 GHz channel: 13L, 13HT
 179  * Section 9: 2.4 GHz channel: 140L, 140HT
 180  * Section 10: 2.4 GHz 40MHz channels: (132,+1)  (44,+1)
 181  *
 182  */
 183 static const struct iwl_txpwr_section enhinfo[] = {
 184         { EEPROM_LB_CCK_20_COMMON, 1, IEEE80211_BAND_2GHZ, true, true, false },
 185         { EEPROM_LB_OFDM_COMMON, 3, IEEE80211_BAND_2GHZ, true, false, false },
 186         { EEPROM_HB_OFDM_COMMON, 3, IEEE80211_BAND_5GHZ, true, false, false },
 187         { EEPROM_LB_OFDM_20_BAND, 8, IEEE80211_BAND_2GHZ,
 188                 false, false, false,
 189                 {1, 1, 2, 2, 10, 10, 11, 11 } },
 190         { EEPROM_LB_OFDM_HT40_BAND, 5, IEEE80211_BAND_2GHZ,
 191                 false, false, true,
 192                 { 1, 2, 6, 7, 9 } },
 193         { EEPROM_HB_OFDM_20_BAND, 6, IEEE80211_BAND_5GHZ,
 194                 false, false, false,
 195                 { 36, 64, 100, 36, 64, 100 } },
 196         { EEPROM_HB_OFDM_HT40_BAND, 3, IEEE80211_BAND_5GHZ,
 197                 false, false, true,
 198                 { 36, 60, 100 } },
 199         { EEPROM_LB_OFDM_20_CHANNEL_13, 2, IEEE80211_BAND_2GHZ,
 200                 false, false, false,
 201                 { 13, 13 } },
 202         { EEPROM_HB_OFDM_20_CHANNEL_140, 2, IEEE80211_BAND_5GHZ,
 203                 false, false, false,
 204                 { 140, 140 } },
 205         { EEPROM_HB_OFDM_HT40_BAND_1, 2, IEEE80211_BAND_5GHZ,
 206                 false, false, true,
 207                 { 132, 44 } },
 208 };
 209
 210 /******************************************************************************
 211  *
 212  * EEPROM related functions
 213  *
 214 ******************************************************************************/
 215
 216 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
 217 {
 218         u32 gp = iwl_read32(priv, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
 219         int ret = 0;
 220
 221         IWL_DEBUG_INFO(priv, "EEPROM signature=0x%08x\n", gp);
 222         switch (gp) {
 223         case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:
 224                 if (priv->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
 225                         IWL_ERR(priv, "EEPROM with bad signature: 0x%08x\n",
 226                                 gp);
 227                         ret = -ENOENT;
 228                 }
 229                 break;
 230         case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
 231         case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
 232                 if (priv->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {
 233                         IWL_ERR(priv, "OTP with bad signature: 0x%08x\n", gp);
 234                         ret = -ENOENT;
 235                 }
 236                 break;
 237         case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP:
 238         default:
 239                 IWL_ERR(priv, "bad EEPROM/OTP signature, type=%s, "
 240                         "EEPROM_GP=0x%08x\n",
 241                         (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 242                         ? "OTP" : "EEPROM", gp);
 243                 ret = -ENOENT;
 244                 break;
 245         }
 246         return ret;
 247 }
 248 EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
 249
 250 static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
 251 {
 252         u32 otpgp;
 253
 254         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 255         if (mode == IWL_OTP_ACCESS_ABSOLUTE)
 256                 iwl_clear_bit(priv, CSR_OTP_GP_REG,
 257                                 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 258         else
 259                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 260                                 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 261 }
 262
 263 static int iwlcore_get_nvm_type(struct iwl_priv *priv)
 264 {
 265         u32 otpgp;
 266         int nvm_type;
 267
 268         /* OTP only valid for CP/PP and after */
 269         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
 270         case CSR_HW_REV_TYPE_NONE:
 271                 IWL_ERR(priv, "Unknown hardware type\n");
 272                 return -ENOENT;
 273         case CSR_HW_REV_TYPE_3945:
 274         case CSR_HW_REV_TYPE_4965:
 275         case CSR_HW_REV_TYPE_5300:
 276         case CSR_HW_REV_TYPE_5350:
 277         case CSR_HW_REV_TYPE_5100:
 278         case CSR_HW_REV_TYPE_5150:
 279                 nvm_type = NVM_DEVICE_TYPE_EEPROM;
 280                 break;
 281         default:
 282                 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 283                 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
 284                         nvm_type = NVM_DEVICE_TYPE_OTP;
 285                 else
 286                         nvm_type = NVM_DEVICE_TYPE_EEPROM;
 287                 break;
 288         }
 289         return  nvm_type;
 290 }
 291
 292 /*
 293  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 294  * when accessing the EEPROM; each access is a series of pulses to/from the
 295  * EEPROM chip, not a single event, so even reads could conflict if they
 296  * weren't arbitrated by the semaphore.
 297  */
 298 int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
 299 {
 300         u16 count;
 301         int ret;
 302
 303         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 304                 /* Request semaphore */
 305                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 306                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 307
 308                 /* See if we got it */
 309                 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
 310                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 311                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 312                                 EEPROM_SEM_TIMEOUT);
 313                 if (ret >= 0) {
 314                         IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
 315                                 count+1);
 316                         return ret;
 317                 }
 318         }
 319
 320         return ret;
 321 }
 322 EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
 323
 324 void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
 325 {
 326         iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 327                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 328
 329 }
 330 EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
 331
 332 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 333 {
 334         BUG_ON(offset >= priv->cfg->eeprom_size);
 335         return &priv->eeprom[offset];
 336 }
 337 EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
 338
 339 static int iwl_init_otp_access(struct iwl_priv *priv)
 340 {
 341         int ret;
 342
 343         /* Enable 40MHz radio clock */
 344         _iwl_write32(priv, CSR_GP_CNTRL,
 345                      _iwl_read32(priv, CSR_GP_CNTRL) |
 346                      CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 347
 348         /* wait for clock to be ready */
 349         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 350                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 351                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 352                                   25000);
 353         if (ret < 0)
 354                 IWL_ERR(priv, "Time out access OTP\n");
 355         else {
 356                 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
 357                                   APMG_PS_CTRL_VAL_RESET_REQ);
 358                 udelay(5);
 359                 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
 360                                     APMG_PS_CTRL_VAL_RESET_REQ);
 361
 362                 /*
 363                  * CSR auto clock gate disable bit -
 364                  * this is only applicable for HW with OTP shadow RAM
 365                  */
 366                 if (priv->cfg->shadow_ram_support)
 367                         iwl_set_bit(priv, CSR_DBG_LINK_PWR_MGMT_REG,
 368                                 CSR_RESET_LINK_PWR_MGMT_DISABLED);
 369         }
 370         return ret;
 371 }
 372
 373 static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, __le16 *eeprom_data)
 374 {
 375         int ret = 0;
 376         u32 r;
 377         u32 otpgp;
 378
 379         _iwl_write32(priv, CSR_EEPROM_REG,
 380                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 381         ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
 382                                   CSR_EEPROM_REG_READ_VALID_MSK,
 383                                   CSR_EEPROM_REG_READ_VALID_MSK,
 384                                   IWL_EEPROM_ACCESS_TIMEOUT);
 385         if (ret < 0) {
 386                 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
 387                 return ret;
 388         }
 389         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 390         /* check for ECC errors: */
 391         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 392         if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
 393                 /* stop in this case */
 394                 /* set the uncorrectable OTP ECC bit for acknowledgement */
 395                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 396                         CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 397                 IWL_ERR(priv, "Uncorrectable OTP ECC error, abort OTP read\n");
 398                 return -EINVAL;
 399         }
 400         if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
 401                 /* continue in this case */
 402                 /* set the correctable OTP ECC bit for acknowledgement */
 403                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 404                                 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
 405                 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
 406         }
 407         *eeprom_data = cpu_to_le16(r >> 16);
 408         return 0;
 409 }
 410
 411 /*
 412  * iwl_is_otp_empty: check for empty OTP
 413  */
 414 static bool iwl_is_otp_empty(struct iwl_priv *priv)
 415 {
 416         u16 next_link_addr = 0;
 417         __le16 link_value;
 418         bool is_empty = false;
 419
 420         /* locate the beginning of OTP link list */
 421         if (!iwl_read_otp_word(priv, next_link_addr, &link_value)) {
 422                 if (!link_value) {
 423                         IWL_ERR(priv, "OTP is empty\n");
 424                         is_empty = true;
 425                 }
 426         } else {
 427                 IWL_ERR(priv, "Unable to read first block of OTP list.\n");
 428                 is_empty = true;
 429         }
 430
 431         return is_empty;
 432 }
 433
 434
 435 /*
 436  * iwl_find_otp_image: find EEPROM image in OTP
 437  *   finding the OTP block that contains the EEPROM image.
 438  *   the last valid block on the link list (the block _before_ the last block)
 439  *   is the block we should read and used to configure the device.
 440  *   If all the available OTP blocks are full, the last block will be the block
 441  *   we should read and used to configure the device.
 442  *   only perform this operation if shadow RAM is disabled
 443  */
 444 static int iwl_find_otp_image(struct iwl_priv *priv,
 445                                         u16 *validblockaddr)
 446 {
 447         u16 next_link_addr = 0, valid_addr;
 448         __le16 link_value = 0;
 449         int usedblocks = 0;
 450
 451         /* set addressing mode to absolute to traverse the link list */
 452         iwl_set_otp_access(priv, IWL_OTP_ACCESS_ABSOLUTE);
 453
 454         /* checking for empty OTP or error */
 455         if (iwl_is_otp_empty(priv))
 456                 return -EINVAL;
 457
 458         /*
 459          * start traverse link list
 460          * until reach the max number of OTP blocks
 461          * different devices have different number of OTP blocks
 462          */
 463         do {
 464                 /* save current valid block address
 465                  * check for more block on the link list
 466                  */
 467                 valid_addr = next_link_addr;
 468                 next_link_addr = le16_to_cpu(link_value) * sizeof(u16);
 469                 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
 470                                usedblocks, next_link_addr);
 471                 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
 472                         return -EINVAL;
 473                 if (!link_value) {
 474                         /*
 475                          * reach the end of link list, return success and
 476                          * set address point to the starting address
 477                          * of the image
 478                          */
 479                         *validblockaddr = valid_addr;
 480                         /* skip first 2 bytes (link list pointer) */
 481                         *validblockaddr += 2;
 482                         return 0;
 483                 }
 484                 /* more in the link list, continue */
 485                 usedblocks++;
 486         } while (usedblocks <= priv->cfg->max_ll_items);
 487
 488         /* OTP has no valid blocks */
 489         IWL_DEBUG_INFO(priv, "OTP has no valid blocks\n");
 490         return -EINVAL;
 491 }
 492
 493 /**
 494  * iwl_eeprom_init - read EEPROM contents
 495  *
 496  * Load the EEPROM contents from adapter into priv->eeprom
 497  *
 498  * NOTE:  This routine uses the non-debug IO access functions.
 499  */
 500 int iwl_eeprom_init(struct iwl_priv *priv)
 501 {
 502         __le16 *e;
 503         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
 504         int sz;
 505         int ret;
 506         u16 addr;
 507         u16 validblockaddr = 0;
 508         u16 cache_addr = 0;
 509
 510         priv->nvm_device_type = iwlcore_get_nvm_type(priv);
 511         if (priv->nvm_device_type == -ENOENT)
 512                 return -ENOENT;
 513         /* allocate eeprom */
 514         IWL_DEBUG_INFO(priv, "NVM size = %d\n", priv->cfg->eeprom_size);
 515         sz = priv->cfg->eeprom_size;
 516         priv->eeprom = kzalloc(sz, GFP_KERNEL);
 517         if (!priv->eeprom) {
 518                 ret = -ENOMEM;
 519                 goto alloc_err;
 520         }
 521         e = (__le16 *)priv->eeprom;
 522
 523         priv->cfg->ops->lib->apm_ops.init(priv);
 524
 525         ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
 526         if (ret < 0) {
 527                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 528                 ret = -ENOENT;
 529                 goto err;
 530         }
 531
 532         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
 533         ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
 534         if (ret < 0) {
 535                 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
 536                 ret = -ENOENT;
 537                 goto err;
 538         }
 539
 540         if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
 541
 542                 ret = iwl_init_otp_access(priv);
 543                 if (ret) {
 544                         IWL_ERR(priv, "Failed to initialize OTP access.\n");
 545                         ret = -ENOENT;
 546                         goto done;
 547                 }
 548                 _iwl_write32(priv, CSR_EEPROM_GP,
 549                              iwl_read32(priv, CSR_EEPROM_GP) &
 550                              ~CSR_EEPROM_GP_IF_OWNER_MSK);
 551
 552                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 553                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
 554                              CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 555                 /* traversing the linked list if no shadow ram supported */
 556                 if (!priv->cfg->shadow_ram_support) {
 557                         if (iwl_find_otp_image(priv, &validblockaddr)) {
 558                                 ret = -ENOENT;
 559                                 goto done;
 560                         }
 561                 }
 562                 for (addr = validblockaddr; addr < validblockaddr + sz;
 563                      addr += sizeof(u16)) {
 564                         __le16 eeprom_data;
 565
 566                         ret = iwl_read_otp_word(priv, addr, &eeprom_data);
 567                         if (ret)
 568                                 goto done;
 569                         e[cache_addr / 2] = eeprom_data;
 570                         cache_addr += sizeof(u16);
 571                 }
 572         } else {
 573                 /* eeprom is an array of 16bit values */
 574                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 575                         u32 r;
 576
 577                         _iwl_write32(priv, CSR_EEPROM_REG,
 578                                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 579
 580                         ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
 581                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 582                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 583                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 584                         if (ret < 0) {
 585                                 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
 586                                 goto done;
 587                         }
 588                         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 589                         e[addr / 2] = cpu_to_le16(r >> 16);
 590                 }
 591         }
 592         ret = 0;
 593 done:
 594         priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
 595 err:
 596         if (ret)
 597                 iwl_eeprom_free(priv);
 598         /* Reset chip to save power until we load uCode during "up". */
 599         priv->cfg->ops->lib->apm_ops.stop(priv);
 600 alloc_err:
 601         return ret;
 602 }
 603 EXPORT_SYMBOL(iwl_eeprom_init);
 604
 605 void iwl_eeprom_free(struct iwl_priv *priv)
 606 {
 607         kfree(priv->eeprom);
 608         priv->eeprom = NULL;
 609 }
 610 EXPORT_SYMBOL(iwl_eeprom_free);
 611
 612 int iwl_eeprom_check_version(struct iwl_priv *priv)
 613 {
 614         u16 eeprom_ver;
 615         u16 calib_ver;
 616
 617         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 618         calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
 619
 620         if (eeprom_ver < priv->cfg->eeprom_ver ||
 621             calib_ver < priv->cfg->eeprom_calib_ver)
 622                 goto err;
 623
 624         return 0;
 625 err:
 626         IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
 627                   eeprom_ver, priv->cfg->eeprom_ver,
 628                   calib_ver,  priv->cfg->eeprom_calib_ver);
 629         return -EINVAL;
 630
 631 }
 632 EXPORT_SYMBOL(iwl_eeprom_check_version);
 633
 634 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 635 {
 636         return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
 637 }
 638 EXPORT_SYMBOL(iwl_eeprom_query_addr);
 639
 640 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
 641 {
 642         if (!priv->eeprom)
 643                 return 0;
 644         return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
 645 }
 646 EXPORT_SYMBOL(iwl_eeprom_query16);
 647
 648 void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
 649 {
 650         const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
 651                                         EEPROM_MAC_ADDRESS);
 652         memcpy(mac, addr, ETH_ALEN);
 653 }
 654 EXPORT_SYMBOL(iwl_eeprom_get_mac);
 655
 656 static void iwl_init_band_reference(const struct iwl_priv *priv,
 657                         int eep_band, int *eeprom_ch_count,
 658                         const struct iwl_eeprom_channel **eeprom_ch_info,
 659                         const u8 **eeprom_ch_index)
 660 {
 661         u32 offset = priv->cfg->ops->lib->
 662                         eeprom_ops.regulatory_bands[eep_band - 1];
 663         switch (eep_band) {
 664         case 1:         /* 2.4GHz band */
 665                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
 666                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 667                                 iwl_eeprom_query_addr(priv, offset);
 668                 *eeprom_ch_index = iwl_eeprom_band_1;
 669                 break;
 670         case 2:         /* 4.9GHz band */
 671                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
 672                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 673                                 iwl_eeprom_query_addr(priv, offset);
 674                 *eeprom_ch_index = iwl_eeprom_band_2;
 675                 break;
 676         case 3:         /* 5.2GHz band */
 677                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
 678                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 679                                 iwl_eeprom_query_addr(priv, offset);
 680                 *eeprom_ch_index = iwl_eeprom_band_3;
 681                 break;
 682         case 4:         /* 5.5GHz band */
 683                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
 684                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 685                                 iwl_eeprom_query_addr(priv, offset);
 686                 *eeprom_ch_index = iwl_eeprom_band_4;
 687                 break;
 688         case 5:         /* 5.7GHz band */
 689                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
 690                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 691                                 iwl_eeprom_query_addr(priv, offset);
 692                 *eeprom_ch_index = iwl_eeprom_band_5;
 693                 break;
 694         case 6:         /* 2.4GHz ht40 channels */
 695                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
 696                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 697                                 iwl_eeprom_query_addr(priv, offset);
 698                 *eeprom_ch_index = iwl_eeprom_band_6;
 699                 break;
 700         case 7:         /* 5 GHz ht40 channels */
 701                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
 702                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 703                                 iwl_eeprom_query_addr(priv, offset);
 704                 *eeprom_ch_index = iwl_eeprom_band_7;
 705                 break;
 706         default:
 707                 BUG();
 708                 return;
 709         }
 710 }
 711
 712 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
 713                             ? # x " " : "")
 714
 715 /**
 716  * iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
 717  *
 718  * Does not set up a command, or touch hardware.
 719  */
 720 static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
 721                               enum ieee80211_band band, u16 channel,
 722                               const struct iwl_eeprom_channel *eeprom_ch,
 723                               u8 clear_ht40_extension_channel)
 724 {
 725         struct iwl_channel_info *ch_info;
 726
 727         ch_info = (struct iwl_channel_info *)
 728                         iwl_get_channel_info(priv, band, channel);
 729
 730         if (!is_channel_valid(ch_info))
 731                 return -1;
 732
 733         IWL_DEBUG_INFO(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
 734                         " Ad-Hoc %ssupported\n",
 735                         ch_info->channel,
 736                         is_channel_a_band(ch_info) ?
 737                         "5.2" : "2.4",
 738                         CHECK_AND_PRINT(IBSS),
 739                         CHECK_AND_PRINT(ACTIVE),
 740                         CHECK_AND_PRINT(RADAR),
 741                         CHECK_AND_PRINT(WIDE),
 742                         CHECK_AND_PRINT(DFS),
 743                         eeprom_ch->flags,
 744                         eeprom_ch->max_power_avg,
 745                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
 746                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
 747                         "" : "not ");
 748
 749         ch_info->ht40_eeprom = *eeprom_ch;
 750         ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
 751         ch_info->ht40_flags = eeprom_ch->flags;
 752         if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
 753                 ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
 754
 755         return 0;
 756 }
 757
 758 /**
 759  * iwl_get_max_txpower_avg - get the highest tx power from all chains.
 760  *     find the highest tx power from all chains for the channel
 761  */
 762 static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
 763                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 764                 int element, s8 *max_txpower_in_half_dbm)
 765 {
 766         s8 max_txpower_avg = 0; /* (dBm) */
 767
 768         IWL_DEBUG_INFO(priv, "%d - "
 769                         "chain_a: %d dB chain_b: %d dB "
 770                         "chain_c: %d dB mimo2: %d dB mimo3: %d dB\n",
 771                         element,
 772                         enhanced_txpower[element].chain_a_max >> 1,
 773                         enhanced_txpower[element].chain_b_max >> 1,
 774                         enhanced_txpower[element].chain_c_max >> 1,
 775                         enhanced_txpower[element].mimo2_max >> 1,
 776                         enhanced_txpower[element].mimo3_max >> 1);
 777         /* Take the highest tx power from any valid chains */
 778         if ((priv->cfg->valid_tx_ant & ANT_A) &&
 779             (enhanced_txpower[element].chain_a_max > max_txpower_avg))
 780                 max_txpower_avg = enhanced_txpower[element].chain_a_max;
 781         if ((priv->cfg->valid_tx_ant & ANT_B) &&
 782             (enhanced_txpower[element].chain_b_max > max_txpower_avg))
 783                 max_txpower_avg = enhanced_txpower[element].chain_b_max;
 784         if ((priv->cfg->valid_tx_ant & ANT_C) &&
 785             (enhanced_txpower[element].chain_c_max > max_txpower_avg))
 786                 max_txpower_avg = enhanced_txpower[element].chain_c_max;
 787         if (((priv->cfg->valid_tx_ant == ANT_AB) |
 788             (priv->cfg->valid_tx_ant == ANT_BC) |
 789             (priv->cfg->valid_tx_ant == ANT_AC)) &&
 790             (enhanced_txpower[element].mimo2_max > max_txpower_avg))
 791                 max_txpower_avg =  enhanced_txpower[element].mimo2_max;
 792         if ((priv->cfg->valid_tx_ant == ANT_ABC) &&
 793             (enhanced_txpower[element].mimo3_max > max_txpower_avg))
 794                 max_txpower_avg = enhanced_txpower[element].mimo3_max;
 795
 796         /*
 797          * max. tx power in EEPROM is in 1/2 dBm format
 798          * convert from 1/2 dBm to dBm (round-up convert)
 799          * but we also do not want to loss 1/2 dBm resolution which
 800          * will impact performance
 801          */
 802         *max_txpower_in_half_dbm = max_txpower_avg;
 803         return (max_txpower_avg & 0x01) + (max_txpower_avg >> 1);
 804 }
 805
 806 /**
 807  * iwl_update_common_txpower: update channel tx power
 808  *     update tx power per band based on EEPROM enhanced tx power info.
 809  */
 810 static s8 iwl_update_common_txpower(struct iwl_priv *priv,
 811                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 812                 int section, int element, s8 *max_txpower_in_half_dbm)
 813 {
 814         struct iwl_channel_info *ch_info;
 815         int ch;
 816         bool is_ht40 = false;
 817         s8 max_txpower_avg; /* (dBm) */
 818
 819         /* it is common section, contain all type (Legacy, HT and HT40)
 820          * based on the element in the section to determine
 821          * is it HT 40 or not
 822          */
 823         if (element == EEPROM_TXPOWER_COMMON_HT40_INDEX)
 824                 is_ht40 = true;
 825         max_txpower_avg =
 826                 iwl_get_max_txpower_avg(priv, enhanced_txpower,
 827                                         element, max_txpower_in_half_dbm);
 828
 829         ch_info = priv->channel_info;
 830
 831         for (ch = 0; ch < priv->channel_count; ch++) {
 832                 /* find matching band and update tx power if needed */
 833                 if ((ch_info->band == enhinfo[section].band) &&
 834                     (ch_info->max_power_avg < max_txpower_avg) &&
 835                     (!is_ht40)) {
 836                         /* Update regulatory-based run-time data */
 837                         ch_info->max_power_avg = ch_info->curr_txpow =
 838                                 max_txpower_avg;
 839                         ch_info->scan_power = max_txpower_avg;
 840                 }
 841                 if ((ch_info->band == enhinfo[section].band) && is_ht40 &&
 842                     (ch_info->ht40_max_power_avg < max_txpower_avg)) {
 843                         /* Update regulatory-based run-time data */
 844                         ch_info->ht40_max_power_avg = max_txpower_avg;
 845                 }
 846                 ch_info++;
 847         }
 848         return max_txpower_avg;
 849 }
 850
 851 /**
 852  * iwl_update_channel_txpower: update channel tx power
 853  *      update channel tx power based on EEPROM enhanced tx power info.
 854  */
 855 static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
 856                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 857                 int section, int element, s8 *max_txpower_in_half_dbm)
 858 {
 859         struct iwl_channel_info *ch_info;
 860         int ch;
 861         u8 channel;
 862         s8 max_txpower_avg; /* (dBm) */
 863
 864         channel = enhinfo[section].iwl_eeprom_section_channel[element];
 865         max_txpower_avg =
 866                 iwl_get_max_txpower_avg(priv, enhanced_txpower,
 867                                         element, max_txpower_in_half_dbm);
 868
 869         ch_info = priv->channel_info;
 870         for (ch = 0; ch < priv->channel_count; ch++) {
 871                 /* find matching channel and update tx power if needed */
 872                 if (ch_info->channel == channel) {
 873                         if ((ch_info->max_power_avg < max_txpower_avg) &&
 874                             (!enhinfo[section].is_ht40)) {
 875                                 /* Update regulatory-based run-time data */
 876                                 ch_info->max_power_avg = max_txpower_avg;
 877                                 ch_info->curr_txpow = max_txpower_avg;
 878                                 ch_info->scan_power = max_txpower_avg;
 879                         }
 880                         if ((enhinfo[section].is_ht40) &&
 881                             (ch_info->ht40_max_power_avg < max_txpower_avg)) {
 882                                 /* Update regulatory-based run-time data */
 883                                 ch_info->ht40_max_power_avg = max_txpower_avg;
 884                         }
 885                         break;
 886                 }
 887                 ch_info++;
 888         }
 889         return max_txpower_avg;
 890 }
 891
 892 /**
 893  * iwlcore_eeprom_enhanced_txpower: process enhanced tx power info
 894  */
 895 void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
 896 {
 897         int eeprom_section_count = 0;
 898         int section, element;
 899         struct iwl_eeprom_enhanced_txpwr *enhanced_txpower;
 900         u32 offset;
 901         s8 max_txpower_avg; /* (dBm) */
 902         s8 max_txpower_in_half_dbm; /* (half-dBm) */
 903
 904         /* Loop through all the sections
 905          * adjust bands and channel's max tx power
 906          * Set the tx_power_user_lmt to the highest power
 907          * supported by any channels and chains
 908          */
 909         for (section = 0; section < ARRAY_SIZE(enhinfo); section++) {
 910                 eeprom_section_count = enhinfo[section].count;
 911                 offset = enhinfo[section].offset;
 912                 enhanced_txpower = (struct iwl_eeprom_enhanced_txpwr *)
 913                                 iwl_eeprom_query_addr(priv, offset);
 914
 915                 /*
 916                  * check for valid entry -
 917                  * different version of EEPROM might contain different set
 918                  * of enhanced tx power table
 919                  * always check for valid entry before process
 920                  * the information
 921                  */
 922                 if (!enhanced_txpower->common || enhanced_txpower->reserved)
 923                         continue;
 924
 925                 for (element = 0; element < eeprom_section_count; element++) {
 926                         if (enhinfo[section].is_common)
 927                                 max_txpower_avg =
 928                                         iwl_update_common_txpower(priv,
 929                                                 enhanced_txpower, section,
 930                                                 element,
 931                                                 &max_txpower_in_half_dbm);
 932                         else
 933                                 max_txpower_avg =
 934                                         iwl_update_channel_txpower(priv,
 935                                                 enhanced_txpower, section,
 936                                                 element,
 937                                                 &max_txpower_in_half_dbm);
 938
 939                         /* Update the tx_power_user_lmt to the highest power
 940                          * supported by any channel */
 941                         if (max_txpower_avg > priv->tx_power_user_lmt)
 942                                 priv->tx_power_user_lmt = max_txpower_avg;
 943
 944                         /*
 945                          * Update the tx_power_lmt_in_half_dbm to
 946                          * the highest power supported by any channel
 947                          */
 948                         if (max_txpower_in_half_dbm >
 949                             priv->tx_power_lmt_in_half_dbm)
 950                                 priv->tx_power_lmt_in_half_dbm =
 951                                         max_txpower_in_half_dbm;
 952                 }
 953         }
 954 }
 955 EXPORT_SYMBOL(iwlcore_eeprom_enhanced_txpower);
 956
 957 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
 958                             ? # x " " : "")
 959
 960 /**
 961  * iwl_init_channel_map - Set up driver's info for all possible channels
 962  */
 963 int iwl_init_channel_map(struct iwl_priv *priv)
 964 {
 965         int eeprom_ch_count = 0;
 966         const u8 *eeprom_ch_index = NULL;
 967         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
 968         int band, ch;
 969         struct iwl_channel_info *ch_info;
 970
 971         if (priv->channel_count) {
 972                 IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
 973                 return 0;
 974         }
 975
 976         IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
 977
 978         priv->channel_count =
 979             ARRAY_SIZE(iwl_eeprom_band_1) +
 980             ARRAY_SIZE(iwl_eeprom_band_2) +
 981             ARRAY_SIZE(iwl_eeprom_band_3) +
 982             ARRAY_SIZE(iwl_eeprom_band_4) +
 983             ARRAY_SIZE(iwl_eeprom_band_5);
 984
 985         IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
 986
 987         priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
 988                                      priv->channel_count, GFP_KERNEL);
 989         if (!priv->channel_info) {
 990                 IWL_ERR(priv, "Could not allocate channel_info\n");
 991                 priv->channel_count = 0;
 992                 return -ENOMEM;
 993         }
 994
 995         ch_info = priv->channel_info;
 996
 997         /* Loop through the 5 EEPROM bands adding them in order to the
 998          * channel map we maintain (that contains additional information than
 999          * what just in the EEPROM) */
1000         for (band = 1; band <= 5; band++) {
1001
1002                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
1003                                         &eeprom_ch_info, &eeprom_ch_index);
1004
1005                 /* Loop through each band adding each of the channels */
1006                 for (ch = 0; ch < eeprom_ch_count; ch++) {
1007                         ch_info->channel = eeprom_ch_index[ch];
1008                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
1009                             IEEE80211_BAND_5GHZ;
1010
1011                         /* permanently store EEPROM's channel regulatory flags
1012                          *   and max power in channel info database. */
1013                         ch_info->eeprom = eeprom_ch_info[ch];
1014
1015                         /* Copy the run-time flags so they are there even on
1016                          * invalid channels */
1017                         ch_info->flags = eeprom_ch_info[ch].flags;
1018                         /* First write that ht40 is not enabled, and then enable
1019                          * one by one */
1020                         ch_info->ht40_extension_channel =
1021                                         IEEE80211_CHAN_NO_HT40;
1022
1023                         if (!(is_channel_valid(ch_info))) {
1024                                 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
1025                                                "No traffic\n",
1026                                                ch_info->channel,
1027                                                ch_info->flags,
1028                                                is_channel_a_band(ch_info) ?
1029                                                "5.2" : "2.4");
1030                                 ch_info++;
1031                                 continue;
1032                         }
1033
1034                         /* Initialize regulatory-based run-time data */
1035                         ch_info->max_power_avg = ch_info->curr_txpow =
1036                             eeprom_ch_info[ch].max_power_avg;
1037                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
1038                         ch_info->min_power = 0;
1039
1040                         IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
1041                                        " Ad-Hoc %ssupported\n",
1042                                        ch_info->channel,
1043                                        is_channel_a_band(ch_info) ?
1044                                        "5.2" : "2.4",
1045                                        CHECK_AND_PRINT_I(VALID),
1046                                        CHECK_AND_PRINT_I(IBSS),
1047                                        CHECK_AND_PRINT_I(ACTIVE),
1048                                        CHECK_AND_PRINT_I(RADAR),
1049                                        CHECK_AND_PRINT_I(WIDE),
1050                                        CHECK_AND_PRINT_I(DFS),
1051                                        eeprom_ch_info[ch].flags,
1052                                        eeprom_ch_info[ch].max_power_avg,
1053                                        ((eeprom_ch_info[ch].
1054                                          flags & EEPROM_CHANNEL_IBSS)
1055                                         && !(eeprom_ch_info[ch].
1056                                              flags & EEPROM_CHANNEL_RADAR))
1057                                        ? "" : "not ");
1058
1059                         /* Set the tx_power_user_lmt to the highest power
1060                          * supported by any channel */
1061                         if (eeprom_ch_info[ch].max_power_avg >
1062                                                 priv->tx_power_user_lmt)
1063                                 priv->tx_power_user_lmt =
1064                                     eeprom_ch_info[ch].max_power_avg;
1065
1066                         ch_info++;
1067                 }
1068         }
1069
1070         /* Check if we do have HT40 channels */
1071         if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
1072             EEPROM_REGULATORY_BAND_NO_HT40 &&
1073             priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
1074             EEPROM_REGULATORY_BAND_NO_HT40)
1075                 return 0;
1076
1077         /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
1078         for (band = 6; band <= 7; band++) {
1079                 enum ieee80211_band ieeeband;
1080
1081                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
1082                                         &eeprom_ch_info, &eeprom_ch_index);
1083
1084                 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
1085                 ieeeband =
1086                         (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1087
1088                 /* Loop through each band adding each of the channels */
1089                 for (ch = 0; ch < eeprom_ch_count; ch++) {
1090                         /* Set up driver's info for lower half */
1091                         iwl_mod_ht40_chan_info(priv, ieeeband,
1092                                                 eeprom_ch_index[ch],
1093                                                 &eeprom_ch_info[ch],
1094                                                 IEEE80211_CHAN_NO_HT40PLUS);
1095
1096                         /* Set up driver's info for upper half */
1097                         iwl_mod_ht40_chan_info(priv, ieeeband,
1098                                                 eeprom_ch_index[ch] + 4,
1099                                                 &eeprom_ch_info[ch],
1100                                                 IEEE80211_CHAN_NO_HT40MINUS);
1101                 }
1102         }
1103
1104         /* for newer device (6000 series and up)
1105          * EEPROM contain enhanced tx power information
1106          * driver need to process addition information
1107          * to determine the max channel tx power limits
1108          */
1109         if (priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower)
1110                 priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower(priv);
1111
1112         return 0;
1113 }
1114 EXPORT_SYMBOL(iwl_init_channel_map);
1115
1116 /*
1117  * iwl_free_channel_map - undo allocations in iwl_init_channel_map
1118  */
1119 void iwl_free_channel_map(struct iwl_priv *priv)
1120 {
1121         kfree(priv->channel_info);
1122         priv->channel_count = 0;
1123 }
1124 EXPORT_SYMBOL(iwl_free_channel_map);
1125
1126 /**
1127  * iwl_get_channel_info - Find driver's private channel info
1128  *
1129  * Based on band and channel number.
1130  */
1131 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
1132                                         enum ieee80211_band band, u16 channel)
1133 {
1134         int i;
1135
1136         switch (band) {
1137         case IEEE80211_BAND_5GHZ:
1138                 for (i = 14; i < priv->channel_count; i++) {
1139                         if (priv->channel_info[i].channel == channel)
1140                                 return &priv->channel_info[i];
1141                 }
1142                 break;
1143         case IEEE80211_BAND_2GHZ:
1144                 if (channel >= 1 && channel <= 14)
1145                         return &priv->channel_info[channel - 1];
1146                 break;
1147         default:
1148                 BUG();
1149         }
1150
1151         return NULL;
1152 }
1153 EXPORT_SYMBOL(iwl_get_channel_info);
1154