drivers/net/tc35815.c

   1 /*
   2  * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
   3  *
   4  * Based on skelton.c by Donald Becker.
   5  *
   6  * This driver is a replacement of older and less maintained version.
   7  * This is a header of the older version:
   8  *      -----<snip>-----
   9  *      Copyright 2001 MontaVista Software Inc.
  10  *      Author: MontaVista Software, Inc.
  11  *              ahennessy@mvista.com
  12  *      Copyright (C) 2000-2001 Toshiba Corporation
  13  *      static const char *version =
  14  *              "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
  15  *      -----<snip>-----
  16  *
  17  * This file is subject to the terms and conditions of the GNU General Public
  18  * License.  See the file "COPYING" in the main directory of this archive
  19  * for more details.
  20  *
  21  * (C) Copyright TOSHIBA CORPORATION 2004-2005
  22  * All Rights Reserved.
  23  */
  24
  25 #ifdef TC35815_NAPI
  26 #define DRV_VERSION     "1.37-NAPI"
  27 #else
  28 #define DRV_VERSION     "1.37"
  29 #endif
  30 static const char *version = "tc35815.c:v" DRV_VERSION "\n";
  31 #define MODNAME                 "tc35815"
  32
  33 #include <linux/module.h>
  34 #include <linux/kernel.h>
  35 #include <linux/types.h>
  36 #include <linux/fcntl.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/ioport.h>
  39 #include <linux/in.h>
  40 #include <linux/slab.h>
  41 #include <linux/string.h>
  42 #include <linux/spinlock.h>
  43 #include <linux/errno.h>
  44 #include <linux/init.h>
  45 #include <linux/netdevice.h>
  46 #include <linux/etherdevice.h>
  47 #include <linux/skbuff.h>
  48 #include <linux/delay.h>
  49 #include <linux/pci.h>
  50 #include <linux/phy.h>
  51 #include <linux/workqueue.h>
  52 #include <linux/platform_device.h>
  53 #include <asm/io.h>
  54 #include <asm/byteorder.h>
  55
  56 /* First, a few definitions that the brave might change. */
  57
  58 #define GATHER_TXINT    /* On-Demand Tx Interrupt */
  59 #define WORKAROUND_LOSTCAR
  60 #define WORKAROUND_100HALF_PROMISC
  61 /* #define TC35815_USE_PACKEDBUFFER */
  62
  63 enum tc35815_chiptype {
  64         TC35815CF = 0,
  65         TC35815_NWU,
  66         TC35815_TX4939,
  67 };
  68
  69 /* indexed by tc35815_chiptype, above */
  70 static const struct {
  71         const char *name;
  72 } chip_info[] __devinitdata = {
  73         { "TOSHIBA TC35815CF 10/100BaseTX" },
  74         { "TOSHIBA TC35815 with Wake on LAN" },
  75         { "TOSHIBA TC35815/TX4939" },
  76 };
  77
  78 static const struct pci_device_id tc35815_pci_tbl[] = {
  79         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
  80         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
  81         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
  82         {0,}
  83 };
  84 MODULE_DEVICE_TABLE(pci, tc35815_pci_tbl);
  85
  86 /* see MODULE_PARM_DESC */
  87 static struct tc35815_options {
  88         int speed;
  89         int duplex;
  90 } options;
  91
  92 /*
  93  * Registers
  94  */
  95 struct tc35815_regs {
  96         __u32 DMA_Ctl;          /* 0x00 */
  97         __u32 TxFrmPtr;
  98         __u32 TxThrsh;
  99         __u32 TxPollCtr;
 100         __u32 BLFrmPtr;
 101         __u32 RxFragSize;
 102         __u32 Int_En;
 103         __u32 FDA_Bas;
 104         __u32 FDA_Lim;          /* 0x20 */
 105         __u32 Int_Src;
 106         __u32 unused0[2];
 107         __u32 PauseCnt;
 108         __u32 RemPauCnt;
 109         __u32 TxCtlFrmStat;
 110         __u32 unused1;
 111         __u32 MAC_Ctl;          /* 0x40 */
 112         __u32 CAM_Ctl;
 113         __u32 Tx_Ctl;
 114         __u32 Tx_Stat;
 115         __u32 Rx_Ctl;
 116         __u32 Rx_Stat;
 117         __u32 MD_Data;
 118         __u32 MD_CA;
 119         __u32 CAM_Adr;          /* 0x60 */
 120         __u32 CAM_Data;
 121         __u32 CAM_Ena;
 122         __u32 PROM_Ctl;
 123         __u32 PROM_Data;
 124         __u32 Algn_Cnt;
 125         __u32 CRC_Cnt;
 126         __u32 Miss_Cnt;
 127 };
 128
 129 /*
 130  * Bit assignments
 131  */
 132 /* DMA_Ctl bit asign ------------------------------------------------------- */
 133 #define DMA_RxAlign            0x00c00000 /* 1:Reception Alignment           */
 134 #define DMA_RxAlign_1          0x00400000
 135 #define DMA_RxAlign_2          0x00800000
 136 #define DMA_RxAlign_3          0x00c00000
 137 #define DMA_M66EnStat          0x00080000 /* 1:66MHz Enable State            */
 138 #define DMA_IntMask            0x00040000 /* 1:Interupt mask                 */
 139 #define DMA_SWIntReq           0x00020000 /* 1:Software Interrupt request    */
 140 #define DMA_TxWakeUp           0x00010000 /* 1:Transmit Wake Up              */
 141 #define DMA_RxBigE             0x00008000 /* 1:Receive Big Endian            */
 142 #define DMA_TxBigE             0x00004000 /* 1:Transmit Big Endian           */
 143 #define DMA_TestMode           0x00002000 /* 1:Test Mode                     */
 144 #define DMA_PowrMgmnt          0x00001000 /* 1:Power Management              */
 145 #define DMA_DmBurst_Mask       0x000001fc /* DMA Burst size                  */
 146
 147 /* RxFragSize bit asign ---------------------------------------------------- */
 148 #define RxFrag_EnPack          0x00008000 /* 1:Enable Packing                */
 149 #define RxFrag_MinFragMask     0x00000ffc /* Minimum Fragment                */
 150
 151 /* MAC_Ctl bit asign ------------------------------------------------------- */
 152 #define MAC_Link10             0x00008000 /* 1:Link Status 10Mbits           */
 153 #define MAC_EnMissRoll         0x00002000 /* 1:Enable Missed Roll            */
 154 #define MAC_MissRoll           0x00000400 /* 1:Missed Roll                   */
 155 #define MAC_Loop10             0x00000080 /* 1:Loop 10 Mbps                  */
 156 #define MAC_Conn_Auto          0x00000000 /*00:Connection mode (Automatic)   */
 157 #define MAC_Conn_10M           0x00000020 /*01:                (10Mbps endec)*/
 158 #define MAC_Conn_Mll           0x00000040 /*10:                (Mll clock)   */
 159 #define MAC_MacLoop            0x00000010 /* 1:MAC Loopback                  */
 160 #define MAC_FullDup            0x00000008 /* 1:Full Duplex 0:Half Duplex     */
 161 #define MAC_Reset              0x00000004 /* 1:Software Reset                */
 162 #define MAC_HaltImm            0x00000002 /* 1:Halt Immediate                */
 163 #define MAC_HaltReq            0x00000001 /* 1:Halt request                  */
 164
 165 /* PROM_Ctl bit asign ------------------------------------------------------ */
 166 #define PROM_Busy              0x00008000 /* 1:Busy (Start Operation)        */
 167 #define PROM_Read              0x00004000 /*10:Read operation                */
 168 #define PROM_Write             0x00002000 /*01:Write operation               */
 169 #define PROM_Erase             0x00006000 /*11:Erase operation               */
 170                                           /*00:Enable or Disable Writting,   */
 171                                           /*      as specified in PROM_Addr. */
 172 #define PROM_Addr_Ena          0x00000030 /*11xxxx:PROM Write enable         */
 173                                           /*00xxxx:           disable        */
 174
 175 /* CAM_Ctl bit asign ------------------------------------------------------- */
 176 #define CAM_CompEn             0x00000010 /* 1:CAM Compare Enable            */
 177 #define CAM_NegCAM             0x00000008 /* 1:Reject packets CAM recognizes,*/
 178                                           /*                    accept other */
 179 #define CAM_BroadAcc           0x00000004 /* 1:Broadcast assept              */
 180 #define CAM_GroupAcc           0x00000002 /* 1:Multicast assept              */
 181 #define CAM_StationAcc         0x00000001 /* 1:unicast accept                */
 182
 183 /* CAM_Ena bit asign ------------------------------------------------------- */
 184 #define CAM_ENTRY_MAX                  21   /* CAM Data entry max count      */
 185 #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits)  */
 186 #define CAM_Ena_Bit(index)      (1 << (index))
 187 #define CAM_ENTRY_DESTINATION   0
 188 #define CAM_ENTRY_SOURCE        1
 189 #define CAM_ENTRY_MACCTL        20
 190
 191 /* Tx_Ctl bit asign -------------------------------------------------------- */
 192 #define Tx_En                  0x00000001 /* 1:Transmit enable               */
 193 #define Tx_TxHalt              0x00000002 /* 1:Transmit Halt Request         */
 194 #define Tx_NoPad               0x00000004 /* 1:Suppress Padding              */
 195 #define Tx_NoCRC               0x00000008 /* 1:Suppress Padding              */
 196 #define Tx_FBack               0x00000010 /* 1:Fast Back-off                 */
 197 #define Tx_EnUnder             0x00000100 /* 1:Enable Underrun               */
 198 #define Tx_EnExDefer           0x00000200 /* 1:Enable Excessive Deferral     */
 199 #define Tx_EnLCarr             0x00000400 /* 1:Enable Lost Carrier           */
 200 #define Tx_EnExColl            0x00000800 /* 1:Enable Excessive Collision    */
 201 #define Tx_EnLateColl          0x00001000 /* 1:Enable Late Collision         */
 202 #define Tx_EnTxPar             0x00002000 /* 1:Enable Transmit Parity        */
 203 #define Tx_EnComp              0x00004000 /* 1:Enable Completion             */
 204
 205 /* Tx_Stat bit asign ------------------------------------------------------- */
 206 #define Tx_TxColl_MASK         0x0000000F /* Tx Collision Count              */
 207 #define Tx_ExColl              0x00000010 /* Excessive Collision             */
 208 #define Tx_TXDefer             0x00000020 /* Transmit Defered                */
 209 #define Tx_Paused              0x00000040 /* Transmit Paused                 */
 210 #define Tx_IntTx               0x00000080 /* Interrupt on Tx                 */
 211 #define Tx_Under               0x00000100 /* Underrun                        */
 212 #define Tx_Defer               0x00000200 /* Deferral                        */
 213 #define Tx_NCarr               0x00000400 /* No Carrier                      */
 214 #define Tx_10Stat              0x00000800 /* 10Mbps Status                   */
 215 #define Tx_LateColl            0x00001000 /* Late Collision                  */
 216 #define Tx_TxPar               0x00002000 /* Tx Parity Error                 */
 217 #define Tx_Comp                0x00004000 /* Completion                      */
 218 #define Tx_Halted              0x00008000 /* Tx Halted                       */
 219 #define Tx_SQErr               0x00010000 /* Signal Quality Error(SQE)       */
 220
 221 /* Rx_Ctl bit asign -------------------------------------------------------- */
 222 #define Rx_EnGood              0x00004000 /* 1:Enable Good                   */
 223 #define Rx_EnRxPar             0x00002000 /* 1:Enable Receive Parity         */
 224 #define Rx_EnLongErr           0x00000800 /* 1:Enable Long Error             */
 225 #define Rx_EnOver              0x00000400 /* 1:Enable OverFlow               */
 226 #define Rx_EnCRCErr            0x00000200 /* 1:Enable CRC Error              */
 227 #define Rx_EnAlign             0x00000100 /* 1:Enable Alignment              */
 228 #define Rx_IgnoreCRC           0x00000040 /* 1:Ignore CRC Value              */
 229 #define Rx_StripCRC            0x00000010 /* 1:Strip CRC Value               */
 230 #define Rx_ShortEn             0x00000008 /* 1:Short Enable                  */
 231 #define Rx_LongEn              0x00000004 /* 1:Long Enable                   */
 232 #define Rx_RxHalt              0x00000002 /* 1:Receive Halt Request          */
 233 #define Rx_RxEn                0x00000001 /* 1:Receive Intrrupt Enable       */
 234
 235 /* Rx_Stat bit asign ------------------------------------------------------- */
 236 #define Rx_Halted              0x00008000 /* Rx Halted                       */
 237 #define Rx_Good                0x00004000 /* Rx Good                         */
 238 #define Rx_RxPar               0x00002000 /* Rx Parity Error                 */
 239                             /* 0x00001000    not use                         */
 240 #define Rx_LongErr             0x00000800 /* Rx Long Error                   */
 241 #define Rx_Over                0x00000400 /* Rx Overflow                     */
 242 #define Rx_CRCErr              0x00000200 /* Rx CRC Error                    */
 243 #define Rx_Align               0x00000100 /* Rx Alignment Error              */
 244 #define Rx_10Stat              0x00000080 /* Rx 10Mbps Status                */
 245 #define Rx_IntRx               0x00000040 /* Rx Interrupt                    */
 246 #define Rx_CtlRecd             0x00000020 /* Rx Control Receive              */
 247
 248 #define Rx_Stat_Mask           0x0000EFC0 /* Rx All Status Mask              */
 249
 250 /* Int_En bit asign -------------------------------------------------------- */
 251 #define Int_NRAbtEn            0x00000800 /* 1:Non-recoverable Abort Enable  */
 252 #define Int_TxCtlCmpEn         0x00000400 /* 1:Transmit Ctl Complete Enable  */
 253 #define Int_DmParErrEn         0x00000200 /* 1:DMA Parity Error Enable       */
 254 #define Int_DParDEn            0x00000100 /* 1:Data Parity Error Enable      */
 255 #define Int_EarNotEn           0x00000080 /* 1:Early Notify Enable           */
 256 #define Int_DParErrEn          0x00000040 /* 1:Detected Parity Error Enable  */
 257 #define Int_SSysErrEn          0x00000020 /* 1:Signalled System Error Enable */
 258 #define Int_RMasAbtEn          0x00000010 /* 1:Received Master Abort Enable  */
 259 #define Int_RTargAbtEn         0x00000008 /* 1:Received Target Abort Enable  */
 260 #define Int_STargAbtEn         0x00000004 /* 1:Signalled Target Abort Enable */
 261 #define Int_BLExEn             0x00000002 /* 1:Buffer List Exhausted Enable  */
 262 #define Int_FDAExEn            0x00000001 /* 1:Free Descriptor Area          */
 263                                           /*               Exhausted Enable  */
 264
 265 /* Int_Src bit asign ------------------------------------------------------- */
 266 #define Int_NRabt              0x00004000 /* 1:Non Recoverable error         */
 267 #define Int_DmParErrStat       0x00002000 /* 1:DMA Parity Error & Clear      */
 268 #define Int_BLEx               0x00001000 /* 1:Buffer List Empty & Clear     */
 269 #define Int_FDAEx              0x00000800 /* 1:FDA Empty & Clear             */
 270 #define Int_IntNRAbt           0x00000400 /* 1:Non Recoverable Abort         */
 271 #define Int_IntCmp             0x00000200 /* 1:MAC control packet complete   */
 272 #define Int_IntExBD            0x00000100 /* 1:Interrupt Extra BD & Clear    */
 273 #define Int_DmParErr           0x00000080 /* 1:DMA Parity Error & Clear      */
 274 #define Int_IntEarNot          0x00000040 /* 1:Receive Data write & Clear    */
 275 #define Int_SWInt              0x00000020 /* 1:Software request & Clear      */
 276 #define Int_IntBLEx            0x00000010 /* 1:Buffer List Empty & Clear     */
 277 #define Int_IntFDAEx           0x00000008 /* 1:FDA Empty & Clear             */
 278 #define Int_IntPCI             0x00000004 /* 1:PCI controller & Clear        */
 279 #define Int_IntMacRx           0x00000002 /* 1:Rx controller & Clear         */
 280 #define Int_IntMacTx           0x00000001 /* 1:Tx controller & Clear         */
 281
 282 /* MD_CA bit asign --------------------------------------------------------- */
 283 #define MD_CA_PreSup           0x00001000 /* 1:Preamble Supress              */
 284 #define MD_CA_Busy             0x00000800 /* 1:Busy (Start Operation)        */
 285 #define MD_CA_Wr               0x00000400 /* 1:Write 0:Read                  */
 286
 287
 288 /*
 289  * Descriptors
 290  */
 291
 292 /* Frame descripter */
 293 struct FDesc {
 294         volatile __u32 FDNext;
 295         volatile __u32 FDSystem;
 296         volatile __u32 FDStat;
 297         volatile __u32 FDCtl;
 298 };
 299
 300 /* Buffer descripter */
 301 struct BDesc {
 302         volatile __u32 BuffData;
 303         volatile __u32 BDCtl;
 304 };
 305
 306 #define FD_ALIGN        16
 307
 308 /* Frame Descripter bit asign ---------------------------------------------- */
 309 #define FD_FDLength_MASK       0x0000FFFF /* Length MASK                     */
 310 #define FD_BDCnt_MASK          0x001F0000 /* BD count MASK in FD             */
 311 #define FD_FrmOpt_MASK         0x7C000000 /* Frame option MASK               */
 312 #define FD_FrmOpt_BigEndian    0x40000000 /* Tx/Rx */
 313 #define FD_FrmOpt_IntTx        0x20000000 /* Tx only */
 314 #define FD_FrmOpt_NoCRC        0x10000000 /* Tx only */
 315 #define FD_FrmOpt_NoPadding    0x08000000 /* Tx only */
 316 #define FD_FrmOpt_Packing      0x04000000 /* Rx only */
 317 #define FD_CownsFD             0x80000000 /* FD Controller owner bit         */
 318 #define FD_Next_EOL            0x00000001 /* FD EOL indicator                */
 319 #define FD_BDCnt_SHIFT         16
 320
 321 /* Buffer Descripter bit asign --------------------------------------------- */
 322 #define BD_BuffLength_MASK     0x0000FFFF /* Recieve Data Size               */
 323 #define BD_RxBDID_MASK         0x00FF0000 /* BD ID Number MASK               */
 324 #define BD_RxBDSeqN_MASK       0x7F000000 /* Rx BD Sequence Number           */
 325 #define BD_CownsBD             0x80000000 /* BD Controller owner bit         */
 326 #define BD_RxBDID_SHIFT        16
 327 #define BD_RxBDSeqN_SHIFT      24
 328
 329
 330 /* Some useful constants. */
 331 #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
 332
 333 #ifdef NO_CHECK_CARRIER
 334 #define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
 335         Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
 336         Tx_En)  /* maybe  0x7b01 */
 337 #else
 338 #define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
 339         Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
 340         Tx_En)  /* maybe  0x7b01 */
 341 #endif
 342 #define RX_CTL_CMD      (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
 343         | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn)   /* maybe 0x6f01 */
 344 #define INT_EN_CMD  (Int_NRAbtEn | \
 345         Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
 346         Int_SSysErrEn  | Int_RMasAbtEn | Int_RTargAbtEn | \
 347         Int_STargAbtEn | \
 348         Int_BLExEn  | Int_FDAExEn) /* maybe 0xb7f*/
 349 #define DMA_CTL_CMD     DMA_BURST_SIZE
 350 #define HAVE_DMA_RXALIGN(lp)    likely((lp)->chiptype != TC35815CF)
 351
 352 /* Tuning parameters */
 353 #define DMA_BURST_SIZE  32
 354 #define TX_THRESHOLD    1024
 355 /* used threshold with packet max byte for low pci transfer ability.*/
 356 #define TX_THRESHOLD_MAX 1536
 357 /* setting threshold max value when overrun error occured this count. */
 358 #define TX_THRESHOLD_KEEP_LIMIT 10
 359
 360 /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
 361 #ifdef TC35815_USE_PACKEDBUFFER
 362 #define FD_PAGE_NUM 2
 363 #define RX_BUF_NUM      8       /* >= 2 */
 364 #define RX_FD_NUM       250     /* >= 32 */
 365 #define TX_FD_NUM       128
 366 #define RX_BUF_SIZE     PAGE_SIZE
 367 #else /* TC35815_USE_PACKEDBUFFER */
 368 #define FD_PAGE_NUM 4
 369 #define RX_BUF_NUM      128     /* < 256 */
 370 #define RX_FD_NUM       256     /* >= 32 */
 371 #define TX_FD_NUM       128
 372 #if RX_CTL_CMD & Rx_LongEn
 373 #define RX_BUF_SIZE     PAGE_SIZE
 374 #elif RX_CTL_CMD & Rx_StripCRC
 375 #define RX_BUF_SIZE     ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
 376 #else
 377 #define RX_BUF_SIZE     ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
 378 #endif
 379 #endif /* TC35815_USE_PACKEDBUFFER */
 380 #define RX_FD_RESERVE   (2 / 2) /* max 2 BD per RxFD */
 381 #define NAPI_WEIGHT     16
 382
 383 struct TxFD {
 384         struct FDesc fd;
 385         struct BDesc bd;
 386         struct BDesc unused;
 387 };
 388
 389 struct RxFD {
 390         struct FDesc fd;
 391         struct BDesc bd[0];     /* variable length */
 392 };
 393
 394 struct FrFD {
 395         struct FDesc fd;
 396         struct BDesc bd[RX_BUF_NUM];
 397 };
 398
 399
 400 #define tc_readl(addr)  ioread32(addr)
 401 #define tc_writel(d, addr)      iowrite32(d, addr)
 402
 403 #define TC35815_TX_TIMEOUT  msecs_to_jiffies(400)
 404
 405 /* Information that need to be kept for each controller. */
 406 struct tc35815_local {
 407         struct pci_dev *pci_dev;
 408
 409         struct net_device *dev;
 410         struct napi_struct napi;
 411
 412         /* statistics */
 413         struct {
 414                 int max_tx_qlen;
 415                 int tx_ints;
 416                 int rx_ints;
 417                 int tx_underrun;
 418         } lstats;
 419
 420         /* Tx control lock.  This protects the transmit buffer ring
 421          * state along with the "tx full" state of the driver.  This
 422          * means all netif_queue flow control actions are protected
 423          * by this lock as well.
 424          */
 425         spinlock_t lock;
 426
 427         struct mii_bus *mii_bus;
 428         struct phy_device *phy_dev;
 429         int duplex;
 430         int speed;
 431         int link;
 432         struct work_struct restart_work;
 433
 434         /*
 435          * Transmitting: Batch Mode.
 436          *      1 BD in 1 TxFD.
 437          * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
 438          *      1 circular FD for Free Buffer List.
 439          *      RX_BUF_NUM BD in Free Buffer FD.
 440          *      One Free Buffer BD has PAGE_SIZE data buffer.
 441          * Or Non-Packing Mode.
 442          *      1 circular FD for Free Buffer List.
 443          *      RX_BUF_NUM BD in Free Buffer FD.
 444          *      One Free Buffer BD has ETH_FRAME_LEN data buffer.
 445          */
 446         void *fd_buf;   /* for TxFD, RxFD, FrFD */
 447         dma_addr_t fd_buf_dma;
 448         struct TxFD *tfd_base;
 449         unsigned int tfd_start;
 450         unsigned int tfd_end;
 451         struct RxFD *rfd_base;
 452         struct RxFD *rfd_limit;
 453         struct RxFD *rfd_cur;
 454         struct FrFD *fbl_ptr;
 455 #ifdef TC35815_USE_PACKEDBUFFER
 456         unsigned char fbl_curid;
 457         void *data_buf[RX_BUF_NUM];             /* packing */
 458         dma_addr_t data_buf_dma[RX_BUF_NUM];
 459         struct {
 460                 struct sk_buff *skb;
 461                 dma_addr_t skb_dma;
 462         } tx_skbs[TX_FD_NUM];
 463 #else
 464         unsigned int fbl_count;
 465         struct {
 466                 struct sk_buff *skb;
 467                 dma_addr_t skb_dma;
 468         } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
 469 #endif
 470         u32 msg_enable;
 471         enum tc35815_chiptype chiptype;
 472 };
 473
 474 static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
 475 {
 476         return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
 477 }
 478 #ifdef DEBUG
 479 static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
 480 {
 481         return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
 482 }
 483 #endif
 484 #ifdef TC35815_USE_PACKEDBUFFER
 485 static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
 486 {
 487         int i;
 488         for (i = 0; i < RX_BUF_NUM; i++) {
 489                 if (bus >= lp->data_buf_dma[i] &&
 490                     bus < lp->data_buf_dma[i] + PAGE_SIZE)
 491                         return (void *)((u8 *)lp->data_buf[i] +
 492                                         (bus - lp->data_buf_dma[i]));
 493         }
 494         return NULL;
 495 }
 496
 497 #define TC35815_DMA_SYNC_ONDEMAND
 498 static void *alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
 499 {
 500 #ifdef TC35815_DMA_SYNC_ONDEMAND
 501         void *buf;
 502         /* pci_map + pci_dma_sync will be more effective than
 503          * pci_alloc_consistent on some archs. */
 504         buf = (void *)__get_free_page(GFP_ATOMIC);
 505         if (!buf)
 506                 return NULL;
 507         *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
 508                                      PCI_DMA_FROMDEVICE);
 509         if (pci_dma_mapping_error(hwdev, *dma_handle)) {
 510                 free_page((unsigned long)buf);
 511                 return NULL;
 512         }
 513         return buf;
 514 #else
 515         return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
 516 #endif
 517 }
 518
 519 static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
 520 {
 521 #ifdef TC35815_DMA_SYNC_ONDEMAND
 522         pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
 523         free_page((unsigned long)buf);
 524 #else
 525         pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
 526 #endif
 527 }
 528 #else /* TC35815_USE_PACKEDBUFFER */
 529 static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
 530                                        struct pci_dev *hwdev,
 531                                        dma_addr_t *dma_handle)
 532 {
 533         struct sk_buff *skb;
 534         skb = dev_alloc_skb(RX_BUF_SIZE);
 535         if (!skb)
 536                 return NULL;
 537         *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
 538                                      PCI_DMA_FROMDEVICE);
 539         if (pci_dma_mapping_error(hwdev, *dma_handle)) {
 540                 dev_kfree_skb_any(skb);
 541                 return NULL;
 542         }
 543         skb_reserve(skb, 2);    /* make IP header 4byte aligned */
 544         return skb;
 545 }
 546
 547 static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
 548 {
 549         pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
 550                          PCI_DMA_FROMDEVICE);
 551         dev_kfree_skb_any(skb);
 552 }
 553 #endif /* TC35815_USE_PACKEDBUFFER */
 554
 555 /* Index to functions, as function prototypes. */
 556
 557 static int      tc35815_open(struct net_device *dev);
 558 static int      tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
 559 static irqreturn_t      tc35815_interrupt(int irq, void *dev_id);
 560 #ifdef TC35815_NAPI
 561 static int      tc35815_rx(struct net_device *dev, int limit);
 562 static int      tc35815_poll(struct napi_struct *napi, int budget);
 563 #else
 564 static void     tc35815_rx(struct net_device *dev);
 565 #endif
 566 static void     tc35815_txdone(struct net_device *dev);
 567 static int      tc35815_close(struct net_device *dev);
 568 static struct   net_device_stats *tc35815_get_stats(struct net_device *dev);
 569 static void     tc35815_set_multicast_list(struct net_device *dev);
 570 static void     tc35815_tx_timeout(struct net_device *dev);
 571 static int      tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 572 #ifdef CONFIG_NET_POLL_CONTROLLER
 573 static void     tc35815_poll_controller(struct net_device *dev);
 574 #endif
 575 static const struct ethtool_ops tc35815_ethtool_ops;
 576
 577 /* Example routines you must write ;->. */
 578 static void     tc35815_chip_reset(struct net_device *dev);
 579 static void     tc35815_chip_init(struct net_device *dev);
 580
 581 #ifdef DEBUG
 582 static void     panic_queues(struct net_device *dev);
 583 #endif
 584
 585 static void tc35815_restart_work(struct work_struct *work);
 586
 587 static int tc_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
 588 {
 589         struct net_device *dev = bus->priv;
 590         struct tc35815_regs __iomem *tr =
 591                 (struct tc35815_regs __iomem *)dev->base_addr;
 592         unsigned long timeout = jiffies + 10;
 593
 594         tc_writel(MD_CA_Busy | (mii_id << 5) | (regnum & 0x1f), &tr->MD_CA);
 595         while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
 596                 if (time_after(jiffies, timeout))
 597                         return -EIO;
 598                 cpu_relax();
 599         }
 600         return tc_readl(&tr->MD_Data) & 0xffff;
 601 }
 602
 603 static int tc_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 val)
 604 {
 605         struct net_device *dev = bus->priv;
 606         struct tc35815_regs __iomem *tr =
 607                 (struct tc35815_regs __iomem *)dev->base_addr;
 608         unsigned long timeout = jiffies + 10;
 609
 610         tc_writel(val, &tr->MD_Data);
 611         tc_writel(MD_CA_Busy | MD_CA_Wr | (mii_id << 5) | (regnum & 0x1f),
 612                   &tr->MD_CA);
 613         while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
 614                 if (time_after(jiffies, timeout))
 615                         return -EIO;
 616                 cpu_relax();
 617         }
 618         return 0;
 619 }
 620
 621 static void tc_handle_link_change(struct net_device *dev)
 622 {
 623         struct tc35815_local *lp = netdev_priv(dev);
 624         struct phy_device *phydev = lp->phy_dev;
 625         unsigned long flags;
 626         int status_change = 0;
 627
 628         spin_lock_irqsave(&lp->lock, flags);
 629         if (phydev->link &&
 630             (lp->speed != phydev->speed || lp->duplex != phydev->duplex)) {
 631                 struct tc35815_regs __iomem *tr =
 632                         (struct tc35815_regs __iomem *)dev->base_addr;
 633                 u32 reg;
 634
 635                 reg = tc_readl(&tr->MAC_Ctl);
 636                 reg |= MAC_HaltReq;
 637                 tc_writel(reg, &tr->MAC_Ctl);
 638                 if (phydev->duplex == DUPLEX_FULL)
 639                         reg |= MAC_FullDup;
 640                 else
 641                         reg &= ~MAC_FullDup;
 642                 tc_writel(reg, &tr->MAC_Ctl);
 643                 reg &= ~MAC_HaltReq;
 644                 tc_writel(reg, &tr->MAC_Ctl);
 645
 646                 /*
 647                  * TX4939 PCFG.SPEEDn bit will be changed on
 648                  * NETDEV_CHANGE event.
 649                  */
 650
 651 #if !defined(NO_CHECK_CARRIER) && defined(WORKAROUND_LOSTCAR)
 652                 /*
 653                  * WORKAROUND: enable LostCrS only if half duplex
 654                  * operation.
 655                  * (TX4939 does not have EnLCarr)
 656                  */
 657                 if (phydev->duplex == DUPLEX_HALF &&
 658                     lp->chiptype != TC35815_TX4939)
 659                         tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr,
 660                                   &tr->Tx_Ctl);
 661 #endif
 662
 663                 lp->speed = phydev->speed;
 664                 lp->duplex = phydev->duplex;
 665                 status_change = 1;
 666         }
 667
 668         if (phydev->link != lp->link) {
 669                 if (phydev->link) {
 670 #ifdef WORKAROUND_100HALF_PROMISC
 671                         /* delayed promiscuous enabling */
 672                         if (dev->flags & IFF_PROMISC)
 673                                 tc35815_set_multicast_list(dev);
 674 #endif
 675                 } else {
 676                         lp->speed = 0;
 677                         lp->duplex = -1;
 678                 }
 679                 lp->link = phydev->link;
 680
 681                 status_change = 1;
 682         }
 683         spin_unlock_irqrestore(&lp->lock, flags);
 684
 685         if (status_change && netif_msg_link(lp)) {
 686                 phy_print_status(phydev);
 687 #ifdef DEBUG
 688                 printk(KERN_DEBUG
 689                        "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
 690                        dev->name,
 691                        phy_read(phydev, MII_BMCR),
 692                        phy_read(phydev, MII_BMSR),
 693                        phy_read(phydev, MII_LPA));
 694 #endif
 695         }
 696 }
 697
 698 static int tc_mii_probe(struct net_device *dev)
 699 {
 700         struct tc35815_local *lp = netdev_priv(dev);
 701         struct phy_device *phydev = NULL;
 702         int phy_addr;
 703         u32 dropmask;
 704
 705         /* find the first phy */
 706         for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
 707                 if (lp->mii_bus->phy_map[phy_addr]) {
 708                         if (phydev) {
 709                                 printk(KERN_ERR "%s: multiple PHYs found\n",
 710                                        dev->name);
 711                                 return -EINVAL;
 712                         }
 713                         phydev = lp->mii_bus->phy_map[phy_addr];
 714                         break;
 715                 }
 716         }
 717
 718         if (!phydev) {
 719                 printk(KERN_ERR "%s: no PHY found\n", dev->name);
 720                 return -ENODEV;
 721         }
 722
 723         /* attach the mac to the phy */
 724         phydev = phy_connect(dev, phydev->dev.bus_id,
 725                              &tc_handle_link_change, 0,
 726                              lp->chiptype == TC35815_TX4939 ?
 727                              PHY_INTERFACE_MODE_RMII : PHY_INTERFACE_MODE_MII);
 728         if (IS_ERR(phydev)) {
 729                 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
 730                 return PTR_ERR(phydev);
 731         }
 732         printk(KERN_INFO "%s: attached PHY driver [%s] "
 733                 "(mii_bus:phy_addr=%s, id=%x)\n",
 734                 dev->name, phydev->drv->name, phydev->dev.bus_id,
 735                 phydev->phy_id);
 736
 737         /* mask with MAC supported features */
 738         phydev->supported &= PHY_BASIC_FEATURES;
 739         dropmask = 0;
 740         if (options.speed == 10)
 741                 dropmask |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
 742         else if (options.speed == 100)
 743                 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
 744         if (options.duplex == 1)
 745                 dropmask |= SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full;
 746         else if (options.duplex == 2)
 747                 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_100baseT_Half;
 748         phydev->supported &= ~dropmask;
 749         phydev->advertising = phydev->supported;
 750
 751         lp->link = 0;
 752         lp->speed = 0;
 753         lp->duplex = -1;
 754         lp->phy_dev = phydev;
 755
 756         return 0;
 757 }
 758
 759 static int tc_mii_init(struct net_device *dev)
 760 {
 761         struct tc35815_local *lp = netdev_priv(dev);
 762         int err;
 763         int i;
 764
 765         lp->mii_bus = mdiobus_alloc();
 766         if (lp->mii_bus == NULL) {
 767                 err = -ENOMEM;
 768                 goto err_out;
 769         }
 770
 771         lp->mii_bus->name = "tc35815_mii_bus";
 772         lp->mii_bus->read = tc_mdio_read;
 773         lp->mii_bus->write = tc_mdio_write;
 774         snprintf(lp->mii_bus->id, MII_BUS_ID_SIZE, "%x",
 775                  (lp->pci_dev->bus->number << 8) | lp->pci_dev->devfn);
 776         lp->mii_bus->priv = dev;
 777         lp->mii_bus->parent = &lp->pci_dev->dev;
 778         lp->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
 779         if (!lp->mii_bus->irq) {
 780                 err = -ENOMEM;
 781                 goto err_out_free_mii_bus;
 782         }
 783
 784         for (i = 0; i < PHY_MAX_ADDR; i++)
 785                 lp->mii_bus->irq[i] = PHY_POLL;
 786
 787         err = mdiobus_register(lp->mii_bus);
 788         if (err)
 789                 goto err_out_free_mdio_irq;
 790         err = tc_mii_probe(dev);
 791         if (err)
 792                 goto err_out_unregister_bus;
 793         return 0;
 794
 795 err_out_unregister_bus:
 796         mdiobus_unregister(lp->mii_bus);
 797 err_out_free_mdio_irq:
 798         kfree(lp->mii_bus->irq);
 799 err_out_free_mii_bus:
 800         mdiobus_free(lp->mii_bus);
 801 err_out:
 802         return err;
 803 }
 804
 805 #ifdef CONFIG_CPU_TX49XX
 806 /*
 807  * Find a platform_device providing a MAC address.  The platform code
 808  * should provide a "tc35815-mac" device with a MAC address in its
 809  * platform_data.
 810  */
 811 static int __devinit tc35815_mac_match(struct device *dev, void *data)
 812 {
 813         struct platform_device *plat_dev = to_platform_device(dev);
 814         struct pci_dev *pci_dev = data;
 815         unsigned int id = pci_dev->irq;
 816         return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
 817 }
 818
 819 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
 820 {
 821         struct tc35815_local *lp = netdev_priv(dev);
 822         struct device *pd = bus_find_device(&platform_bus_type, NULL,
 823                                             lp->pci_dev, tc35815_mac_match);
 824         if (pd) {
 825                 if (pd->platform_data)
 826                         memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
 827                 put_device(pd);
 828                 return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
 829         }
 830         return -ENODEV;
 831 }
 832 #else
 833 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
 834 {
 835         return -ENODEV;
 836 }
 837 #endif
 838
 839 static int __devinit tc35815_init_dev_addr(struct net_device *dev)
 840 {
 841         struct tc35815_regs __iomem *tr =
 842                 (struct tc35815_regs __iomem *)dev->base_addr;
 843         int i;
 844
 845         while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
 846                 ;
 847         for (i = 0; i < 6; i += 2) {
 848                 unsigned short data;
 849                 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
 850                 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
 851                         ;
 852                 data = tc_readl(&tr->PROM_Data);
 853                 dev->dev_addr[i] = data & 0xff;
 854                 dev->dev_addr[i+1] = data >> 8;
 855         }
 856         if (!is_valid_ether_addr(dev->dev_addr))
 857                 return tc35815_read_plat_dev_addr(dev);
 858         return 0;
 859 }
 860
 861 static int __devinit tc35815_init_one(struct pci_dev *pdev,
 862                                       const struct pci_device_id *ent)
 863 {
 864         void __iomem *ioaddr = NULL;
 865         struct net_device *dev;
 866         struct tc35815_local *lp;
 867         int rc;
 868         DECLARE_MAC_BUF(mac);
 869
 870         static int printed_version;
 871         if (!printed_version++) {
 872                 printk(version);
 873                 dev_printk(KERN_DEBUG, &pdev->dev,
 874                            "speed:%d duplex:%d\n",
 875                            options.speed, options.duplex);
 876         }
 877
 878         if (!pdev->irq) {
 879                 dev_warn(&pdev->dev, "no IRQ assigned.\n");
 880                 return -ENODEV;
 881         }
 882
 883         /* dev zeroed in alloc_etherdev */
 884         dev = alloc_etherdev(sizeof(*lp));
 885         if (dev == NULL) {
 886                 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
 887                 return -ENOMEM;
 888         }
 889         SET_NETDEV_DEV(dev, &pdev->dev);
 890         lp = netdev_priv(dev);
 891         lp->dev = dev;
 892
 893         /* enable device (incl. PCI PM wakeup), and bus-mastering */
 894         rc = pcim_enable_device(pdev);
 895         if (rc)
 896                 goto err_out;
 897         rc = pcim_iomap_regions(pdev, 1 << 1, MODNAME);
 898         if (rc)
 899                 goto err_out;
 900         pci_set_master(pdev);
 901         ioaddr = pcim_iomap_table(pdev)[1];
 902
 903         /* Initialize the device structure. */
 904         dev->open = tc35815_open;
 905         dev->hard_start_xmit = tc35815_send_packet;
 906         dev->stop = tc35815_close;
 907         dev->get_stats = tc35815_get_stats;
 908         dev->set_multicast_list = tc35815_set_multicast_list;
 909         dev->do_ioctl = tc35815_ioctl;
 910         dev->ethtool_ops = &tc35815_ethtool_ops;
 911         dev->tx_timeout = tc35815_tx_timeout;
 912         dev->watchdog_timeo = TC35815_TX_TIMEOUT;
 913 #ifdef TC35815_NAPI
 914         netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT);
 915 #endif
 916 #ifdef CONFIG_NET_POLL_CONTROLLER
 917         dev->poll_controller = tc35815_poll_controller;
 918 #endif
 919
 920         dev->irq = pdev->irq;
 921         dev->base_addr = (unsigned long)ioaddr;
 922
 923         INIT_WORK(&lp->restart_work, tc35815_restart_work);
 924         spin_lock_init(&lp->lock);
 925         lp->pci_dev = pdev;
 926         lp->chiptype = ent->driver_data;
 927
 928         lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
 929         pci_set_drvdata(pdev, dev);
 930
 931         /* Soft reset the chip. */
 932         tc35815_chip_reset(dev);
 933
 934         /* Retrieve the ethernet address. */
 935         if (tc35815_init_dev_addr(dev)) {
 936                 dev_warn(&pdev->dev, "not valid ether addr\n");
 937                 random_ether_addr(dev->dev_addr);
 938         }
 939
 940         rc = register_netdev(dev);
 941         if (rc)
 942                 goto err_out;
 943
 944         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
 945         printk(KERN_INFO "%s: %s at 0x%lx, %s, IRQ %d\n",
 946                 dev->name,
 947                 chip_info[ent->driver_data].name,
 948                 dev->base_addr,
 949                 print_mac(mac, dev->dev_addr),
 950                 dev->irq);
 951
 952         rc = tc_mii_init(dev);
 953         if (rc)
 954                 goto err_out_unregister;
 955
 956         return 0;
 957
 958 err_out_unregister:
 959         unregister_netdev(dev);
 960 err_out:
 961         free_netdev(dev);
 962         return rc;
 963 }
 964
 965
 966 static void __devexit tc35815_remove_one(struct pci_dev *pdev)
 967 {
 968         struct net_device *dev = pci_get_drvdata(pdev);
 969         struct tc35815_local *lp = netdev_priv(dev);
 970
 971         phy_disconnect(lp->phy_dev);
 972         mdiobus_unregister(lp->mii_bus);
 973         kfree(lp->mii_bus->irq);
 974         mdiobus_free(lp->mii_bus);
 975         unregister_netdev(dev);
 976         free_netdev(dev);
 977         pci_set_drvdata(pdev, NULL);
 978 }
 979
 980 static int
 981 tc35815_init_queues(struct net_device *dev)
 982 {
 983         struct tc35815_local *lp = netdev_priv(dev);
 984         int i;
 985         unsigned long fd_addr;
 986
 987         if (!lp->fd_buf) {
 988                 BUG_ON(sizeof(struct FDesc) +
 989                        sizeof(struct BDesc) * RX_BUF_NUM +
 990                        sizeof(struct FDesc) * RX_FD_NUM +
 991                        sizeof(struct TxFD) * TX_FD_NUM >
 992                        PAGE_SIZE * FD_PAGE_NUM);
 993
 994                 lp->fd_buf = pci_alloc_consistent(lp->pci_dev,
 995                                                   PAGE_SIZE * FD_PAGE_NUM,
 996                                                   &lp->fd_buf_dma);
 997                 if (!lp->fd_buf)
 998                         return -ENOMEM;
 999                 for (i = 0; i < RX_BUF_NUM; i++) {
1000 #ifdef TC35815_USE_PACKEDBUFFER
1001                         lp->data_buf[i] =
1002                                 alloc_rxbuf_page(lp->pci_dev,
1003                                                  &lp->data_buf_dma[i]);
1004                         if (!lp->data_buf[i]) {
1005                                 while (--i >= 0) {
1006                                         free_rxbuf_page(lp->pci_dev,
1007                                                         lp->data_buf[i],
1008                                                         lp->data_buf_dma[i]);
1009                                         lp->data_buf[i] = NULL;
1010                                 }
1011                                 pci_free_consistent(lp->pci_dev,
1012                                                     PAGE_SIZE * FD_PAGE_NUM,
1013                                                     lp->fd_buf,
1014                                                     lp->fd_buf_dma);
1015                                 lp->fd_buf = NULL;
1016                                 return -ENOMEM;
1017                         }
1018 #else
1019                         lp->rx_skbs[i].skb =
1020                                 alloc_rxbuf_skb(dev, lp->pci_dev,
1021                                                 &lp->rx_skbs[i].skb_dma);
1022                         if (!lp->rx_skbs[i].skb) {
1023                                 while (--i >= 0) {
1024                                         free_rxbuf_skb(lp->pci_dev,
1025                                                        lp->rx_skbs[i].skb,
1026                                                        lp->rx_skbs[i].skb_dma);
1027                                         lp->rx_skbs[i].skb = NULL;
1028                                 }
1029                                 pci_free_consistent(lp->pci_dev,
1030                                                     PAGE_SIZE * FD_PAGE_NUM,
1031                                                     lp->fd_buf,
1032                                                     lp->fd_buf_dma);
1033                                 lp->fd_buf = NULL;
1034                                 return -ENOMEM;
1035                         }
1036 #endif
1037                 }
1038                 printk(KERN_DEBUG "%s: FD buf %p DataBuf",
1039                        dev->name, lp->fd_buf);
1040 #ifdef TC35815_USE_PACKEDBUFFER
1041                 printk(" DataBuf");
1042                 for (i = 0; i < RX_BUF_NUM; i++)
1043                         printk(" %p", lp->data_buf[i]);
1044 #endif
1045                 printk("\n");
1046         } else {
1047                 for (i = 0; i < FD_PAGE_NUM; i++)
1048                         clear_page((void *)((unsigned long)lp->fd_buf +
1049                                             i * PAGE_SIZE));
1050         }
1051         fd_addr = (unsigned long)lp->fd_buf;
1052
1053         /* Free Descriptors (for Receive) */
1054         lp->rfd_base = (struct RxFD *)fd_addr;
1055         fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
1056         for (i = 0; i < RX_FD_NUM; i++)
1057                 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
1058         lp->rfd_cur = lp->rfd_base;
1059         lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
1060
1061         /* Transmit Descriptors */
1062         lp->tfd_base = (struct TxFD *)fd_addr;
1063         fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
1064         for (i = 0; i < TX_FD_NUM; i++) {
1065                 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
1066                 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1067                 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
1068         }
1069         lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
1070         lp->tfd_start = 0;
1071         lp->tfd_end = 0;
1072
1073         /* Buffer List (for Receive) */
1074         lp->fbl_ptr = (struct FrFD *)fd_addr;
1075         lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
1076         lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
1077 #ifndef TC35815_USE_PACKEDBUFFER
1078         /*
1079          * move all allocated skbs to head of rx_skbs[] array.
1080          * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
1081          * tc35815_rx() had failed.
1082          */
1083         lp->fbl_count = 0;
1084         for (i = 0; i < RX_BUF_NUM; i++) {
1085                 if (lp->rx_skbs[i].skb) {
1086                         if (i != lp->fbl_count) {
1087                                 lp->rx_skbs[lp->fbl_count].skb =
1088                                         lp->rx_skbs[i].skb;
1089                                 lp->rx_skbs[lp->fbl_count].skb_dma =
1090                                         lp->rx_skbs[i].skb_dma;
1091                         }
1092                         lp->fbl_count++;
1093                 }
1094         }
1095 #endif
1096         for (i = 0; i < RX_BUF_NUM; i++) {
1097 #ifdef TC35815_USE_PACKEDBUFFER
1098                 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
1099 #else
1100                 if (i >= lp->fbl_count) {
1101                         lp->fbl_ptr->bd[i].BuffData = 0;
1102                         lp->fbl_ptr->bd[i].BDCtl = 0;
1103                         continue;
1104                 }
1105                 lp->fbl_ptr->bd[i].BuffData =
1106                         cpu_to_le32(lp->rx_skbs[i].skb_dma);
1107 #endif
1108                 /* BDID is index of FrFD.bd[] */
1109                 lp->fbl_ptr->bd[i].BDCtl =
1110                         cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
1111                                     RX_BUF_SIZE);
1112         }
1113 #ifdef TC35815_USE_PACKEDBUFFER
1114         lp->fbl_curid = 0;
1115 #endif
1116
1117         printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
1118                dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
1119         return 0;
1120 }
1121
1122 static void
1123 tc35815_clear_queues(struct net_device *dev)
1124 {
1125         struct tc35815_local *lp = netdev_priv(dev);
1126         int i;
1127
1128         for (i = 0; i < TX_FD_NUM; i++) {
1129                 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1130                 struct sk_buff *skb =
1131                         fdsystem != 0xffffffff ?
1132                         lp->tx_skbs[fdsystem].skb : NULL;
1133 #ifdef DEBUG
1134                 if (lp->tx_skbs[i].skb != skb) {
1135                         printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1136                         panic_queues(dev);
1137                 }
1138 #else
1139                 BUG_ON(lp->tx_skbs[i].skb != skb);
1140 #endif
1141                 if (skb) {
1142                         pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1143                         lp->tx_skbs[i].skb = NULL;
1144                         lp->tx_skbs[i].skb_dma = 0;
1145                         dev_kfree_skb_any(skb);
1146                 }
1147                 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1148         }
1149
1150         tc35815_init_queues(dev);
1151 }
1152
1153 static void
1154 tc35815_free_queues(struct net_device *dev)
1155 {
1156         struct tc35815_local *lp = netdev_priv(dev);
1157         int i;
1158
1159         if (lp->tfd_base) {
1160                 for (i = 0; i < TX_FD_NUM; i++) {
1161                         u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1162                         struct sk_buff *skb =
1163                                 fdsystem != 0xffffffff ?
1164                                 lp->tx_skbs[fdsystem].skb : NULL;
1165 #ifdef DEBUG
1166                         if (lp->tx_skbs[i].skb != skb) {
1167                                 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1168                                 panic_queues(dev);
1169                         }
1170 #else
1171                         BUG_ON(lp->tx_skbs[i].skb != skb);
1172 #endif
1173                         if (skb) {
1174                                 dev_kfree_skb(skb);
1175                                 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1176                                 lp->tx_skbs[i].skb = NULL;
1177                                 lp->tx_skbs[i].skb_dma = 0;
1178                         }
1179                         lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1180                 }
1181         }
1182
1183         lp->rfd_base = NULL;
1184         lp->rfd_limit = NULL;
1185         lp->rfd_cur = NULL;
1186         lp->fbl_ptr = NULL;
1187
1188         for (i = 0; i < RX_BUF_NUM; i++) {
1189 #ifdef TC35815_USE_PACKEDBUFFER
1190                 if (lp->data_buf[i]) {
1191                         free_rxbuf_page(lp->pci_dev,
1192                                         lp->data_buf[i], lp->data_buf_dma[i]);
1193                         lp->data_buf[i] = NULL;
1194                 }
1195 #else
1196                 if (lp->rx_skbs[i].skb) {
1197                         free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
1198                                        lp->rx_skbs[i].skb_dma);
1199                         lp->rx_skbs[i].skb = NULL;
1200                 }
1201 #endif
1202         }
1203         if (lp->fd_buf) {
1204                 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
1205                                     lp->fd_buf, lp->fd_buf_dma);
1206                 lp->fd_buf = NULL;
1207         }
1208 }
1209
1210 static void
1211 dump_txfd(struct TxFD *fd)
1212 {
1213         printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
1214                le32_to_cpu(fd->fd.FDNext),
1215                le32_to_cpu(fd->fd.FDSystem),
1216                le32_to_cpu(fd->fd.FDStat),
1217                le32_to_cpu(fd->fd.FDCtl));
1218         printk("BD: ");
1219         printk(" %08x %08x",
1220                le32_to_cpu(fd->bd.BuffData),
1221                le32_to_cpu(fd->bd.BDCtl));
1222         printk("\n");
1223 }
1224
1225 static int
1226 dump_rxfd(struct RxFD *fd)
1227 {
1228         int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1229         if (bd_count > 8)
1230                 bd_count = 8;
1231         printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
1232                le32_to_cpu(fd->fd.FDNext),
1233                le32_to_cpu(fd->fd.FDSystem),
1234                le32_to_cpu(fd->fd.FDStat),
1235                le32_to_cpu(fd->fd.FDCtl));
1236         if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1237                 return 0;
1238         printk("BD: ");
1239         for (i = 0; i < bd_count; i++)
1240                 printk(" %08x %08x",
1241                        le32_to_cpu(fd->bd[i].BuffData),
1242                        le32_to_cpu(fd->bd[i].BDCtl));
1243         printk("\n");
1244         return bd_count;
1245 }
1246
1247 #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
1248 static void
1249 dump_frfd(struct FrFD *fd)
1250 {
1251         int i;
1252         printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
1253                le32_to_cpu(fd->fd.FDNext),
1254                le32_to_cpu(fd->fd.FDSystem),
1255                le32_to_cpu(fd->fd.FDStat),
1256                le32_to_cpu(fd->fd.FDCtl));
1257         printk("BD: ");
1258         for (i = 0; i < RX_BUF_NUM; i++)
1259                 printk(" %08x %08x",
1260                        le32_to_cpu(fd->bd[i].BuffData),
1261                        le32_to_cpu(fd->bd[i].BDCtl));
1262         printk("\n");
1263 }
1264 #endif
1265
1266 #ifdef DEBUG
1267 static void
1268 panic_queues(struct net_device *dev)
1269 {
1270         struct tc35815_local *lp = netdev_priv(dev);
1271         int i;
1272
1273         printk("TxFD base %p, start %u, end %u\n",
1274                lp->tfd_base, lp->tfd_start, lp->tfd_end);
1275         printk("RxFD base %p limit %p cur %p\n",
1276                lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
1277         printk("FrFD %p\n", lp->fbl_ptr);
1278         for (i = 0; i < TX_FD_NUM; i++)
1279                 dump_txfd(&lp->tfd_base[i]);
1280         for (i = 0; i < RX_FD_NUM; i++) {
1281                 int bd_count = dump_rxfd(&lp->rfd_base[i]);
1282                 i += (bd_count + 1) / 2;        /* skip BDs */
1283         }
1284         dump_frfd(lp->fbl_ptr);
1285         panic("%s: Illegal queue state.", dev->name);
1286 }
1287 #endif
1288
1289 static void print_eth(const u8 *add)
1290 {
1291         DECLARE_MAC_BUF(mac);
1292
1293         printk(KERN_DEBUG "print_eth(%p)\n", add);
1294         printk(KERN_DEBUG " %s =>", print_mac(mac, add + 6));
1295         printk(KERN_CONT " %s : %02x%02x\n",
1296                 print_mac(mac, add), add[12], add[13]);
1297 }
1298
1299 static int tc35815_tx_full(struct net_device *dev)
1300 {
1301         struct tc35815_local *lp = netdev_priv(dev);
1302         return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1303 }
1304
1305 static void tc35815_restart(struct net_device *dev)
1306 {
1307         struct tc35815_local *lp = netdev_priv(dev);
1308
1309         if (lp->phy_dev) {
1310                 int timeout;
1311
1312                 phy_write(lp->phy_dev, MII_BMCR, BMCR_RESET);
1313                 timeout = 100;
1314                 while (--timeout) {
1315                         if (!(phy_read(lp->phy_dev, MII_BMCR) & BMCR_RESET))
1316                                 break;
1317                         udelay(1);
1318                 }
1319                 if (!timeout)
1320                         printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1321         }
1322
1323         spin_lock_irq(&lp->lock);
1324         tc35815_chip_reset(dev);
1325         tc35815_clear_queues(dev);
1326         tc35815_chip_init(dev);
1327         /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1328         tc35815_set_multicast_list(dev);
1329         spin_unlock_irq(&lp->lock);
1330
1331         netif_wake_queue(dev);
1332 }
1333
1334 static void tc35815_restart_work(struct work_struct *work)
1335 {
1336         struct tc35815_local *lp =
1337                 container_of(work, struct tc35815_local, restart_work);
1338         struct net_device *dev = lp->dev;
1339
1340         tc35815_restart(dev);
1341 }
1342
1343 static void tc35815_schedule_restart(struct net_device *dev)
1344 {
1345         struct tc35815_local *lp = netdev_priv(dev);
1346         struct tc35815_regs __iomem *tr =
1347                 (struct tc35815_regs __iomem *)dev->base_addr;
1348
1349         /* disable interrupts */
1350         tc_writel(0, &tr->Int_En);
1351         tc_writel(tc_readl(&tr->DMA_Ctl) | DMA_IntMask, &tr->DMA_Ctl);
1352         schedule_work(&lp->restart_work);
1353 }
1354
1355 static void tc35815_tx_timeout(struct net_device *dev)
1356 {
1357         struct tc35815_regs __iomem *tr =
1358                 (struct tc35815_regs __iomem *)dev->base_addr;
1359
1360         printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
1361                dev->name, tc_readl(&tr->Tx_Stat));
1362
1363         /* Try to restart the adaptor. */
1364         tc35815_schedule_restart(dev);
1365         dev->stats.tx_errors++;
1366 }
1367
1368 /*
1369  * Open/initialize the controller. This is called (in the current kernel)
1370  * sometime after booting when the 'ifconfig' program is run.
1371  *
1372  * This routine should set everything up anew at each open, even
1373  * registers that "should" only need to be set once at boot, so that
1374  * there is non-reboot way to recover if something goes wrong.
1375  */
1376 static int
1377 tc35815_open(struct net_device *dev)
1378 {
1379         struct tc35815_local *lp = netdev_priv(dev);
1380
1381         /*
1382          * This is used if the interrupt line can turned off (shared).
1383          * See 3c503.c for an example of selecting the IRQ at config-time.
1384          */
1385         if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED,
1386                         dev->name, dev))
1387                 return -EAGAIN;
1388
1389         tc35815_chip_reset(dev);
1390
1391         if (tc35815_init_queues(dev) != 0) {
1392                 free_irq(dev->irq, dev);
1393                 return -EAGAIN;
1394         }
1395
1396 #ifdef TC35815_NAPI
1397         napi_enable(&lp->napi);
1398 #endif
1399
1400         /* Reset the hardware here. Don't forget to set the station address. */
1401         spin_lock_irq(&lp->lock);
1402         tc35815_chip_init(dev);
1403         spin_unlock_irq(&lp->lock);
1404
1405         netif_carrier_off(dev);
1406         /* schedule a link state check */
1407         phy_start(lp->phy_dev);
1408
1409         /* We are now ready to accept transmit requeusts from
1410          * the queueing layer of the networking.
1411          */
1412         netif_start_queue(dev);
1413
1414         return 0;
1415 }
1416
1417 /* This will only be invoked if your driver is _not_ in XOFF state.
1418  * What this means is that you need not check it, and that this
1419  * invariant will hold if you make sure that the netif_*_queue()
1420  * calls are done at the proper times.
1421  */
1422 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1423 {
1424         struct tc35815_local *lp = netdev_priv(dev);
1425         struct TxFD *txfd;
1426         unsigned long flags;
1427
1428         /* If some error occurs while trying to transmit this
1429          * packet, you should return '1' from this function.
1430          * In such a case you _may not_ do anything to the
1431          * SKB, it is still owned by the network queueing
1432          * layer when an error is returned.  This means you
1433          * may not modify any SKB fields, you may not free
1434          * the SKB, etc.
1435          */
1436
1437         /* This is the most common case for modern hardware.
1438          * The spinlock protects this code from the TX complete
1439          * hardware interrupt handler.  Queue flow control is
1440          * thus managed under this lock as well.
1441          */
1442         spin_lock_irqsave(&lp->lock, flags);
1443
1444         /* failsafe... (handle txdone now if half of FDs are used) */
1445         if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
1446             TX_FD_NUM / 2)
1447                 tc35815_txdone(dev);
1448
1449         if (netif_msg_pktdata(lp))
1450                 print_eth(skb->data);
1451 #ifdef DEBUG
1452         if (lp->tx_skbs[lp->tfd_start].skb) {
1453                 printk("%s: tx_skbs conflict.\n", dev->name);
1454                 panic_queues(dev);
1455         }
1456 #else
1457         BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
1458 #endif
1459         lp->tx_skbs[lp->tfd_start].skb = skb;
1460         lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1461
1462         /*add to ring */
1463         txfd = &lp->tfd_base[lp->tfd_start];
1464         txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
1465         txfd->bd.BDCtl = cpu_to_le32(skb->len);
1466         txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
1467         txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
1468
1469         if (lp->tfd_start == lp->tfd_end) {
1470                 struct tc35815_regs __iomem *tr =
1471                         (struct tc35815_regs __iomem *)dev->base_addr;
1472                 /* Start DMA Transmitter. */
1473                 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1474 #ifdef GATHER_TXINT
1475                 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1476 #endif
1477                 if (netif_msg_tx_queued(lp)) {
1478                         printk("%s: starting TxFD.\n", dev->name);
1479                         dump_txfd(txfd);
1480                 }
1481                 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1482         } else {
1483                 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
1484                 if (netif_msg_tx_queued(lp)) {
1485                         printk("%s: queueing TxFD.\n", dev->name);
1486                         dump_txfd(txfd);
1487                 }
1488         }
1489         lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1490
1491         dev->trans_start = jiffies;
1492
1493         /* If we just used up the very last entry in the
1494          * TX ring on this device, tell the queueing
1495          * layer to send no more.
1496          */
1497         if (tc35815_tx_full(dev)) {
1498                 if (netif_msg_tx_queued(lp))
1499                         printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1500                 netif_stop_queue(dev);
1501         }
1502
1503         /* When the TX completion hw interrupt arrives, this
1504          * is when the transmit statistics are updated.
1505          */
1506
1507         spin_unlock_irqrestore(&lp->lock, flags);
1508         return 0;
1509 }
1510
1511 #define FATAL_ERROR_INT \
1512         (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
1513 static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1514 {
1515         static int count;
1516         printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1517                dev->name, status);
1518         if (status & Int_IntPCI)
1519                 printk(" IntPCI");
1520         if (status & Int_DmParErr)
1521                 printk(" DmParErr");
1522         if (status & Int_IntNRAbt)
1523                 printk(" IntNRAbt");
1524         printk("\n");
1525         if (count++ > 100)
1526                 panic("%s: Too many fatal errors.", dev->name);
1527         printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1528         /* Try to restart the adaptor. */
1529         tc35815_schedule_restart(dev);
1530 }
1531
1532 #ifdef TC35815_NAPI
1533 static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1534 #else
1535 static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1536 #endif
1537 {
1538         struct tc35815_local *lp = netdev_priv(dev);
1539         struct tc35815_regs __iomem *tr =
1540                 (struct tc35815_regs __iomem *)dev->base_addr;
1541         int ret = -1;
1542
1543         /* Fatal errors... */
1544         if (status & FATAL_ERROR_INT) {
1545                 tc35815_fatal_error_interrupt(dev, status);
1546                 return 0;
1547         }
1548         /* recoverable errors */
1549         if (status & Int_IntFDAEx) {
1550                 /* disable FDAEx int. (until we make rooms...) */
1551                 tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
1552                 printk(KERN_WARNING
1553                        "%s: Free Descriptor Area Exhausted (%#x).\n",
1554                        dev->name, status);
1555                 dev->stats.rx_dropped++;
1556                 ret = 0;
1557         }
1558         if (status & Int_IntBLEx) {
1559                 /* disable BLEx int. (until we make rooms...) */
1560                 tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
1561                 printk(KERN_WARNING
1562                        "%s: Buffer List Exhausted (%#x).\n",
1563                        dev->name, status);
1564                 dev->stats.rx_dropped++;
1565                 ret = 0;
1566         }
1567         if (status & Int_IntExBD) {
1568                 printk(KERN_WARNING
1569                        "%s: Excessive Buffer Descriptiors (%#x).\n",
1570                        dev->name, status);
1571                 dev->stats.rx_length_errors++;
1572                 ret = 0;
1573         }
1574
1575         /* normal notification */
1576         if (status & Int_IntMacRx) {
1577                 /* Got a packet(s). */
1578 #ifdef TC35815_NAPI
1579                 ret = tc35815_rx(dev, limit);
1580 #else
1581                 tc35815_rx(dev);
1582                 ret = 0;
1583 #endif
1584                 lp->lstats.rx_ints++;
1585         }
1586         if (status & Int_IntMacTx) {
1587                 /* Transmit complete. */
1588                 lp->lstats.tx_ints++;
1589                 tc35815_txdone(dev);
1590                 netif_wake_queue(dev);
1591                 ret = 0;
1592         }
1593         return ret;
1594 }
1595
1596 /*
1597  * The typical workload of the driver:
1598  * Handle the network interface interrupts.
1599  */
1600 static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
1601 {
1602         struct net_device *dev = dev_id;
1603         struct tc35815_local *lp = netdev_priv(dev);
1604         struct tc35815_regs __iomem *tr =
1605                 (struct tc35815_regs __iomem *)dev->base_addr;
1606 #ifdef TC35815_NAPI
1607         u32 dmactl = tc_readl(&tr->DMA_Ctl);
1608
1609         if (!(dmactl & DMA_IntMask)) {
1610                 /* disable interrupts */
1611                 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
1612                 if (netif_rx_schedule_prep(dev, &lp->napi))
1613                         __netif_rx_schedule(dev, &lp->napi);
1614                 else {
1615                         printk(KERN_ERR "%s: interrupt taken in poll\n",
1616                                dev->name);
1617                         BUG();
1618                 }
1619                 (void)tc_readl(&tr->Int_Src);   /* flush */
1620                 return IRQ_HANDLED;
1621         }
1622         return IRQ_NONE;
1623 #else
1624         int handled;
1625         u32 status;
1626
1627         spin_lock(&lp->lock);
1628         status = tc_readl(&tr->Int_Src);
1629         tc_writel(status, &tr->Int_Src);        /* write to clear */
1630         handled = tc35815_do_interrupt(dev, status);
1631         (void)tc_readl(&tr->Int_Src);   /* flush */
1632         spin_unlock(&lp->lock);
1633         return IRQ_RETVAL(handled >= 0);
1634 #endif /* TC35815_NAPI */
1635 }
1636
1637 #ifdef CONFIG_NET_POLL_CONTROLLER
1638 static void tc35815_poll_controller(struct net_device *dev)
1639 {
1640         disable_irq(dev->irq);
1641         tc35815_interrupt(dev->irq, dev);
1642         enable_irq(dev->irq);
1643 }
1644 #endif
1645
1646 /* We have a good packet(s), get it/them out of the buffers. */
1647 #ifdef TC35815_NAPI
1648 static int
1649 tc35815_rx(struct net_device *dev, int limit)
1650 #else
1651 static void
1652 tc35815_rx(struct net_device *dev)
1653 #endif
1654 {
1655         struct tc35815_local *lp = netdev_priv(dev);
1656         unsigned int fdctl;
1657         int i;
1658         int buf_free_count = 0;
1659         int fd_free_count = 0;
1660 #ifdef TC35815_NAPI
1661         int received = 0;
1662 #endif
1663
1664         while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1665                 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1666                 int pkt_len = fdctl & FD_FDLength_MASK;
1667                 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1668 #ifdef DEBUG
1669                 struct RxFD *next_rfd;
1670 #endif
1671 #if (RX_CTL_CMD & Rx_StripCRC) == 0
1672                 pkt_len -= 4;
1673 #endif
1674
1675                 if (netif_msg_rx_status(lp))
1676                         dump_rxfd(lp->rfd_cur);
1677                 if (status & Rx_Good) {
1678                         struct sk_buff *skb;
1679                         unsigned char *data;
1680                         int cur_bd;
1681 #ifdef TC35815_USE_PACKEDBUFFER
1682                         int offset;
1683 #endif
1684
1685 #ifdef TC35815_NAPI
1686                         if (--limit < 0)
1687                                 break;
1688 #endif
1689 #ifdef TC35815_USE_PACKEDBUFFER
1690                         BUG_ON(bd_count > 2);
1691                         skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
1692                         if (skb == NULL) {
1693                                 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1694                                        dev->name);
1695                                 dev->stats.rx_dropped++;
1696                                 break;
1697                         }
1698                         skb_reserve(skb, 2);   /* 16 bit alignment */
1699
1700                         data = skb_put(skb, pkt_len);
1701
1702                         /* copy from receive buffer */
1703                         cur_bd = 0;
1704                         offset = 0;
1705                         while (offset < pkt_len && cur_bd < bd_count) {
1706                                 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1707                                         BD_BuffLength_MASK;
1708                                 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
1709                                 void *rxbuf = rxbuf_bus_to_virt(lp, dma);
1710                                 if (offset + len > pkt_len)
1711                                         len = pkt_len - offset;
1712 #ifdef TC35815_DMA_SYNC_ONDEMAND
1713                                 pci_dma_sync_single_for_cpu(lp->pci_dev,
1714                                                             dma, len,
1715                                                             PCI_DMA_FROMDEVICE);
1716 #endif
1717                                 memcpy(data + offset, rxbuf, len);
1718 #ifdef TC35815_DMA_SYNC_ONDEMAND
1719                                 pci_dma_sync_single_for_device(lp->pci_dev,
1720                                                                dma, len,
1721                                                                PCI_DMA_FROMDEVICE);
1722 #endif
1723                                 offset += len;
1724                                 cur_bd++;
1725                         }
1726 #else /* TC35815_USE_PACKEDBUFFER */
1727                         BUG_ON(bd_count > 1);
1728                         cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
1729                                   & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1730 #ifdef DEBUG
1731                         if (cur_bd >= RX_BUF_NUM) {
1732                                 printk("%s: invalid BDID.\n", dev->name);
1733                                 panic_queues(dev);
1734                         }
1735                         BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
1736                                (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
1737                         if (!lp->rx_skbs[cur_bd].skb) {
1738                                 printk("%s: NULL skb.\n", dev->name);
1739                                 panic_queues(dev);
1740                         }
1741 #else
1742                         BUG_ON(cur_bd >= RX_BUF_NUM);
1743 #endif
1744                         skb = lp->rx_skbs[cur_bd].skb;
1745                         prefetch(skb->data);
1746                         lp->rx_skbs[cur_bd].skb = NULL;
1747                         pci_unmap_single(lp->pci_dev,
1748                                          lp->rx_skbs[cur_bd].skb_dma,
1749                                          RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1750                         if (!HAVE_DMA_RXALIGN(lp))
1751                                 memmove(skb->data, skb->data - 2, pkt_len);
1752                         data = skb_put(skb, pkt_len);
1753 #endif /* TC35815_USE_PACKEDBUFFER */
1754                         if (netif_msg_pktdata(lp))
1755                                 print_eth(data);
1756                         skb->protocol = eth_type_trans(skb, dev);
1757 #ifdef TC35815_NAPI
1758                         netif_receive_skb(skb);
1759                         received++;
1760 #else
1761                         netif_rx(skb);
1762 #endif
1763                         dev->last_rx = jiffies;
1764                         dev->stats.rx_packets++;
1765                         dev->stats.rx_bytes += pkt_len;
1766                 } else {
1767                         dev->stats.rx_errors++;
1768                         printk(KERN_DEBUG "%s: Rx error (status %x)\n",
1769                                dev->name, status & Rx_Stat_Mask);
1770                         /* WORKAROUND: LongErr and CRCErr means Overflow. */
1771                         if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1772                                 status &= ~(Rx_LongErr|Rx_CRCErr);
1773                                 status |= Rx_Over;
1774                         }
1775                         if (status & Rx_LongErr)
1776                                 dev->stats.rx_length_errors++;
1777                         if (status & Rx_Over)
1778                                 dev->stats.rx_fifo_errors++;
1779                         if (status & Rx_CRCErr)
1780                                 dev->stats.rx_crc_errors++;
1781                         if (status & Rx_Align)
1782                                 dev->stats.rx_frame_errors++;
1783                 }
1784
1785                 if (bd_count > 0) {
1786                         /* put Free Buffer back to controller */
1787                         int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1788                         unsigned char id =
1789                                 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1790 #ifdef DEBUG
1791                         if (id >= RX_BUF_NUM) {
1792                                 printk("%s: invalid BDID.\n", dev->name);
1793                                 panic_queues(dev);
1794                         }
1795 #else
1796                         BUG_ON(id >= RX_BUF_NUM);
1797 #endif
1798                         /* free old buffers */
1799 #ifdef TC35815_USE_PACKEDBUFFER
1800                         while (lp->fbl_curid != id)
1801 #else
1802                         lp->fbl_count--;
1803                         while (lp->fbl_count < RX_BUF_NUM)
1804 #endif
1805                         {
1806 #ifdef TC35815_USE_PACKEDBUFFER
1807                                 unsigned char curid = lp->fbl_curid;
1808 #else
1809                                 unsigned char curid =
1810                                         (id + 1 + lp->fbl_count) % RX_BUF_NUM;
1811 #endif
1812                                 struct BDesc *bd = &lp->fbl_ptr->bd[curid];
1813 #ifdef DEBUG
1814                                 bdctl = le32_to_cpu(bd->BDCtl);
1815                                 if (bdctl & BD_CownsBD) {
1816                                         printk("%s: Freeing invalid BD.\n",
1817                                                dev->name);
1818                                         panic_queues(dev);
1819                                 }
1820 #endif
1821                                 /* pass BD to controller */
1822 #ifndef TC35815_USE_PACKEDBUFFER
1823                                 if (!lp->rx_skbs[curid].skb) {
1824                                         lp->rx_skbs[curid].skb =
1825                                                 alloc_rxbuf_skb(dev,
1826                                                                 lp->pci_dev,
1827                                                                 &lp->rx_skbs[curid].skb_dma);
1828                                         if (!lp->rx_skbs[curid].skb)
1829                                                 break; /* try on next reception */
1830                                         bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
1831                                 }
1832 #endif /* TC35815_USE_PACKEDBUFFER */
1833                                 /* Note: BDLength was modified by chip. */
1834                                 bd->BDCtl = cpu_to_le32(BD_CownsBD |
1835                                                         (curid << BD_RxBDID_SHIFT) |
1836                                                         RX_BUF_SIZE);
1837 #ifdef TC35815_USE_PACKEDBUFFER
1838                                 lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
1839                                 if (netif_msg_rx_status(lp)) {
1840                                         printk("%s: Entering new FBD %d\n",
1841                                                dev->name, lp->fbl_curid);
1842                                         dump_frfd(lp->fbl_ptr);
1843                                 }
1844 #else
1845                                 lp->fbl_count++;
1846 #endif
1847                                 buf_free_count++;
1848                         }
1849                 }
1850
1851                 /* put RxFD back to controller */
1852 #ifdef DEBUG
1853                 next_rfd = fd_bus_to_virt(lp,
1854                                           le32_to_cpu(lp->rfd_cur->fd.FDNext));
1855                 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1856                         printk("%s: RxFD FDNext invalid.\n", dev->name);
1857                         panic_queues(dev);
1858                 }
1859 #endif
1860                 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
1861                         /* pass FD to controller */
1862 #ifdef DEBUG
1863                         lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
1864 #else
1865                         lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
1866 #endif
1867                         lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1868                         lp->rfd_cur++;
1869                         fd_free_count++;
1870                 }
1871                 if (lp->rfd_cur > lp->rfd_limit)
1872                         lp->rfd_cur = lp->rfd_base;
1873 #ifdef DEBUG
1874                 if (lp->rfd_cur != next_rfd)
1875                         printk("rfd_cur = %p, next_rfd %p\n",
1876                                lp->rfd_cur, next_rfd);
1877 #endif
1878         }
1879
1880         /* re-enable BL/FDA Exhaust interrupts. */
1881         if (fd_free_count) {
1882                 struct tc35815_regs __iomem *tr =
1883                         (struct tc35815_regs __iomem *)dev->base_addr;
1884                 u32 en, en_old = tc_readl(&tr->Int_En);
1885                 en = en_old | Int_FDAExEn;
1886                 if (buf_free_count)
1887                         en |= Int_BLExEn;
1888                 if (en != en_old)
1889                         tc_writel(en, &tr->Int_En);
1890         }
1891 #ifdef TC35815_NAPI
1892         return received;
1893 #endif
1894 }
1895
1896 #ifdef TC35815_NAPI
1897 static int tc35815_poll(struct napi_struct *napi, int budget)
1898 {
1899         struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi);
1900         struct net_device *dev = lp->dev;
1901         struct tc35815_regs __iomem *tr =
1902                 (struct tc35815_regs __iomem *)dev->base_addr;
1903         int received = 0, handled;
1904         u32 status;
1905
1906         spin_lock(&lp->lock);
1907         status = tc_readl(&tr->Int_Src);
1908         do {
1909                 tc_writel(status, &tr->Int_Src);        /* write to clear */
1910
1911                 handled = tc35815_do_interrupt(dev, status, limit);
1912                 if (handled >= 0) {
1913                         received += handled;
1914                         if (received >= budget)
1915                                 break;
1916                 }
1917                 status = tc_readl(&tr->Int_Src);
1918         } while (status);
1919         spin_unlock(&lp->lock);
1920
1921         if (received < budget) {
1922                 netif_rx_complete(dev, napi);
1923                 /* enable interrupts */
1924                 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
1925         }
1926         return received;
1927 }
1928 #endif
1929
1930 #ifdef NO_CHECK_CARRIER
1931 #define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1932 #else
1933 #define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1934 #endif
1935
1936 static void
1937 tc35815_check_tx_stat(struct net_device *dev, int status)
1938 {
1939         struct tc35815_local *lp = netdev_priv(dev);
1940         const char *msg = NULL;
1941
1942         /* count collisions */
1943         if (status & Tx_ExColl)
1944                 dev->stats.collisions += 16;
1945         if (status & Tx_TxColl_MASK)
1946                 dev->stats.collisions += status & Tx_TxColl_MASK;
1947
1948 #ifndef NO_CHECK_CARRIER
1949         /* TX4939 does not have NCarr */
1950         if (lp->chiptype == TC35815_TX4939)
1951                 status &= ~Tx_NCarr;
1952 #ifdef WORKAROUND_LOSTCAR
1953         /* WORKAROUND: ignore LostCrS in full duplex operation */
1954         if (!lp->link || lp->duplex == DUPLEX_FULL)
1955                 status &= ~Tx_NCarr;
1956 #endif
1957 #endif
1958
1959         if (!(status & TX_STA_ERR)) {
1960                 /* no error. */
1961                 dev->stats.tx_packets++;
1962                 return;
1963         }
1964
1965         dev->stats.tx_errors++;
1966         if (status & Tx_ExColl) {
1967                 dev->stats.tx_aborted_errors++;
1968                 msg = "Excessive Collision.";
1969         }
1970         if (status & Tx_Under) {
1971                 dev->stats.tx_fifo_errors++;
1972                 msg = "Tx FIFO Underrun.";
1973                 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1974                         lp->lstats.tx_underrun++;
1975                         if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
1976                                 struct tc35815_regs __iomem *tr =
1977                                         (struct tc35815_regs __iomem *)dev->base_addr;
1978                                 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
1979                                 msg = "Tx FIFO Underrun.Change Tx threshold to max.";
1980                         }
1981                 }
1982         }
1983         if (status & Tx_Defer) {
1984                 dev->stats.tx_fifo_errors++;
1985                 msg = "Excessive Deferral.";
1986         }
1987 #ifndef NO_CHECK_CARRIER
1988         if (status & Tx_NCarr) {
1989                 dev->stats.tx_carrier_errors++;
1990                 msg = "Lost Carrier Sense.";
1991         }
1992 #endif
1993         if (status & Tx_LateColl) {
1994                 dev->stats.tx_aborted_errors++;
1995                 msg = "Late Collision.";
1996         }
1997         if (status & Tx_TxPar) {
1998                 dev->stats.tx_fifo_errors++;
1999                 msg = "Transmit Parity Error.";
2000         }
2001         if (status & Tx_SQErr) {
2002                 dev->stats.tx_heartbeat_errors++;
2003                 msg = "Signal Quality Error.";
2004         }
2005         if (msg && netif_msg_tx_err(lp))
2006                 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
2007 }
2008
2009 /* This handles TX complete events posted by the device
2010  * via interrupts.
2011  */
2012 static void
2013 tc35815_txdone(struct net_device *dev)
2014 {
2015         struct tc35815_local *lp = netdev_priv(dev);
2016         struct TxFD *txfd;
2017         unsigned int fdctl;
2018
2019         txfd = &lp->tfd_base[lp->tfd_end];
2020         while (lp->tfd_start != lp->tfd_end &&
2021                !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
2022                 int status = le32_to_cpu(txfd->fd.FDStat);
2023                 struct sk_buff *skb;
2024                 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
2025                 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
2026
2027                 if (netif_msg_tx_done(lp)) {
2028                         printk("%s: complete TxFD.\n", dev->name);
2029                         dump_txfd(txfd);
2030                 }
2031                 tc35815_check_tx_stat(dev, status);
2032
2033                 skb = fdsystem != 0xffffffff ?
2034                         lp->tx_skbs[fdsystem].skb : NULL;
2035 #ifdef DEBUG
2036                 if (lp->tx_skbs[lp->tfd_end].skb != skb) {
2037                         printk("%s: tx_skbs mismatch.\n", dev->name);
2038                         panic_queues(dev);
2039                 }
2040 #else
2041                 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
2042 #endif
2043                 if (skb) {
2044                         dev->stats.tx_bytes += skb->len;
2045                         pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
2046                         lp->tx_skbs[lp->tfd_end].skb = NULL;
2047                         lp->tx_skbs[lp->tfd_end].skb_dma = 0;
2048 #ifdef TC35815_NAPI
2049                         dev_kfree_skb_any(skb);
2050 #else
2051                         dev_kfree_skb_irq(skb);
2052 #endif
2053                 }
2054                 txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
2055
2056                 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
2057                 txfd = &lp->tfd_base[lp->tfd_end];
2058 #ifdef DEBUG
2059                 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
2060                         printk("%s: TxFD FDNext invalid.\n", dev->name);
2061                         panic_queues(dev);
2062                 }
2063 #endif
2064                 if (fdnext & FD_Next_EOL) {
2065                         /* DMA Transmitter has been stopping... */
2066                         if (lp->tfd_end != lp->tfd_start) {
2067                                 struct tc35815_regs __iomem *tr =
2068                                         (struct tc35815_regs __iomem *)dev->base_addr;
2069                                 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
2070                                 struct TxFD *txhead = &lp->tfd_base[head];
2071                                 int qlen = (lp->tfd_start + TX_FD_NUM
2072                                             - lp->tfd_end) % TX_FD_NUM;
2073
2074 #ifdef DEBUG
2075                                 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
2076                                         printk("%s: TxFD FDCtl invalid.\n", dev->name);
2077                                         panic_queues(dev);
2078                                 }
2079 #endif
2080                                 /* log max queue length */
2081                                 if (lp->lstats.max_tx_qlen < qlen)
2082                                         lp->lstats.max_tx_qlen = qlen;
2083
2084
2085                                 /* start DMA Transmitter again */
2086                                 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
2087 #ifdef GATHER_TXINT
2088                                 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
2089 #endif
2090                                 if (netif_msg_tx_queued(lp)) {
2091                                         printk("%s: start TxFD on queue.\n",
2092                                                dev->name);
2093                                         dump_txfd(txfd);
2094                                 }
2095                                 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
2096                         }
2097                         break;
2098                 }
2099         }
2100
2101         /* If we had stopped the queue due to a "tx full"
2102          * condition, and space has now been made available,
2103          * wake up the queue.
2104          */
2105         if (netif_queue_stopped(dev) && !tc35815_tx_full(dev))
2106                 netif_wake_queue(dev);
2107 }
2108
2109 /* The inverse routine to tc35815_open(). */
2110 static int
2111 tc35815_close(struct net_device *dev)
2112 {
2113         struct tc35815_local *lp = netdev_priv(dev);
2114
2115         netif_stop_queue(dev);
2116 #ifdef TC35815_NAPI
2117         napi_disable(&lp->napi);
2118 #endif
2119         if (lp->phy_dev)
2120                 phy_stop(lp->phy_dev);
2121         cancel_work_sync(&lp->restart_work);
2122
2123         /* Flush the Tx and disable Rx here. */
2124         tc35815_chip_reset(dev);
2125         free_irq(dev->irq, dev);
2126
2127         tc35815_free_queues(dev);
2128
2129         return 0;
2130
2131 }
2132
2133 /*
2134  * Get the current statistics.
2135  * This may be called with the card open or closed.
2136  */
2137 static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
2138 {
2139         struct tc35815_regs __iomem *tr =
2140                 (struct tc35815_regs __iomem *)dev->base_addr;
2141         if (netif_running(dev))
2142                 /* Update the statistics from the device registers. */
2143                 dev->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
2144
2145         return &dev->stats;
2146 }
2147
2148 static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
2149 {
2150         struct tc35815_local *lp = netdev_priv(dev);
2151         struct tc35815_regs __iomem *tr =
2152                 (struct tc35815_regs __iomem *)dev->base_addr;
2153         int cam_index = index * 6;
2154         u32 cam_data;
2155         u32 saved_addr;
2156         DECLARE_MAC_BUF(mac);
2157
2158         saved_addr = tc_readl(&tr->CAM_Adr);
2159
2160         if (netif_msg_hw(lp))
2161                 printk(KERN_DEBUG "%s: CAM %d: %s\n",
2162                         dev->name, index, print_mac(mac, addr));
2163         if (index & 1) {
2164                 /* read modify write */
2165                 tc_writel(cam_index - 2, &tr->CAM_Adr);
2166                 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
2167                 cam_data |= addr[0] << 8 | addr[1];
2168                 tc_writel(cam_data, &tr->CAM_Data);
2169                 /* write whole word */
2170                 tc_writel(cam_index + 2, &tr->CAM_Adr);
2171                 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
2172                 tc_writel(cam_data, &tr->CAM_Data);
2173         } else {
2174                 /* write whole word */
2175                 tc_writel(cam_index, &tr->CAM_Adr);
2176                 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
2177                 tc_writel(cam_data, &tr->CAM_Data);
2178                 /* read modify write */
2179                 tc_writel(cam_index + 4, &tr->CAM_Adr);
2180                 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
2181                 cam_data |= addr[4] << 24 | (addr[5] << 16);
2182                 tc_writel(cam_data, &tr->CAM_Data);
2183         }
2184
2185         tc_writel(saved_addr, &tr->CAM_Adr);
2186 }
2187
2188
2189 /*
2190  * Set or clear the multicast filter for this adaptor.
2191  * num_addrs == -1      Promiscuous mode, receive all packets
2192  * num_addrs == 0       Normal mode, clear multicast list
2193  * num_addrs > 0        Multicast mode, receive normal and MC packets,
2194  *                      and do best-effort filtering.
2195  */
2196 static void
2197 tc35815_set_multicast_list(struct net_device *dev)
2198 {
2199         struct tc35815_regs __iomem *tr =
2200                 (struct tc35815_regs __iomem *)dev->base_addr;
2201
2202         if (dev->flags & IFF_PROMISC) {
2203 #ifdef WORKAROUND_100HALF_PROMISC
2204                 /* With some (all?) 100MHalf HUB, controller will hang
2205                  * if we enabled promiscuous mode before linkup... */
2206                 struct tc35815_local *lp = netdev_priv(dev);
2207
2208                 if (!lp->link)
2209                         return;
2210 #endif
2211                 /* Enable promiscuous mode */
2212                 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2213         } else if ((dev->flags & IFF_ALLMULTI) ||
2214                   dev->mc_count > CAM_ENTRY_MAX - 3) {
2215                 /* CAM 0, 1, 20 are reserved. */
2216                 /* Disable promiscuous mode, use normal mode. */
2217                 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2218         } else if (dev->mc_count) {
2219                 struct dev_mc_list *cur_addr = dev->mc_list;
2220                 int i;
2221                 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2222
2223                 tc_writel(0, &tr->CAM_Ctl);
2224                 /* Walk the address list, and load the filter */
2225                 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
2226                         if (!cur_addr)
2227                                 break;
2228                         /* entry 0,1 is reserved. */
2229                         tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
2230                         ena_bits |= CAM_Ena_Bit(i + 2);
2231                 }
2232                 tc_writel(ena_bits, &tr->CAM_Ena);
2233                 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2234         } else {
2235                 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2236                 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2237         }
2238 }
2239
2240 static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2241 {
2242         struct tc35815_local *lp = netdev_priv(dev);
2243         strcpy(info->driver, MODNAME);
2244         strcpy(info->version, DRV_VERSION);
2245         strcpy(info->bus_info, pci_name(lp->pci_dev));
2246 }
2247
2248 static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2249 {
2250         struct tc35815_local *lp = netdev_priv(dev);
2251
2252         if (!lp->phy_dev)
2253                 return -ENODEV;
2254         return phy_ethtool_gset(lp->phy_dev, cmd);
2255 }
2256
2257 static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2258 {
2259         struct tc35815_local *lp = netdev_priv(dev);
2260
2261         if (!lp->phy_dev)
2262                 return -ENODEV;
2263         return phy_ethtool_sset(lp->phy_dev, cmd);
2264 }
2265
2266 static u32 tc35815_get_msglevel(struct net_device *dev)
2267 {
2268         struct tc35815_local *lp = netdev_priv(dev);
2269         return lp->msg_enable;
2270 }
2271
2272 static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2273 {
2274         struct tc35815_local *lp = netdev_priv(dev);
2275         lp->msg_enable = datum;
2276 }
2277
2278 static int tc35815_get_sset_count(struct net_device *dev, int sset)
2279 {
2280         struct tc35815_local *lp = netdev_priv(dev);
2281
2282         switch (sset) {
2283         case ETH_SS_STATS:
2284                 return sizeof(lp->lstats) / sizeof(int);
2285         default:
2286                 return -EOPNOTSUPP;
2287         }
2288 }
2289
2290 static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2291 {
2292         struct tc35815_local *lp = netdev_priv(dev);
2293         data[0] = lp->lstats.max_tx_qlen;
2294         data[1] = lp->lstats.tx_ints;
2295         data[2] = lp->lstats.rx_ints;
2296         data[3] = lp->lstats.tx_underrun;
2297 }
2298
2299 static struct {
2300         const char str[ETH_GSTRING_LEN];
2301 } ethtool_stats_keys[] = {
2302         { "max_tx_qlen" },
2303         { "tx_ints" },
2304         { "rx_ints" },
2305         { "tx_underrun" },
2306 };
2307
2308 static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2309 {
2310         memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2311 }
2312
2313 static const struct ethtool_ops tc35815_ethtool_ops = {
2314         .get_drvinfo            = tc35815_get_drvinfo,
2315         .get_settings           = tc35815_get_settings,
2316         .set_settings           = tc35815_set_settings,
2317         .get_link               = ethtool_op_get_link,
2318         .get_msglevel           = tc35815_get_msglevel,
2319         .set_msglevel           = tc35815_set_msglevel,
2320         .get_strings            = tc35815_get_strings,
2321         .get_sset_count         = tc35815_get_sset_count,
2322         .get_ethtool_stats      = tc35815_get_ethtool_stats,
2323 };
2324
2325 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2326 {
2327         struct tc35815_local *lp = netdev_priv(dev);
2328
2329         if (!netif_running(dev))
2330                 return -EINVAL;
2331         if (!lp->phy_dev)
2332                 return -ENODEV;
2333         return phy_mii_ioctl(lp->phy_dev, if_mii(rq), cmd);
2334 }
2335
2336 static void tc35815_chip_reset(struct net_device *dev)
2337 {
2338         struct tc35815_regs __iomem *tr =
2339                 (struct tc35815_regs __iomem *)dev->base_addr;
2340         int i;
2341         /* reset the controller */
2342         tc_writel(MAC_Reset, &tr->MAC_Ctl);
2343         udelay(4); /* 3200ns */
2344         i = 0;
2345         while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
2346                 if (i++ > 100) {
2347                         printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
2348                         break;
2349                 }
2350                 mdelay(1);
2351         }
2352         tc_writel(0, &tr->MAC_Ctl);
2353
2354         /* initialize registers to default value */
2355         tc_writel(0, &tr->DMA_Ctl);
2356         tc_writel(0, &tr->TxThrsh);
2357         tc_writel(0, &tr->TxPollCtr);
2358         tc_writel(0, &tr->RxFragSize);
2359         tc_writel(0, &tr->Int_En);
2360         tc_writel(0, &tr->FDA_Bas);
2361         tc_writel(0, &tr->FDA_Lim);
2362         tc_writel(0xffffffff, &tr->Int_Src);    /* Write 1 to clear */
2363         tc_writel(0, &tr->CAM_Ctl);
2364         tc_writel(0, &tr->Tx_Ctl);
2365         tc_writel(0, &tr->Rx_Ctl);
2366         tc_writel(0, &tr->CAM_Ena);
2367         (void)tc_readl(&tr->Miss_Cnt);  /* Read to clear */
2368
2369         /* initialize internal SRAM */
2370         tc_writel(DMA_TestMode, &tr->DMA_Ctl);
2371         for (i = 0; i < 0x1000; i += 4) {
2372                 tc_writel(i, &tr->CAM_Adr);
2373                 tc_writel(0, &tr->CAM_Data);
2374         }
2375         tc_writel(0, &tr->DMA_Ctl);
2376 }
2377
2378 static void tc35815_chip_init(struct net_device *dev)
2379 {
2380         struct tc35815_local *lp = netdev_priv(dev);
2381         struct tc35815_regs __iomem *tr =
2382                 (struct tc35815_regs __iomem *)dev->base_addr;
2383         unsigned long txctl = TX_CTL_CMD;
2384
2385         /* load station address to CAM */
2386         tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
2387
2388         /* Enable CAM (broadcast and unicast) */
2389         tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2390         tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2391
2392         /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
2393         if (HAVE_DMA_RXALIGN(lp))
2394                 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
2395         else
2396                 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
2397 #ifdef TC35815_USE_PACKEDBUFFER
2398         tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize);   /* Packing */
2399 #else
2400         tc_writel(ETH_ZLEN, &tr->RxFragSize);
2401 #endif
2402         tc_writel(0, &tr->TxPollCtr);   /* Batch mode */
2403         tc_writel(TX_THRESHOLD, &tr->TxThrsh);
2404         tc_writel(INT_EN_CMD, &tr->Int_En);
2405
2406         /* set queues */
2407         tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
2408         tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
2409                   &tr->FDA_Lim);
2410         /*
2411          * Activation method:
2412          * First, enable the MAC Transmitter and the DMA Receive circuits.
2413          * Then enable the DMA Transmitter and the MAC Receive circuits.
2414          */
2415         tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr);      /* start DMA receiver */
2416         tc_writel(RX_CTL_CMD, &tr->Rx_Ctl);     /* start MAC receiver */
2417
2418         /* start MAC transmitter */
2419 #ifndef NO_CHECK_CARRIER
2420         /* TX4939 does not have EnLCarr */
2421         if (lp->chiptype == TC35815_TX4939)
2422                 txctl &= ~Tx_EnLCarr;
2423 #ifdef WORKAROUND_LOSTCAR
2424         /* WORKAROUND: ignore LostCrS in full duplex operation */
2425         if (!lp->phy_dev || !lp->link || lp->duplex == DUPLEX_FULL)
2426                 txctl &= ~Tx_EnLCarr;
2427 #endif
2428 #endif /* !NO_CHECK_CARRIER */
2429 #ifdef GATHER_TXINT
2430         txctl &= ~Tx_EnComp;    /* disable global tx completion int. */
2431 #endif
2432         tc_writel(txctl, &tr->Tx_Ctl);
2433 }
2434
2435 #ifdef CONFIG_PM
2436 static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2437 {
2438         struct net_device *dev = pci_get_drvdata(pdev);
2439         struct tc35815_local *lp = netdev_priv(dev);
2440         unsigned long flags;
2441
2442         pci_save_state(pdev);
2443         if (!netif_running(dev))
2444                 return 0;
2445         netif_device_detach(dev);
2446         if (lp->phy_dev)
2447                 phy_stop(lp->phy_dev);
2448         spin_lock_irqsave(&lp->lock, flags);
2449         tc35815_chip_reset(dev);
2450         spin_unlock_irqrestore(&lp->lock, flags);
2451         pci_set_power_state(pdev, PCI_D3hot);
2452         return 0;
2453 }
2454
2455 static int tc35815_resume(struct pci_dev *pdev)
2456 {
2457         struct net_device *dev = pci_get_drvdata(pdev);
2458         struct tc35815_local *lp = netdev_priv(dev);
2459
2460         pci_restore_state(pdev);
2461         if (!netif_running(dev))
2462                 return 0;
2463         pci_set_power_state(pdev, PCI_D0);
2464         tc35815_restart(dev);
2465         netif_carrier_off(dev);
2466         if (lp->phy_dev)
2467                 phy_start(lp->phy_dev);
2468         netif_device_attach(dev);
2469         return 0;
2470 }
2471 #endif /* CONFIG_PM */
2472
2473 static struct pci_driver tc35815_pci_driver = {
2474         .name           = MODNAME,
2475         .id_table       = tc35815_pci_tbl,
2476         .probe          = tc35815_init_one,
2477         .remove         = __devexit_p(tc35815_remove_one),
2478 #ifdef CONFIG_PM
2479         .suspend        = tc35815_suspend,
2480         .resume         = tc35815_resume,
2481 #endif
2482 };
2483
2484 module_param_named(speed, options.speed, int, 0);
2485 MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2486 module_param_named(duplex, options.duplex, int, 0);
2487 MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2488
2489 static int __init tc35815_init_module(void)
2490 {
2491         return pci_register_driver(&tc35815_pci_driver);
2492 }
2493
2494 static void __exit tc35815_cleanup_module(void)
2495 {
2496         pci_unregister_driver(&tc35815_pci_driver);
2497 }
2498
2499 module_init(tc35815_init_module);
2500 module_exit(tc35815_cleanup_module);
2501
2502 MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
2503 MODULE_LICENSE("GPL");