drivers/net/phy/marvell.c

   1 /*
   2  * drivers/net/phy/marvell.c
   3  *
   4  * Driver for Marvell PHYs
   5  *
   6  * Author: Andy Fleming
   7  *
   8  * Copyright (c) 2004 Freescale Semiconductor, Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  *
  15  */
  16 #include <linux/kernel.h>
  17 #include <linux/string.h>
  18 #include <linux/errno.h>
  19 #include <linux/unistd.h>
  20 #include <linux/slab.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/init.h>
  23 #include <linux/delay.h>
  24 #include <linux/netdevice.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/skbuff.h>
  27 #include <linux/spinlock.h>
  28 #include <linux/mm.h>
  29 #include <linux/module.h>
  30 #include <linux/mii.h>
  31 #include <linux/ethtool.h>
  32 #include <linux/phy.h>
  33
  34 #include <asm/io.h>
  35 #include <asm/irq.h>
  36 #include <asm/uaccess.h>
  37
  38 #define MII_M1011_IEVENT                0x13
  39 #define MII_M1011_IEVENT_CLEAR          0x0000
  40
  41 #define MII_M1011_IMASK                 0x12
  42 #define MII_M1011_IMASK_INIT            0x6400
  43 #define MII_M1011_IMASK_CLEAR           0x0000
  44
  45 #define MII_M1011_PHY_SCR               0x10
  46 #define MII_M1011_PHY_SCR_AUTO_CROSS    0x0060
  47
  48 #define MII_M1145_PHY_EXT_CR            0x14
  49 #define MII_M1145_RGMII_RX_DELAY        0x0080
  50 #define MII_M1145_RGMII_TX_DELAY        0x0002
  51
  52 #define M1145_DEV_FLAGS_RESISTANCE      0x00000001
  53
  54 #define MII_M1111_PHY_LED_CONTROL       0x18
  55 #define MII_M1111_PHY_LED_DIRECT        0x4100
  56 #define MII_M1111_PHY_LED_COMBINE       0x411c
  57 #define MII_M1111_PHY_EXT_CR            0x14
  58 #define MII_M1111_RX_DELAY              0x80
  59 #define MII_M1111_TX_DELAY              0x2
  60 #define MII_M1111_PHY_EXT_SR            0x1b
  61
  62 #define MII_M1111_HWCFG_MODE_MASK               0xf
  63 #define MII_M1111_HWCFG_MODE_COPPER_RGMII       0xb
  64 #define MII_M1111_HWCFG_MODE_FIBER_RGMII        0x3
  65 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK       0x4
  66 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO       0x8000
  67 #define MII_M1111_HWCFG_FIBER_COPPER_RES        0x2000
  68
  69 #define MII_M1111_COPPER                0
  70 #define MII_M1111_FIBER                 1
  71
  72 #define MII_M1011_PHY_STATUS            0x11
  73 #define MII_M1011_PHY_STATUS_1000       0x8000
  74 #define MII_M1011_PHY_STATUS_100        0x4000
  75 #define MII_M1011_PHY_STATUS_SPD_MASK   0xc000
  76 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  77 #define MII_M1011_PHY_STATUS_RESOLVED   0x0800
  78 #define MII_M1011_PHY_STATUS_LINK       0x0400
  79
  80
  81 MODULE_DESCRIPTION("Marvell PHY driver");
  82 MODULE_AUTHOR("Andy Fleming");
  83 MODULE_LICENSE("GPL");
  84
  85 static int marvell_ack_interrupt(struct phy_device *phydev)
  86 {
  87         int err;
  88
  89         /* Clear the interrupts by reading the reg */
  90         err = phy_read(phydev, MII_M1011_IEVENT);
  91
  92         if (err < 0)
  93                 return err;
  94
  95         return 0;
  96 }
  97
  98 static int marvell_config_intr(struct phy_device *phydev)
  99 {
 100         int err;
 101
 102         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 103                 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
 104         else
 105                 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
 106
 107         return err;
 108 }
 109
 110 static int marvell_config_aneg(struct phy_device *phydev)
 111 {
 112         int err;
 113
 114         /* The Marvell PHY has an errata which requires
 115          * that certain registers get written in order
 116          * to restart autonegotiation */
 117         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 118
 119         if (err < 0)
 120                 return err;
 121
 122         err = phy_write(phydev, 0x1d, 0x1f);
 123         if (err < 0)
 124                 return err;
 125
 126         err = phy_write(phydev, 0x1e, 0x200c);
 127         if (err < 0)
 128                 return err;
 129
 130         err = phy_write(phydev, 0x1d, 0x5);
 131         if (err < 0)
 132                 return err;
 133
 134         err = phy_write(phydev, 0x1e, 0);
 135         if (err < 0)
 136                 return err;
 137
 138         err = phy_write(phydev, 0x1e, 0x100);
 139         if (err < 0)
 140                 return err;
 141
 142         err = phy_write(phydev, MII_M1011_PHY_SCR,
 143                         MII_M1011_PHY_SCR_AUTO_CROSS);
 144         if (err < 0)
 145                 return err;
 146
 147         err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
 148                         MII_M1111_PHY_LED_DIRECT);
 149         if (err < 0)
 150                 return err;
 151
 152         err = genphy_config_aneg(phydev);
 153
 154         return err;
 155 }
 156
 157 static int m88e1111_config_init(struct phy_device *phydev)
 158 {
 159         int err;
 160         int temp;
 161         int mode;
 162
 163         /* Enable Fiber/Copper auto selection */
 164         temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 165         temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 166         phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 167
 168         temp = phy_read(phydev, MII_BMCR);
 169         temp |= BMCR_RESET;
 170         phy_write(phydev, MII_BMCR, temp);
 171
 172         if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
 173             (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
 174             (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
 175             (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
 176
 177                 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
 178                 if (temp < 0)
 179                         return temp;
 180
 181                 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
 182                         temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
 183                 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
 184                         temp &= ~MII_M1111_TX_DELAY;
 185                         temp |= MII_M1111_RX_DELAY;
 186                 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
 187                         temp &= ~MII_M1111_RX_DELAY;
 188                         temp |= MII_M1111_TX_DELAY;
 189                 }
 190
 191                 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
 192                 if (err < 0)
 193                         return err;
 194
 195                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 196                 if (temp < 0)
 197                         return temp;
 198
 199                 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
 200
 201                 mode = phy_read(phydev, MII_M1111_PHY_EXT_CR);
 202
 203                 if (mode & MII_M1111_HWCFG_FIBER_COPPER_RES)
 204                         temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
 205                 else
 206                         temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
 207
 208                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 209                 if (err < 0)
 210                         return err;
 211         }
 212
 213         if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
 214                 int temp;
 215
 216                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 217                 if (temp < 0)
 218                         return temp;
 219
 220                 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
 221                 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
 222
 223                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 224                 if (err < 0)
 225                         return err;
 226         }
 227
 228         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 229         if (err < 0)
 230                 return err;
 231
 232         return 0;
 233 }
 234
 235 static int m88e1145_config_init(struct phy_device *phydev)
 236 {
 237         int err;
 238
 239         /* Take care of errata E0 & E1 */
 240         err = phy_write(phydev, 0x1d, 0x001b);
 241         if (err < 0)
 242                 return err;
 243
 244         err = phy_write(phydev, 0x1e, 0x418f);
 245         if (err < 0)
 246                 return err;
 247
 248         err = phy_write(phydev, 0x1d, 0x0016);
 249         if (err < 0)
 250                 return err;
 251
 252         err = phy_write(phydev, 0x1e, 0xa2da);
 253         if (err < 0)
 254                 return err;
 255
 256         if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
 257                 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
 258                 if (temp < 0)
 259                         return temp;
 260
 261                 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
 262
 263                 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
 264                 if (err < 0)
 265                         return err;
 266
 267                 if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) {
 268                         err = phy_write(phydev, 0x1d, 0x0012);
 269                         if (err < 0)
 270                                 return err;
 271
 272                         temp = phy_read(phydev, 0x1e);
 273                         if (temp < 0)
 274                                 return temp;
 275
 276                         temp &= 0xf03f;
 277                         temp |= 2 << 9; /* 36 ohm */
 278                         temp |= 2 << 6; /* 39 ohm */
 279
 280                         err = phy_write(phydev, 0x1e, temp);
 281                         if (err < 0)
 282                                 return err;
 283
 284                         err = phy_write(phydev, 0x1d, 0x3);
 285                         if (err < 0)
 286                                 return err;
 287
 288                         err = phy_write(phydev, 0x1e, 0x8000);
 289                         if (err < 0)
 290                                 return err;
 291                 }
 292         }
 293
 294         return 0;
 295 }
 296
 297 /* marvell_read_status
 298  *
 299  * Generic status code does not detect Fiber correctly!
 300  * Description:
 301  *   Check the link, then figure out the current state
 302  *   by comparing what we advertise with what the link partner
 303  *   advertises.  Start by checking the gigabit possibilities,
 304  *   then move on to 10/100.
 305  */
 306 static int marvell_read_status(struct phy_device *phydev)
 307 {
 308         int adv;
 309         int err;
 310         int lpa;
 311         int status = 0;
 312
 313         /* Update the link, but return if there
 314          * was an error */
 315         err = genphy_update_link(phydev);
 316         if (err)
 317                 return err;
 318
 319         if (AUTONEG_ENABLE == phydev->autoneg) {
 320                 status = phy_read(phydev, MII_M1011_PHY_STATUS);
 321                 if (status < 0)
 322                         return status;
 323
 324                 lpa = phy_read(phydev, MII_LPA);
 325                 if (lpa < 0)
 326                         return lpa;
 327
 328                 adv = phy_read(phydev, MII_ADVERTISE);
 329                 if (adv < 0)
 330                         return adv;
 331
 332                 lpa &= adv;
 333
 334                 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
 335                         phydev->duplex = DUPLEX_FULL;
 336                 else
 337                         phydev->duplex = DUPLEX_HALF;
 338
 339                 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
 340                 phydev->pause = phydev->asym_pause = 0;
 341
 342                 switch (status) {
 343                 case MII_M1011_PHY_STATUS_1000:
 344                         phydev->speed = SPEED_1000;
 345                         break;
 346
 347                 case MII_M1011_PHY_STATUS_100:
 348                         phydev->speed = SPEED_100;
 349                         break;
 350
 351                 default:
 352                         phydev->speed = SPEED_10;
 353                         break;
 354                 }
 355
 356                 if (phydev->duplex == DUPLEX_FULL) {
 357                         phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
 358                         phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
 359                 }
 360         } else {
 361                 int bmcr = phy_read(phydev, MII_BMCR);
 362
 363                 if (bmcr < 0)
 364                         return bmcr;
 365
 366                 if (bmcr & BMCR_FULLDPLX)
 367                         phydev->duplex = DUPLEX_FULL;
 368                 else
 369                         phydev->duplex = DUPLEX_HALF;
 370
 371                 if (bmcr & BMCR_SPEED1000)
 372                         phydev->speed = SPEED_1000;
 373                 else if (bmcr & BMCR_SPEED100)
 374                         phydev->speed = SPEED_100;
 375                 else
 376                         phydev->speed = SPEED_10;
 377
 378                 phydev->pause = phydev->asym_pause = 0;
 379         }
 380
 381         return 0;
 382 }
 383
 384 static struct phy_driver marvell_drivers[] = {
 385         {
 386                 .phy_id = 0x01410c60,
 387                 .phy_id_mask = 0xfffffff0,
 388                 .name = "Marvell 88E1101",
 389                 .features = PHY_GBIT_FEATURES,
 390                 .flags = PHY_HAS_INTERRUPT,
 391                 .config_aneg = &marvell_config_aneg,
 392                 .read_status = &genphy_read_status,
 393                 .ack_interrupt = &marvell_ack_interrupt,
 394                 .config_intr = &marvell_config_intr,
 395                 .driver = { .owner = THIS_MODULE },
 396         },
 397         {
 398                 .phy_id = 0x01410c90,
 399                 .phy_id_mask = 0xfffffff0,
 400                 .name = "Marvell 88E1112",
 401                 .features = PHY_GBIT_FEATURES,
 402                 .flags = PHY_HAS_INTERRUPT,
 403                 .config_init = &m88e1111_config_init,
 404                 .config_aneg = &marvell_config_aneg,
 405                 .read_status = &genphy_read_status,
 406                 .ack_interrupt = &marvell_ack_interrupt,
 407                 .config_intr = &marvell_config_intr,
 408                 .driver = { .owner = THIS_MODULE },
 409         },
 410         {
 411                 .phy_id = 0x01410cc0,
 412                 .phy_id_mask = 0xfffffff0,
 413                 .name = "Marvell 88E1111",
 414                 .features = PHY_GBIT_FEATURES,
 415                 .flags = PHY_HAS_INTERRUPT,
 416                 .config_init = &m88e1111_config_init,
 417                 .config_aneg = &marvell_config_aneg,
 418                 .read_status = &marvell_read_status,
 419                 .ack_interrupt = &marvell_ack_interrupt,
 420                 .config_intr = &marvell_config_intr,
 421                 .driver = { .owner = THIS_MODULE },
 422         },
 423         {
 424                 .phy_id = 0x01410cd0,
 425                 .phy_id_mask = 0xfffffff0,
 426                 .name = "Marvell 88E1145",
 427                 .features = PHY_GBIT_FEATURES,
 428                 .flags = PHY_HAS_INTERRUPT,
 429                 .config_init = &m88e1145_config_init,
 430                 .config_aneg = &marvell_config_aneg,
 431                 .read_status = &genphy_read_status,
 432                 .ack_interrupt = &marvell_ack_interrupt,
 433                 .config_intr = &marvell_config_intr,
 434                 .driver = { .owner = THIS_MODULE },
 435         },
 436         {
 437                 .phy_id = 0x01410e30,
 438                 .phy_id_mask = 0xfffffff0,
 439                 .name = "Marvell 88E1240",
 440                 .features = PHY_GBIT_FEATURES,
 441                 .flags = PHY_HAS_INTERRUPT,
 442                 .config_init = &m88e1111_config_init,
 443                 .config_aneg = &marvell_config_aneg,
 444                 .read_status = &genphy_read_status,
 445                 .ack_interrupt = &marvell_ack_interrupt,
 446                 .config_intr = &marvell_config_intr,
 447                 .driver = { .owner = THIS_MODULE },
 448         },
 449 };
 450
 451 static int __init marvell_init(void)
 452 {
 453         int ret;
 454         int i;
 455
 456         for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) {
 457                 ret = phy_driver_register(&marvell_drivers[i]);
 458
 459                 if (ret) {
 460                         while (i-- > 0)
 461                                 phy_driver_unregister(&marvell_drivers[i]);
 462                         return ret;
 463                 }
 464         }
 465
 466         return 0;
 467 }
 468
 469 static void __exit marvell_exit(void)
 470 {
 471         int i;
 472
 473         for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++)
 474                 phy_driver_unregister(&marvell_drivers[i]);
 475 }
 476
 477 module_init(marvell_init);
 478 module_exit(marvell_exit);