drivers/net/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2008 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/types.h>
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/vmalloc.h>
  33 #include <linux/string.h>
  34 #include <linux/in.h>
  35 #include <linux/ip.h>
  36 #include <linux/tcp.h>
  37 #include <linux/ipv6.h>
  38 #include <net/checksum.h>
  39 #include <net/ip6_checksum.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_vlan.h>
  42
  43 #include "ixgbe.h"
  44 #include "ixgbe_common.h"
  45
  46 char ixgbe_driver_name[] = "ixgbe";
  47 static const char ixgbe_driver_string[] =
  48                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  49
  50 #define DRV_VERSION "1.3.30-k2"
  51 const char ixgbe_driver_version[] = DRV_VERSION;
  52 static char ixgbe_copyright[] = "Copyright (c) 1999-2007 Intel Corporation.";
  53
  54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  55         [board_82598] = &ixgbe_82598_info,
  56 };
  57
  58 /* ixgbe_pci_tbl - PCI Device ID Table
  59  *
  60  * Wildcard entries (PCI_ANY_ID) should come last
  61  * Last entry must be all 0s
  62  *
  63  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  64  *   Class, Class Mask, private data (not used) }
  65  */
  66 static struct pci_device_id ixgbe_pci_tbl[] = {
  67         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  68          board_82598 },
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  76          board_82598 },
  77         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
  78          board_82598 },
  79         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
  80          board_82598 },
  81         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
  82          board_82598 },
  83         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
  84          board_82598 },
  85
  86         /* required last entry */
  87         {0, }
  88 };
  89 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  90
  91 #ifdef CONFIG_IXGBE_DCA
  92 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  93                             void *p);
  94 static struct notifier_block dca_notifier = {
  95         .notifier_call = ixgbe_notify_dca,
  96         .next          = NULL,
  97         .priority      = 0
  98 };
  99 #endif
 100
 101 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 102 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 103 MODULE_LICENSE("GPL");
 104 MODULE_VERSION(DRV_VERSION);
 105
 106 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
 107
 108 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 109 {
 110         u32 ctrl_ext;
 111
 112         /* Let firmware take over control of h/w */
 113         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 114         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 115                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 116 }
 117
 118 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 119 {
 120         u32 ctrl_ext;
 121
 122         /* Let firmware know the driver has taken over */
 123         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 124         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 125                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 126 }
 127
 128 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 129                            u8 msix_vector)
 130 {
 131         u32 ivar, index;
 132
 133         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 134         index = (int_alloc_entry >> 2) & 0x1F;
 135         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 136         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 137         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 138         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 139 }
 140
 141 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 142                                              struct ixgbe_tx_buffer
 143                                              *tx_buffer_info)
 144 {
 145         if (tx_buffer_info->dma) {
 146                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 147                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 148                 tx_buffer_info->dma = 0;
 149         }
 150         if (tx_buffer_info->skb) {
 151                 dev_kfree_skb_any(tx_buffer_info->skb);
 152                 tx_buffer_info->skb = NULL;
 153         }
 154         /* tx_buffer_info must be completely set up in the transmit path */
 155 }
 156
 157 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 158                                        struct ixgbe_ring *tx_ring,
 159                                        unsigned int eop)
 160 {
 161         struct ixgbe_hw *hw = &adapter->hw;
 162         u32 head, tail;
 163
 164         /* Detect a transmit hang in hardware, this serializes the
 165          * check with the clearing of time_stamp and movement of eop */
 166         head = IXGBE_READ_REG(hw, tx_ring->head);
 167         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 168         adapter->detect_tx_hung = false;
 169         if ((head != tail) &&
 170             tx_ring->tx_buffer_info[eop].time_stamp &&
 171             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 172             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 173                 /* detected Tx unit hang */
 174                 union ixgbe_adv_tx_desc *tx_desc;
 175                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 176                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 177                         "  Tx Queue             <%d>\n"
 178                         "  TDH, TDT             <%x>, <%x>\n"
 179                         "  next_to_use          <%x>\n"
 180                         "  next_to_clean        <%x>\n"
 181                         "tx_buffer_info[next_to_clean]\n"
 182                         "  time_stamp           <%lx>\n"
 183                         "  jiffies              <%lx>\n",
 184                         tx_ring->queue_index,
 185                         head, tail,
 186                         tx_ring->next_to_use, eop,
 187                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 188                 return true;
 189         }
 190
 191         return false;
 192 }
 193
 194 #define IXGBE_MAX_TXD_PWR       14
 195 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 196
 197 /* Tx Descriptors needed, worst case */
 198 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 199                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 200 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 201         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
 202
 203 #define GET_TX_HEAD_FROM_RING(ring) (\
 204         *(volatile u32 *) \
 205         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
 206 static void ixgbe_tx_timeout(struct net_device *netdev);
 207
 208 /**
 209  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 210  * @adapter: board private structure
 211  * @tx_ring: tx ring to clean
 212  **/
 213 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 214                                struct ixgbe_ring *tx_ring)
 215 {
 216         union ixgbe_adv_tx_desc *tx_desc;
 217         struct ixgbe_tx_buffer *tx_buffer_info;
 218         struct net_device *netdev = adapter->netdev;
 219         struct sk_buff *skb;
 220         unsigned int i;
 221         u32 head, oldhead;
 222         unsigned int count = 0;
 223         unsigned int total_bytes = 0, total_packets = 0;
 224
 225         rmb();
 226         head = GET_TX_HEAD_FROM_RING(tx_ring);
 227         head = le32_to_cpu(head);
 228         i = tx_ring->next_to_clean;
 229         while (1) {
 230                 while (i != head) {
 231                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 232                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 233                         skb = tx_buffer_info->skb;
 234
 235                         if (skb) {
 236                                 unsigned int segs, bytecount;
 237
 238                                 /* gso_segs is currently only valid for tcp */
 239                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 240                                 /* multiply data chunks by size of headers */
 241                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 242                                             skb->len;
 243                                 total_packets += segs;
 244                                 total_bytes += bytecount;
 245                         }
 246
 247                         ixgbe_unmap_and_free_tx_resource(adapter,
 248                                                          tx_buffer_info);
 249
 250                         i++;
 251                         if (i == tx_ring->count)
 252                                 i = 0;
 253
 254                         count++;
 255                         if (count == tx_ring->count)
 256                                 goto done_cleaning;
 257                 }
 258                 oldhead = head;
 259                 rmb();
 260                 head = GET_TX_HEAD_FROM_RING(tx_ring);
 261                 head = le32_to_cpu(head);
 262                 if (head == oldhead)
 263                         goto done_cleaning;
 264         } /* while (1) */
 265
 266 done_cleaning:
 267         tx_ring->next_to_clean = i;
 268
 269 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 270         if (unlikely(count && netif_carrier_ok(netdev) &&
 271                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 272                 /* Make sure that anybody stopping the queue after this
 273                  * sees the new next_to_clean.
 274                  */
 275                 smp_mb();
 276                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 277                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 278                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 279                         ++adapter->restart_queue;
 280                 }
 281         }
 282
 283         if (adapter->detect_tx_hung) {
 284                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 285                         /* schedule immediate reset if we believe we hung */
 286                         DPRINTK(PROBE, INFO,
 287                                 "tx hang %d detected, resetting adapter\n",
 288                                 adapter->tx_timeout_count + 1);
 289                         ixgbe_tx_timeout(adapter->netdev);
 290                 }
 291         }
 292
 293         /* re-arm the interrupt */
 294         if ((total_packets >= tx_ring->work_limit) ||
 295             (count == tx_ring->count))
 296                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 297
 298         tx_ring->total_bytes += total_bytes;
 299         tx_ring->total_packets += total_packets;
 300         tx_ring->stats.bytes += total_bytes;
 301         tx_ring->stats.packets += total_packets;
 302         adapter->net_stats.tx_bytes += total_bytes;
 303         adapter->net_stats.tx_packets += total_packets;
 304         return (total_packets ? true : false);
 305 }
 306
 307 #ifdef CONFIG_IXGBE_DCA
 308 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 309                                 struct ixgbe_ring *rx_ring)
 310 {
 311         u32 rxctrl;
 312         int cpu = get_cpu();
 313         int q = rx_ring - adapter->rx_ring;
 314
 315         if (rx_ring->cpu != cpu) {
 316                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 317                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 318                 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 319                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 320                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 321                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 322                 rx_ring->cpu = cpu;
 323         }
 324         put_cpu();
 325 }
 326
 327 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 328                                 struct ixgbe_ring *tx_ring)
 329 {
 330         u32 txctrl;
 331         int cpu = get_cpu();
 332         int q = tx_ring - adapter->tx_ring;
 333
 334         if (tx_ring->cpu != cpu) {
 335                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 336                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 337                 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 338                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 339                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 340                 tx_ring->cpu = cpu;
 341         }
 342         put_cpu();
 343 }
 344
 345 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 346 {
 347         int i;
 348
 349         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 350                 return;
 351
 352         for (i = 0; i < adapter->num_tx_queues; i++) {
 353                 adapter->tx_ring[i].cpu = -1;
 354                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 355         }
 356         for (i = 0; i < adapter->num_rx_queues; i++) {
 357                 adapter->rx_ring[i].cpu = -1;
 358                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 359         }
 360 }
 361
 362 static int __ixgbe_notify_dca(struct device *dev, void *data)
 363 {
 364         struct net_device *netdev = dev_get_drvdata(dev);
 365         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 366         unsigned long event = *(unsigned long *)data;
 367
 368         switch (event) {
 369         case DCA_PROVIDER_ADD:
 370                 /* if we're already enabled, don't do it again */
 371                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 372                         break;
 373                 /* Always use CB2 mode, difference is masked
 374                  * in the CB driver. */
 375                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 376                 if (dca_add_requester(dev) == 0) {
 377                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 378                         ixgbe_setup_dca(adapter);
 379                         break;
 380                 }
 381                 /* Fall Through since DCA is disabled. */
 382         case DCA_PROVIDER_REMOVE:
 383                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 384                         dca_remove_requester(dev);
 385                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 386                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 387                 }
 388                 break;
 389         }
 390
 391         return 0;
 392 }
 393
 394 #endif /* CONFIG_IXGBE_DCA */
 395 /**
 396  * ixgbe_receive_skb - Send a completed packet up the stack
 397  * @adapter: board private structure
 398  * @skb: packet to send up
 399  * @status: hardware indication of status of receive
 400  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 401  * @rx_desc: rx descriptor
 402  **/
 403 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
 404                               struct sk_buff *skb, u8 status,
 405                               struct ixgbe_ring *ring,
 406                               union ixgbe_adv_rx_desc *rx_desc)
 407 {
 408         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 409         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 410
 411         if (adapter->netdev->features & NETIF_F_LRO &&
 412             skb->ip_summed == CHECKSUM_UNNECESSARY) {
 413                 if (adapter->vlgrp && is_vlan && (tag != 0))
 414                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
 415                                                      adapter->vlgrp, tag,
 416                                                      rx_desc);
 417                 else
 418                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
 419                 ring->lro_used = true;
 420         } else {
 421                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 422                         if (adapter->vlgrp && is_vlan && (tag != 0))
 423                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 424                         else
 425                                 netif_receive_skb(skb);
 426                 } else {
 427                         if (adapter->vlgrp && is_vlan && (tag != 0))
 428                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 429                         else
 430                                 netif_rx(skb);
 431                 }
 432         }
 433 }
 434
 435 /**
 436  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 437  * @adapter: address of board private structure
 438  * @status_err: hardware indication of status of receive
 439  * @skb: skb currently being received and modified
 440  **/
 441 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 442                                      u32 status_err, struct sk_buff *skb)
 443 {
 444         skb->ip_summed = CHECKSUM_NONE;
 445
 446         /* Rx csum disabled */
 447         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 448                 return;
 449
 450         /* if IP and error */
 451         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 452             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 453                 adapter->hw_csum_rx_error++;
 454                 return;
 455         }
 456
 457         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 458                 return;
 459
 460         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 461                 adapter->hw_csum_rx_error++;
 462                 return;
 463         }
 464
 465         /* It must be a TCP or UDP packet with a valid checksum */
 466         skb->ip_summed = CHECKSUM_UNNECESSARY;
 467         adapter->hw_csum_rx_good++;
 468 }
 469
 470 /**
 471  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 472  * @adapter: address of board private structure
 473  **/
 474 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 475                                    struct ixgbe_ring *rx_ring,
 476                                    int cleaned_count)
 477 {
 478         struct pci_dev *pdev = adapter->pdev;
 479         union ixgbe_adv_rx_desc *rx_desc;
 480         struct ixgbe_rx_buffer *bi;
 481         unsigned int i;
 482
 483         i = rx_ring->next_to_use;
 484         bi = &rx_ring->rx_buffer_info[i];
 485
 486         while (cleaned_count--) {
 487                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 488
 489                 if (!bi->page_dma &&
 490                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 491                         if (!bi->page) {
 492                                 bi->page = alloc_page(GFP_ATOMIC);
 493                                 if (!bi->page) {
 494                                         adapter->alloc_rx_page_failed++;
 495                                         goto no_buffers;
 496                                 }
 497                                 bi->page_offset = 0;
 498                         } else {
 499                                 /* use a half page if we're re-using */
 500                                 bi->page_offset ^= (PAGE_SIZE / 2);
 501                         }
 502
 503                         bi->page_dma = pci_map_page(pdev, bi->page,
 504                                                     bi->page_offset,
 505                                                     (PAGE_SIZE / 2),
 506                                                     PCI_DMA_FROMDEVICE);
 507                 }
 508
 509                 if (!bi->skb) {
 510                         struct sk_buff *skb;
 511                         skb = netdev_alloc_skb(adapter->netdev,
 512                                                (rx_ring->rx_buf_len +
 513                                                 NET_IP_ALIGN));
 514
 515                         if (!skb) {
 516                                 adapter->alloc_rx_buff_failed++;
 517                                 goto no_buffers;
 518                         }
 519
 520                         /*
 521                          * Make buffer alignment 2 beyond a 16 byte boundary
 522                          * this will result in a 16 byte aligned IP header after
 523                          * the 14 byte MAC header is removed
 524                          */
 525                         skb_reserve(skb, NET_IP_ALIGN);
 526
 527                         bi->skb = skb;
 528                         bi->dma = pci_map_single(pdev, skb->data,
 529                                                  rx_ring->rx_buf_len,
 530                                                  PCI_DMA_FROMDEVICE);
 531                 }
 532                 /* Refresh the desc even if buffer_addrs didn't change because
 533                  * each write-back erases this info. */
 534                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 535                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 536                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 537                 } else {
 538                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 539                 }
 540
 541                 i++;
 542                 if (i == rx_ring->count)
 543                         i = 0;
 544                 bi = &rx_ring->rx_buffer_info[i];
 545         }
 546
 547 no_buffers:
 548         if (rx_ring->next_to_use != i) {
 549                 rx_ring->next_to_use = i;
 550                 if (i-- == 0)
 551                         i = (rx_ring->count - 1);
 552
 553                 /*
 554                  * Force memory writes to complete before letting h/w
 555                  * know there are new descriptors to fetch.  (Only
 556                  * applicable for weak-ordered memory model archs,
 557                  * such as IA-64).
 558                  */
 559                 wmb();
 560                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 561         }
 562 }
 563
 564 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
 565 {
 566         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
 567 }
 568
 569 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
 570 {
 571         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
 572 }
 573
 574 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
 575                                struct ixgbe_ring *rx_ring,
 576                                int *work_done, int work_to_do)
 577 {
 578         struct pci_dev *pdev = adapter->pdev;
 579         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 580         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 581         struct sk_buff *skb;
 582         unsigned int i;
 583         u32 len, staterr;
 584         u16 hdr_info;
 585         bool cleaned = false;
 586         int cleaned_count = 0;
 587         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 588
 589         i = rx_ring->next_to_clean;
 590         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 591         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 592         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 593
 594         while (staterr & IXGBE_RXD_STAT_DD) {
 595                 u32 upper_len = 0;
 596                 if (*work_done >= work_to_do)
 597                         break;
 598                 (*work_done)++;
 599
 600                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 601                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 602                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 603                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
 604                         if (hdr_info & IXGBE_RXDADV_SPH)
 605                                 adapter->rx_hdr_split++;
 606                         if (len > IXGBE_RX_HDR_SIZE)
 607                                 len = IXGBE_RX_HDR_SIZE;
 608                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 609                 } else {
 610                         len = le16_to_cpu(rx_desc->wb.upper.length);
 611                 }
 612
 613                 cleaned = true;
 614                 skb = rx_buffer_info->skb;
 615                 prefetch(skb->data - NET_IP_ALIGN);
 616                 rx_buffer_info->skb = NULL;
 617
 618                 if (len && !skb_shinfo(skb)->nr_frags) {
 619                         pci_unmap_single(pdev, rx_buffer_info->dma,
 620                                          rx_ring->rx_buf_len,
 621                                          PCI_DMA_FROMDEVICE);
 622                         skb_put(skb, len);
 623                 }
 624
 625                 if (upper_len) {
 626                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 627                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
 628                         rx_buffer_info->page_dma = 0;
 629                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 630                                            rx_buffer_info->page,
 631                                            rx_buffer_info->page_offset,
 632                                            upper_len);
 633
 634                         if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
 635                             (page_count(rx_buffer_info->page) != 1))
 636                                 rx_buffer_info->page = NULL;
 637                         else
 638                                 get_page(rx_buffer_info->page);
 639
 640                         skb->len += upper_len;
 641                         skb->data_len += upper_len;
 642                         skb->truesize += upper_len;
 643                 }
 644
 645                 i++;
 646                 if (i == rx_ring->count)
 647                         i = 0;
 648                 next_buffer = &rx_ring->rx_buffer_info[i];
 649
 650                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 651                 prefetch(next_rxd);
 652
 653                 cleaned_count++;
 654                 if (staterr & IXGBE_RXD_STAT_EOP) {
 655                         rx_ring->stats.packets++;
 656                         rx_ring->stats.bytes += skb->len;
 657                 } else {
 658                         rx_buffer_info->skb = next_buffer->skb;
 659                         rx_buffer_info->dma = next_buffer->dma;
 660                         next_buffer->skb = skb;
 661                         next_buffer->dma = 0;
 662                         adapter->non_eop_descs++;
 663                         goto next_desc;
 664                 }
 665
 666                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 667                         dev_kfree_skb_irq(skb);
 668                         goto next_desc;
 669                 }
 670
 671                 ixgbe_rx_checksum(adapter, staterr, skb);
 672
 673                 /* probably a little skewed due to removing CRC */
 674                 total_rx_bytes += skb->len;
 675                 total_rx_packets++;
 676
 677                 skb->protocol = eth_type_trans(skb, adapter->netdev);
 678                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
 679
 680 next_desc:
 681                 rx_desc->wb.upper.status_error = 0;
 682
 683                 /* return some buffers to hardware, one at a time is too slow */
 684                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 685                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 686                         cleaned_count = 0;
 687                 }
 688
 689                 /* use prefetched values */
 690                 rx_desc = next_rxd;
 691                 rx_buffer_info = next_buffer;
 692
 693                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 694         }
 695
 696         if (rx_ring->lro_used) {
 697                 lro_flush_all(&rx_ring->lro_mgr);
 698                 rx_ring->lro_used = false;
 699         }
 700
 701         rx_ring->next_to_clean = i;
 702         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 703
 704         if (cleaned_count)
 705                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 706
 707         rx_ring->total_packets += total_rx_packets;
 708         rx_ring->total_bytes += total_rx_bytes;
 709         adapter->net_stats.rx_bytes += total_rx_bytes;
 710         adapter->net_stats.rx_packets += total_rx_packets;
 711
 712         return cleaned;
 713 }
 714
 715 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 716 /**
 717  * ixgbe_configure_msix - Configure MSI-X hardware
 718  * @adapter: board private structure
 719  *
 720  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 721  * interrupts.
 722  **/
 723 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 724 {
 725         struct ixgbe_q_vector *q_vector;
 726         int i, j, q_vectors, v_idx, r_idx;
 727         u32 mask;
 728
 729         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 730
 731         /* Populate the IVAR table and set the ITR values to the
 732          * corresponding register.
 733          */
 734         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 735                 q_vector = &adapter->q_vector[v_idx];
 736                 /* XXX for_each_bit(...) */
 737                 r_idx = find_first_bit(q_vector->rxr_idx,
 738                                        adapter->num_rx_queues);
 739
 740                 for (i = 0; i < q_vector->rxr_count; i++) {
 741                         j = adapter->rx_ring[r_idx].reg_idx;
 742                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 743                         r_idx = find_next_bit(q_vector->rxr_idx,
 744                                               adapter->num_rx_queues,
 745                                               r_idx + 1);
 746                 }
 747                 r_idx = find_first_bit(q_vector->txr_idx,
 748                                        adapter->num_tx_queues);
 749
 750                 for (i = 0; i < q_vector->txr_count; i++) {
 751                         j = adapter->tx_ring[r_idx].reg_idx;
 752                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 753                         r_idx = find_next_bit(q_vector->txr_idx,
 754                                               adapter->num_tx_queues,
 755                                               r_idx + 1);
 756                 }
 757
 758                 /* if this is a tx only vector halve the interrupt rate */
 759                 if (q_vector->txr_count && !q_vector->rxr_count)
 760                         q_vector->eitr = (adapter->eitr_param >> 1);
 761                 else
 762                         /* rx only */
 763                         q_vector->eitr = adapter->eitr_param;
 764
 765                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 766                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 767         }
 768
 769         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 770         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 771
 772         /* set up to autoclear timer, and the vectors */
 773         mask = IXGBE_EIMS_ENABLE_MASK;
 774         mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
 775         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 776 }
 777
 778 enum latency_range {
 779         lowest_latency = 0,
 780         low_latency = 1,
 781         bulk_latency = 2,
 782         latency_invalid = 255
 783 };
 784
 785 /**
 786  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 787  * @adapter: pointer to adapter
 788  * @eitr: eitr setting (ints per sec) to give last timeslice
 789  * @itr_setting: current throttle rate in ints/second
 790  * @packets: the number of packets during this measurement interval
 791  * @bytes: the number of bytes during this measurement interval
 792  *
 793  *      Stores a new ITR value based on packets and byte
 794  *      counts during the last interrupt.  The advantage of per interrupt
 795  *      computation is faster updates and more accurate ITR for the current
 796  *      traffic pattern.  Constants in this function were computed
 797  *      based on theoretical maximum wire speed and thresholds were set based
 798  *      on testing data as well as attempting to minimize response time
 799  *      while increasing bulk throughput.
 800  *      this functionality is controlled by the InterruptThrottleRate module
 801  *      parameter (see ixgbe_param.c)
 802  **/
 803 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 804                            u32 eitr, u8 itr_setting,
 805                            int packets, int bytes)
 806 {
 807         unsigned int retval = itr_setting;
 808         u32 timepassed_us;
 809         u64 bytes_perint;
 810
 811         if (packets == 0)
 812                 goto update_itr_done;
 813
 814
 815         /* simple throttlerate management
 816          *    0-20MB/s lowest (100000 ints/s)
 817          *   20-100MB/s low   (20000 ints/s)
 818          *  100-1249MB/s bulk (8000 ints/s)
 819          */
 820         /* what was last interrupt timeslice? */
 821         timepassed_us = 1000000/eitr;
 822         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 823
 824         switch (itr_setting) {
 825         case lowest_latency:
 826                 if (bytes_perint > adapter->eitr_low)
 827                         retval = low_latency;
 828                 break;
 829         case low_latency:
 830                 if (bytes_perint > adapter->eitr_high)
 831                         retval = bulk_latency;
 832                 else if (bytes_perint <= adapter->eitr_low)
 833                         retval = lowest_latency;
 834                 break;
 835         case bulk_latency:
 836                 if (bytes_perint <= adapter->eitr_high)
 837                         retval = low_latency;
 838                 break;
 839         }
 840
 841 update_itr_done:
 842         return retval;
 843 }
 844
 845 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 846 {
 847         struct ixgbe_adapter *adapter = q_vector->adapter;
 848         struct ixgbe_hw *hw = &adapter->hw;
 849         u32 new_itr;
 850         u8 current_itr, ret_itr;
 851         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 852                                sizeof(struct ixgbe_q_vector);
 853         struct ixgbe_ring *rx_ring, *tx_ring;
 854
 855         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 856         for (i = 0; i < q_vector->txr_count; i++) {
 857                 tx_ring = &(adapter->tx_ring[r_idx]);
 858                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 859                                            q_vector->tx_itr,
 860                                            tx_ring->total_packets,
 861                                            tx_ring->total_bytes);
 862                 /* if the result for this queue would decrease interrupt
 863                  * rate for this vector then use that result */
 864                 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
 865                                     q_vector->tx_itr - 1 : ret_itr);
 866                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 867                                       r_idx + 1);
 868         }
 869
 870         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 871         for (i = 0; i < q_vector->rxr_count; i++) {
 872                 rx_ring = &(adapter->rx_ring[r_idx]);
 873                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 874                                            q_vector->rx_itr,
 875                                            rx_ring->total_packets,
 876                                            rx_ring->total_bytes);
 877                 /* if the result for this queue would decrease interrupt
 878                  * rate for this vector then use that result */
 879                 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
 880                                     q_vector->rx_itr - 1 : ret_itr);
 881                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 882                                       r_idx + 1);
 883         }
 884
 885         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
 886
 887         switch (current_itr) {
 888         /* counts and packets in update_itr are dependent on these numbers */
 889         case lowest_latency:
 890                 new_itr = 100000;
 891                 break;
 892         case low_latency:
 893                 new_itr = 20000; /* aka hwitr = ~200 */
 894                 break;
 895         case bulk_latency:
 896         default:
 897                 new_itr = 8000;
 898                 break;
 899         }
 900
 901         if (new_itr != q_vector->eitr) {
 902                 u32 itr_reg;
 903                 /* do an exponential smoothing */
 904                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 905                 q_vector->eitr = new_itr;
 906                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 907                 /* must write high and low 16 bits to reset counter */
 908                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 909                         itr_reg);
 910                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 911         }
 912
 913         return;
 914 }
 915
 916 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
 917 {
 918         struct ixgbe_hw *hw = &adapter->hw;
 919
 920         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
 921             (eicr & IXGBE_EICR_GPI_SDP1)) {
 922                 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
 923                 /* write to clear the interrupt */
 924                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
 925         }
 926 }
 927
 928 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
 929 {
 930         struct ixgbe_hw *hw = &adapter->hw;
 931
 932         adapter->lsc_int++;
 933         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
 934         adapter->link_check_timeout = jiffies;
 935         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
 936                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
 937                 schedule_work(&adapter->watchdog_task);
 938         }
 939 }
 940
 941 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 942 {
 943         struct net_device *netdev = data;
 944         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 945         struct ixgbe_hw *hw = &adapter->hw;
 946         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 947
 948         if (eicr & IXGBE_EICR_LSC)
 949                 ixgbe_check_lsc(adapter);
 950
 951         ixgbe_check_fan_failure(adapter, eicr);
 952
 953         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 954                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 955
 956         return IRQ_HANDLED;
 957 }
 958
 959 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 960 {
 961         struct ixgbe_q_vector *q_vector = data;
 962         struct ixgbe_adapter  *adapter = q_vector->adapter;
 963         struct ixgbe_ring     *tx_ring;
 964         int i, r_idx;
 965
 966         if (!q_vector->txr_count)
 967                 return IRQ_HANDLED;
 968
 969         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 970         for (i = 0; i < q_vector->txr_count; i++) {
 971                 tx_ring = &(adapter->tx_ring[r_idx]);
 972 #ifdef CONFIG_IXGBE_DCA
 973                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 974                         ixgbe_update_tx_dca(adapter, tx_ring);
 975 #endif
 976                 tx_ring->total_bytes = 0;
 977                 tx_ring->total_packets = 0;
 978                 ixgbe_clean_tx_irq(adapter, tx_ring);
 979                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 980                                       r_idx + 1);
 981         }
 982
 983         return IRQ_HANDLED;
 984 }
 985
 986 /**
 987  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 988  * @irq: unused
 989  * @data: pointer to our q_vector struct for this interrupt vector
 990  **/
 991 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 992 {
 993         struct ixgbe_q_vector *q_vector = data;
 994         struct ixgbe_adapter  *adapter = q_vector->adapter;
 995         struct ixgbe_ring  *rx_ring;
 996         int r_idx;
 997         int i;
 998
 999         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1000         for (i = 0;  i < q_vector->rxr_count; i++) {
1001                 rx_ring = &(adapter->rx_ring[r_idx]);
1002                 rx_ring->total_bytes = 0;
1003                 rx_ring->total_packets = 0;
1004                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1005                                       r_idx + 1);
1006         }
1007
1008         if (!q_vector->rxr_count)
1009                 return IRQ_HANDLED;
1010
1011         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1012         rx_ring = &(adapter->rx_ring[r_idx]);
1013         /* disable interrupts on this vector only */
1014         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1015         netif_rx_schedule(&q_vector->napi);
1016
1017         return IRQ_HANDLED;
1018 }
1019
1020 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1021 {
1022         ixgbe_msix_clean_rx(irq, data);
1023         ixgbe_msix_clean_tx(irq, data);
1024
1025         return IRQ_HANDLED;
1026 }
1027
1028 /**
1029  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1030  * @napi: napi struct with our devices info in it
1031  * @budget: amount of work driver is allowed to do this pass, in packets
1032  *
1033  * This function is optimized for cleaning one queue only on a single
1034  * q_vector!!!
1035  **/
1036 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1037 {
1038         struct ixgbe_q_vector *q_vector =
1039                                container_of(napi, struct ixgbe_q_vector, napi);
1040         struct ixgbe_adapter *adapter = q_vector->adapter;
1041         struct ixgbe_ring *rx_ring = NULL;
1042         int work_done = 0;
1043         long r_idx;
1044
1045         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1046         rx_ring = &(adapter->rx_ring[r_idx]);
1047 #ifdef CONFIG_IXGBE_DCA
1048         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1049                 ixgbe_update_rx_dca(adapter, rx_ring);
1050 #endif
1051
1052         ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1053
1054         /* If all Rx work done, exit the polling mode */
1055         if (work_done < budget) {
1056                 netif_rx_complete(napi);
1057                 if (adapter->itr_setting & 3)
1058                         ixgbe_set_itr_msix(q_vector);
1059                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1060                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1061         }
1062
1063         return work_done;
1064 }
1065
1066 /**
1067  * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1068  * @napi: napi struct with our devices info in it
1069  * @budget: amount of work driver is allowed to do this pass, in packets
1070  *
1071  * This function will clean more than one rx queue associated with a
1072  * q_vector.
1073  **/
1074 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1075 {
1076         struct ixgbe_q_vector *q_vector =
1077                                container_of(napi, struct ixgbe_q_vector, napi);
1078         struct ixgbe_adapter *adapter = q_vector->adapter;
1079         struct ixgbe_ring *rx_ring = NULL;
1080         int work_done = 0, i;
1081         long r_idx;
1082         u16 enable_mask = 0;
1083
1084         /* attempt to distribute budget to each queue fairly, but don't allow
1085          * the budget to go below 1 because we'll exit polling */
1086         budget /= (q_vector->rxr_count ?: 1);
1087         budget = max(budget, 1);
1088         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1089         for (i = 0; i < q_vector->rxr_count; i++) {
1090                 rx_ring = &(adapter->rx_ring[r_idx]);
1091 #ifdef CONFIG_IXGBE_DCA
1092                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1093                         ixgbe_update_rx_dca(adapter, rx_ring);
1094 #endif
1095                 ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1096                 enable_mask |= rx_ring->v_idx;
1097                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1098                                       r_idx + 1);
1099         }
1100
1101         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1102         rx_ring = &(adapter->rx_ring[r_idx]);
1103         /* If all Rx work done, exit the polling mode */
1104         if (work_done < budget) {
1105                 netif_rx_complete(napi);
1106                 if (adapter->itr_setting & 3)
1107                         ixgbe_set_itr_msix(q_vector);
1108                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1109                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1110                 return 0;
1111         }
1112
1113         return work_done;
1114 }
1115 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1116                                      int r_idx)
1117 {
1118         a->q_vector[v_idx].adapter = a;
1119         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1120         a->q_vector[v_idx].rxr_count++;
1121         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1122 }
1123
1124 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1125                                      int r_idx)
1126 {
1127         a->q_vector[v_idx].adapter = a;
1128         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1129         a->q_vector[v_idx].txr_count++;
1130         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1131 }
1132
1133 /**
1134  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1135  * @adapter: board private structure to initialize
1136  * @vectors: allotted vector count for descriptor rings
1137  *
1138  * This function maps descriptor rings to the queue-specific vectors
1139  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1140  * one vector per ring/queue, but on a constrained vector budget, we
1141  * group the rings as "efficiently" as possible.  You would add new
1142  * mapping configurations in here.
1143  **/
1144 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1145                                       int vectors)
1146 {
1147         int v_start = 0;
1148         int rxr_idx = 0, txr_idx = 0;
1149         int rxr_remaining = adapter->num_rx_queues;
1150         int txr_remaining = adapter->num_tx_queues;
1151         int i, j;
1152         int rqpv, tqpv;
1153         int err = 0;
1154
1155         /* No mapping required if MSI-X is disabled. */
1156         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1157                 goto out;
1158
1159         /*
1160          * The ideal configuration...
1161          * We have enough vectors to map one per queue.
1162          */
1163         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1164                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1165                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1166
1167                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1168                         map_vector_to_txq(adapter, v_start, txr_idx);
1169
1170                 goto out;
1171         }
1172
1173         /*
1174          * If we don't have enough vectors for a 1-to-1
1175          * mapping, we'll have to group them so there are
1176          * multiple queues per vector.
1177          */
1178         /* Re-adjusting *qpv takes care of the remainder. */
1179         for (i = v_start; i < vectors; i++) {
1180                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1181                 for (j = 0; j < rqpv; j++) {
1182                         map_vector_to_rxq(adapter, i, rxr_idx);
1183                         rxr_idx++;
1184                         rxr_remaining--;
1185                 }
1186         }
1187         for (i = v_start; i < vectors; i++) {
1188                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1189                 for (j = 0; j < tqpv; j++) {
1190                         map_vector_to_txq(adapter, i, txr_idx);
1191                         txr_idx++;
1192                         txr_remaining--;
1193                 }
1194         }
1195
1196 out:
1197         return err;
1198 }
1199
1200 /**
1201  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1202  * @adapter: board private structure
1203  *
1204  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1205  * interrupts from the kernel.
1206  **/
1207 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1208 {
1209         struct net_device *netdev = adapter->netdev;
1210         irqreturn_t (*handler)(int, void *);
1211         int i, vector, q_vectors, err;
1212         int ri=0, ti=0;
1213
1214         /* Decrement for Other and TCP Timer vectors */
1215         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1216
1217         /* Map the Tx/Rx rings to the vectors we were allotted. */
1218         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1219         if (err)
1220                 goto out;
1221
1222 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1223                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1224                          &ixgbe_msix_clean_many)
1225         for (vector = 0; vector < q_vectors; vector++) {
1226                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1227
1228                 if(handler == &ixgbe_msix_clean_rx) {
1229                         sprintf(adapter->name[vector], "%s-%s-%d",
1230                                 netdev->name, "rx", ri++);
1231                 }
1232                 else if(handler == &ixgbe_msix_clean_tx) {
1233                         sprintf(adapter->name[vector], "%s-%s-%d",
1234                                 netdev->name, "tx", ti++);
1235                 }
1236                 else
1237                         sprintf(adapter->name[vector], "%s-%s-%d",
1238                                 netdev->name, "TxRx", vector);
1239
1240                 err = request_irq(adapter->msix_entries[vector].vector,
1241                                   handler, 0, adapter->name[vector],
1242                                   &(adapter->q_vector[vector]));
1243                 if (err) {
1244                         DPRINTK(PROBE, ERR,
1245                                 "request_irq failed for MSIX interrupt "
1246                                 "Error: %d\n", err);
1247                         goto free_queue_irqs;
1248                 }
1249         }
1250
1251         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1252         err = request_irq(adapter->msix_entries[vector].vector,
1253                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1254         if (err) {
1255                 DPRINTK(PROBE, ERR,
1256                         "request_irq for msix_lsc failed: %d\n", err);
1257                 goto free_queue_irqs;
1258         }
1259
1260         return 0;
1261
1262 free_queue_irqs:
1263         for (i = vector - 1; i >= 0; i--)
1264                 free_irq(adapter->msix_entries[--vector].vector,
1265                          &(adapter->q_vector[i]));
1266         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1267         pci_disable_msix(adapter->pdev);
1268         kfree(adapter->msix_entries);
1269         adapter->msix_entries = NULL;
1270 out:
1271         return err;
1272 }
1273
1274 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1275 {
1276         struct ixgbe_hw *hw = &adapter->hw;
1277         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1278         u8 current_itr;
1279         u32 new_itr = q_vector->eitr;
1280         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1281         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1282
1283         q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1284                                             q_vector->tx_itr,
1285                                             tx_ring->total_packets,
1286                                             tx_ring->total_bytes);
1287         q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1288                                             q_vector->rx_itr,
1289                                             rx_ring->total_packets,
1290                                             rx_ring->total_bytes);
1291
1292         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1293
1294         switch (current_itr) {
1295         /* counts and packets in update_itr are dependent on these numbers */
1296         case lowest_latency:
1297                 new_itr = 100000;
1298                 break;
1299         case low_latency:
1300                 new_itr = 20000; /* aka hwitr = ~200 */
1301                 break;
1302         case bulk_latency:
1303                 new_itr = 8000;
1304                 break;
1305         default:
1306                 break;
1307         }
1308
1309         if (new_itr != q_vector->eitr) {
1310                 u32 itr_reg;
1311                 /* do an exponential smoothing */
1312                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1313                 q_vector->eitr = new_itr;
1314                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1315                 /* must write high and low 16 bits to reset counter */
1316                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1317         }
1318
1319         return;
1320 }
1321
1322 /**
1323  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1324  * @adapter: board private structure
1325  **/
1326 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1327 {
1328         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1329         IXGBE_WRITE_FLUSH(&adapter->hw);
1330         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1331                 int i;
1332                 for (i = 0; i < adapter->num_msix_vectors; i++)
1333                         synchronize_irq(adapter->msix_entries[i].vector);
1334         } else {
1335                 synchronize_irq(adapter->pdev->irq);
1336         }
1337 }
1338
1339 /**
1340  * ixgbe_irq_enable - Enable default interrupt generation settings
1341  * @adapter: board private structure
1342  **/
1343 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1344 {
1345         u32 mask;
1346         mask = IXGBE_EIMS_ENABLE_MASK;
1347         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1348                 mask |= IXGBE_EIMS_GPI_SDP1;
1349         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1350         IXGBE_WRITE_FLUSH(&adapter->hw);
1351 }
1352
1353 /**
1354  * ixgbe_intr - legacy mode Interrupt Handler
1355  * @irq: interrupt number
1356  * @data: pointer to a network interface device structure
1357  **/
1358 static irqreturn_t ixgbe_intr(int irq, void *data)
1359 {
1360         struct net_device *netdev = data;
1361         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1362         struct ixgbe_hw *hw = &adapter->hw;
1363         u32 eicr;
1364
1365         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1366          * therefore no explict interrupt disable is necessary */
1367         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1368         if (!eicr) {
1369                 /* shared interrupt alert!
1370                  * make sure interrupts are enabled because the read will
1371                  * have disabled interrupts due to EIAM */
1372                 ixgbe_irq_enable(adapter);
1373                 return IRQ_NONE;        /* Not our interrupt */
1374         }
1375
1376         if (eicr & IXGBE_EICR_LSC)
1377                 ixgbe_check_lsc(adapter);
1378
1379         ixgbe_check_fan_failure(adapter, eicr);
1380
1381         if (netif_rx_schedule_prep(&adapter->q_vector[0].napi)) {
1382                 adapter->tx_ring[0].total_packets = 0;
1383                 adapter->tx_ring[0].total_bytes = 0;
1384                 adapter->rx_ring[0].total_packets = 0;
1385                 adapter->rx_ring[0].total_bytes = 0;
1386                 /* would disable interrupts here but EIAM disabled it */
1387                 __netif_rx_schedule(&adapter->q_vector[0].napi);
1388         }
1389
1390         return IRQ_HANDLED;
1391 }
1392
1393 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1394 {
1395         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1396
1397         for (i = 0; i < q_vectors; i++) {
1398                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1399                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1400                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1401                 q_vector->rxr_count = 0;
1402                 q_vector->txr_count = 0;
1403         }
1404 }
1405
1406 /**
1407  * ixgbe_request_irq - initialize interrupts
1408  * @adapter: board private structure
1409  *
1410  * Attempts to configure interrupts using the best available
1411  * capabilities of the hardware and kernel.
1412  **/
1413 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1414 {
1415         struct net_device *netdev = adapter->netdev;
1416         int err;
1417
1418         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1419                 err = ixgbe_request_msix_irqs(adapter);
1420         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1421                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1422                                   netdev->name, netdev);
1423         } else {
1424                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1425                                   netdev->name, netdev);
1426         }
1427
1428         if (err)
1429                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1430
1431         return err;
1432 }
1433
1434 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1435 {
1436         struct net_device *netdev = adapter->netdev;
1437
1438         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1439                 int i, q_vectors;
1440
1441                 q_vectors = adapter->num_msix_vectors;
1442
1443                 i = q_vectors - 1;
1444                 free_irq(adapter->msix_entries[i].vector, netdev);
1445
1446                 i--;
1447                 for (; i >= 0; i--) {
1448                         free_irq(adapter->msix_entries[i].vector,
1449                                  &(adapter->q_vector[i]));
1450                 }
1451
1452                 ixgbe_reset_q_vectors(adapter);
1453         } else {
1454                 free_irq(adapter->pdev->irq, netdev);
1455         }
1456 }
1457
1458 /**
1459  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1460  *
1461  **/
1462 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1463 {
1464         struct ixgbe_hw *hw = &adapter->hw;
1465
1466         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1467                         EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1468
1469         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1470         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1471
1472         map_vector_to_rxq(adapter, 0, 0);
1473         map_vector_to_txq(adapter, 0, 0);
1474
1475         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1476 }
1477
1478 /**
1479  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1480  * @adapter: board private structure
1481  *
1482  * Configure the Tx unit of the MAC after a reset.
1483  **/
1484 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1485 {
1486         u64 tdba, tdwba;
1487         struct ixgbe_hw *hw = &adapter->hw;
1488         u32 i, j, tdlen, txctrl;
1489
1490         /* Setup the HW Tx Head and Tail descriptor pointers */
1491         for (i = 0; i < adapter->num_tx_queues; i++) {
1492                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1493                 j = ring->reg_idx;
1494                 tdba = ring->dma;
1495                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1496                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1497                                 (tdba & DMA_32BIT_MASK));
1498                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1499                 tdwba = ring->dma +
1500                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1501                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1502                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1503                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1504                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1505                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1506                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1507                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1508                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1509                 /* Disable Tx Head Writeback RO bit, since this hoses
1510                  * bookkeeping if things aren't delivered in order.
1511                  */
1512                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1513                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1514                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1515         }
1516 }
1517
1518 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1519
1520 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1521 {
1522         struct ixgbe_ring *rx_ring;
1523         u32 srrctl;
1524         int queue0;
1525         unsigned long mask;
1526
1527         /* program one srrctl register per VMDq index */
1528         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1529                 long shift, len;
1530                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1531                 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1532                 shift = find_first_bit(&mask, len);
1533                 queue0 = index & mask;
1534                 index = (index & mask) >> shift;
1535         /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1536         } else {
1537                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1538                 queue0 = index & mask;
1539                 index = index & mask;
1540         }
1541
1542         rx_ring = &adapter->rx_ring[queue0];
1543
1544         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1545
1546         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1547         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1548
1549         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1550                 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1551                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1552                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1553                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1554                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1555         } else {
1556                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1557
1558                 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1559                         srrctl |= IXGBE_RXBUFFER_2048 >>
1560                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1561                 else
1562                         srrctl |= rx_ring->rx_buf_len >>
1563                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1564         }
1565         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1566 }
1567
1568 /**
1569  * ixgbe_get_skb_hdr - helper function for LRO header processing
1570  * @skb: pointer to sk_buff to be added to LRO packet
1571  * @iphdr: pointer to ip header structure
1572  * @tcph: pointer to tcp header structure
1573  * @hdr_flags: pointer to header flags
1574  * @priv: private data
1575  **/
1576 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1577                              u64 *hdr_flags, void *priv)
1578 {
1579         union ixgbe_adv_rx_desc *rx_desc = priv;
1580
1581         /* Verify that this is a valid IPv4 TCP packet */
1582         if (!((ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_IPV4) &&
1583              (ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_TCP)))
1584                 return -1;
1585
1586         /* Set network headers */
1587         skb_reset_network_header(skb);
1588         skb_set_transport_header(skb, ip_hdrlen(skb));
1589         *iphdr = ip_hdr(skb);
1590         *tcph = tcp_hdr(skb);
1591         *hdr_flags = LRO_IPV4 | LRO_TCP;
1592         return 0;
1593 }
1594
1595 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1596                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1597
1598 /**
1599  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1600  * @adapter: board private structure
1601  *
1602  * Configure the Rx unit of the MAC after a reset.
1603  **/
1604 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1605 {
1606         u64 rdba;
1607         struct ixgbe_hw *hw = &adapter->hw;
1608         struct net_device *netdev = adapter->netdev;
1609         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1610         int i, j;
1611         u32 rdlen, rxctrl, rxcsum;
1612         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1613                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1614                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1615         u32 fctrl, hlreg0;
1616         u32 pages;
1617         u32 reta = 0, mrqc;
1618         u32 rdrxctl;
1619         int rx_buf_len;
1620
1621         /* Decide whether to use packet split mode or not */
1622         adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1623
1624         /* Set the RX buffer length according to the mode */
1625         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1626                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1627         } else {
1628                 if (netdev->mtu <= ETH_DATA_LEN)
1629                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1630                 else
1631                         rx_buf_len = ALIGN(max_frame, 1024);
1632         }
1633
1634         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1635         fctrl |= IXGBE_FCTRL_BAM;
1636         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1637         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1638
1639         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1640         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1641                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1642         else
1643                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1644         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1645
1646         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1647
1648         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1649         /* disable receives while setting up the descriptors */
1650         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1651         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1652
1653         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1654          * the Base and Length of the Rx Descriptor Ring */
1655         for (i = 0; i < adapter->num_rx_queues; i++) {
1656                 rdba = adapter->rx_ring[i].dma;
1657                 j = adapter->rx_ring[i].reg_idx;
1658                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1659                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1660                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1661                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1662                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1663                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1664                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1665                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1666                 /* Intitial LRO Settings */
1667                 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1668                 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1669                 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1670                 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1671                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1672                         adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1673                 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1674                 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1675                 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1676
1677                 ixgbe_configure_srrctl(adapter, j);
1678         }
1679
1680         /*
1681          * For VMDq support of different descriptor types or
1682          * buffer sizes through the use of multiple SRRCTL
1683          * registers, RDRXCTL.MVMEN must be set to 1
1684          *
1685          * also, the manual doesn't mention it clearly but DCA hints
1686          * will only use queue 0's tags unless this bit is set.  Side
1687          * effects of setting this bit are only that SRRCTL must be
1688          * fully programmed [0..15]
1689          */
1690         if (adapter->flags &
1691             (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED)) {
1692                 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1693                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1694                 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1695         }
1696
1697         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1698                 /* Fill out redirection table */
1699                 for (i = 0, j = 0; i < 128; i++, j++) {
1700                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1701                                 j = 0;
1702                         /* reta = 4-byte sliding window of
1703                          * 0x00..(indices-1)(indices-1)00..etc. */
1704                         reta = (reta << 8) | (j * 0x11);
1705                         if ((i & 3) == 3)
1706                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1707                 }
1708
1709                 /* Fill out hash function seeds */
1710                 for (i = 0; i < 10; i++)
1711                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1712
1713                 mrqc = IXGBE_MRQC_RSSEN
1714                     /* Perform hash on these packet types */
1715                        | IXGBE_MRQC_RSS_FIELD_IPV4
1716                        | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1717                        | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1718                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1719                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1720                        | IXGBE_MRQC_RSS_FIELD_IPV6
1721                        | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1722                        | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1723                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1724                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1725         }
1726
1727         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1728
1729         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1730             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1731                 /* Disable indicating checksum in descriptor, enables
1732                  * RSS hash */
1733                 rxcsum |= IXGBE_RXCSUM_PCSD;
1734         }
1735         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1736                 /* Enable IPv4 payload checksum for UDP fragments
1737                  * if PCSD is not set */
1738                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1739         }
1740
1741         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1742 }
1743
1744 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1745                                    struct vlan_group *grp)
1746 {
1747         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1748         u32 ctrl;
1749
1750         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1751                 ixgbe_irq_disable(adapter);
1752         adapter->vlgrp = grp;
1753
1754         /*
1755          * For a DCB driver, always enable VLAN tag stripping so we can
1756          * still receive traffic from a DCB-enabled host even if we're
1757          * not in DCB mode.
1758          */
1759         ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1760         ctrl |= IXGBE_VLNCTRL_VME;
1761         ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1762         IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1763
1764         if (grp) {
1765                 /* enable VLAN tag insert/strip */
1766                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1767                 ctrl |= IXGBE_VLNCTRL_VME;
1768                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1769                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1770         }
1771
1772         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1773                 ixgbe_irq_enable(adapter);
1774 }
1775
1776 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1777 {
1778         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1779         struct ixgbe_hw *hw = &adapter->hw;
1780
1781         /* add VID to filter table */
1782         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1783 }
1784
1785 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1786 {
1787         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1788         struct ixgbe_hw *hw = &adapter->hw;
1789
1790         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1791                 ixgbe_irq_disable(adapter);
1792
1793         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1794
1795         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1796                 ixgbe_irq_enable(adapter);
1797
1798         /* remove VID from filter table */
1799         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1800 }
1801
1802 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1803 {
1804         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1805
1806         if (adapter->vlgrp) {
1807                 u16 vid;
1808                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1809                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1810                                 continue;
1811                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1812                 }
1813         }
1814 }
1815
1816 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1817 {
1818         struct dev_mc_list *mc_ptr;
1819         u8 *addr = *mc_addr_ptr;
1820         *vmdq = 0;
1821
1822         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1823         if (mc_ptr->next)
1824                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1825         else
1826                 *mc_addr_ptr = NULL;
1827
1828         return addr;
1829 }
1830
1831 /**
1832  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1833  * @netdev: network interface device structure
1834  *
1835  * The set_rx_method entry point is called whenever the unicast/multicast
1836  * address list or the network interface flags are updated.  This routine is
1837  * responsible for configuring the hardware for proper unicast, multicast and
1838  * promiscuous mode.
1839  **/
1840 static void ixgbe_set_rx_mode(struct net_device *netdev)
1841 {
1842         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1843         struct ixgbe_hw *hw = &adapter->hw;
1844         u32 fctrl, vlnctrl;
1845         u8 *addr_list = NULL;
1846         int addr_count = 0;
1847
1848         /* Check for Promiscuous and All Multicast modes */
1849
1850         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1851         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1852
1853         if (netdev->flags & IFF_PROMISC) {
1854                 hw->addr_ctrl.user_set_promisc = 1;
1855                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1856                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1857         } else {
1858                 if (netdev->flags & IFF_ALLMULTI) {
1859                         fctrl |= IXGBE_FCTRL_MPE;
1860                         fctrl &= ~IXGBE_FCTRL_UPE;
1861                 } else {
1862                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1863                 }
1864                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1865                 hw->addr_ctrl.user_set_promisc = 0;
1866         }
1867
1868         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1869         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1870
1871         /* reprogram secondary unicast list */
1872         addr_count = netdev->uc_count;
1873         if (addr_count)
1874                 addr_list = netdev->uc_list->dmi_addr;
1875         hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
1876                                           ixgbe_addr_list_itr);
1877
1878         /* reprogram multicast list */
1879         addr_count = netdev->mc_count;
1880         if (addr_count)
1881                 addr_list = netdev->mc_list->dmi_addr;
1882         hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1883                                         ixgbe_addr_list_itr);
1884 }
1885
1886 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1887 {
1888         int q_idx;
1889         struct ixgbe_q_vector *q_vector;
1890         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1891
1892         /* legacy and MSI only use one vector */
1893         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1894                 q_vectors = 1;
1895
1896         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1897                 struct napi_struct *napi;
1898                 q_vector = &adapter->q_vector[q_idx];
1899                 if (!q_vector->rxr_count)
1900                         continue;
1901                 napi = &q_vector->napi;
1902                 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
1903                     (q_vector->rxr_count > 1))
1904                         napi->poll = &ixgbe_clean_rxonly_many;
1905
1906                 napi_enable(napi);
1907         }
1908 }
1909
1910 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1911 {
1912         int q_idx;
1913         struct ixgbe_q_vector *q_vector;
1914         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1915
1916         /* legacy and MSI only use one vector */
1917         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1918                 q_vectors = 1;
1919
1920         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1921                 q_vector = &adapter->q_vector[q_idx];
1922                 if (!q_vector->rxr_count)
1923                         continue;
1924                 napi_disable(&q_vector->napi);
1925         }
1926 }
1927
1928 #ifdef CONFIG_IXGBE_DCB
1929 /*
1930  * ixgbe_configure_dcb - Configure DCB hardware
1931  * @adapter: ixgbe adapter struct
1932  *
1933  * This is called by the driver on open to configure the DCB hardware.
1934  * This is also called by the gennetlink interface when reconfiguring
1935  * the DCB state.
1936  */
1937 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
1938 {
1939         struct ixgbe_hw *hw = &adapter->hw;
1940         u32 txdctl, vlnctrl;
1941         int i, j;
1942
1943         ixgbe_dcb_check_config(&adapter->dcb_cfg);
1944         ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
1945         ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
1946
1947         /* reconfigure the hardware */
1948         ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
1949
1950         for (i = 0; i < adapter->num_tx_queues; i++) {
1951                 j = adapter->tx_ring[i].reg_idx;
1952                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1953                 /* PThresh workaround for Tx hang with DFP enabled. */
1954                 txdctl |= 32;
1955                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1956         }
1957         /* Enable VLAN tag insert/strip */
1958         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1959         vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1960         vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
1961         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1962         hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
1963 }
1964
1965 #endif
1966 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1967 {
1968         struct net_device *netdev = adapter->netdev;
1969         int i;
1970
1971         ixgbe_set_rx_mode(netdev);
1972
1973         ixgbe_restore_vlan(adapter);
1974 #ifdef CONFIG_IXGBE_DCB
1975         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1976                 netif_set_gso_max_size(netdev, 32768);
1977                 ixgbe_configure_dcb(adapter);
1978         } else {
1979                 netif_set_gso_max_size(netdev, 65536);
1980         }
1981 #else
1982         netif_set_gso_max_size(netdev, 65536);
1983 #endif
1984
1985         ixgbe_configure_tx(adapter);
1986         ixgbe_configure_rx(adapter);
1987         for (i = 0; i < adapter->num_rx_queues; i++)
1988                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1989                                        (adapter->rx_ring[i].count - 1));
1990 }
1991
1992 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1993 {
1994         struct net_device *netdev = adapter->netdev;
1995         struct ixgbe_hw *hw = &adapter->hw;
1996         int i, j = 0;
1997         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1998         u32 txdctl, rxdctl, mhadd;
1999         u32 gpie;
2000
2001         ixgbe_get_hw_control(adapter);
2002
2003         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
2004             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
2005                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2006                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
2007                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
2008                 } else {
2009                         /* MSI only */
2010                         gpie = 0;
2011                 }
2012                 /* XXX: to interrupt immediately for EICS writes, enable this */
2013                 /* gpie |= IXGBE_GPIE_EIMEN; */
2014                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2015         }
2016
2017         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2018                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2019                  * specifically only auto mask tx and rx interrupts */
2020                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
2021         }
2022
2023         /* Enable fan failure interrupt if media type is copper */
2024         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2025                 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2026                 gpie |= IXGBE_SDP1_GPIEN;
2027                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2028         }
2029
2030         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
2031         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2032                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
2033                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
2034
2035                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
2036         }
2037
2038         for (i = 0; i < adapter->num_tx_queues; i++) {
2039                 j = adapter->tx_ring[i].reg_idx;
2040                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2041                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2042                 txdctl |= (8 << 16);
2043                 txdctl |= IXGBE_TXDCTL_ENABLE;
2044                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2045         }
2046
2047         for (i = 0; i < adapter->num_rx_queues; i++) {
2048                 j = adapter->rx_ring[i].reg_idx;
2049                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2050                 /* enable PTHRESH=32 descriptors (half the internal cache)
2051                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
2052                  * this also removes a pesky rx_no_buffer_count increment */
2053                 rxdctl |= 0x0020;
2054                 rxdctl |= IXGBE_RXDCTL_ENABLE;
2055                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
2056         }
2057         /* enable all receives */
2058         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2059         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2060         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
2061
2062         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2063                 ixgbe_configure_msix(adapter);
2064         else
2065                 ixgbe_configure_msi_and_legacy(adapter);
2066
2067         ixgbe_napi_add_all(adapter);
2068
2069         clear_bit(__IXGBE_DOWN, &adapter->state);
2070         ixgbe_napi_enable_all(adapter);
2071
2072         /* clear any pending interrupts, may auto mask */
2073         IXGBE_READ_REG(hw, IXGBE_EICR);
2074
2075         ixgbe_irq_enable(adapter);
2076
2077         /* bring the link up in the watchdog, this could race with our first
2078          * link up interrupt but shouldn't be a problem */
2079         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2080         adapter->link_check_timeout = jiffies;
2081         mod_timer(&adapter->watchdog_timer, jiffies);
2082         return 0;
2083 }
2084
2085 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2086 {
2087         WARN_ON(in_interrupt());
2088         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2089                 msleep(1);
2090         ixgbe_down(adapter);
2091         ixgbe_up(adapter);
2092         clear_bit(__IXGBE_RESETTING, &adapter->state);
2093 }
2094
2095 int ixgbe_up(struct ixgbe_adapter *adapter)
2096 {
2097         /* hardware has been reset, we need to reload some things */
2098         ixgbe_configure(adapter);
2099
2100         return ixgbe_up_complete(adapter);
2101 }
2102
2103 void ixgbe_reset(struct ixgbe_adapter *adapter)
2104 {
2105         struct ixgbe_hw *hw = &adapter->hw;
2106         if (hw->mac.ops.init_hw(hw))
2107                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2108
2109         /* reprogram the RAR[0] in case user changed it. */
2110         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2111
2112 }
2113
2114 /**
2115  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2116  * @adapter: board private structure
2117  * @rx_ring: ring to free buffers from
2118  **/
2119 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2120                                 struct ixgbe_ring *rx_ring)
2121 {
2122         struct pci_dev *pdev = adapter->pdev;
2123         unsigned long size;
2124         unsigned int i;
2125
2126         /* Free all the Rx ring sk_buffs */
2127
2128         for (i = 0; i < rx_ring->count; i++) {
2129                 struct ixgbe_rx_buffer *rx_buffer_info;
2130
2131                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2132                 if (rx_buffer_info->dma) {
2133                         pci_unmap_single(pdev, rx_buffer_info->dma,
2134                                          rx_ring->rx_buf_len,
2135                                          PCI_DMA_FROMDEVICE);
2136                         rx_buffer_info->dma = 0;
2137                 }
2138                 if (rx_buffer_info->skb) {
2139                         dev_kfree_skb(rx_buffer_info->skb);
2140                         rx_buffer_info->skb = NULL;
2141                 }
2142                 if (!rx_buffer_info->page)
2143                         continue;
2144                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2145                                PCI_DMA_FROMDEVICE);
2146                 rx_buffer_info->page_dma = 0;
2147                 put_page(rx_buffer_info->page);
2148                 rx_buffer_info->page = NULL;
2149                 rx_buffer_info->page_offset = 0;
2150         }
2151
2152         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2153         memset(rx_ring->rx_buffer_info, 0, size);
2154
2155         /* Zero out the descriptor ring */
2156         memset(rx_ring->desc, 0, rx_ring->size);
2157
2158         rx_ring->next_to_clean = 0;
2159         rx_ring->next_to_use = 0;
2160
2161         writel(0, adapter->hw.hw_addr + rx_ring->head);
2162         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2163 }
2164
2165 /**
2166  * ixgbe_clean_tx_ring - Free Tx Buffers
2167  * @adapter: board private structure
2168  * @tx_ring: ring to be cleaned
2169  **/
2170 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2171                                 struct ixgbe_ring *tx_ring)
2172 {
2173         struct ixgbe_tx_buffer *tx_buffer_info;
2174         unsigned long size;
2175         unsigned int i;
2176
2177         /* Free all the Tx ring sk_buffs */
2178
2179         for (i = 0; i < tx_ring->count; i++) {
2180                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2181                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2182         }
2183
2184         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2185         memset(tx_ring->tx_buffer_info, 0, size);
2186
2187         /* Zero out the descriptor ring */
2188         memset(tx_ring->desc, 0, tx_ring->size);
2189
2190         tx_ring->next_to_use = 0;
2191         tx_ring->next_to_clean = 0;
2192
2193         writel(0, adapter->hw.hw_addr + tx_ring->head);
2194         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2195 }
2196
2197 /**
2198  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2199  * @adapter: board private structure
2200  **/
2201 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2202 {
2203         int i;
2204
2205         for (i = 0; i < adapter->num_rx_queues; i++)
2206                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2207 }
2208
2209 /**
2210  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2211  * @adapter: board private structure
2212  **/
2213 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2214 {
2215         int i;
2216
2217         for (i = 0; i < adapter->num_tx_queues; i++)
2218                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2219 }
2220
2221 void ixgbe_down(struct ixgbe_adapter *adapter)
2222 {
2223         struct net_device *netdev = adapter->netdev;
2224         struct ixgbe_hw *hw = &adapter->hw;
2225         u32 rxctrl;
2226         u32 txdctl;
2227         int i, j;
2228
2229         /* signal that we are down to the interrupt handler */
2230         set_bit(__IXGBE_DOWN, &adapter->state);
2231
2232         /* disable receives */
2233         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2234         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2235
2236         netif_tx_disable(netdev);
2237
2238         IXGBE_WRITE_FLUSH(hw);
2239         msleep(10);
2240
2241         netif_tx_stop_all_queues(netdev);
2242
2243         ixgbe_irq_disable(adapter);
2244
2245         ixgbe_napi_disable_all(adapter);
2246
2247         del_timer_sync(&adapter->watchdog_timer);
2248         cancel_work_sync(&adapter->watchdog_task);
2249
2250         /* disable transmits in the hardware now that interrupts are off */
2251         for (i = 0; i < adapter->num_tx_queues; i++) {
2252                 j = adapter->tx_ring[i].reg_idx;
2253                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2254                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2255                                 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2256         }
2257
2258         netif_carrier_off(netdev);
2259
2260 #ifdef CONFIG_IXGBE_DCA
2261         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2262                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2263                 dca_remove_requester(&adapter->pdev->dev);
2264         }
2265
2266 #endif
2267         if (!pci_channel_offline(adapter->pdev))
2268                 ixgbe_reset(adapter);
2269         ixgbe_clean_all_tx_rings(adapter);
2270         ixgbe_clean_all_rx_rings(adapter);
2271
2272 #ifdef CONFIG_IXGBE_DCA
2273         /* since we reset the hardware DCA settings were cleared */
2274         if (dca_add_requester(&adapter->pdev->dev) == 0) {
2275                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2276                 /* always use CB2 mode, difference is masked
2277                  * in the CB driver */
2278                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2279                 ixgbe_setup_dca(adapter);
2280         }
2281 #endif
2282 }
2283
2284 /**
2285  * ixgbe_poll - NAPI Rx polling callback
2286  * @napi: structure for representing this polling device
2287  * @budget: how many packets driver is allowed to clean
2288  *
2289  * This function is used for legacy and MSI, NAPI mode
2290  **/
2291 static int ixgbe_poll(struct napi_struct *napi, int budget)
2292 {
2293         struct ixgbe_q_vector *q_vector = container_of(napi,
2294                                                   struct ixgbe_q_vector, napi);
2295         struct ixgbe_adapter *adapter = q_vector->adapter;
2296         int tx_cleaned, work_done = 0;
2297
2298 #ifdef CONFIG_IXGBE_DCA
2299         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2300                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2301                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2302         }
2303 #endif
2304
2305         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2306         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2307
2308         if (tx_cleaned)
2309                 work_done = budget;
2310
2311         /* If budget not fully consumed, exit the polling mode */
2312         if (work_done < budget) {
2313                 netif_rx_complete(napi);
2314                 if (adapter->itr_setting & 3)
2315                         ixgbe_set_itr(adapter);
2316                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2317                         ixgbe_irq_enable(adapter);
2318         }
2319         return work_done;
2320 }
2321
2322 /**
2323  * ixgbe_tx_timeout - Respond to a Tx Hang
2324  * @netdev: network interface device structure
2325  **/
2326 static void ixgbe_tx_timeout(struct net_device *netdev)
2327 {
2328         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2329
2330         /* Do the reset outside of interrupt context */
2331         schedule_work(&adapter->reset_task);
2332 }
2333
2334 static void ixgbe_reset_task(struct work_struct *work)
2335 {
2336         struct ixgbe_adapter *adapter;
2337         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2338
2339         /* If we're already down or resetting, just bail */
2340         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
2341             test_bit(__IXGBE_RESETTING, &adapter->state))
2342                 return;
2343
2344         adapter->tx_timeout_count++;
2345
2346         ixgbe_reinit_locked(adapter);
2347 }
2348
2349 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2350 {
2351         int nrq = 1, ntq = 1;
2352         int feature_mask = 0, rss_i, rss_m;
2353         int dcb_i, dcb_m;
2354
2355         /* Number of supported queues */
2356         switch (adapter->hw.mac.type) {
2357         case ixgbe_mac_82598EB:
2358                 dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2359                 dcb_m = 0;
2360                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2361                 rss_m = 0;
2362                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2363                 feature_mask |= IXGBE_FLAG_DCB_ENABLED;
2364
2365                 switch (adapter->flags & feature_mask) {
2366                 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED):
2367                         dcb_m = 0x7 << 3;
2368                         rss_i = min(8, rss_i);
2369                         rss_m = 0x7;
2370                         nrq = dcb_i * rss_i;
2371                         ntq = min(MAX_TX_QUEUES, dcb_i * rss_i);
2372                         break;
2373                 case (IXGBE_FLAG_DCB_ENABLED):
2374                         dcb_m = 0x7 << 3;
2375                         nrq = dcb_i;
2376                         ntq = dcb_i;
2377                         break;
2378                 case (IXGBE_FLAG_RSS_ENABLED):
2379                         rss_m = 0xF;
2380                         nrq = rss_i;
2381                         ntq = rss_i;
2382                         break;
2383                 case 0:
2384                 default:
2385                         dcb_i = 0;
2386                         dcb_m = 0;
2387                         rss_i = 0;
2388                         rss_m = 0;
2389                         nrq = 1;
2390                         ntq = 1;
2391                         break;
2392                 }
2393
2394                 /* Sanity check, we should never have zero queues */
2395                 nrq = (nrq ?:1);
2396                 ntq = (ntq ?:1);
2397
2398                 adapter->ring_feature[RING_F_DCB].indices = dcb_i;
2399                 adapter->ring_feature[RING_F_DCB].mask = dcb_m;
2400                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2401                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2402                 break;
2403         default:
2404                 nrq = 1;
2405                 ntq = 1;
2406                 break;
2407         }
2408
2409         adapter->num_rx_queues = nrq;
2410         adapter->num_tx_queues = ntq;
2411 }
2412
2413 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2414                                        int vectors)
2415 {
2416         int err, vector_threshold;
2417
2418         /* We'll want at least 3 (vector_threshold):
2419          * 1) TxQ[0] Cleanup
2420          * 2) RxQ[0] Cleanup
2421          * 3) Other (Link Status Change, etc.)
2422          * 4) TCP Timer (optional)
2423          */
2424         vector_threshold = MIN_MSIX_COUNT;
2425
2426         /* The more we get, the more we will assign to Tx/Rx Cleanup
2427          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2428          * Right now, we simply care about how many we'll get; we'll
2429          * set them up later while requesting irq's.
2430          */
2431         while (vectors >= vector_threshold) {
2432                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2433                                       vectors);
2434                 if (!err) /* Success in acquiring all requested vectors. */
2435                         break;
2436                 else if (err < 0)
2437                         vectors = 0; /* Nasty failure, quit now */
2438                 else /* err == number of vectors we should try again with */
2439                         vectors = err;
2440         }
2441
2442         if (vectors < vector_threshold) {
2443                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2444                  * This just means we'll go with either a single MSI
2445                  * vector or fall back to legacy interrupts.
2446                  */
2447                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2448                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2449                 kfree(adapter->msix_entries);
2450                 adapter->msix_entries = NULL;
2451                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2452                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2453                 ixgbe_set_num_queues(adapter);
2454         } else {
2455                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2456                 adapter->num_msix_vectors = vectors;
2457         }
2458 }
2459
2460 /**
2461  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2462  * @adapter: board private structure to initialize
2463  *
2464  * Once we know the feature-set enabled for the device, we'll cache
2465  * the register offset the descriptor ring is assigned to.
2466  **/
2467 static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2468 {
2469         int feature_mask = 0, rss_i;
2470         int i, txr_idx, rxr_idx;
2471         int dcb_i;
2472
2473         /* Number of supported queues */
2474         switch (adapter->hw.mac.type) {
2475         case ixgbe_mac_82598EB:
2476                 dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2477                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2478                 txr_idx = 0;
2479                 rxr_idx = 0;
2480                 feature_mask |= IXGBE_FLAG_DCB_ENABLED;
2481                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2482                 switch (adapter->flags & feature_mask) {
2483                 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED):
2484                         for (i = 0; i < dcb_i; i++) {
2485                                 int j;
2486                                 /* Rx first */
2487                                 for (j = 0; j < adapter->num_rx_queues; j++) {
2488                                         adapter->rx_ring[rxr_idx].reg_idx =
2489                                                 i << 3 | j;
2490                                         rxr_idx++;
2491                                 }
2492                                 /* Tx now */
2493                                 for (j = 0; j < adapter->num_tx_queues; j++) {
2494                                         adapter->tx_ring[txr_idx].reg_idx =
2495                                                 i << 2 | (j >> 1);
2496                                         if (j & 1)
2497                                                 txr_idx++;
2498                                 }
2499                         }
2500                 case (IXGBE_FLAG_DCB_ENABLED):
2501                         /* the number of queues is assumed to be symmetric */
2502                         for (i = 0; i < dcb_i; i++) {
2503                                 adapter->rx_ring[i].reg_idx = i << 3;
2504                                 adapter->tx_ring[i].reg_idx = i << 2;
2505                         }
2506                         break;
2507                 case (IXGBE_FLAG_RSS_ENABLED):
2508                         for (i = 0; i < adapter->num_rx_queues; i++)
2509                                 adapter->rx_ring[i].reg_idx = i;
2510                         for (i = 0; i < adapter->num_tx_queues; i++)
2511                                 adapter->tx_ring[i].reg_idx = i;
2512                         break;
2513                 case 0:
2514                 default:
2515                         break;
2516                 }
2517                 break;
2518         default:
2519                 break;
2520         }
2521 }
2522
2523 /**
2524  * ixgbe_alloc_queues - Allocate memory for all rings
2525  * @adapter: board private structure to initialize
2526  *
2527  * We allocate one ring per queue at run-time since we don't know the
2528  * number of queues at compile-time.
2529  **/
2530 static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2531 {
2532         int i;
2533
2534         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2535                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2536         if (!adapter->tx_ring)
2537                 goto err_tx_ring_allocation;
2538
2539         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2540                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2541         if (!adapter->rx_ring)
2542                 goto err_rx_ring_allocation;
2543
2544         for (i = 0; i < adapter->num_tx_queues; i++) {
2545                 adapter->tx_ring[i].count = adapter->tx_ring_count;
2546                 adapter->tx_ring[i].queue_index = i;
2547         }
2548
2549         for (i = 0; i < adapter->num_rx_queues; i++) {
2550                 adapter->rx_ring[i].count = adapter->rx_ring_count;
2551                 adapter->rx_ring[i].queue_index = i;
2552         }
2553
2554         ixgbe_cache_ring_register(adapter);
2555
2556         return 0;
2557
2558 err_rx_ring_allocation:
2559         kfree(adapter->tx_ring);
2560 err_tx_ring_allocation:
2561         return -ENOMEM;
2562 }
2563
2564 /**
2565  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2566  * @adapter: board private structure to initialize
2567  *
2568  * Attempt to configure the interrupts using the best available
2569  * capabilities of the hardware and the kernel.
2570  **/
2571 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
2572 {
2573         int err = 0;
2574         int vector, v_budget;
2575
2576         /*
2577          * It's easy to be greedy for MSI-X vectors, but it really
2578          * doesn't do us much good if we have a lot more vectors
2579          * than CPU's.  So let's be conservative and only ask for
2580          * (roughly) twice the number of vectors as there are CPU's.
2581          */
2582         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2583                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2584
2585         /*
2586          * At the same time, hardware can only support a maximum of
2587          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2588          * we can easily reach upwards of 64 Rx descriptor queues and
2589          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2590          * the cpu count also exceeds our vector limit.
2591          */
2592         v_budget = min(v_budget, MAX_MSIX_COUNT);
2593
2594         /* A failure in MSI-X entry allocation isn't fatal, but it does
2595          * mean we disable MSI-X capabilities of the adapter. */
2596         adapter->msix_entries = kcalloc(v_budget,
2597                                         sizeof(struct msix_entry), GFP_KERNEL);
2598         if (!adapter->msix_entries) {
2599                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2600                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2601                 ixgbe_set_num_queues(adapter);
2602                 kfree(adapter->tx_ring);
2603                 kfree(adapter->rx_ring);
2604                 err = ixgbe_alloc_queues(adapter);
2605                 if (err) {
2606                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2607                                 "for queues\n");
2608                         goto out;
2609                 }
2610
2611                 goto try_msi;
2612         }
2613
2614         for (vector = 0; vector < v_budget; vector++)
2615                 adapter->msix_entries[vector].entry = vector;
2616
2617         ixgbe_acquire_msix_vectors(adapter, v_budget);
2618
2619         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2620                 goto out;
2621
2622 try_msi:
2623         err = pci_enable_msi(adapter->pdev);
2624         if (!err) {
2625                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2626         } else {
2627                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2628                         "falling back to legacy.  Error: %d\n", err);
2629                 /* reset err */
2630                 err = 0;
2631         }
2632
2633 out:
2634         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2635         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2636
2637         return err;
2638 }
2639
2640 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2641 {
2642         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2643                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2644                 pci_disable_msix(adapter->pdev);
2645                 kfree(adapter->msix_entries);
2646                 adapter->msix_entries = NULL;
2647         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2648                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2649                 pci_disable_msi(adapter->pdev);
2650         }
2651         return;
2652 }
2653
2654 /**
2655  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2656  * @adapter: board private structure to initialize
2657  *
2658  * We determine which interrupt scheme to use based on...
2659  * - Kernel support (MSI, MSI-X)
2660  *   - which can be user-defined (via MODULE_PARAM)
2661  * - Hardware queue count (num_*_queues)
2662  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2663  **/
2664 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2665 {
2666         int err;
2667
2668         /* Number of supported queues */
2669         ixgbe_set_num_queues(adapter);
2670
2671         err = ixgbe_alloc_queues(adapter);
2672         if (err) {
2673                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2674                 goto err_alloc_queues;
2675         }
2676
2677         err = ixgbe_set_interrupt_capability(adapter);
2678         if (err) {
2679                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2680                 goto err_set_interrupt;
2681         }
2682
2683         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2684                 "Tx Queue count = %u\n",
2685                 (adapter->num_rx_queues > 1) ? "Enabled" :
2686                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2687
2688         set_bit(__IXGBE_DOWN, &adapter->state);
2689
2690         return 0;
2691
2692 err_set_interrupt:
2693         kfree(adapter->tx_ring);
2694         kfree(adapter->rx_ring);
2695 err_alloc_queues:
2696         return err;
2697 }
2698
2699 /**
2700  * ixgbe_sfp_timer - worker thread to find a missing module
2701  * @data: pointer to our adapter struct
2702  **/
2703 static void ixgbe_sfp_timer(unsigned long data)
2704 {
2705         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2706
2707         /* Do the sfp_timer outside of interrupt context due to the
2708          * delays that sfp+ detection requires
2709          */
2710         schedule_work(&adapter->sfp_task);
2711 }
2712
2713 /**
2714  * ixgbe_sfp_task - worker thread to find a missing module
2715  * @work: pointer to work_struct containing our data
2716  **/
2717 static void ixgbe_sfp_task(struct work_struct *work)
2718 {
2719         struct ixgbe_adapter *adapter = container_of(work,
2720                                                      struct ixgbe_adapter,
2721                                                      sfp_task);
2722         struct ixgbe_hw *hw = &adapter->hw;
2723
2724         if ((hw->phy.type == ixgbe_phy_nl) &&
2725             (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
2726                 s32 ret = hw->phy.ops.identify_sfp(hw);
2727                 if (ret)
2728                         goto reschedule;
2729                 ret = hw->phy.ops.reset(hw);
2730                 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2731                         DPRINTK(PROBE, ERR, "failed to initialize because an "
2732                                 "unsupported SFP+ module type was detected.\n"
2733                                 "Reload the driver after installing a "
2734                                 "supported module.\n");
2735                         unregister_netdev(adapter->netdev);
2736                 } else {
2737                         DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
2738                                 hw->phy.sfp_type);
2739                 }
2740                 /* don't need this routine any more */
2741                 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
2742         }
2743         return;
2744 reschedule:
2745         if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
2746                 mod_timer(&adapter->sfp_timer,
2747                           round_jiffies(jiffies + (2 * HZ)));
2748 }
2749
2750 /**
2751  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2752  * @adapter: board private structure to initialize
2753  *
2754  * ixgbe_sw_init initializes the Adapter private data structure.
2755  * Fields are initialized based on PCI device information and
2756  * OS network device settings (MTU size).
2757  **/
2758 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2759 {
2760         struct ixgbe_hw *hw = &adapter->hw;
2761         struct pci_dev *pdev = adapter->pdev;
2762         unsigned int rss;
2763 #ifdef CONFIG_IXGBE_DCB
2764         int j;
2765         struct tc_configuration *tc;
2766 #endif
2767
2768         /* PCI config space info */
2769
2770         hw->vendor_id = pdev->vendor;
2771         hw->device_id = pdev->device;
2772         hw->revision_id = pdev->revision;
2773         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2774         hw->subsystem_device_id = pdev->subsystem_device;
2775
2776         /* Set capability flags */
2777         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2778         adapter->ring_feature[RING_F_RSS].indices = rss;
2779         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2780         adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
2781
2782 #ifdef CONFIG_IXGBE_DCB
2783         /* Configure DCB traffic classes */
2784         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
2785                 tc = &adapter->dcb_cfg.tc_config[j];
2786                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
2787                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
2788                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
2789                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
2790                 tc->dcb_pfc = pfc_disabled;
2791         }
2792         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
2793         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
2794         adapter->dcb_cfg.rx_pba_cfg = pba_equal;
2795         adapter->dcb_cfg.round_robin_enable = false;
2796         adapter->dcb_set_bitmap = 0x00;
2797         ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
2798                            adapter->ring_feature[RING_F_DCB].indices);
2799
2800 #endif
2801         if (hw->mac.ops.get_media_type &&
2802             (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper))
2803                 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
2804
2805         /* default flow control settings */
2806         hw->fc.original_type = ixgbe_fc_none;
2807         hw->fc.type = ixgbe_fc_none;
2808         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2809         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2810         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2811         hw->fc.send_xon = true;
2812
2813         /* select 10G link by default */
2814         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2815
2816         /* enable itr by default in dynamic mode */
2817         adapter->itr_setting = 1;
2818         adapter->eitr_param = 20000;
2819
2820         /* set defaults for eitr in MegaBytes */
2821         adapter->eitr_low = 10;
2822         adapter->eitr_high = 20;
2823
2824         /* set default ring sizes */
2825         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2826         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2827
2828         /* initialize eeprom parameters */
2829         if (ixgbe_init_eeprom_params_generic(hw)) {
2830                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2831                 return -EIO;
2832         }
2833
2834         /* enable rx csum by default */
2835         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2836
2837         set_bit(__IXGBE_DOWN, &adapter->state);
2838
2839         return 0;
2840 }
2841
2842 /**
2843  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2844  * @adapter: board private structure
2845  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2846  *
2847  * Return 0 on success, negative on failure
2848  **/
2849 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2850                              struct ixgbe_ring *tx_ring)
2851 {
2852         struct pci_dev *pdev = adapter->pdev;
2853         int size;
2854
2855         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2856         tx_ring->tx_buffer_info = vmalloc(size);
2857         if (!tx_ring->tx_buffer_info)
2858                 goto err;
2859         memset(tx_ring->tx_buffer_info, 0, size);
2860
2861         /* round up to nearest 4K */
2862         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2863                         sizeof(u32);
2864         tx_ring->size = ALIGN(tx_ring->size, 4096);
2865
2866         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2867                                              &tx_ring->dma);
2868         if (!tx_ring->desc)
2869                 goto err;
2870
2871         tx_ring->next_to_use = 0;
2872         tx_ring->next_to_clean = 0;
2873         tx_ring->work_limit = tx_ring->count;
2874         return 0;
2875
2876 err:
2877         vfree(tx_ring->tx_buffer_info);
2878         tx_ring->tx_buffer_info = NULL;
2879         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2880                             "descriptor ring\n");
2881         return -ENOMEM;
2882 }
2883
2884 /**
2885  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2886  * @adapter: board private structure
2887  *
2888  * If this function returns with an error, then it's possible one or
2889  * more of the rings is populated (while the rest are not).  It is the
2890  * callers duty to clean those orphaned rings.
2891  *
2892  * Return 0 on success, negative on failure
2893  **/
2894 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2895 {
2896         int i, err = 0;
2897
2898         for (i = 0; i < adapter->num_tx_queues; i++) {
2899                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2900                 if (!err)
2901                         continue;
2902                 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
2903                 break;
2904         }
2905
2906         return err;
2907 }
2908
2909 /**
2910  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2911  * @adapter: board private structure
2912  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2913  *
2914  * Returns 0 on success, negative on failure
2915  **/
2916 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2917                              struct ixgbe_ring *rx_ring)
2918 {
2919         struct pci_dev *pdev = adapter->pdev;
2920         int size;
2921
2922         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2923         rx_ring->lro_mgr.lro_arr = vmalloc(size);
2924         if (!rx_ring->lro_mgr.lro_arr)
2925                 return -ENOMEM;
2926         memset(rx_ring->lro_mgr.lro_arr, 0, size);
2927
2928         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2929         rx_ring->rx_buffer_info = vmalloc(size);
2930         if (!rx_ring->rx_buffer_info) {
2931                 DPRINTK(PROBE, ERR,
2932                         "vmalloc allocation failed for the rx desc ring\n");
2933                 goto alloc_failed;
2934         }
2935         memset(rx_ring->rx_buffer_info, 0, size);
2936
2937         /* Round up to nearest 4K */
2938         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2939         rx_ring->size = ALIGN(rx_ring->size, 4096);
2940
2941         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2942
2943         if (!rx_ring->desc) {
2944                 DPRINTK(PROBE, ERR,
2945                         "Memory allocation failed for the rx desc ring\n");
2946                 vfree(rx_ring->rx_buffer_info);
2947                 goto alloc_failed;
2948         }
2949
2950         rx_ring->next_to_clean = 0;
2951         rx_ring->next_to_use = 0;
2952
2953         return 0;
2954
2955 alloc_failed:
2956         vfree(rx_ring->lro_mgr.lro_arr);
2957         rx_ring->lro_mgr.lro_arr = NULL;
2958         return -ENOMEM;
2959 }
2960
2961 /**
2962  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2963  * @adapter: board private structure
2964  *
2965  * If this function returns with an error, then it's possible one or
2966  * more of the rings is populated (while the rest are not).  It is the
2967  * callers duty to clean those orphaned rings.
2968  *
2969  * Return 0 on success, negative on failure
2970  **/
2971
2972 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2973 {
2974         int i, err = 0;
2975
2976         for (i = 0; i < adapter->num_rx_queues; i++) {
2977                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2978                 if (!err)
2979                         continue;
2980                 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
2981                 break;
2982         }
2983
2984         return err;
2985 }
2986
2987 /**
2988  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2989  * @adapter: board private structure
2990  * @tx_ring: Tx descriptor ring for a specific queue
2991  *
2992  * Free all transmit software resources
2993  **/
2994 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2995                              struct ixgbe_ring *tx_ring)
2996 {
2997         struct pci_dev *pdev = adapter->pdev;
2998
2999         ixgbe_clean_tx_ring(adapter, tx_ring);
3000
3001         vfree(tx_ring->tx_buffer_info);
3002         tx_ring->tx_buffer_info = NULL;
3003
3004         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
3005
3006         tx_ring->desc = NULL;
3007 }
3008
3009 /**
3010  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
3011  * @adapter: board private structure
3012  *
3013  * Free all transmit software resources
3014  **/
3015 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
3016 {
3017         int i;
3018
3019         for (i = 0; i < adapter->num_tx_queues; i++)
3020                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
3021 }
3022
3023 /**
3024  * ixgbe_free_rx_resources - Free Rx Resources
3025  * @adapter: board private structure
3026  * @rx_ring: ring to clean the resources from
3027  *
3028  * Free all receive software resources
3029  **/
3030 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
3031                              struct ixgbe_ring *rx_ring)
3032 {
3033         struct pci_dev *pdev = adapter->pdev;
3034
3035         vfree(rx_ring->lro_mgr.lro_arr);
3036         rx_ring->lro_mgr.lro_arr = NULL;
3037
3038         ixgbe_clean_rx_ring(adapter, rx_ring);
3039
3040         vfree(rx_ring->rx_buffer_info);
3041         rx_ring->rx_buffer_info = NULL;
3042
3043         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
3044
3045         rx_ring->desc = NULL;
3046 }
3047
3048 /**
3049  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3050  * @adapter: board private structure
3051  *
3052  * Free all receive software resources
3053  **/
3054 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
3055 {
3056         int i;
3057
3058         for (i = 0; i < adapter->num_rx_queues; i++)
3059                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
3060 }
3061
3062 /**
3063  * ixgbe_change_mtu - Change the Maximum Transfer Unit
3064  * @netdev: network interface device structure
3065  * @new_mtu: new value for maximum frame size
3066  *
3067  * Returns 0 on success, negative on failure
3068  **/
3069 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
3070 {
3071         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3072         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3073
3074         /* MTU < 68 is an error and causes problems on some kernels */
3075         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
3076                 return -EINVAL;
3077
3078         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
3079                 netdev->mtu, new_mtu);
3080         /* must set new MTU before calling down or up */
3081         netdev->mtu = new_mtu;
3082
3083         if (netif_running(netdev))
3084                 ixgbe_reinit_locked(adapter);
3085
3086         return 0;
3087 }
3088
3089 /**
3090  * ixgbe_open - Called when a network interface is made active
3091  * @netdev: network interface device structure
3092  *
3093  * Returns 0 on success, negative value on failure
3094  *
3095  * The open entry point is called when a network interface is made
3096  * active by the system (IFF_UP).  At this point all resources needed
3097  * for transmit and receive operations are allocated, the interrupt
3098  * handler is registered with the OS, the watchdog timer is started,
3099  * and the stack is notified that the interface is ready.
3100  **/
3101 static int ixgbe_open(struct net_device *netdev)
3102 {
3103         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3104         int err;
3105
3106         /* disallow open during test */
3107         if (test_bit(__IXGBE_TESTING, &adapter->state))
3108                 return -EBUSY;
3109
3110         /* allocate transmit descriptors */
3111         err = ixgbe_setup_all_tx_resources(adapter);
3112         if (err)
3113                 goto err_setup_tx;
3114
3115         /* allocate receive descriptors */
3116         err = ixgbe_setup_all_rx_resources(adapter);
3117         if (err)
3118                 goto err_setup_rx;
3119
3120         ixgbe_configure(adapter);
3121
3122         err = ixgbe_request_irq(adapter);
3123         if (err)
3124                 goto err_req_irq;
3125
3126         err = ixgbe_up_complete(adapter);
3127         if (err)
3128                 goto err_up;
3129
3130         netif_tx_start_all_queues(netdev);
3131
3132         return 0;
3133
3134 err_up:
3135         ixgbe_release_hw_control(adapter);
3136         ixgbe_free_irq(adapter);
3137 err_req_irq:
3138         ixgbe_free_all_rx_resources(adapter);
3139 err_setup_rx:
3140         ixgbe_free_all_tx_resources(adapter);
3141 err_setup_tx:
3142         ixgbe_reset(adapter);
3143
3144         return err;
3145 }
3146
3147 /**
3148  * ixgbe_close - Disables a network interface
3149  * @netdev: network interface device structure
3150  *
3151  * Returns 0, this is not allowed to fail
3152  *
3153  * The close entry point is called when an interface is de-activated
3154  * by the OS.  The hardware is still under the drivers control, but
3155  * needs to be disabled.  A global MAC reset is issued to stop the
3156  * hardware, and all transmit and receive resources are freed.
3157  **/
3158 static int ixgbe_close(struct net_device *netdev)
3159 {
3160         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3161
3162         ixgbe_down(adapter);
3163         ixgbe_free_irq(adapter);
3164
3165         ixgbe_free_all_tx_resources(adapter);
3166         ixgbe_free_all_rx_resources(adapter);
3167
3168         ixgbe_release_hw_control(adapter);
3169
3170         return 0;
3171 }
3172
3173 /**
3174  * ixgbe_napi_add_all - prep napi structs for use
3175  * @adapter: private struct
3176  * helper function to napi_add each possible q_vector->napi
3177  */
3178 void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3179 {
3180         int q_idx, q_vectors;
3181         struct net_device *netdev = adapter->netdev;
3182         int (*poll)(struct napi_struct *, int);
3183
3184         /* check if we already have our netdev->napi_list populated */
3185         if (&netdev->napi_list != netdev->napi_list.next)
3186                 return;
3187
3188         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3189                 poll = &ixgbe_clean_rxonly;
3190                 /* Only enable as many vectors as we have rx queues. */
3191                 q_vectors = adapter->num_rx_queues;
3192         } else {
3193                 poll = &ixgbe_poll;
3194                 /* only one q_vector for legacy modes */
3195                 q_vectors = 1;
3196         }
3197
3198         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3199                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3200                 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3201         }
3202 }
3203
3204 void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
3205 {
3206         int q_idx;
3207         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3208
3209         /* legacy and MSI only use one vector */
3210         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3211                 q_vectors = 1;
3212
3213         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3214                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3215                 if (!q_vector->rxr_count)
3216                         continue;
3217                 netif_napi_del(&q_vector->napi);
3218         }
3219 }
3220
3221 #ifdef CONFIG_PM
3222 static int ixgbe_resume(struct pci_dev *pdev)
3223 {
3224         struct net_device *netdev = pci_get_drvdata(pdev);
3225         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3226         u32 err;
3227
3228         pci_set_power_state(pdev, PCI_D0);
3229         pci_restore_state(pdev);
3230         err = pci_enable_device(pdev);
3231         if (err) {
3232                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3233                                 "suspend\n");
3234                 return err;
3235         }
3236         pci_set_master(pdev);
3237
3238         pci_enable_wake(pdev, PCI_D3hot, 0);
3239         pci_enable_wake(pdev, PCI_D3cold, 0);
3240
3241         err = ixgbe_init_interrupt_scheme(adapter);
3242         if (err) {
3243                 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3244                                 "device\n");
3245                 return err;
3246         }
3247
3248         ixgbe_napi_add_all(adapter);
3249         ixgbe_reset(adapter);
3250
3251         if (netif_running(netdev)) {
3252                 err = ixgbe_open(adapter->netdev);
3253                 if (err)
3254                         return err;
3255         }
3256
3257         netif_device_attach(netdev);
3258
3259         return 0;
3260 }
3261
3262 #endif /* CONFIG_PM */
3263 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3264 {
3265         struct net_device *netdev = pci_get_drvdata(pdev);
3266         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3267 #ifdef CONFIG_PM
3268         int retval = 0;
3269 #endif
3270
3271         netif_device_detach(netdev);
3272
3273         if (netif_running(netdev)) {
3274                 ixgbe_down(adapter);
3275                 ixgbe_free_irq(adapter);
3276                 ixgbe_free_all_tx_resources(adapter);
3277                 ixgbe_free_all_rx_resources(adapter);
3278         }
3279         ixgbe_reset_interrupt_capability(adapter);
3280         ixgbe_napi_del_all(adapter);
3281         INIT_LIST_HEAD(&netdev->napi_list);
3282         kfree(adapter->tx_ring);
3283         kfree(adapter->rx_ring);
3284
3285 #ifdef CONFIG_PM
3286         retval = pci_save_state(pdev);
3287         if (retval)
3288                 return retval;
3289 #endif
3290
3291         pci_enable_wake(pdev, PCI_D3hot, 0);
3292         pci_enable_wake(pdev, PCI_D3cold, 0);
3293
3294         ixgbe_release_hw_control(adapter);
3295
3296         pci_disable_device(pdev);
3297
3298         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3299
3300         return 0;
3301 }
3302
3303 static void ixgbe_shutdown(struct pci_dev *pdev)
3304 {
3305         ixgbe_suspend(pdev, PMSG_SUSPEND);
3306 }
3307
3308 /**
3309  * ixgbe_update_stats - Update the board statistics counters.
3310  * @adapter: board private structure
3311  **/
3312 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3313 {
3314         struct ixgbe_hw *hw = &adapter->hw;
3315         u64 total_mpc = 0;
3316         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3317
3318         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3319         for (i = 0; i < 8; i++) {
3320                 /* for packet buffers not used, the register should read 0 */
3321                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3322                 missed_rx += mpc;
3323                 adapter->stats.mpc[i] += mpc;
3324                 total_mpc += adapter->stats.mpc[i];
3325                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3326                 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
3327                 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
3328                 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
3329                 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
3330                 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3331                                                             IXGBE_PXONRXC(i));
3332                 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
3333                                                             IXGBE_PXONTXC(i));
3334                 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3335                                                             IXGBE_PXOFFRXC(i));
3336                 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
3337                                                             IXGBE_PXOFFTXC(i));
3338         }
3339         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3340         /* work around hardware counting issue */
3341         adapter->stats.gprc -= missed_rx;
3342
3343         /* 82598 hardware only has a 32 bit counter in the high register */
3344         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3345         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3346         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3347         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3348         adapter->stats.bprc += bprc;
3349         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3350         adapter->stats.mprc -= bprc;
3351         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3352         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3353         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3354         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3355         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3356         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3357         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3358         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3359         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3360         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3361         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3362         adapter->stats.lxontxc += lxon;
3363         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3364         adapter->stats.lxofftxc += lxoff;
3365         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3366         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3367         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3368         /*
3369          * 82598 errata - tx of flow control packets is included in tx counters
3370          */
3371         xon_off_tot = lxon + lxoff;
3372         adapter->stats.gptc -= xon_off_tot;
3373         adapter->stats.mptc -= xon_off_tot;
3374         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3375         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3376         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3377         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3378         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3379         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3380         adapter->stats.ptc64 -= xon_off_tot;
3381         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3382         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3383         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3384         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3385         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3386         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3387
3388         /* Fill out the OS statistics structure */
3389         adapter->net_stats.multicast = adapter->stats.mprc;
3390
3391         /* Rx Errors */
3392         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3393                                        adapter->stats.rlec;
3394         adapter->net_stats.rx_dropped = 0;
3395         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3396         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3397         adapter->net_stats.rx_missed_errors = total_mpc;
3398 }
3399
3400 /**
3401  * ixgbe_watchdog - Timer Call-back
3402  * @data: pointer to adapter cast into an unsigned long
3403  **/
3404 static void ixgbe_watchdog(unsigned long data)
3405 {
3406         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3407         struct ixgbe_hw *hw = &adapter->hw;
3408
3409         /* Do the watchdog outside of interrupt context due to the lovely
3410          * delays that some of the newer hardware requires */
3411         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3412                 /* Cause software interrupt to ensure rx rings are cleaned */
3413                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3414                         u32 eics =
3415                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3416                         IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3417                 } else {
3418                         /* For legacy and MSI interrupts don't set any bits that
3419                          * are enabled for EIAM, because this operation would
3420                          * set *both* EIMS and EICS for any bit in EIAM */
3421                         IXGBE_WRITE_REG(hw, IXGBE_EICS,
3422                                     (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3423                 }
3424                 /* Reset the timer */
3425                 mod_timer(&adapter->watchdog_timer,
3426                           round_jiffies(jiffies + 2 * HZ));
3427         }
3428
3429         schedule_work(&adapter->watchdog_task);
3430 }
3431
3432 /**
3433  * ixgbe_watchdog_task - worker thread to bring link up
3434  * @work: pointer to work_struct containing our data
3435  **/
3436 static void ixgbe_watchdog_task(struct work_struct *work)
3437 {
3438         struct ixgbe_adapter *adapter = container_of(work,
3439                                                      struct ixgbe_adapter,
3440                                                      watchdog_task);
3441         struct net_device *netdev = adapter->netdev;
3442         struct ixgbe_hw *hw = &adapter->hw;
3443         u32 link_speed = adapter->link_speed;
3444         bool link_up = adapter->link_up;
3445
3446         adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3447
3448         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3449                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3450                 if (link_up ||
3451                     time_after(jiffies, (adapter->link_check_timeout +
3452                                          IXGBE_TRY_LINK_TIMEOUT))) {
3453                         IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3454                         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3455                 }
3456                 adapter->link_up = link_up;
3457                 adapter->link_speed = link_speed;
3458         }
3459
3460         if (link_up) {
3461                 if (!netif_carrier_ok(netdev)) {
3462                         u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3463                         u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3464 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3465 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3466                         printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
3467                                "Flow Control: %s\n",
3468                                netdev->name,
3469                                (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3470                                 "10 Gbps" :
3471                                 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3472                                  "1 Gbps" : "unknown speed")),
3473                                ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3474                                 (FLOW_RX ? "RX" :
3475                                 (FLOW_TX ? "TX" : "None"))));
3476
3477                         netif_carrier_on(netdev);
3478                         netif_tx_wake_all_queues(netdev);
3479                 } else {
3480                         /* Force detection of hung controller */
3481                         adapter->detect_tx_hung = true;
3482                 }
3483         } else {
3484                 adapter->link_up = false;
3485                 adapter->link_speed = 0;
3486                 if (netif_carrier_ok(netdev)) {
3487                         printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
3488                                netdev->name);
3489                         netif_carrier_off(netdev);
3490                         netif_tx_stop_all_queues(netdev);
3491                 }
3492         }
3493
3494         ixgbe_update_stats(adapter);
3495         adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3496 }
3497
3498 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3499                      struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3500                      u32 tx_flags, u8 *hdr_len)
3501 {
3502         struct ixgbe_adv_tx_context_desc *context_desc;
3503         unsigned int i;
3504         int err;
3505         struct ixgbe_tx_buffer *tx_buffer_info;
3506         u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3507         u32 mss_l4len_idx, l4len;
3508
3509         if (skb_is_gso(skb)) {
3510                 if (skb_header_cloned(skb)) {
3511                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3512                         if (err)
3513                                 return err;
3514                 }
3515                 l4len = tcp_hdrlen(skb);
3516                 *hdr_len += l4len;
3517
3518                 if (skb->protocol == htons(ETH_P_IP)) {
3519                         struct iphdr *iph = ip_hdr(skb);
3520                         iph->tot_len = 0;
3521                         iph->check = 0;
3522                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3523                                                                  iph->daddr, 0,
3524                                                                  IPPROTO_TCP,
3525                                                                  0);
3526                         adapter->hw_tso_ctxt++;
3527                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3528                         ipv6_hdr(skb)->payload_len = 0;
3529                         tcp_hdr(skb)->check =
3530                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3531                                              &ipv6_hdr(skb)->daddr,
3532                                              0, IPPROTO_TCP, 0);
3533                         adapter->hw_tso6_ctxt++;
3534                 }
3535
3536                 i = tx_ring->next_to_use;
3537
3538                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3539                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3540
3541                 /* VLAN MACLEN IPLEN */
3542                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3543                         vlan_macip_lens |=
3544                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3545                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3546                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3547                 *hdr_len += skb_network_offset(skb);
3548                 vlan_macip_lens |=
3549                     (skb_transport_header(skb) - skb_network_header(skb));
3550                 *hdr_len +=
3551                     (skb_transport_header(skb) - skb_network_header(skb));
3552                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3553                 context_desc->seqnum_seed = 0;
3554
3555                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3556                 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3557                                    IXGBE_ADVTXD_DTYP_CTXT);
3558
3559                 if (skb->protocol == htons(ETH_P_IP))
3560                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3561                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3562                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3563
3564                 /* MSS L4LEN IDX */
3565                 mss_l4len_idx =
3566                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3567                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3568                 /* use index 1 for TSO */
3569                 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3570                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3571
3572                 tx_buffer_info->time_stamp = jiffies;
3573                 tx_buffer_info->next_to_watch = i;
3574
3575                 i++;
3576                 if (i == tx_ring->count)
3577                         i = 0;
3578                 tx_ring->next_to_use = i;
3579
3580                 return true;
3581         }
3582         return false;
3583 }
3584
3585 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3586                           struct ixgbe_ring *tx_ring,
3587                           struct sk_buff *skb, u32 tx_flags)
3588 {
3589         struct ixgbe_adv_tx_context_desc *context_desc;
3590         unsigned int i;
3591         struct ixgbe_tx_buffer *tx_buffer_info;
3592         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3593
3594         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3595             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3596                 i = tx_ring->next_to_use;
3597                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3598                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3599
3600                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3601                         vlan_macip_lens |=
3602                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3603                 vlan_macip_lens |= (skb_network_offset(skb) <<
3604                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3605                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3606                         vlan_macip_lens |= (skb_transport_header(skb) -
3607                                             skb_network_header(skb));
3608
3609                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3610                 context_desc->seqnum_seed = 0;
3611
3612                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3613                                     IXGBE_ADVTXD_DTYP_CTXT);
3614
3615                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3616                         switch (skb->protocol) {
3617                         case __constant_htons(ETH_P_IP):
3618                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3619                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3620                                         type_tucmd_mlhl |=
3621                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3622                                 break;
3623                         case __constant_htons(ETH_P_IPV6):
3624                                 /* XXX what about other V6 headers?? */
3625                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3626                                         type_tucmd_mlhl |=
3627                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3628                                 break;
3629                         default:
3630                                 if (unlikely(net_ratelimit())) {
3631                                         DPRINTK(PROBE, WARNING,
3632                                          "partial checksum but proto=%x!\n",
3633                                          skb->protocol);
3634                                 }
3635                                 break;
3636                         }
3637                 }
3638
3639                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3640                 /* use index zero for tx checksum offload */
3641                 context_desc->mss_l4len_idx = 0;
3642
3643                 tx_buffer_info->time_stamp = jiffies;
3644                 tx_buffer_info->next_to_watch = i;
3645
3646                 adapter->hw_csum_tx_good++;
3647                 i++;
3648                 if (i == tx_ring->count)
3649                         i = 0;
3650                 tx_ring->next_to_use = i;
3651
3652                 return true;
3653         }
3654
3655         return false;
3656 }
3657
3658 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3659                         struct ixgbe_ring *tx_ring,
3660                         struct sk_buff *skb, unsigned int first)
3661 {
3662         struct ixgbe_tx_buffer *tx_buffer_info;
3663         unsigned int len = skb->len;
3664         unsigned int offset = 0, size, count = 0, i;
3665         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3666         unsigned int f;
3667
3668         len -= skb->data_len;
3669
3670         i = tx_ring->next_to_use;
3671
3672         while (len) {
3673                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3674                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3675
3676                 tx_buffer_info->length = size;
3677                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3678                                                      skb->data + offset,
3679                                                      size, PCI_DMA_TODEVICE);
3680                 tx_buffer_info->time_stamp = jiffies;
3681                 tx_buffer_info->next_to_watch = i;
3682
3683                 len -= size;
3684                 offset += size;
3685                 count++;
3686                 i++;
3687                 if (i == tx_ring->count)
3688                         i = 0;
3689         }
3690
3691         for (f = 0; f < nr_frags; f++) {
3692                 struct skb_frag_struct *frag;
3693
3694                 frag = &skb_shinfo(skb)->frags[f];
3695                 len = frag->size;
3696                 offset = frag->page_offset;
3697
3698                 while (len) {
3699                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3700                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3701
3702                         tx_buffer_info->length = size;
3703                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3704                                                            frag->page,
3705                                                            offset,
3706                                                            size,
3707                                                            PCI_DMA_TODEVICE);
3708                         tx_buffer_info->time_stamp = jiffies;
3709                         tx_buffer_info->next_to_watch = i;
3710
3711                         len -= size;
3712                         offset += size;
3713                         count++;
3714                         i++;
3715                         if (i == tx_ring->count)
3716                                 i = 0;
3717                 }
3718         }
3719         if (i == 0)
3720                 i = tx_ring->count - 1;
3721         else
3722                 i = i - 1;
3723         tx_ring->tx_buffer_info[i].skb = skb;
3724         tx_ring->tx_buffer_info[first].next_to_watch = i;
3725
3726         return count;
3727 }
3728
3729 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3730                            struct ixgbe_ring *tx_ring,
3731                            int tx_flags, int count, u32 paylen, u8 hdr_len)
3732 {
3733         union ixgbe_adv_tx_desc *tx_desc = NULL;
3734         struct ixgbe_tx_buffer *tx_buffer_info;
3735         u32 olinfo_status = 0, cmd_type_len = 0;
3736         unsigned int i;
3737         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3738
3739         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3740
3741         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3742
3743         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3744                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3745
3746         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3747                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3748
3749                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3750                                  IXGBE_ADVTXD_POPTS_SHIFT;
3751
3752                 /* use index 1 context for tso */
3753                 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3754                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3755                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3756                                          IXGBE_ADVTXD_POPTS_SHIFT;
3757
3758         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3759                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3760                                  IXGBE_ADVTXD_POPTS_SHIFT;
3761
3762         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3763
3764         i = tx_ring->next_to_use;
3765         while (count--) {
3766                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3767                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3768                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3769                 tx_desc->read.cmd_type_len =
3770                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3771                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3772                 i++;
3773                 if (i == tx_ring->count)
3774                         i = 0;
3775         }
3776
3777         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3778
3779         /*
3780          * Force memory writes to complete before letting h/w
3781          * know there are new descriptors to fetch.  (Only
3782          * applicable for weak-ordered memory model archs,
3783          * such as IA-64).
3784          */
3785         wmb();
3786
3787         tx_ring->next_to_use = i;
3788         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3789 }
3790
3791 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3792                                  struct ixgbe_ring *tx_ring, int size)
3793 {
3794         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3795
3796         netif_stop_subqueue(netdev, tx_ring->queue_index);
3797         /* Herbert's original patch had:
3798          *  smp_mb__after_netif_stop_queue();
3799          * but since that doesn't exist yet, just open code it. */
3800         smp_mb();
3801
3802         /* We need to check again in a case another CPU has just
3803          * made room available. */
3804         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3805                 return -EBUSY;
3806
3807         /* A reprieve! - use start_queue because it doesn't call schedule */
3808         netif_start_subqueue(netdev, tx_ring->queue_index);
3809         ++adapter->restart_queue;
3810         return 0;
3811 }
3812
3813 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3814                               struct ixgbe_ring *tx_ring, int size)
3815 {
3816         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3817                 return 0;
3818         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3819 }
3820
3821 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3822 {
3823         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3824         struct ixgbe_ring *tx_ring;
3825         unsigned int first;
3826         unsigned int tx_flags = 0;
3827         u8 hdr_len = 0;
3828         int r_idx = 0, tso;
3829         int count = 0;
3830         unsigned int f;
3831
3832         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3833         tx_ring = &adapter->tx_ring[r_idx];
3834
3835         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3836                 tx_flags |= vlan_tx_tag_get(skb);
3837                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3838                         tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
3839                         tx_flags |= (skb->queue_mapping << 13);
3840                 }
3841                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3842                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3843         } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3844                 tx_flags |= (skb->queue_mapping << 13);
3845                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3846                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3847         }
3848         /* three things can cause us to need a context descriptor */
3849         if (skb_is_gso(skb) ||
3850             (skb->ip_summed == CHECKSUM_PARTIAL) ||
3851             (tx_flags & IXGBE_TX_FLAGS_VLAN))
3852                 count++;
3853
3854         count += TXD_USE_COUNT(skb_headlen(skb));
3855         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3856                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3857
3858         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3859                 adapter->tx_busy++;
3860                 return NETDEV_TX_BUSY;
3861         }
3862
3863         if (skb->protocol == htons(ETH_P_IP))
3864                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3865         first = tx_ring->next_to_use;
3866         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3867         if (tso < 0) {
3868                 dev_kfree_skb_any(skb);
3869                 return NETDEV_TX_OK;
3870         }
3871
3872         if (tso)
3873                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3874         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3875                  (skb->ip_summed == CHECKSUM_PARTIAL))
3876                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3877
3878         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3879                        ixgbe_tx_map(adapter, tx_ring, skb, first),
3880                        skb->len, hdr_len);
3881
3882         netdev->trans_start = jiffies;
3883
3884         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3885
3886         return NETDEV_TX_OK;
3887 }
3888
3889 /**
3890  * ixgbe_get_stats - Get System Network Statistics
3891  * @netdev: network interface device structure
3892  *
3893  * Returns the address of the device statistics structure.
3894  * The statistics are actually updated from the timer callback.
3895  **/
3896 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3897 {
3898         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3899
3900         /* only return the current stats */
3901         return &adapter->net_stats;
3902 }
3903
3904 /**
3905  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3906  * @netdev: network interface device structure
3907  * @p: pointer to an address structure
3908  *
3909  * Returns 0 on success, negative on failure
3910  **/
3911 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3912 {
3913         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3914         struct ixgbe_hw *hw = &adapter->hw;
3915         struct sockaddr *addr = p;
3916
3917         if (!is_valid_ether_addr(addr->sa_data))
3918                 return -EADDRNOTAVAIL;
3919
3920         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3921         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3922
3923         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
3924
3925         return 0;
3926 }
3927
3928 #ifdef CONFIG_NET_POLL_CONTROLLER
3929 /*
3930  * Polling 'interrupt' - used by things like netconsole to send skbs
3931  * without having to re-enable interrupts. It's not called while
3932  * the interrupt routine is executing.
3933  */
3934 static void ixgbe_netpoll(struct net_device *netdev)
3935 {
3936         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3937
3938         disable_irq(adapter->pdev->irq);
3939         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3940         ixgbe_intr(adapter->pdev->irq, netdev);
3941         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3942         enable_irq(adapter->pdev->irq);
3943 }
3944 #endif
3945
3946 /**
3947  * ixgbe_link_config - set up initial link with default speed and duplex
3948  * @hw: pointer to private hardware struct
3949  *
3950  * Returns 0 on success, negative on failure
3951  **/
3952 static int ixgbe_link_config(struct ixgbe_hw *hw)
3953 {
3954         u32 autoneg = IXGBE_LINK_SPEED_10GB_FULL;
3955
3956         /* must always autoneg for both 1G and 10G link */
3957         hw->mac.autoneg = true;
3958
3959         if ((hw->mac.type == ixgbe_mac_82598EB) &&
3960             (hw->phy.media_type == ixgbe_media_type_copper))
3961                 autoneg = IXGBE_LINK_SPEED_82598_AUTONEG;
3962
3963         return hw->mac.ops.setup_link_speed(hw, autoneg, true, true);
3964 }
3965
3966 static const struct net_device_ops ixgbe_netdev_ops = {
3967         .ndo_open               = ixgbe_open,
3968         .ndo_stop               = ixgbe_close,
3969         .ndo_start_xmit         = ixgbe_xmit_frame,
3970         .ndo_get_stats          = ixgbe_get_stats,
3971         .ndo_set_multicast_list = ixgbe_set_rx_mode,
3972         .ndo_validate_addr      = eth_validate_addr,
3973         .ndo_set_mac_address    = ixgbe_set_mac,
3974         .ndo_change_mtu         = ixgbe_change_mtu,
3975         .ndo_tx_timeout         = ixgbe_tx_timeout,
3976         .ndo_vlan_rx_register   = ixgbe_vlan_rx_register,
3977         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
3978         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
3979 #ifdef CONFIG_NET_POLL_CONTROLLER
3980         .ndo_poll_controller    = ixgbe_netpoll,
3981 #endif
3982 };
3983
3984 /**
3985  * ixgbe_probe - Device Initialization Routine
3986  * @pdev: PCI device information struct
3987  * @ent: entry in ixgbe_pci_tbl
3988  *
3989  * Returns 0 on success, negative on failure
3990  *
3991  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3992  * The OS initialization, configuring of the adapter private structure,
3993  * and a hardware reset occur.
3994  **/
3995 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3996                                  const struct pci_device_id *ent)
3997 {
3998         struct net_device *netdev;
3999         struct ixgbe_adapter *adapter = NULL;
4000         struct ixgbe_hw *hw;
4001         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
4002         static int cards_found;
4003         int i, err, pci_using_dac;
4004         u16 link_status, link_speed, link_width;
4005         u32 part_num, eec;
4006
4007         err = pci_enable_device(pdev);
4008         if (err)
4009                 return err;
4010
4011         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
4012             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
4013                 pci_using_dac = 1;
4014         } else {
4015                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4016                 if (err) {
4017                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4018                         if (err) {
4019                                 dev_err(&pdev->dev, "No usable DMA "
4020                                         "configuration, aborting\n");
4021                                 goto err_dma;
4022                         }
4023                 }
4024                 pci_using_dac = 0;
4025         }
4026
4027         err = pci_request_regions(pdev, ixgbe_driver_name);
4028         if (err) {
4029                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4030                 goto err_pci_reg;
4031         }
4032
4033         err = pci_enable_pcie_error_reporting(pdev);
4034         if (err) {
4035                 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4036                                     "0x%x\n", err);
4037                 /* non-fatal, continue */
4038         }
4039
4040         pci_set_master(pdev);
4041         pci_save_state(pdev);
4042
4043         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
4044         if (!netdev) {
4045                 err = -ENOMEM;
4046                 goto err_alloc_etherdev;
4047         }
4048
4049         SET_NETDEV_DEV(netdev, &pdev->dev);
4050
4051         pci_set_drvdata(pdev, netdev);
4052         adapter = netdev_priv(netdev);
4053
4054         adapter->netdev = netdev;
4055         adapter->pdev = pdev;
4056         hw = &adapter->hw;
4057         hw->back = adapter;
4058         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
4059
4060         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4061                               pci_resource_len(pdev, 0));
4062         if (!hw->hw_addr) {
4063                 err = -EIO;
4064                 goto err_ioremap;
4065         }
4066
4067         for (i = 1; i <= 5; i++) {
4068                 if (pci_resource_len(pdev, i) == 0)
4069                         continue;
4070         }
4071
4072         netdev->netdev_ops = &ixgbe_netdev_ops;
4073         ixgbe_set_ethtool_ops(netdev);
4074         netdev->watchdog_timeo = 5 * HZ;
4075         strcpy(netdev->name, pci_name(pdev));
4076
4077         adapter->bd_number = cards_found;
4078
4079         /* Setup hw api */
4080         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4081         hw->mac.type  = ii->mac;
4082
4083         /* EEPROM */
4084         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
4085         eec = IXGBE_READ_REG(hw, IXGBE_EEC);
4086         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4087         if (!(eec & (1 << 8)))
4088                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
4089
4090         /* PHY */
4091         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
4092         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
4093
4094         /* set up this timer and work struct before calling get_invariants
4095          * which might start the timer
4096          */
4097         init_timer(&adapter->sfp_timer);
4098         adapter->sfp_timer.function = &ixgbe_sfp_timer;
4099         adapter->sfp_timer.data = (unsigned long) adapter;
4100
4101         INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
4102
4103         err = ii->get_invariants(hw);
4104         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
4105                 /* start a kernel thread to watch for a module to arrive */
4106                 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4107                 mod_timer(&adapter->sfp_timer,
4108                           round_jiffies(jiffies + (2 * HZ)));
4109                 err = 0;
4110         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4111                 DPRINTK(PROBE, ERR, "failed to load because an "
4112                         "unsupported SFP+ module type was detected.\n");
4113                 goto err_hw_init;
4114         } else if (err) {
4115                 goto err_hw_init;
4116         }
4117
4118         /* setup the private structure */
4119         err = ixgbe_sw_init(adapter);
4120         if (err)
4121                 goto err_sw_init;
4122
4123         /* reset_hw fills in the perm_addr as well */
4124         err = hw->mac.ops.reset_hw(hw);
4125         if (err) {
4126                 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
4127                 goto err_sw_init;
4128         }
4129
4130         netdev->features = NETIF_F_SG |
4131                            NETIF_F_IP_CSUM |
4132                            NETIF_F_HW_VLAN_TX |
4133                            NETIF_F_HW_VLAN_RX |
4134                            NETIF_F_HW_VLAN_FILTER;
4135
4136         netdev->features |= NETIF_F_IPV6_CSUM;
4137         netdev->features |= NETIF_F_TSO;
4138         netdev->features |= NETIF_F_TSO6;
4139         netdev->features |= NETIF_F_LRO;
4140
4141         netdev->vlan_features |= NETIF_F_TSO;
4142         netdev->vlan_features |= NETIF_F_TSO6;
4143         netdev->vlan_features |= NETIF_F_IP_CSUM;
4144         netdev->vlan_features |= NETIF_F_SG;
4145
4146         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
4147                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
4148
4149 #ifdef CONFIG_IXGBE_DCB
4150         netdev->dcbnl_ops = &dcbnl_ops;
4151 #endif
4152
4153         if (pci_using_dac)
4154                 netdev->features |= NETIF_F_HIGHDMA;
4155
4156         /* make sure the EEPROM is good */
4157         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
4158                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
4159                 err = -EIO;
4160                 goto err_eeprom;
4161         }
4162
4163         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
4164         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
4165
4166         if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
4167                 dev_err(&pdev->dev, "invalid MAC address\n");
4168                 err = -EIO;
4169                 goto err_eeprom;
4170         }
4171
4172         init_timer(&adapter->watchdog_timer);
4173         adapter->watchdog_timer.function = &ixgbe_watchdog;
4174         adapter->watchdog_timer.data = (unsigned long)adapter;
4175
4176         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
4177         INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
4178
4179         err = ixgbe_init_interrupt_scheme(adapter);
4180         if (err)
4181                 goto err_sw_init;
4182
4183         /* print bus type/speed/width info */
4184         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
4185         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
4186         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
4187         dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
4188                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
4189                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
4190                  "Unknown"),
4191                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
4192                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
4193                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
4194                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
4195                  "Unknown"),
4196                 netdev->dev_addr);
4197         ixgbe_read_pba_num_generic(hw, &part_num);
4198         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4199                  hw->mac.type, hw->phy.type,
4200                  (part_num >> 8), (part_num & 0xff));
4201
4202         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
4203                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
4204                          "this card is not sufficient for optimal "
4205                          "performance.\n");
4206                 dev_warn(&pdev->dev, "For optimal performance a x8 "
4207                          "PCI-Express slot is required.\n");
4208         }
4209
4210         /* reset the hardware with the new settings */
4211         hw->mac.ops.start_hw(hw);
4212
4213         /* link_config depends on start_hw being called at least once */
4214         err = ixgbe_link_config(hw);
4215         if (err) {
4216                 dev_err(&pdev->dev, "setup_link_speed FAILED %d\n", err);
4217                 goto err_register;
4218         }
4219
4220         netif_carrier_off(netdev);
4221         netif_tx_stop_all_queues(netdev);
4222
4223         strcpy(netdev->name, "eth%d");
4224         err = register_netdev(netdev);
4225         if (err)
4226                 goto err_register;
4227
4228 #ifdef CONFIG_IXGBE_DCA
4229         if (dca_add_requester(&pdev->dev) == 0) {
4230                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
4231                 /* always use CB2 mode, difference is masked
4232                  * in the CB driver */
4233                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
4234                 ixgbe_setup_dca(adapter);
4235         }
4236 #endif
4237
4238         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
4239         cards_found++;
4240         return 0;
4241
4242 err_register:
4243         ixgbe_release_hw_control(adapter);
4244 err_hw_init:
4245 err_sw_init:
4246         ixgbe_reset_interrupt_capability(adapter);
4247 err_eeprom:
4248         clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4249         del_timer_sync(&adapter->sfp_timer);
4250         cancel_work_sync(&adapter->sfp_task);
4251         iounmap(hw->hw_addr);
4252 err_ioremap:
4253         free_netdev(netdev);
4254 err_alloc_etherdev:
4255         pci_release_regions(pdev);
4256 err_pci_reg:
4257 err_dma:
4258         pci_disable_device(pdev);
4259         return err;
4260 }
4261
4262 /**
4263  * ixgbe_remove - Device Removal Routine
4264  * @pdev: PCI device information struct
4265  *
4266  * ixgbe_remove is called by the PCI subsystem to alert the driver
4267  * that it should release a PCI device.  The could be caused by a
4268  * Hot-Plug event, or because the driver is going to be removed from
4269  * memory.
4270  **/
4271 static void __devexit ixgbe_remove(struct pci_dev *pdev)
4272 {
4273         struct net_device *netdev = pci_get_drvdata(pdev);
4274         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4275         int err;
4276
4277         set_bit(__IXGBE_DOWN, &adapter->state);
4278         /* clear the module not found bit to make sure the worker won't
4279          * reschedule
4280          */
4281         clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4282         del_timer_sync(&adapter->watchdog_timer);
4283
4284         del_timer_sync(&adapter->sfp_timer);
4285         cancel_work_sync(&adapter->watchdog_task);
4286         cancel_work_sync(&adapter->sfp_task);
4287         flush_scheduled_work();
4288
4289 #ifdef CONFIG_IXGBE_DCA
4290         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
4291                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
4292                 dca_remove_requester(&pdev->dev);
4293                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
4294         }
4295
4296 #endif
4297         if (netdev->reg_state == NETREG_REGISTERED)
4298                 unregister_netdev(netdev);
4299
4300         ixgbe_reset_interrupt_capability(adapter);
4301
4302         ixgbe_release_hw_control(adapter);
4303
4304         iounmap(adapter->hw.hw_addr);
4305         pci_release_regions(pdev);
4306
4307         DPRINTK(PROBE, INFO, "complete\n");
4308         kfree(adapter->tx_ring);
4309         kfree(adapter->rx_ring);
4310
4311         free_netdev(netdev);
4312
4313         err = pci_disable_pcie_error_reporting(pdev);
4314         if (err)
4315                 dev_err(&pdev->dev,
4316                         "pci_disable_pcie_error_reporting failed 0x%x\n", err);
4317
4318         pci_disable_device(pdev);
4319 }
4320
4321 /**
4322  * ixgbe_io_error_detected - called when PCI error is detected
4323  * @pdev: Pointer to PCI device
4324  * @state: The current pci connection state
4325  *
4326  * This function is called after a PCI bus error affecting
4327  * this device has been detected.
4328  */
4329 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4330                                                 pci_channel_state_t state)
4331 {
4332         struct net_device *netdev = pci_get_drvdata(pdev);
4333         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4334
4335         netif_device_detach(netdev);
4336
4337         if (netif_running(netdev))
4338                 ixgbe_down(adapter);
4339         pci_disable_device(pdev);
4340
4341         /* Request a slot reset. */
4342         return PCI_ERS_RESULT_NEED_RESET;
4343 }
4344
4345 /**
4346  * ixgbe_io_slot_reset - called after the pci bus has been reset.
4347  * @pdev: Pointer to PCI device
4348  *
4349  * Restart the card from scratch, as if from a cold-boot.
4350  */
4351 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4352 {
4353         struct net_device *netdev = pci_get_drvdata(pdev);
4354         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4355         pci_ers_result_t result;
4356         int err;
4357
4358         if (pci_enable_device(pdev)) {
4359                 DPRINTK(PROBE, ERR,
4360                         "Cannot re-enable PCI device after reset.\n");
4361                 result = PCI_ERS_RESULT_DISCONNECT;
4362         } else {
4363                 pci_set_master(pdev);
4364                 pci_restore_state(pdev);
4365
4366                 pci_enable_wake(pdev, PCI_D3hot, 0);
4367                 pci_enable_wake(pdev, PCI_D3cold, 0);
4368
4369                 ixgbe_reset(adapter);
4370
4371                 result = PCI_ERS_RESULT_RECOVERED;
4372         }
4373
4374         err = pci_cleanup_aer_uncorrect_error_status(pdev);
4375         if (err) {
4376                 dev_err(&pdev->dev,
4377                   "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
4378                 /* non-fatal, continue */
4379         }
4380
4381         return result;
4382 }
4383
4384 /**
4385  * ixgbe_io_resume - called when traffic can start flowing again.
4386  * @pdev: Pointer to PCI device
4387  *
4388  * This callback is called when the error recovery driver tells us that
4389  * its OK to resume normal operation.
4390  */
4391 static void ixgbe_io_resume(struct pci_dev *pdev)
4392 {
4393         struct net_device *netdev = pci_get_drvdata(pdev);
4394         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4395
4396         if (netif_running(netdev)) {
4397                 if (ixgbe_up(adapter)) {
4398                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4399                         return;
4400                 }
4401         }
4402
4403         netif_device_attach(netdev);
4404 }
4405
4406 static struct pci_error_handlers ixgbe_err_handler = {
4407         .error_detected = ixgbe_io_error_detected,
4408         .slot_reset = ixgbe_io_slot_reset,
4409         .resume = ixgbe_io_resume,
4410 };
4411
4412 static struct pci_driver ixgbe_driver = {
4413         .name     = ixgbe_driver_name,
4414         .id_table = ixgbe_pci_tbl,
4415         .probe    = ixgbe_probe,
4416         .remove   = __devexit_p(ixgbe_remove),
4417 #ifdef CONFIG_PM
4418         .suspend  = ixgbe_suspend,
4419         .resume   = ixgbe_resume,
4420 #endif
4421         .shutdown = ixgbe_shutdown,
4422         .err_handler = &ixgbe_err_handler
4423 };
4424
4425 /**
4426  * ixgbe_init_module - Driver Registration Routine
4427  *
4428  * ixgbe_init_module is the first routine called when the driver is
4429  * loaded. All it does is register with the PCI subsystem.
4430  **/
4431 static int __init ixgbe_init_module(void)
4432 {
4433         int ret;
4434         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4435                ixgbe_driver_string, ixgbe_driver_version);
4436
4437         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4438
4439 #ifdef CONFIG_IXGBE_DCA
4440         dca_register_notify(&dca_notifier);
4441 #endif
4442
4443         ret = pci_register_driver(&ixgbe_driver);
4444         return ret;
4445 }
4446
4447 module_init(ixgbe_init_module);
4448
4449 /**
4450  * ixgbe_exit_module - Driver Exit Cleanup Routine
4451  *
4452  * ixgbe_exit_module is called just before the driver is removed
4453  * from memory.
4454  **/
4455 static void __exit ixgbe_exit_module(void)
4456 {
4457 #ifdef CONFIG_IXGBE_DCA
4458         dca_unregister_notify(&dca_notifier);
4459 #endif
4460         pci_unregister_driver(&ixgbe_driver);
4461 }
4462
4463 #ifdef CONFIG_IXGBE_DCA
4464 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4465                             void *p)
4466 {
4467         int ret_val;
4468
4469         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4470                                          __ixgbe_notify_dca);
4471
4472         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4473 }
4474 #endif /* CONFIG_IXGBE_DCA */
4475
4476 module_exit(ixgbe_exit_module);
4477
4478 /* ixgbe_main.c */