drivers/net/irda/smsc-ircc2.c

   1 /*********************************************************************
   2  * $Id: smsc-ircc2.c,v 1.19.2.5 2002/10/27 11:34:26 dip Exp $
   3  *
   4  * Description:   Driver for the SMC Infrared Communications Controller
   5  * Status:        Experimental.
   6  * Author:        Daniele Peri (peri@csai.unipa.it)
   7  * Created at:
   8  * Modified at:
   9  * Modified by:
  10  *
  11  *     Copyright (c) 2002      Daniele Peri
  12  *     All Rights Reserved.
  13  *     Copyright (c) 2002      Jean Tourrilhes
  14  *
  15  *
  16  * Based on smc-ircc.c:
  17  *
  18  *     Copyright (c) 2001      Stefani Seibold
  19  *     Copyright (c) 1999-2001 Dag Brattli
  20  *     Copyright (c) 1998-1999 Thomas Davis,
  21  *
  22  *      and irport.c:
  23  *
  24  *     Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved.
  25  *
  26  *
  27  *     This program is free software; you can redistribute it and/or
  28  *     modify it under the terms of the GNU General Public License as
  29  *     published by the Free Software Foundation; either version 2 of
  30  *     the License, or (at your option) any later version.
  31  *
  32  *     This program is distributed in the hope that it will be useful,
  33  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  34  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  35  *     GNU General Public License for more details.
  36  *
  37  *     You should have received a copy of the GNU General Public License
  38  *     along with this program; if not, write to the Free Software
  39  *     Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  40  *     MA 02111-1307 USA
  41  *
  42  ********************************************************************/
  43
  44 #include <linux/module.h>
  45 #include <linux/kernel.h>
  46 #include <linux/types.h>
  47 #include <linux/skbuff.h>
  48 #include <linux/netdevice.h>
  49 #include <linux/ioport.h>
  50 #include <linux/delay.h>
  51 #include <linux/slab.h>
  52 #include <linux/init.h>
  53 #include <linux/rtnetlink.h>
  54 #include <linux/serial_reg.h>
  55 #include <linux/dma-mapping.h>
  56 #include <linux/platform_device.h>
  57
  58 #include <asm/io.h>
  59 #include <asm/dma.h>
  60 #include <asm/byteorder.h>
  61
  62 #include <linux/spinlock.h>
  63 #include <linux/pm.h>
  64
  65 #include <net/irda/wrapper.h>
  66 #include <net/irda/irda.h>
  67 #include <net/irda/irda_device.h>
  68
  69 #include "smsc-ircc2.h"
  70 #include "smsc-sio.h"
  71
  72
  73 MODULE_AUTHOR("Daniele Peri <peri@csai.unipa.it>");
  74 MODULE_DESCRIPTION("SMC IrCC SIR/FIR controller driver");
  75 MODULE_LICENSE("GPL");
  76
  77 static int ircc_dma = 255;
  78 module_param(ircc_dma, int, 0);
  79 MODULE_PARM_DESC(ircc_dma, "DMA channel");
  80
  81 static int ircc_irq = 255;
  82 module_param(ircc_irq, int, 0);
  83 MODULE_PARM_DESC(ircc_irq, "IRQ line");
  84
  85 static int ircc_fir;
  86 module_param(ircc_fir, int, 0);
  87 MODULE_PARM_DESC(ircc_fir, "FIR Base Address");
  88
  89 static int ircc_sir;
  90 module_param(ircc_sir, int, 0);
  91 MODULE_PARM_DESC(ircc_sir, "SIR Base Address");
  92
  93 static int ircc_cfg;
  94 module_param(ircc_cfg, int, 0);
  95 MODULE_PARM_DESC(ircc_cfg, "Configuration register base address");
  96
  97 static int ircc_transceiver;
  98 module_param(ircc_transceiver, int, 0);
  99 MODULE_PARM_DESC(ircc_transceiver, "Transceiver type");
 100
 101 /* Types */
 102
 103 struct smsc_transceiver {
 104         char *name;
 105         void (*set_for_speed)(int fir_base, u32 speed);
 106         int  (*probe)(int fir_base);
 107 };
 108
 109 struct smsc_chip {
 110         char *name;
 111         #if 0
 112         u8      type;
 113         #endif
 114         u16 flags;
 115         u8 devid;
 116         u8 rev;
 117 };
 118
 119 struct smsc_chip_address {
 120         unsigned int cfg_base;
 121         unsigned int type;
 122 };
 123
 124 /* Private data for each instance */
 125 struct smsc_ircc_cb {
 126         struct net_device *netdev;     /* Yes! we are some kind of netdevice */
 127         struct net_device_stats stats;
 128         struct irlap_cb    *irlap; /* The link layer we are binded to */
 129
 130         chipio_t io;               /* IrDA controller information */
 131         iobuff_t tx_buff;          /* Transmit buffer */
 132         iobuff_t rx_buff;          /* Receive buffer */
 133         dma_addr_t tx_buff_dma;
 134         dma_addr_t rx_buff_dma;
 135
 136         struct qos_info qos;       /* QoS capabilities for this device */
 137
 138         spinlock_t lock;           /* For serializing operations */
 139
 140         __u32 new_speed;
 141         __u32 flags;               /* Interface flags */
 142
 143         int tx_buff_offsets[10];   /* Offsets between frames in tx_buff */
 144         int tx_len;                /* Number of frames in tx_buff */
 145
 146         int transceiver;
 147         struct platform_device *pldev;
 148 };
 149
 150 /* Constants */
 151
 152 #define SMSC_IRCC2_DRIVER_NAME                  "smsc-ircc2"
 153
 154 #define SMSC_IRCC2_C_IRDA_FALLBACK_SPEED        9600
 155 #define SMSC_IRCC2_C_DEFAULT_TRANSCEIVER        1
 156 #define SMSC_IRCC2_C_NET_TIMEOUT                0
 157 #define SMSC_IRCC2_C_SIR_STOP                   0
 158
 159 static const char *driver_name = SMSC_IRCC2_DRIVER_NAME;
 160
 161 /* Prototypes */
 162
 163 static int smsc_ircc_open(unsigned int firbase, unsigned int sirbase, u8 dma, u8 irq);
 164 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base);
 165 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq);
 166 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self);
 167 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self);
 168 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self);
 169 static int  smsc_ircc_dma_receive(struct smsc_ircc_cb *self);
 170 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self);
 171 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self);
 172 static int  smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
 173 static int  smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
 174 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs);
 175 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self);
 176 static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed);
 177 static void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, u32 speed);
 178 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
 179 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev);
 180 static void smsc_ircc_sir_start(struct smsc_ircc_cb *self);
 181 #if SMSC_IRCC2_C_SIR_STOP
 182 static void smsc_ircc_sir_stop(struct smsc_ircc_cb *self);
 183 #endif
 184 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self);
 185 static int  smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
 186 static int  smsc_ircc_net_open(struct net_device *dev);
 187 static int  smsc_ircc_net_close(struct net_device *dev);
 188 static int  smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 189 #if SMSC_IRCC2_C_NET_TIMEOUT
 190 static void smsc_ircc_timeout(struct net_device *dev);
 191 #endif
 192 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev);
 193 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self);
 194 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self);
 195 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed);
 196 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self);
 197
 198 /* Probing */
 199 static int __init smsc_ircc_look_for_chips(void);
 200 static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type);
 201 static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
 202 static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
 203 static int __init smsc_superio_fdc(unsigned short cfg_base);
 204 static int __init smsc_superio_lpc(unsigned short cfg_base);
 205
 206 /* Transceivers specific functions */
 207
 208 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed);
 209 static int  smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base);
 210 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed);
 211 static int  smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base);
 212 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed);
 213 static int  smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base);
 214
 215 /* Power Management */
 216
 217 static int smsc_ircc_suspend(struct device *dev, pm_message_t state);
 218 static int smsc_ircc_resume(struct device *dev);
 219
 220 static struct device_driver smsc_ircc_driver = {
 221         .name           = SMSC_IRCC2_DRIVER_NAME,
 222         .bus            = &platform_bus_type,
 223         .suspend        = smsc_ircc_suspend,
 224         .resume         = smsc_ircc_resume,
 225 };
 226
 227 /* Transceivers for SMSC-ircc */
 228
 229 static struct smsc_transceiver smsc_transceivers[] =
 230 {
 231         { "Toshiba Satellite 1800 (GP data pin select)", smsc_ircc_set_transceiver_toshiba_sat1800, smsc_ircc_probe_transceiver_toshiba_sat1800 },
 232         { "Fast pin select", smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select, smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select },
 233         { "ATC IRMode", smsc_ircc_set_transceiver_smsc_ircc_atc, smsc_ircc_probe_transceiver_smsc_ircc_atc },
 234         { NULL, NULL }
 235 };
 236 #define SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS (ARRAY_SIZE(smsc_transceivers) - 1)
 237
 238 /*  SMC SuperIO chipsets definitions */
 239
 240 #define KEY55_1 0       /* SuperIO Configuration mode with Key <0x55> */
 241 #define KEY55_2 1       /* SuperIO Configuration mode with Key <0x55,0x55> */
 242 #define NoIRDA  2       /* SuperIO Chip has no IRDA Port */
 243 #define SIR     0       /* SuperIO Chip has only slow IRDA */
 244 #define FIR     4       /* SuperIO Chip has fast IRDA */
 245 #define SERx4   8       /* SuperIO Chip supports 115,2 KBaud * 4=460,8 KBaud */
 246
 247 static struct smsc_chip __initdata fdc_chips_flat[] =
 248 {
 249         /* Base address 0x3f0 or 0x370 */
 250         { "37C44",      KEY55_1|NoIRDA,         0x00, 0x00 }, /* This chip cannot be detected */
 251         { "37C665GT",   KEY55_2|NoIRDA,         0x65, 0x01 },
 252         { "37C665GT",   KEY55_2|NoIRDA,         0x66, 0x01 },
 253         { "37C669",     KEY55_2|SIR|SERx4,      0x03, 0x02 },
 254         { "37C669",     KEY55_2|SIR|SERx4,      0x04, 0x02 }, /* ID? */
 255         { "37C78",      KEY55_2|NoIRDA,         0x78, 0x00 },
 256         { "37N769",     KEY55_1|FIR|SERx4,      0x28, 0x00 },
 257         { "37N869",     KEY55_1|FIR|SERx4,      0x29, 0x00 },
 258         { NULL }
 259 };
 260
 261 static struct smsc_chip __initdata fdc_chips_paged[] =
 262 {
 263         /* Base address 0x3f0 or 0x370 */
 264         { "37B72X",     KEY55_1|SIR|SERx4,      0x4c, 0x00 },
 265         { "37B77X",     KEY55_1|SIR|SERx4,      0x43, 0x00 },
 266         { "37B78X",     KEY55_1|SIR|SERx4,      0x44, 0x00 },
 267         { "37B80X",     KEY55_1|SIR|SERx4,      0x42, 0x00 },
 268         { "37C67X",     KEY55_1|FIR|SERx4,      0x40, 0x00 },
 269         { "37C93X",     KEY55_2|SIR|SERx4,      0x02, 0x01 },
 270         { "37C93XAPM",  KEY55_1|SIR|SERx4,      0x30, 0x01 },
 271         { "37C93XFR",   KEY55_2|FIR|SERx4,      0x03, 0x01 },
 272         { "37M707",     KEY55_1|SIR|SERx4,      0x42, 0x00 },
 273         { "37M81X",     KEY55_1|SIR|SERx4,      0x4d, 0x00 },
 274         { "37N958FR",   KEY55_1|FIR|SERx4,      0x09, 0x04 },
 275         { "37N971",     KEY55_1|FIR|SERx4,      0x0a, 0x00 },
 276         { "37N972",     KEY55_1|FIR|SERx4,      0x0b, 0x00 },
 277         { NULL }
 278 };
 279
 280 static struct smsc_chip __initdata lpc_chips_flat[] =
 281 {
 282         /* Base address 0x2E or 0x4E */
 283         { "47N227",     KEY55_1|FIR|SERx4,      0x5a, 0x00 },
 284         { "47N267",     KEY55_1|FIR|SERx4,      0x5e, 0x00 },
 285         { NULL }
 286 };
 287
 288 static struct smsc_chip __initdata lpc_chips_paged[] =
 289 {
 290         /* Base address 0x2E or 0x4E */
 291         { "47B27X",     KEY55_1|SIR|SERx4,      0x51, 0x00 },
 292         { "47B37X",     KEY55_1|SIR|SERx4,      0x52, 0x00 },
 293         { "47M10X",     KEY55_1|SIR|SERx4,      0x59, 0x00 },
 294         { "47M120",     KEY55_1|NoIRDA|SERx4,   0x5c, 0x00 },
 295         { "47M13X",     KEY55_1|SIR|SERx4,      0x59, 0x00 },
 296         { "47M14X",     KEY55_1|SIR|SERx4,      0x5f, 0x00 },
 297         { "47N252",     KEY55_1|FIR|SERx4,      0x0e, 0x00 },
 298         { "47S42X",     KEY55_1|SIR|SERx4,      0x57, 0x00 },
 299         { NULL }
 300 };
 301
 302 #define SMSCSIO_TYPE_FDC        1
 303 #define SMSCSIO_TYPE_LPC        2
 304 #define SMSCSIO_TYPE_FLAT       4
 305 #define SMSCSIO_TYPE_PAGED      8
 306
 307 static struct smsc_chip_address __initdata possible_addresses[] =
 308 {
 309         { 0x3f0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 310         { 0x370, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 311         { 0xe0,  SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 312         { 0x2e,  SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 313         { 0x4e,  SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
 314         { 0, 0 }
 315 };
 316
 317 /* Globals */
 318
 319 static struct smsc_ircc_cb *dev_self[] = { NULL, NULL };
 320 static unsigned short dev_count;
 321
 322 static inline void register_bank(int iobase, int bank)
 323 {
 324         outb(((inb(iobase + IRCC_MASTER) & 0xf0) | (bank & 0x07)),
 325                iobase + IRCC_MASTER);
 326 }
 327
 328
 329 /*******************************************************************************
 330  *
 331  *
 332  * SMSC-ircc stuff
 333  *
 334  *
 335  *******************************************************************************/
 336
 337 /*
 338  * Function smsc_ircc_init ()
 339  *
 340  *    Initialize chip. Just try to find out how many chips we are dealing with
 341  *    and where they are
 342  */
 343 static int __init smsc_ircc_init(void)
 344 {
 345         int ret;
 346
 347         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 348
 349         ret = driver_register(&smsc_ircc_driver);
 350         if (ret) {
 351                 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
 352                 return ret;
 353         }
 354
 355         dev_count = 0;
 356
 357         if (ircc_fir > 0 && ircc_sir > 0) {
 358                 IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir);
 359                 IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir);
 360
 361                 if (smsc_ircc_open(ircc_fir, ircc_sir, ircc_dma, ircc_irq))
 362                         ret = -ENODEV;
 363         } else {
 364                 ret = -ENODEV;
 365
 366                 /* try user provided configuration register base address */
 367                 if (ircc_cfg > 0) {
 368                         IRDA_MESSAGE(" Overriding configuration address "
 369                                      "0x%04x\n", ircc_cfg);
 370                         if (!smsc_superio_fdc(ircc_cfg))
 371                                 ret = 0;
 372                         if (!smsc_superio_lpc(ircc_cfg))
 373                                 ret = 0;
 374                 }
 375
 376                 if (smsc_ircc_look_for_chips() > 0)
 377                         ret = 0;
 378         }
 379
 380         if (ret)
 381                 driver_unregister(&smsc_ircc_driver);
 382
 383         return ret;
 384 }
 385
 386 /*
 387  * Function smsc_ircc_open (firbase, sirbase, dma, irq)
 388  *
 389  *    Try to open driver instance
 390  *
 391  */
 392 static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq)
 393 {
 394         struct smsc_ircc_cb *self;
 395         struct net_device *dev;
 396         int err;
 397
 398         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 399
 400         err = smsc_ircc_present(fir_base, sir_base);
 401         if (err)
 402                 goto err_out;
 403
 404         err = -ENOMEM;
 405         if (dev_count >= ARRAY_SIZE(dev_self)) {
 406                 IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__);
 407                 goto err_out1;
 408         }
 409
 410         /*
 411          *  Allocate new instance of the driver
 412          */
 413         dev = alloc_irdadev(sizeof(struct smsc_ircc_cb));
 414         if (!dev) {
 415                 IRDA_WARNING("%s() can't allocate net device\n", __FUNCTION__);
 416                 goto err_out1;
 417         }
 418
 419         SET_MODULE_OWNER(dev);
 420
 421         dev->hard_start_xmit = smsc_ircc_hard_xmit_sir;
 422 #if SMSC_IRCC2_C_NET_TIMEOUT
 423         dev->tx_timeout      = smsc_ircc_timeout;
 424         dev->watchdog_timeo  = HZ * 2;  /* Allow enough time for speed change */
 425 #endif
 426         dev->open            = smsc_ircc_net_open;
 427         dev->stop            = smsc_ircc_net_close;
 428         dev->do_ioctl        = smsc_ircc_net_ioctl;
 429         dev->get_stats       = smsc_ircc_net_get_stats;
 430
 431         self = netdev_priv(dev);
 432         self->netdev = dev;
 433
 434         /* Make ifconfig display some details */
 435         dev->base_addr = self->io.fir_base = fir_base;
 436         dev->irq = self->io.irq = irq;
 437
 438         /* Need to store self somewhere */
 439         dev_self[dev_count] = self;
 440         spin_lock_init(&self->lock);
 441
 442         self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE;
 443         self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE;
 444
 445         self->rx_buff.head =
 446                 dma_alloc_coherent(NULL, self->rx_buff.truesize,
 447                                    &self->rx_buff_dma, GFP_KERNEL);
 448         if (self->rx_buff.head == NULL) {
 449                 IRDA_ERROR("%s, Can't allocate memory for receive buffer!\n",
 450                            driver_name);
 451                 goto err_out2;
 452         }
 453
 454         self->tx_buff.head =
 455                 dma_alloc_coherent(NULL, self->tx_buff.truesize,
 456                                    &self->tx_buff_dma, GFP_KERNEL);
 457         if (self->tx_buff.head == NULL) {
 458                 IRDA_ERROR("%s, Can't allocate memory for transmit buffer!\n",
 459                            driver_name);
 460                 goto err_out3;
 461         }
 462
 463         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
 464         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
 465
 466         self->rx_buff.in_frame = FALSE;
 467         self->rx_buff.state = OUTSIDE_FRAME;
 468         self->tx_buff.data = self->tx_buff.head;
 469         self->rx_buff.data = self->rx_buff.head;
 470
 471         smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
 472         smsc_ircc_setup_qos(self);
 473         smsc_ircc_init_chip(self);
 474
 475         if (ircc_transceiver > 0  &&
 476             ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS)
 477                 self->transceiver = ircc_transceiver;
 478         else
 479                 smsc_ircc_probe_transceiver(self);
 480
 481         err = register_netdev(self->netdev);
 482         if (err) {
 483                 IRDA_ERROR("%s, Network device registration failed!\n",
 484                            driver_name);
 485                 goto err_out4;
 486         }
 487
 488         self->pldev = platform_device_register_simple(SMSC_IRCC2_DRIVER_NAME,
 489                                                       dev_count, NULL, 0);
 490         if (IS_ERR(self->pldev)) {
 491                 err = PTR_ERR(self->pldev);
 492                 goto err_out5;
 493         }
 494         dev_set_drvdata(&self->pldev->dev, self);
 495
 496         IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
 497         dev_count++;
 498
 499         return 0;
 500
 501  err_out5:
 502         unregister_netdev(self->netdev);
 503
 504  err_out4:
 505         dma_free_coherent(NULL, self->tx_buff.truesize,
 506                           self->tx_buff.head, self->tx_buff_dma);
 507  err_out3:
 508         dma_free_coherent(NULL, self->rx_buff.truesize,
 509                           self->rx_buff.head, self->rx_buff_dma);
 510  err_out2:
 511         free_netdev(self->netdev);
 512         dev_self[dev_count] = NULL;
 513  err_out1:
 514         release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
 515         release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
 516  err_out:
 517         return err;
 518 }
 519
 520 /*
 521  * Function smsc_ircc_present(fir_base, sir_base)
 522  *
 523  *    Check the smsc-ircc chip presence
 524  *
 525  */
 526 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
 527 {
 528         unsigned char low, high, chip, config, dma, irq, version;
 529
 530         if (!request_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT,
 531                             driver_name)) {
 532                 IRDA_WARNING("%s: can't get fir_base of 0x%03x\n",
 533                              __FUNCTION__, fir_base);
 534                 goto out1;
 535         }
 536
 537         if (!request_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT,
 538                             driver_name)) {
 539                 IRDA_WARNING("%s: can't get sir_base of 0x%03x\n",
 540                              __FUNCTION__, sir_base);
 541                 goto out2;
 542         }
 543
 544         register_bank(fir_base, 3);
 545
 546         high    = inb(fir_base + IRCC_ID_HIGH);
 547         low     = inb(fir_base + IRCC_ID_LOW);
 548         chip    = inb(fir_base + IRCC_CHIP_ID);
 549         version = inb(fir_base + IRCC_VERSION);
 550         config  = inb(fir_base + IRCC_INTERFACE);
 551         dma     = config & IRCC_INTERFACE_DMA_MASK;
 552         irq     = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
 553
 554         if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
 555                 IRDA_WARNING("%s(), addr 0x%04x - no device found!\n",
 556                              __FUNCTION__, fir_base);
 557                 goto out3;
 558         }
 559         IRDA_MESSAGE("SMsC IrDA Controller found\n IrCC version %d.%d, "
 560                      "firport 0x%03x, sirport 0x%03x dma=%d, irq=%d\n",
 561                      chip & 0x0f, version, fir_base, sir_base, dma, irq);
 562
 563         return 0;
 564
 565  out3:
 566         release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
 567  out2:
 568         release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
 569  out1:
 570         return -ENODEV;
 571 }
 572
 573 /*
 574  * Function smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq)
 575  *
 576  *    Setup I/O
 577  *
 578  */
 579 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
 580                                unsigned int fir_base, unsigned int sir_base,
 581                                u8 dma, u8 irq)
 582 {
 583         unsigned char config, chip_dma, chip_irq;
 584
 585         register_bank(fir_base, 3);
 586         config = inb(fir_base + IRCC_INTERFACE);
 587         chip_dma = config & IRCC_INTERFACE_DMA_MASK;
 588         chip_irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
 589
 590         self->io.fir_base  = fir_base;
 591         self->io.sir_base  = sir_base;
 592         self->io.fir_ext   = SMSC_IRCC2_FIR_CHIP_IO_EXTENT;
 593         self->io.sir_ext   = SMSC_IRCC2_SIR_CHIP_IO_EXTENT;
 594         self->io.fifo_size = SMSC_IRCC2_FIFO_SIZE;
 595         self->io.speed = SMSC_IRCC2_C_IRDA_FALLBACK_SPEED;
 596
 597         if (irq < 255) {
 598                 if (irq != chip_irq)
 599                         IRDA_MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n",
 600                                      driver_name, chip_irq, irq);
 601                 self->io.irq = irq;
 602         } else
 603                 self->io.irq = chip_irq;
 604
 605         if (dma < 255) {
 606                 if (dma != chip_dma)
 607                         IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
 608                                      driver_name, chip_dma, dma);
 609                 self->io.dma = dma;
 610         } else
 611                 self->io.dma = chip_dma;
 612
 613 }
 614
 615 /*
 616  * Function smsc_ircc_setup_qos(self)
 617  *
 618  *    Setup qos
 619  *
 620  */
 621 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self)
 622 {
 623         /* Initialize QoS for this device */
 624         irda_init_max_qos_capabilies(&self->qos);
 625
 626         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 627                 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
 628
 629         self->qos.min_turn_time.bits = SMSC_IRCC2_MIN_TURN_TIME;
 630         self->qos.window_size.bits = SMSC_IRCC2_WINDOW_SIZE;
 631         irda_qos_bits_to_value(&self->qos);
 632 }
 633
 634 /*
 635  * Function smsc_ircc_init_chip(self)
 636  *
 637  *    Init chip
 638  *
 639  */
 640 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self)
 641 {
 642         int iobase = self->io.fir_base;
 643
 644         register_bank(iobase, 0);
 645         outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
 646         outb(0x00, iobase + IRCC_MASTER);
 647
 648         register_bank(iobase, 1);
 649         outb(((inb(iobase + IRCC_SCE_CFGA) & 0x87) | IRCC_CFGA_IRDA_SIR_A),
 650              iobase + IRCC_SCE_CFGA);
 651
 652 #ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */
 653         outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
 654              iobase + IRCC_SCE_CFGB);
 655 #else
 656         outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
 657              iobase + IRCC_SCE_CFGB);
 658 #endif
 659         (void) inb(iobase + IRCC_FIFO_THRESHOLD);
 660         outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase + IRCC_FIFO_THRESHOLD);
 661
 662         register_bank(iobase, 4);
 663         outb((inb(iobase + IRCC_CONTROL) & 0x30), iobase + IRCC_CONTROL);
 664
 665         register_bank(iobase, 0);
 666         outb(0, iobase + IRCC_LCR_A);
 667
 668         smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
 669
 670         /* Power on device */
 671         outb(0x00, iobase + IRCC_MASTER);
 672 }
 673
 674 /*
 675  * Function smsc_ircc_net_ioctl (dev, rq, cmd)
 676  *
 677  *    Process IOCTL commands for this device
 678  *
 679  */
 680 static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 681 {
 682         struct if_irda_req *irq = (struct if_irda_req *) rq;
 683         struct smsc_ircc_cb *self;
 684         unsigned long flags;
 685         int ret = 0;
 686
 687         IRDA_ASSERT(dev != NULL, return -1;);
 688
 689         self = netdev_priv(dev);
 690
 691         IRDA_ASSERT(self != NULL, return -1;);
 692
 693         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
 694
 695         switch (cmd) {
 696         case SIOCSBANDWIDTH: /* Set bandwidth */
 697                 if (!capable(CAP_NET_ADMIN))
 698                         ret = -EPERM;
 699                 else {
 700                         /* Make sure we are the only one touching
 701                          * self->io.speed and the hardware - Jean II */
 702                         spin_lock_irqsave(&self->lock, flags);
 703                         smsc_ircc_change_speed(self, irq->ifr_baudrate);
 704                         spin_unlock_irqrestore(&self->lock, flags);
 705                 }
 706                 break;
 707         case SIOCSMEDIABUSY: /* Set media busy */
 708                 if (!capable(CAP_NET_ADMIN)) {
 709                         ret = -EPERM;
 710                         break;
 711                 }
 712
 713                 irda_device_set_media_busy(self->netdev, TRUE);
 714                 break;
 715         case SIOCGRECEIVING: /* Check if we are receiving right now */
 716                 irq->ifr_receiving = smsc_ircc_is_receiving(self);
 717                 break;
 718         #if 0
 719         case SIOCSDTRRTS:
 720                 if (!capable(CAP_NET_ADMIN)) {
 721                         ret = -EPERM;
 722                         break;
 723                 }
 724                 smsc_ircc_sir_set_dtr_rts(dev, irq->ifr_dtr, irq->ifr_rts);
 725                 break;
 726         #endif
 727         default:
 728                 ret = -EOPNOTSUPP;
 729         }
 730
 731         return ret;
 732 }
 733
 734 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev)
 735 {
 736         struct smsc_ircc_cb *self = netdev_priv(dev);
 737
 738         return &self->stats;
 739 }
 740
 741 #if SMSC_IRCC2_C_NET_TIMEOUT
 742 /*
 743  * Function smsc_ircc_timeout (struct net_device *dev)
 744  *
 745  *    The networking timeout management.
 746  *
 747  */
 748
 749 static void smsc_ircc_timeout(struct net_device *dev)
 750 {
 751         struct smsc_ircc_cb *self = netdev_priv(dev);
 752         unsigned long flags;
 753
 754         IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n",
 755                      dev->name, self->io.speed);
 756         spin_lock_irqsave(&self->lock, flags);
 757         smsc_ircc_sir_start(self);
 758         smsc_ircc_change_speed(self, self->io.speed);
 759         dev->trans_start = jiffies;
 760         netif_wake_queue(dev);
 761         spin_unlock_irqrestore(&self->lock, flags);
 762 }
 763 #endif
 764
 765 /*
 766  * Function smsc_ircc_hard_xmit_sir (struct sk_buff *skb, struct net_device *dev)
 767  *
 768  *    Transmits the current frame until FIFO is full, then
 769  *    waits until the next transmit interrupt, and continues until the
 770  *    frame is transmitted.
 771  */
 772 int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
 773 {
 774         struct smsc_ircc_cb *self;
 775         unsigned long flags;
 776         s32 speed;
 777
 778         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 779
 780         IRDA_ASSERT(dev != NULL, return 0;);
 781
 782         self = netdev_priv(dev);
 783         IRDA_ASSERT(self != NULL, return 0;);
 784
 785         netif_stop_queue(dev);
 786
 787         /* Make sure test of self->io.speed & speed change are atomic */
 788         spin_lock_irqsave(&self->lock, flags);
 789
 790         /* Check if we need to change the speed */
 791         speed = irda_get_next_speed(skb);
 792         if (speed != self->io.speed && speed != -1) {
 793                 /* Check for empty frame */
 794                 if (!skb->len) {
 795                         /*
 796                          * We send frames one by one in SIR mode (no
 797                          * pipelining), so at this point, if we were sending
 798                          * a previous frame, we just received the interrupt
 799                          * telling us it is finished (UART_IIR_THRI).
 800                          * Therefore, waiting for the transmitter to really
 801                          * finish draining the fifo won't take too long.
 802                          * And the interrupt handler is not expected to run.
 803                          * - Jean II */
 804                         smsc_ircc_sir_wait_hw_transmitter_finish(self);
 805                         smsc_ircc_change_speed(self, speed);
 806                         spin_unlock_irqrestore(&self->lock, flags);
 807                         dev_kfree_skb(skb);
 808                         return 0;
 809                 }
 810                 self->new_speed = speed;
 811         }
 812
 813         /* Init tx buffer */
 814         self->tx_buff.data = self->tx_buff.head;
 815
 816         /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
 817         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
 818                                            self->tx_buff.truesize);
 819
 820         self->stats.tx_bytes += self->tx_buff.len;
 821
 822         /* Turn on transmit finished interrupt. Will fire immediately!  */
 823         outb(UART_IER_THRI, self->io.sir_base + UART_IER);
 824
 825         spin_unlock_irqrestore(&self->lock, flags);
 826
 827         dev_kfree_skb(skb);
 828
 829         return 0;
 830 }
 831
 832 /*
 833  * Function smsc_ircc_set_fir_speed (self, baud)
 834  *
 835  *    Change the speed of the device
 836  *
 837  */
 838 static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed)
 839 {
 840         int fir_base, ir_mode, ctrl, fast;
 841
 842         IRDA_ASSERT(self != NULL, return;);
 843         fir_base = self->io.fir_base;
 844
 845         self->io.speed = speed;
 846
 847         switch (speed) {
 848         default:
 849         case 576000:
 850                 ir_mode = IRCC_CFGA_IRDA_HDLC;
 851                 ctrl = IRCC_CRC;
 852                 fast = 0;
 853                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
 854                 break;
 855         case 1152000:
 856                 ir_mode = IRCC_CFGA_IRDA_HDLC;
 857                 ctrl = IRCC_1152 | IRCC_CRC;
 858                 fast = IRCC_LCR_A_FAST | IRCC_LCR_A_GP_DATA;
 859                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n",
 860                            __FUNCTION__);
 861                 break;
 862         case 4000000:
 863                 ir_mode = IRCC_CFGA_IRDA_4PPM;
 864                 ctrl = IRCC_CRC;
 865                 fast = IRCC_LCR_A_FAST;
 866                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n",
 867                            __FUNCTION__);
 868                 break;
 869         }
 870         #if 0
 871         Now in tranceiver!
 872         /* This causes an interrupt */
 873         register_bank(fir_base, 0);
 874         outb((inb(fir_base + IRCC_LCR_A) &  0xbf) | fast, fir_base + IRCC_LCR_A);
 875         #endif
 876
 877         register_bank(fir_base, 1);
 878         outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base + IRCC_SCE_CFGA);
 879
 880         register_bank(fir_base, 4);
 881         outb((inb(fir_base + IRCC_CONTROL) & 0x30) | ctrl, fir_base + IRCC_CONTROL);
 882 }
 883
 884 /*
 885  * Function smsc_ircc_fir_start(self)
 886  *
 887  *    Change the speed of the device
 888  *
 889  */
 890 static void smsc_ircc_fir_start(struct smsc_ircc_cb *self)
 891 {
 892         struct net_device *dev;
 893         int fir_base;
 894
 895         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 896
 897         IRDA_ASSERT(self != NULL, return;);
 898         dev = self->netdev;
 899         IRDA_ASSERT(dev != NULL, return;);
 900
 901         fir_base = self->io.fir_base;
 902
 903         /* Reset everything */
 904
 905         /* Install FIR transmit handler */
 906         dev->hard_start_xmit = smsc_ircc_hard_xmit_fir;
 907
 908         /* Clear FIFO */
 909         outb(inb(fir_base + IRCC_LCR_A) | IRCC_LCR_A_FIFO_RESET, fir_base + IRCC_LCR_A);
 910
 911         /* Enable interrupt */
 912         /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base + IRCC_IER);*/
 913
 914         register_bank(fir_base, 1);
 915
 916         /* Select the TX/RX interface */
 917 #ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */
 918         outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
 919              fir_base + IRCC_SCE_CFGB);
 920 #else
 921         outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
 922              fir_base + IRCC_SCE_CFGB);
 923 #endif
 924         (void) inb(fir_base + IRCC_FIFO_THRESHOLD);
 925
 926         /* Enable SCE interrupts */
 927         outb(0, fir_base + IRCC_MASTER);
 928         register_bank(fir_base, 0);
 929         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, fir_base + IRCC_IER);
 930         outb(IRCC_MASTER_INT_EN, fir_base + IRCC_MASTER);
 931 }
 932
 933 /*
 934  * Function smsc_ircc_fir_stop(self, baud)
 935  *
 936  *    Change the speed of the device
 937  *
 938  */
 939 static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self)
 940 {
 941         int fir_base;
 942
 943         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
 944
 945         IRDA_ASSERT(self != NULL, return;);
 946
 947         fir_base = self->io.fir_base;
 948         register_bank(fir_base, 0);
 949         /*outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);*/
 950         outb(inb(fir_base + IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base + IRCC_LCR_B);
 951 }
 952
 953
 954 /*
 955  * Function smsc_ircc_change_speed(self, baud)
 956  *
 957  *    Change the speed of the device
 958  *
 959  * This function *must* be called with spinlock held, because it may
 960  * be called from the irq handler. - Jean II
 961  */
 962 static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed)
 963 {
 964         struct net_device *dev;
 965         int last_speed_was_sir;
 966
 967         IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed);
 968
 969         IRDA_ASSERT(self != NULL, return;);
 970         dev = self->netdev;
 971
 972         last_speed_was_sir = self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED;
 973
 974         #if 0
 975         /* Temp Hack */
 976         speed= 1152000;
 977         self->io.speed = speed;
 978         last_speed_was_sir = 0;
 979         smsc_ircc_fir_start(self);
 980         #endif
 981
 982         if (self->io.speed == 0)
 983                 smsc_ircc_sir_start(self);
 984
 985         #if 0
 986         if (!last_speed_was_sir) speed = self->io.speed;
 987         #endif
 988
 989         if (self->io.speed != speed)
 990                 smsc_ircc_set_transceiver_for_speed(self, speed);
 991
 992         self->io.speed = speed;
 993
 994         if (speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
 995                 if (!last_speed_was_sir) {
 996                         smsc_ircc_fir_stop(self);
 997                         smsc_ircc_sir_start(self);
 998                 }
 999                 smsc_ircc_set_sir_speed(self, speed);
1000         } else {
1001                 if (last_speed_was_sir) {
1002                         #if SMSC_IRCC2_C_SIR_STOP
1003                         smsc_ircc_sir_stop(self);
1004                         #endif
1005                         smsc_ircc_fir_start(self);
1006                 }
1007                 smsc_ircc_set_fir_speed(self, speed);
1008
1009                 #if 0
1010                 self->tx_buff.len = 10;
1011                 self->tx_buff.data = self->tx_buff.head;
1012
1013                 smsc_ircc_dma_xmit(self, 4000);
1014                 #endif
1015                 /* Be ready for incoming frames */
1016                 smsc_ircc_dma_receive(self);
1017         }
1018
1019         netif_wake_queue(dev);
1020 }
1021
1022 /*
1023  * Function smsc_ircc_set_sir_speed (self, speed)
1024  *
1025  *    Set speed of IrDA port to specified baudrate
1026  *
1027  */
1028 void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, __u32 speed)
1029 {
1030         int iobase;
1031         int fcr;    /* FIFO control reg */
1032         int lcr;    /* Line control reg */
1033         int divisor;
1034
1035         IRDA_DEBUG(0, "%s(), Setting speed to: %d\n", __FUNCTION__, speed);
1036
1037         IRDA_ASSERT(self != NULL, return;);
1038         iobase = self->io.sir_base;
1039
1040         /* Update accounting for new speed */
1041         self->io.speed = speed;
1042
1043         /* Turn off interrupts */
1044         outb(0, iobase + UART_IER);
1045
1046         divisor = SMSC_IRCC2_MAX_SIR_SPEED / speed;
1047
1048         fcr = UART_FCR_ENABLE_FIFO;
1049
1050         /*
1051          * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1052          * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1053          * about this timeout since it will always be fast enough.
1054          */
1055         fcr |= self->io.speed < 38400 ?
1056                 UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1057
1058         /* IrDA ports use 8N1 */
1059         lcr = UART_LCR_WLEN8;
1060
1061         outb(UART_LCR_DLAB | lcr, iobase + UART_LCR); /* Set DLAB */
1062         outb(divisor & 0xff,      iobase + UART_DLL); /* Set speed */
1063         outb(divisor >> 8,        iobase + UART_DLM);
1064         outb(lcr,                 iobase + UART_LCR); /* Set 8N1 */
1065         outb(fcr,                 iobase + UART_FCR); /* Enable FIFO's */
1066
1067         /* Turn on interrups */
1068         outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER);
1069
1070         IRDA_DEBUG(2, "%s() speed changed to: %d\n", __FUNCTION__, speed);
1071 }
1072
1073
1074 /*
1075  * Function smsc_ircc_hard_xmit_fir (skb, dev)
1076  *
1077  *    Transmit the frame!
1078  *
1079  */
1080 static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1081 {
1082         struct smsc_ircc_cb *self;
1083         unsigned long flags;
1084         s32 speed;
1085         int mtt;
1086
1087         IRDA_ASSERT(dev != NULL, return 0;);
1088         self = netdev_priv(dev);
1089         IRDA_ASSERT(self != NULL, return 0;);
1090
1091         netif_stop_queue(dev);
1092
1093         /* Make sure test of self->io.speed & speed change are atomic */
1094         spin_lock_irqsave(&self->lock, flags);
1095
1096         /* Check if we need to change the speed after this frame */
1097         speed = irda_get_next_speed(skb);
1098         if (speed != self->io.speed && speed != -1) {
1099                 /* Check for empty frame */
1100                 if (!skb->len) {
1101                         /* Note : you should make sure that speed changes
1102                          * are not going to corrupt any outgoing frame.
1103                          * Look at nsc-ircc for the gory details - Jean II */
1104                         smsc_ircc_change_speed(self, speed);
1105                         spin_unlock_irqrestore(&self->lock, flags);
1106                         dev_kfree_skb(skb);
1107                         return 0;
1108                 }
1109
1110                 self->new_speed = speed;
1111         }
1112
1113         memcpy(self->tx_buff.head, skb->data, skb->len);
1114
1115         self->tx_buff.len = skb->len;
1116         self->tx_buff.data = self->tx_buff.head;
1117
1118         mtt = irda_get_mtt(skb);
1119         if (mtt) {
1120                 int bofs;
1121
1122                 /*
1123                  * Compute how many BOFs (STA or PA's) we need to waste the
1124                  * min turn time given the speed of the link.
1125                  */
1126                 bofs = mtt * (self->io.speed / 1000) / 8000;
1127                 if (bofs > 4095)
1128                         bofs = 4095;
1129
1130                 smsc_ircc_dma_xmit(self, bofs);
1131         } else {
1132                 /* Transmit frame */
1133                 smsc_ircc_dma_xmit(self, 0);
1134         }
1135
1136         spin_unlock_irqrestore(&self->lock, flags);
1137         dev_kfree_skb(skb);
1138
1139         return 0;
1140 }
1141
1142 /*
1143  * Function smsc_ircc_dma_xmit (self, bofs)
1144  *
1145  *    Transmit data using DMA
1146  *
1147  */
1148 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs)
1149 {
1150         int iobase = self->io.fir_base;
1151         u8 ctrl;
1152
1153         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1154 #if 1
1155         /* Disable Rx */
1156         register_bank(iobase, 0);
1157         outb(0x00, iobase + IRCC_LCR_B);
1158 #endif
1159         register_bank(iobase, 1);
1160         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1161              iobase + IRCC_SCE_CFGB);
1162
1163         self->io.direction = IO_XMIT;
1164
1165         /* Set BOF additional count for generating the min turn time */
1166         register_bank(iobase, 4);
1167         outb(bofs & 0xff, iobase + IRCC_BOF_COUNT_LO);
1168         ctrl = inb(iobase + IRCC_CONTROL) & 0xf0;
1169         outb(ctrl | ((bofs >> 8) & 0x0f), iobase + IRCC_BOF_COUNT_HI);
1170
1171         /* Set max Tx frame size */
1172         outb(self->tx_buff.len >> 8, iobase + IRCC_TX_SIZE_HI);
1173         outb(self->tx_buff.len & 0xff, iobase + IRCC_TX_SIZE_LO);
1174
1175         /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/
1176
1177         /* Enable burst mode chip Tx DMA */
1178         register_bank(iobase, 1);
1179         outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1180              IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1181
1182         /* Setup DMA controller (must be done after enabling chip DMA) */
1183         irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
1184                        DMA_TX_MODE);
1185
1186         /* Enable interrupt */
1187
1188         register_bank(iobase, 0);
1189         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1190         outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1191
1192         /* Enable transmit */
1193         outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase + IRCC_LCR_B);
1194 }
1195
1196 /*
1197  * Function smsc_ircc_dma_xmit_complete (self)
1198  *
1199  *    The transfer of a frame in finished. This function will only be called
1200  *    by the interrupt handler
1201  *
1202  */
1203 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self)
1204 {
1205         int iobase = self->io.fir_base;
1206
1207         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1208 #if 0
1209         /* Disable Tx */
1210         register_bank(iobase, 0);
1211         outb(0x00, iobase + IRCC_LCR_B);
1212 #endif
1213         register_bank(iobase, 1);
1214         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1215              iobase + IRCC_SCE_CFGB);
1216
1217         /* Check for underrun! */
1218         register_bank(iobase, 0);
1219         if (inb(iobase + IRCC_LSR) & IRCC_LSR_UNDERRUN) {
1220                 self->stats.tx_errors++;
1221                 self->stats.tx_fifo_errors++;
1222
1223                 /* Reset error condition */
1224                 register_bank(iobase, 0);
1225                 outb(IRCC_MASTER_ERROR_RESET, iobase + IRCC_MASTER);
1226                 outb(0x00, iobase + IRCC_MASTER);
1227         } else {
1228                 self->stats.tx_packets++;
1229                 self->stats.tx_bytes += self->tx_buff.len;
1230         }
1231
1232         /* Check if it's time to change the speed */
1233         if (self->new_speed) {
1234                 smsc_ircc_change_speed(self, self->new_speed);
1235                 self->new_speed = 0;
1236         }
1237
1238         netif_wake_queue(self->netdev);
1239 }
1240
1241 /*
1242  * Function smsc_ircc_dma_receive(self)
1243  *
1244  *    Get ready for receiving a frame. The device will initiate a DMA
1245  *    if it starts to receive a frame.
1246  *
1247  */
1248 static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self)
1249 {
1250         int iobase = self->io.fir_base;
1251 #if 0
1252         /* Turn off chip DMA */
1253         register_bank(iobase, 1);
1254         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1255              iobase + IRCC_SCE_CFGB);
1256 #endif
1257
1258         /* Disable Tx */
1259         register_bank(iobase, 0);
1260         outb(0x00, iobase + IRCC_LCR_B);
1261
1262         /* Turn off chip DMA */
1263         register_bank(iobase, 1);
1264         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1265              iobase + IRCC_SCE_CFGB);
1266
1267         self->io.direction = IO_RECV;
1268         self->rx_buff.data = self->rx_buff.head;
1269
1270         /* Set max Rx frame size */
1271         register_bank(iobase, 4);
1272         outb((2050 >> 8) & 0x0f, iobase + IRCC_RX_SIZE_HI);
1273         outb(2050 & 0xff, iobase + IRCC_RX_SIZE_LO);
1274
1275         /* Setup DMA controller */
1276         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1277                        DMA_RX_MODE);
1278
1279         /* Enable burst mode chip Rx DMA */
1280         register_bank(iobase, 1);
1281         outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1282              IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1283
1284         /* Enable interrupt */
1285         register_bank(iobase, 0);
1286         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1287         outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1288
1289         /* Enable receiver */
1290         register_bank(iobase, 0);
1291         outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
1292              iobase + IRCC_LCR_B);
1293
1294         return 0;
1295 }
1296
1297 /*
1298  * Function smsc_ircc_dma_receive_complete(self)
1299  *
1300  *    Finished with receiving frames
1301  *
1302  */
1303 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self)
1304 {
1305         struct sk_buff *skb;
1306         int len, msgcnt, lsr;
1307         int iobase = self->io.fir_base;
1308
1309         register_bank(iobase, 0);
1310
1311         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1312 #if 0
1313         /* Disable Rx */
1314         register_bank(iobase, 0);
1315         outb(0x00, iobase + IRCC_LCR_B);
1316 #endif
1317         register_bank(iobase, 0);
1318         outb(inb(iobase + IRCC_LSAR) & ~IRCC_LSAR_ADDRESS_MASK, iobase + IRCC_LSAR);
1319         lsr= inb(iobase + IRCC_LSR);
1320         msgcnt = inb(iobase + IRCC_LCR_B) & 0x08;
1321
1322         IRDA_DEBUG(2, "%s: dma count = %d\n", __FUNCTION__,
1323                    get_dma_residue(self->io.dma));
1324
1325         len = self->rx_buff.truesize - get_dma_residue(self->io.dma);
1326
1327         /* Look for errors */
1328         if (lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) {
1329                 self->stats.rx_errors++;
1330                 if (lsr & IRCC_LSR_FRAME_ERROR)
1331                         self->stats.rx_frame_errors++;
1332                 if (lsr & IRCC_LSR_CRC_ERROR)
1333                         self->stats.rx_crc_errors++;
1334                 if (lsr & IRCC_LSR_SIZE_ERROR)
1335                         self->stats.rx_length_errors++;
1336                 if (lsr & (IRCC_LSR_UNDERRUN | IRCC_LSR_OVERRUN))
1337                         self->stats.rx_length_errors++;
1338                 return;
1339         }
1340
1341         /* Remove CRC */
1342         len -= self->io.speed < 4000000 ? 2 : 4;
1343
1344         if (len < 2 || len > 2050) {
1345                 IRDA_WARNING("%s(), bogus len=%d\n", __FUNCTION__, len);
1346                 return;
1347         }
1348         IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __FUNCTION__, msgcnt, len);
1349
1350         skb = dev_alloc_skb(len + 1);
1351         if (!skb) {
1352                 IRDA_WARNING("%s(), memory squeeze, dropping frame.\n",
1353                              __FUNCTION__);
1354                 return;
1355         }
1356         /* Make sure IP header gets aligned */
1357         skb_reserve(skb, 1);
1358
1359         memcpy(skb_put(skb, len), self->rx_buff.data, len);
1360         self->stats.rx_packets++;
1361         self->stats.rx_bytes += len;
1362
1363         skb->dev = self->netdev;
1364         skb->mac.raw  = skb->data;
1365         skb->protocol = htons(ETH_P_IRDA);
1366         netif_rx(skb);
1367 }
1368
1369 /*
1370  * Function smsc_ircc_sir_receive (self)
1371  *
1372  *    Receive one frame from the infrared port
1373  *
1374  */
1375 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1376 {
1377         int boguscount = 0;
1378         int iobase;
1379
1380         IRDA_ASSERT(self != NULL, return;);
1381
1382         iobase = self->io.sir_base;
1383
1384         /*
1385          * Receive all characters in Rx FIFO, unwrap and unstuff them.
1386          * async_unwrap_char will deliver all found frames
1387          */
1388         do {
1389                 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1390                                   inb(iobase + UART_RX));
1391
1392                 /* Make sure we don't stay here to long */
1393                 if (boguscount++ > 32) {
1394                         IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__);
1395                         break;
1396                 }
1397         } while (inb(iobase + UART_LSR) & UART_LSR_DR);
1398 }
1399
1400
1401 /*
1402  * Function smsc_ircc_interrupt (irq, dev_id, regs)
1403  *
1404  *    An interrupt from the chip has arrived. Time to do some work
1405  *
1406  */
1407 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1408 {
1409         struct net_device *dev = (struct net_device *) dev_id;
1410         struct smsc_ircc_cb *self;
1411         int iobase, iir, lcra, lsr;
1412         irqreturn_t ret = IRQ_NONE;
1413
1414         if (dev == NULL) {
1415                 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1416                        driver_name, irq);
1417                 goto irq_ret;
1418         }
1419
1420         self = netdev_priv(dev);
1421         IRDA_ASSERT(self != NULL, return IRQ_NONE;);
1422
1423         /* Serialise the interrupt handler in various CPUs, stop Tx path */
1424         spin_lock(&self->lock);
1425
1426         /* Check if we should use the SIR interrupt handler */
1427         if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
1428                 ret = smsc_ircc_interrupt_sir(dev);
1429                 goto irq_ret_unlock;
1430         }
1431
1432         iobase = self->io.fir_base;
1433
1434         register_bank(iobase, 0);
1435         iir = inb(iobase + IRCC_IIR);
1436         if (iir == 0)
1437                 goto irq_ret_unlock;
1438         ret = IRQ_HANDLED;
1439
1440         /* Disable interrupts */
1441         outb(0, iobase + IRCC_IER);
1442         lcra = inb(iobase + IRCC_LCR_A);
1443         lsr = inb(iobase + IRCC_LSR);
1444
1445         IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir);
1446
1447         if (iir & IRCC_IIR_EOM) {
1448                 if (self->io.direction == IO_RECV)
1449                         smsc_ircc_dma_receive_complete(self);
1450                 else
1451                         smsc_ircc_dma_xmit_complete(self);
1452
1453                 smsc_ircc_dma_receive(self);
1454         }
1455
1456         if (iir & IRCC_IIR_ACTIVE_FRAME) {
1457                 /*printk(KERN_WARNING "%s(): Active Frame\n", __FUNCTION__);*/
1458         }
1459
1460         /* Enable interrupts again */
1461
1462         register_bank(iobase, 0);
1463         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1464
1465  irq_ret_unlock:
1466         spin_unlock(&self->lock);
1467  irq_ret:
1468         return ret;
1469 }
1470
1471 /*
1472  * Function irport_interrupt_sir (irq, dev_id, regs)
1473  *
1474  *    Interrupt handler for SIR modes
1475  */
1476 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1477 {
1478         struct smsc_ircc_cb *self = netdev_priv(dev);
1479         int boguscount = 0;
1480         int iobase;
1481         int iir, lsr;
1482
1483         /* Already locked comming here in smsc_ircc_interrupt() */
1484         /*spin_lock(&self->lock);*/
1485
1486         iobase = self->io.sir_base;
1487
1488         iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1489         if (iir == 0)
1490                 return IRQ_NONE;
1491         while (iir) {
1492                 /* Clear interrupt */
1493                 lsr = inb(iobase + UART_LSR);
1494
1495                 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
1496                             __FUNCTION__, iir, lsr, iobase);
1497
1498                 switch (iir) {
1499                 case UART_IIR_RLSI:
1500                         IRDA_DEBUG(2, "%s(), RLSI\n", __FUNCTION__);
1501                         break;
1502                 case UART_IIR_RDI:
1503                         /* Receive interrupt */
1504                         smsc_ircc_sir_receive(self);
1505                         break;
1506                 case UART_IIR_THRI:
1507                         if (lsr & UART_LSR_THRE)
1508                                 /* Transmitter ready for data */
1509                                 smsc_ircc_sir_write_wakeup(self);
1510                         break;
1511                 default:
1512                         IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n",
1513                                    __FUNCTION__, iir);
1514                         break;
1515                 }
1516
1517                 /* Make sure we don't stay here to long */
1518                 if (boguscount++ > 100)
1519                         break;
1520
1521                 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1522         }
1523         /*spin_unlock(&self->lock);*/
1524         return IRQ_HANDLED;
1525 }
1526
1527
1528 #if 0 /* unused */
1529 /*
1530  * Function ircc_is_receiving (self)
1531  *
1532  *    Return TRUE is we are currently receiving a frame
1533  *
1534  */
1535 static int ircc_is_receiving(struct smsc_ircc_cb *self)
1536 {
1537         int status = FALSE;
1538         /* int iobase; */
1539
1540         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1541
1542         IRDA_ASSERT(self != NULL, return FALSE;);
1543
1544         IRDA_DEBUG(0, "%s: dma count = %d\n", __FUNCTION__,
1545                    get_dma_residue(self->io.dma));
1546
1547         status = (self->rx_buff.state != OUTSIDE_FRAME);
1548
1549         return status;
1550 }
1551 #endif /* unused */
1552
1553 static int smsc_ircc_request_irq(struct smsc_ircc_cb *self)
1554 {
1555         int error;
1556
1557         error = request_irq(self->io.irq, smsc_ircc_interrupt, 0,
1558                             self->netdev->name, self->netdev);
1559         if (error)
1560                 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d, err=%d\n",
1561                            __FUNCTION__, self->io.irq, error);
1562
1563         return error;
1564 }
1565
1566 static void smsc_ircc_start_interrupts(struct smsc_ircc_cb *self)
1567 {
1568         unsigned long flags;
1569
1570         spin_lock_irqsave(&self->lock, flags);
1571
1572         self->io.speed = 0;
1573         smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
1574
1575         spin_unlock_irqrestore(&self->lock, flags);
1576 }
1577
1578 static void smsc_ircc_stop_interrupts(struct smsc_ircc_cb *self)
1579 {
1580         int iobase = self->io.fir_base;
1581         unsigned long flags;
1582
1583         spin_lock_irqsave(&self->lock, flags);
1584
1585         register_bank(iobase, 0);
1586         outb(0, iobase + IRCC_IER);
1587         outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
1588         outb(0x00, iobase + IRCC_MASTER);
1589
1590         spin_unlock_irqrestore(&self->lock, flags);
1591 }
1592
1593
1594 /*
1595  * Function smsc_ircc_net_open (dev)
1596  *
1597  *    Start the device
1598  *
1599  */
1600 static int smsc_ircc_net_open(struct net_device *dev)
1601 {
1602         struct smsc_ircc_cb *self;
1603         char hwname[16];
1604
1605         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1606
1607         IRDA_ASSERT(dev != NULL, return -1;);
1608         self = netdev_priv(dev);
1609         IRDA_ASSERT(self != NULL, return 0;);
1610
1611         if (self->io.suspended) {
1612                 IRDA_DEBUG(0, "%s(), device is suspended\n", __FUNCTION__);
1613                 return -EAGAIN;
1614         }
1615
1616         if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name,
1617                         (void *) dev)) {
1618                 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n",
1619                            __FUNCTION__, self->io.irq);
1620                 return -EAGAIN;
1621         }
1622
1623         smsc_ircc_start_interrupts(self);
1624
1625         /* Give self a hardware name */
1626         /* It would be cool to offer the chip revision here - Jean II */
1627         sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
1628
1629         /*
1630          * Open new IrLAP layer instance, now that everything should be
1631          * initialized properly
1632          */
1633         self->irlap = irlap_open(dev, &self->qos, hwname);
1634
1635         /*
1636          * Always allocate the DMA channel after the IRQ,
1637          * and clean up on failure.
1638          */
1639         if (request_dma(self->io.dma, dev->name)) {
1640                 smsc_ircc_net_close(dev);
1641
1642                 IRDA_WARNING("%s(), unable to allocate DMA=%d\n",
1643                              __FUNCTION__, self->io.dma);
1644                 return -EAGAIN;
1645         }
1646
1647         netif_start_queue(dev);
1648
1649         return 0;
1650 }
1651
1652 /*
1653  * Function smsc_ircc_net_close (dev)
1654  *
1655  *    Stop the device
1656  *
1657  */
1658 static int smsc_ircc_net_close(struct net_device *dev)
1659 {
1660         struct smsc_ircc_cb *self;
1661
1662         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1663
1664         IRDA_ASSERT(dev != NULL, return -1;);
1665         self = netdev_priv(dev);
1666         IRDA_ASSERT(self != NULL, return 0;);
1667
1668         /* Stop device */
1669         netif_stop_queue(dev);
1670
1671         /* Stop and remove instance of IrLAP */
1672         if (self->irlap)
1673                 irlap_close(self->irlap);
1674         self->irlap = NULL;
1675
1676         smsc_ircc_stop_interrupts(self);
1677
1678         /* if we are called from smsc_ircc_resume we don't have IRQ reserved */
1679         if (!self->io.suspended)
1680                 free_irq(self->io.irq, dev);
1681
1682         disable_dma(self->io.dma);
1683         free_dma(self->io.dma);
1684
1685         return 0;
1686 }
1687
1688 static int smsc_ircc_suspend(struct device *dev, pm_message_t state)
1689 {
1690         struct smsc_ircc_cb *self = dev_get_drvdata(dev);
1691
1692         if (!self->io.suspended) {
1693                 IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
1694
1695                 rtnl_lock();
1696                 if (netif_running(self->netdev)) {
1697                         netif_device_detach(self->netdev);
1698                         smsc_ircc_stop_interrupts(self);
1699                         free_irq(self->io.irq, self->netdev);
1700                         disable_dma(self->io.dma);
1701                 }
1702                 self->io.suspended = 1;
1703                 rtnl_unlock();
1704         }
1705
1706         return 0;
1707 }
1708
1709 static int smsc_ircc_resume(struct device *dev)
1710 {
1711         struct smsc_ircc_cb *self = dev_get_drvdata(dev);
1712
1713         if (self->io.suspended) {
1714                 IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
1715
1716                 rtnl_lock();
1717                 smsc_ircc_init_chip(self);
1718                 if (netif_running(self->netdev)) {
1719                         if (smsc_ircc_request_irq(self)) {
1720                                 /*
1721                                  * Don't fail resume process, just kill this
1722                                  * network interface
1723                                  */
1724                                 unregister_netdevice(self->netdev);
1725                         } else {
1726                                 enable_dma(self->io.dma);
1727                                 smsc_ircc_start_interrupts(self);
1728                                 netif_device_attach(self->netdev);
1729                         }
1730                 }
1731                 self->io.suspended = 0;
1732                 rtnl_unlock();
1733         }
1734         return 0;
1735 }
1736
1737 /*
1738  * Function smsc_ircc_close (self)
1739  *
1740  *    Close driver instance
1741  *
1742  */
1743 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1744 {
1745         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1746
1747         IRDA_ASSERT(self != NULL, return -1;);
1748
1749         platform_device_unregister(self->pldev);
1750
1751         /* Remove netdevice */
1752         unregister_netdev(self->netdev);
1753
1754         smsc_ircc_stop_interrupts(self);
1755
1756         /* Release the PORTS that this driver is using */
1757         IRDA_DEBUG(0, "%s(), releasing 0x%03x\n",  __FUNCTION__,
1758                    self->io.fir_base);
1759
1760         release_region(self->io.fir_base, self->io.fir_ext);
1761
1762         IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
1763                    self->io.sir_base);
1764
1765         release_region(self->io.sir_base, self->io.sir_ext);
1766
1767         if (self->tx_buff.head)
1768                 dma_free_coherent(NULL, self->tx_buff.truesize,
1769                                   self->tx_buff.head, self->tx_buff_dma);
1770
1771         if (self->rx_buff.head)
1772                 dma_free_coherent(NULL, self->rx_buff.truesize,
1773                                   self->rx_buff.head, self->rx_buff_dma);
1774
1775         free_netdev(self->netdev);
1776
1777         return 0;
1778 }
1779
1780 static void __exit smsc_ircc_cleanup(void)
1781 {
1782         int i;
1783
1784         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1785
1786         for (i = 0; i < 2; i++) {
1787                 if (dev_self[i])
1788                         smsc_ircc_close(dev_self[i]);
1789         }
1790
1791         driver_unregister(&smsc_ircc_driver);
1792 }
1793
1794 /*
1795  *      Start SIR operations
1796  *
1797  * This function *must* be called with spinlock held, because it may
1798  * be called from the irq handler (via smsc_ircc_change_speed()). - Jean II
1799  */
1800 void smsc_ircc_sir_start(struct smsc_ircc_cb *self)
1801 {
1802         struct net_device *dev;
1803         int fir_base, sir_base;
1804
1805         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1806
1807         IRDA_ASSERT(self != NULL, return;);
1808         dev = self->netdev;
1809         IRDA_ASSERT(dev != NULL, return;);
1810         dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir;
1811
1812         fir_base = self->io.fir_base;
1813         sir_base = self->io.sir_base;
1814
1815         /* Reset everything */
1816         outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);
1817
1818         #if SMSC_IRCC2_C_SIR_STOP
1819         /*smsc_ircc_sir_stop(self);*/
1820         #endif
1821
1822         register_bank(fir_base, 1);
1823         outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base + IRCC_SCE_CFGA);
1824
1825         /* Initialize UART */
1826         outb(UART_LCR_WLEN8, sir_base + UART_LCR);  /* Reset DLAB */
1827         outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base + UART_MCR);
1828
1829         /* Turn on interrups */
1830         outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base + UART_IER);
1831
1832         IRDA_DEBUG(3, "%s() - exit\n", __FUNCTION__);
1833
1834         outb(0x00, fir_base + IRCC_MASTER);
1835 }
1836
1837 #if SMSC_IRCC2_C_SIR_STOP
1838 void smsc_ircc_sir_stop(struct smsc_ircc_cb *self)
1839 {
1840         int iobase;
1841
1842         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1843         iobase = self->io.sir_base;
1844
1845         /* Reset UART */
1846         outb(0, iobase + UART_MCR);
1847
1848         /* Turn off interrupts */
1849         outb(0, iobase + UART_IER);
1850 }
1851 #endif
1852
1853 /*
1854  * Function smsc_sir_write_wakeup (self)
1855  *
1856  *    Called by the SIR interrupt handler when there's room for more data.
1857  *    If we have more packets to send, we send them here.
1858  *
1859  */
1860 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1861 {
1862         int actual = 0;
1863         int iobase;
1864         int fcr;
1865
1866         IRDA_ASSERT(self != NULL, return;);
1867
1868         IRDA_DEBUG(4, "%s\n", __FUNCTION__);
1869
1870         iobase = self->io.sir_base;
1871
1872         /* Finished with frame?  */
1873         if (self->tx_buff.len > 0)  {
1874                 /* Write data left in transmit buffer */
1875                 actual = smsc_ircc_sir_write(iobase, self->io.fifo_size,
1876                                       self->tx_buff.data, self->tx_buff.len);
1877                 self->tx_buff.data += actual;
1878                 self->tx_buff.len  -= actual;
1879         } else {
1880
1881         /*if (self->tx_buff.len ==0)  {*/
1882
1883                 /*
1884                  *  Now serial buffer is almost free & we can start
1885                  *  transmission of another packet. But first we must check
1886                  *  if we need to change the speed of the hardware
1887                  */
1888                 if (self->new_speed) {
1889                         IRDA_DEBUG(5, "%s(), Changing speed to %d.\n",
1890                                    __FUNCTION__, self->new_speed);
1891                         smsc_ircc_sir_wait_hw_transmitter_finish(self);
1892                         smsc_ircc_change_speed(self, self->new_speed);
1893                         self->new_speed = 0;
1894                 } else {
1895                         /* Tell network layer that we want more frames */
1896                         netif_wake_queue(self->netdev);
1897                 }
1898                 self->stats.tx_packets++;
1899
1900                 if (self->io.speed <= 115200) {
1901                         /*
1902                          * Reset Rx FIFO to make sure that all reflected transmit data
1903                          * is discarded. This is needed for half duplex operation
1904                          */
1905                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR;
1906                         fcr |= self->io.speed < 38400 ?
1907                                         UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1908
1909                         outb(fcr, iobase + UART_FCR);
1910
1911                         /* Turn on receive interrupts */
1912                         outb(UART_IER_RDI, iobase + UART_IER);
1913                 }
1914         }
1915 }
1916
1917 /*
1918  * Function smsc_ircc_sir_write (iobase, fifo_size, buf, len)
1919  *
1920  *    Fill Tx FIFO with transmit data
1921  *
1922  */
1923 static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1924 {
1925         int actual = 0;
1926
1927         /* Tx FIFO should be empty! */
1928         if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) {
1929                 IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__);
1930                 return 0;
1931         }
1932
1933         /* Fill FIFO with current frame */
1934         while (fifo_size-- > 0 && actual < len) {
1935                 /* Transmit next byte */
1936                 outb(buf[actual], iobase + UART_TX);
1937                 actual++;
1938         }
1939         return actual;
1940 }
1941
1942 /*
1943  * Function smsc_ircc_is_receiving (self)
1944  *
1945  *    Returns true is we are currently receiving data
1946  *
1947  */
1948 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self)
1949 {
1950         return (self->rx_buff.state != OUTSIDE_FRAME);
1951 }
1952
1953
1954 /*
1955  * Function smsc_ircc_probe_transceiver(self)
1956  *
1957  *    Tries to find the used Transceiver
1958  *
1959  */
1960 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1961 {
1962         unsigned int    i;
1963
1964         IRDA_ASSERT(self != NULL, return;);
1965
1966         for (i = 0; smsc_transceivers[i].name != NULL; i++)
1967                 if (smsc_transceivers[i].probe(self->io.fir_base)) {
1968                         IRDA_MESSAGE(" %s transceiver found\n",
1969                                      smsc_transceivers[i].name);
1970                         self->transceiver= i + 1;
1971                         return;
1972                 }
1973
1974         IRDA_MESSAGE("No transceiver found. Defaulting to %s\n",
1975                      smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name);
1976
1977         self->transceiver = SMSC_IRCC2_C_DEFAULT_TRANSCEIVER;
1978 }
1979
1980
1981 /*
1982  * Function smsc_ircc_set_transceiver_for_speed(self, speed)
1983  *
1984  *    Set the transceiver according to the speed
1985  *
1986  */
1987 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed)
1988 {
1989         unsigned int trx;
1990
1991         trx = self->transceiver;
1992         if (trx > 0)
1993                 smsc_transceivers[trx - 1].set_for_speed(self->io.fir_base, speed);
1994 }
1995
1996 /*
1997  * Function smsc_ircc_wait_hw_transmitter_finish ()
1998  *
1999  *    Wait for the real end of HW transmission
2000  *
2001  * The UART is a strict FIFO, and we get called only when we have finished
2002  * pushing data to the FIFO, so the maximum amount of time we must wait
2003  * is only for the FIFO to drain out.
2004  *
2005  * We use a simple calibrated loop. We may need to adjust the loop
2006  * delay (udelay) to balance I/O traffic and latency. And we also need to
2007  * adjust the maximum timeout.
2008  * It would probably be better to wait for the proper interrupt,
2009  * but it doesn't seem to be available.
2010  *
2011  * We can't use jiffies or kernel timers because :
2012  * 1) We are called from the interrupt handler, which disable softirqs,
2013  * so jiffies won't be increased
2014  * 2) Jiffies granularity is usually very coarse (10ms), and we don't
2015  * want to wait that long to detect stuck hardware.
2016  * Jean II
2017  */
2018
2019 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self)
2020 {
2021         int iobase = self->io.sir_base;
2022         int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US;
2023
2024         /* Calibrated busy loop */
2025         while (count-- > 0 && !(inb(iobase + UART_LSR) & UART_LSR_TEMT))
2026                 udelay(1);
2027
2028         if (count == 0)
2029                 IRDA_DEBUG(0, "%s(): stuck transmitter\n", __FUNCTION__);
2030 }
2031
2032
2033 /* PROBING
2034  *
2035  *
2036  */
2037
2038 static int __init smsc_ircc_look_for_chips(void)
2039 {
2040         struct smsc_chip_address *address;
2041         char *type;
2042         unsigned int cfg_base, found;
2043
2044         found = 0;
2045         address = possible_addresses;
2046
2047         while (address->cfg_base) {
2048                 cfg_base = address->cfg_base;
2049
2050                 /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/
2051
2052                 if (address->type & SMSCSIO_TYPE_FDC) {
2053                         type = "FDC";
2054                         if (address->type & SMSCSIO_TYPE_FLAT)
2055                                 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, type))
2056                                         found++;
2057
2058                         if (address->type & SMSCSIO_TYPE_PAGED)
2059                                 if (!smsc_superio_paged(fdc_chips_paged, cfg_base, type))
2060                                         found++;
2061                 }
2062                 if (address->type & SMSCSIO_TYPE_LPC) {
2063                         type = "LPC";
2064                         if (address->type & SMSCSIO_TYPE_FLAT)
2065                                 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, type))
2066                                         found++;
2067
2068                         if (address->type & SMSCSIO_TYPE_PAGED)
2069                                 if (!smsc_superio_paged(lpc_chips_paged, cfg_base, type))
2070                                         found++;
2071                 }
2072                 address++;
2073         }
2074         return found;
2075 }
2076
2077 /*
2078  * Function smsc_superio_flat (chip, base, type)
2079  *
2080  *    Try to get configuration of a smc SuperIO chip with flat register model
2081  *
2082  */
2083 static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfgbase, char *type)
2084 {
2085         unsigned short firbase, sirbase;
2086         u8 mode, dma, irq;
2087         int ret = -ENODEV;
2088
2089         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2090
2091         if (smsc_ircc_probe(cfgbase, SMSCSIOFLAT_DEVICEID_REG, chips, type) == NULL)
2092                 return ret;
2093
2094         outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase);
2095         mode = inb(cfgbase + 1);
2096
2097         /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/
2098
2099         if (!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA))
2100                 IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__);
2101
2102         outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase);
2103         sirbase = inb(cfgbase + 1) << 2;
2104
2105         /* FIR iobase */
2106         outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase);
2107         firbase = inb(cfgbase + 1) << 3;
2108
2109         /* DMA */
2110         outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase);
2111         dma = inb(cfgbase + 1) & SMSCSIOFLAT_FIRDMASELECT_MASK;
2112
2113         /* IRQ */
2114         outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase);
2115         irq = inb(cfgbase + 1) & SMSCSIOFLAT_UART2IRQSELECT_MASK;
2116
2117         IRDA_MESSAGE("%s(): fir: 0x%02x, sir: 0x%02x, dma: %02d, irq: %d, mode: 0x%02x\n", __FUNCTION__, firbase, sirbase, dma, irq, mode);
2118
2119         if (firbase && smsc_ircc_open(firbase, sirbase, dma, irq) == 0)
2120                 ret = 0;
2121
2122         /* Exit configuration */
2123         outb(SMSCSIO_CFGEXITKEY, cfgbase);
2124
2125         return ret;
2126 }
2127
2128 /*
2129  * Function smsc_superio_paged (chip, base, type)
2130  *
2131  *    Try  to get configuration of a smc SuperIO chip with paged register model
2132  *
2133  */
2134 static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type)
2135 {
2136         unsigned short fir_io, sir_io;
2137         int ret = -ENODEV;
2138
2139         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2140
2141         if (smsc_ircc_probe(cfg_base, 0x20, chips, type) == NULL)
2142                 return ret;
2143
2144         /* Select logical device (UART2) */
2145         outb(0x07, cfg_base);
2146         outb(0x05, cfg_base + 1);
2147
2148         /* SIR iobase */
2149         outb(0x60, cfg_base);
2150         sir_io = inb(cfg_base + 1) << 8;
2151         outb(0x61, cfg_base);
2152         sir_io |= inb(cfg_base + 1);
2153
2154         /* Read FIR base */
2155         outb(0x62, cfg_base);
2156         fir_io = inb(cfg_base + 1) << 8;
2157         outb(0x63, cfg_base);
2158         fir_io |= inb(cfg_base + 1);
2159         outb(0x2b, cfg_base); /* ??? */
2160
2161         if (fir_io && smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0)
2162                 ret = 0;
2163
2164         /* Exit configuration */
2165         outb(SMSCSIO_CFGEXITKEY, cfg_base);
2166
2167         return ret;
2168 }
2169
2170
2171 static int __init smsc_access(unsigned short cfg_base, unsigned char reg)
2172 {
2173         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2174
2175         outb(reg, cfg_base);
2176         return inb(cfg_base) != reg ? -1 : 0;
2177 }
2178
2179 static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type)
2180 {
2181         u8 devid, xdevid, rev;
2182
2183         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2184
2185         /* Leave configuration */
2186
2187         outb(SMSCSIO_CFGEXITKEY, cfg_base);
2188
2189         if (inb(cfg_base) == SMSCSIO_CFGEXITKEY)        /* not a smc superio chip */
2190                 return NULL;
2191
2192         outb(reg, cfg_base);
2193
2194         xdevid = inb(cfg_base + 1);
2195
2196         /* Enter configuration */
2197
2198         outb(SMSCSIO_CFGACCESSKEY, cfg_base);
2199
2200         #if 0
2201         if (smsc_access(cfg_base,0x55)) /* send second key and check */
2202                 return NULL;
2203         #endif
2204
2205         /* probe device ID */
2206
2207         if (smsc_access(cfg_base, reg))
2208                 return NULL;
2209
2210         devid = inb(cfg_base + 1);
2211
2212         if (devid == 0 || devid == 0xff)        /* typical values for unused port */
2213                 return NULL;
2214
2215         /* probe revision ID */
2216
2217         if (smsc_access(cfg_base, reg + 1))
2218                 return NULL;
2219
2220         rev = inb(cfg_base + 1);
2221
2222         if (rev >= 128)                 /* i think this will make no sense */
2223                 return NULL;
2224
2225         if (devid == xdevid)            /* protection against false positives */
2226                 return NULL;
2227
2228         /* Check for expected device ID; are there others? */
2229
2230         while (chip->devid != devid) {
2231
2232                 chip++;
2233
2234                 if (chip->name == NULL)
2235                         return NULL;
2236         }
2237
2238         IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",
2239                      devid, rev, cfg_base, type, chip->name);
2240
2241         if (chip->rev > rev) {
2242                 IRDA_MESSAGE("Revision higher than expected\n");
2243                 return NULL;
2244         }
2245
2246         if (chip->flags & NoIRDA)
2247                 IRDA_MESSAGE("chipset does not support IRDA\n");
2248
2249         return chip;
2250 }
2251
2252 static int __init smsc_superio_fdc(unsigned short cfg_base)
2253 {
2254         int ret = -1;
2255
2256         if (!request_region(cfg_base, 2, driver_name)) {
2257                 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2258                              __FUNCTION__, cfg_base);
2259         } else {
2260                 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, "FDC") ||
2261                     !smsc_superio_paged(fdc_chips_paged, cfg_base, "FDC"))
2262                         ret =  0;
2263
2264                 release_region(cfg_base, 2);
2265         }
2266
2267         return ret;
2268 }
2269
2270 static int __init smsc_superio_lpc(unsigned short cfg_base)
2271 {
2272         int ret = -1;
2273
2274         if (!request_region(cfg_base, 2, driver_name)) {
2275                 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2276                              __FUNCTION__, cfg_base);
2277         } else {
2278                 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, "LPC") ||
2279                     !smsc_superio_paged(lpc_chips_paged, cfg_base, "LPC"))
2280                         ret = 0;
2281
2282                 release_region(cfg_base, 2);
2283         }
2284         return ret;
2285 }
2286
2287 /************************************************
2288  *
2289  * Transceivers specific functions
2290  *
2291  ************************************************/
2292
2293
2294 /*
2295  * Function smsc_ircc_set_transceiver_smsc_ircc_atc(fir_base, speed)
2296  *
2297  *    Program transceiver through smsc-ircc ATC circuitry
2298  *
2299  */
2300
2301 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed)
2302 {
2303         unsigned long jiffies_now, jiffies_timeout;
2304         u8 val;
2305
2306         jiffies_now = jiffies;
2307         jiffies_timeout = jiffies + SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES;
2308
2309         /* ATC */
2310         register_bank(fir_base, 4);
2311         outb((inb(fir_base + IRCC_ATC) & IRCC_ATC_MASK) | IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE,
2312              fir_base + IRCC_ATC);
2313
2314         while ((val = (inb(fir_base + IRCC_ATC) & IRCC_ATC_nPROGREADY)) &&
2315                 !time_after(jiffies, jiffies_timeout))
2316                 /* empty */;
2317
2318         if (val)
2319                 IRDA_WARNING("%s(): ATC: 0x%02x\n", __FUNCTION__,
2320                              inb(fir_base + IRCC_ATC));
2321 }
2322
2323 /*
2324  * Function smsc_ircc_probe_transceiver_smsc_ircc_atc(fir_base)
2325  *
2326  *    Probe transceiver smsc-ircc ATC circuitry
2327  *
2328  */
2329
2330 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base)
2331 {
2332         return 0;
2333 }
2334
2335 /*
2336  * Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed)
2337  *
2338  *    Set transceiver
2339  *
2340  */
2341
2342 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
2343 {
2344         u8 fast_mode;
2345
2346         switch (speed) {
2347         default:
2348         case 576000 :
2349                 fast_mode = 0;
2350                 break;
2351         case 1152000 :
2352         case 4000000 :
2353                 fast_mode = IRCC_LCR_A_FAST;
2354                 break;
2355         }
2356         register_bank(fir_base, 0);
2357         outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2358 }
2359
2360 /*
2361  * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
2362  *
2363  *    Probe transceiver
2364  *
2365  */
2366
2367 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base)
2368 {
2369         return 0;
2370 }
2371
2372 /*
2373  * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
2374  *
2375  *    Set transceiver
2376  *
2377  */
2378
2379 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2380 {
2381         u8 fast_mode;
2382
2383         switch (speed) {
2384         default:
2385         case 576000 :
2386                 fast_mode = 0;
2387                 break;
2388         case 1152000 :
2389         case 4000000 :
2390                 fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA;
2391                 break;
2392
2393         }
2394         /* This causes an interrupt */
2395         register_bank(fir_base, 0);
2396         outb((inb(fir_base + IRCC_LCR_A) &  0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2397 }
2398
2399 /*
2400  * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
2401  *
2402  *    Probe transceiver
2403  *
2404  */
2405
2406 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base)
2407 {
2408         return 0;
2409 }
2410
2411
2412 module_init(smsc_ircc_init);
2413 module_exit(smsc_ircc_cleanup);