drivers/net/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/tcp.h>
  35 #include <linux/ipv6.h>
  36 #include <net/checksum.h>
  37 #include <net/ip6_checksum.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if_vlan.h>
  41 #include <linux/pci.h>
  42 #include <linux/delay.h>
  43 #include <linux/interrupt.h>
  44 #include <linux/if_ether.h>
  45
  46 #include "igb.h"
  47
  48 #define DRV_VERSION "1.0.8-k2"
  49 char igb_driver_name[] = "igb";
  50 char igb_driver_version[] = DRV_VERSION;
  51 static const char igb_driver_string[] =
  52                                 "Intel(R) Gigabit Ethernet Network Driver";
  53 static const char igb_copyright[] = "Copyright (c) 2007 Intel Corporation.";
  54
  55
  56 static const struct e1000_info *igb_info_tbl[] = {
  57         [board_82575] = &e1000_82575_info,
  58 };
  59
  60 static struct pci_device_id igb_pci_tbl[] = {
  61         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  64         /* required last entry */
  65         {0, }
  66 };
  67
  68 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
  69
  70 void igb_reset(struct igb_adapter *);
  71 static int igb_setup_all_tx_resources(struct igb_adapter *);
  72 static int igb_setup_all_rx_resources(struct igb_adapter *);
  73 static void igb_free_all_tx_resources(struct igb_adapter *);
  74 static void igb_free_all_rx_resources(struct igb_adapter *);
  75 static void igb_free_tx_resources(struct igb_adapter *, struct igb_ring *);
  76 static void igb_free_rx_resources(struct igb_adapter *, struct igb_ring *);
  77 void igb_update_stats(struct igb_adapter *);
  78 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
  79 static void __devexit igb_remove(struct pci_dev *pdev);
  80 static int igb_sw_init(struct igb_adapter *);
  81 static int igb_open(struct net_device *);
  82 static int igb_close(struct net_device *);
  83 static void igb_configure_tx(struct igb_adapter *);
  84 static void igb_configure_rx(struct igb_adapter *);
  85 static void igb_setup_rctl(struct igb_adapter *);
  86 static void igb_clean_all_tx_rings(struct igb_adapter *);
  87 static void igb_clean_all_rx_rings(struct igb_adapter *);
  88 static void igb_clean_tx_ring(struct igb_adapter *, struct igb_ring *);
  89 static void igb_clean_rx_ring(struct igb_adapter *, struct igb_ring *);
  90 static void igb_set_multi(struct net_device *);
  91 static void igb_update_phy_info(unsigned long);
  92 static void igb_watchdog(unsigned long);
  93 static void igb_watchdog_task(struct work_struct *);
  94 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
  95                                   struct igb_ring *);
  96 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
  97 static struct net_device_stats *igb_get_stats(struct net_device *);
  98 static int igb_change_mtu(struct net_device *, int);
  99 static int igb_set_mac(struct net_device *, void *);
 100 static irqreturn_t igb_intr(int irq, void *);
 101 static irqreturn_t igb_intr_msi(int irq, void *);
 102 static irqreturn_t igb_msix_other(int irq, void *);
 103 static irqreturn_t igb_msix_rx(int irq, void *);
 104 static irqreturn_t igb_msix_tx(int irq, void *);
 105 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
 106 static bool igb_clean_tx_irq(struct igb_adapter *, struct igb_ring *);
 107 static int igb_clean(struct napi_struct *, int);
 108 static bool igb_clean_rx_irq_adv(struct igb_adapter *,
 109                                  struct igb_ring *, int *, int);
 110 static void igb_alloc_rx_buffers_adv(struct igb_adapter *,
 111                                      struct igb_ring *, int);
 112 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 113 static void igb_tx_timeout(struct net_device *);
 114 static void igb_reset_task(struct work_struct *);
 115 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
 116 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 117 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 118 static void igb_restore_vlan(struct igb_adapter *);
 119
 120 static int igb_suspend(struct pci_dev *, pm_message_t);
 121 #ifdef CONFIG_PM
 122 static int igb_resume(struct pci_dev *);
 123 #endif
 124 static void igb_shutdown(struct pci_dev *);
 125
 126 #ifdef CONFIG_NET_POLL_CONTROLLER
 127 /* for netdump / net console */
 128 static void igb_netpoll(struct net_device *);
 129 #endif
 130
 131 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 132                      pci_channel_state_t);
 133 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 134 static void igb_io_resume(struct pci_dev *);
 135
 136 static struct pci_error_handlers igb_err_handler = {
 137         .error_detected = igb_io_error_detected,
 138         .slot_reset = igb_io_slot_reset,
 139         .resume = igb_io_resume,
 140 };
 141
 142
 143 static struct pci_driver igb_driver = {
 144         .name     = igb_driver_name,
 145         .id_table = igb_pci_tbl,
 146         .probe    = igb_probe,
 147         .remove   = __devexit_p(igb_remove),
 148 #ifdef CONFIG_PM
 149         /* Power Managment Hooks */
 150         .suspend  = igb_suspend,
 151         .resume   = igb_resume,
 152 #endif
 153         .shutdown = igb_shutdown,
 154         .err_handler = &igb_err_handler
 155 };
 156
 157 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 158 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 159 MODULE_LICENSE("GPL");
 160 MODULE_VERSION(DRV_VERSION);
 161
 162 #ifdef DEBUG
 163 /**
 164  * igb_get_hw_dev_name - return device name string
 165  * used by hardware layer to print debugging information
 166  **/
 167 char *igb_get_hw_dev_name(struct e1000_hw *hw)
 168 {
 169         struct igb_adapter *adapter = hw->back;
 170         return adapter->netdev->name;
 171 }
 172 #endif
 173
 174 /**
 175  * igb_init_module - Driver Registration Routine
 176  *
 177  * igb_init_module is the first routine called when the driver is
 178  * loaded. All it does is register with the PCI subsystem.
 179  **/
 180 static int __init igb_init_module(void)
 181 {
 182         int ret;
 183         printk(KERN_INFO "%s - version %s\n",
 184                igb_driver_string, igb_driver_version);
 185
 186         printk(KERN_INFO "%s\n", igb_copyright);
 187
 188         ret = pci_register_driver(&igb_driver);
 189         return ret;
 190 }
 191
 192 module_init(igb_init_module);
 193
 194 /**
 195  * igb_exit_module - Driver Exit Cleanup Routine
 196  *
 197  * igb_exit_module is called just before the driver is removed
 198  * from memory.
 199  **/
 200 static void __exit igb_exit_module(void)
 201 {
 202         pci_unregister_driver(&igb_driver);
 203 }
 204
 205 module_exit(igb_exit_module);
 206
 207 /**
 208  * igb_alloc_queues - Allocate memory for all rings
 209  * @adapter: board private structure to initialize
 210  *
 211  * We allocate one ring per queue at run-time since we don't know the
 212  * number of queues at compile-time.
 213  **/
 214 static int igb_alloc_queues(struct igb_adapter *adapter)
 215 {
 216         int i;
 217
 218         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
 219                                    sizeof(struct igb_ring), GFP_KERNEL);
 220         if (!adapter->tx_ring)
 221                 return -ENOMEM;
 222
 223         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
 224                                    sizeof(struct igb_ring), GFP_KERNEL);
 225         if (!adapter->rx_ring) {
 226                 kfree(adapter->tx_ring);
 227                 return -ENOMEM;
 228         }
 229
 230         for (i = 0; i < adapter->num_rx_queues; i++) {
 231                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 232                 ring->adapter = adapter;
 233                 ring->itr_register = E1000_ITR;
 234
 235                 if (!ring->napi.poll)
 236                         netif_napi_add(adapter->netdev, &ring->napi, igb_clean,
 237                                        adapter->napi.weight /
 238                                        adapter->num_rx_queues);
 239         }
 240         return 0;
 241 }
 242
 243 #define IGB_N0_QUEUE -1
 244 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
 245                               int tx_queue, int msix_vector)
 246 {
 247         u32 msixbm = 0;
 248         struct e1000_hw *hw = &adapter->hw;
 249                 /* The 82575 assigns vectors using a bitmask, which matches the
 250                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 251                    or more queues to a vector, we write the appropriate bits
 252                    into the MSIXBM register for that vector. */
 253                 if (rx_queue > IGB_N0_QUEUE) {
 254                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 255                         adapter->rx_ring[rx_queue].eims_value = msixbm;
 256                 }
 257                 if (tx_queue > IGB_N0_QUEUE) {
 258                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 259                         adapter->tx_ring[tx_queue].eims_value =
 260                                   E1000_EICR_TX_QUEUE0 << tx_queue;
 261                 }
 262                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 263 }
 264
 265 /**
 266  * igb_configure_msix - Configure MSI-X hardware
 267  *
 268  * igb_configure_msix sets up the hardware to properly
 269  * generate MSI-X interrupts.
 270  **/
 271 static void igb_configure_msix(struct igb_adapter *adapter)
 272 {
 273         u32 tmp;
 274         int i, vector = 0;
 275         struct e1000_hw *hw = &adapter->hw;
 276
 277         adapter->eims_enable_mask = 0;
 278
 279         for (i = 0; i < adapter->num_tx_queues; i++) {
 280                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
 281                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
 282                 adapter->eims_enable_mask |= tx_ring->eims_value;
 283                 if (tx_ring->itr_val)
 284                         writel(1000000000 / (tx_ring->itr_val * 256),
 285                                hw->hw_addr + tx_ring->itr_register);
 286                 else
 287                         writel(1, hw->hw_addr + tx_ring->itr_register);
 288         }
 289
 290         for (i = 0; i < adapter->num_rx_queues; i++) {
 291                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
 292                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
 293                 adapter->eims_enable_mask |= rx_ring->eims_value;
 294                 if (rx_ring->itr_val)
 295                         writel(1000000000 / (rx_ring->itr_val * 256),
 296                                hw->hw_addr + rx_ring->itr_register);
 297                 else
 298                         writel(1, hw->hw_addr + rx_ring->itr_register);
 299         }
 300
 301
 302         /* set vector for other causes, i.e. link changes */
 303                 array_wr32(E1000_MSIXBM(0), vector++,
 304                                       E1000_EIMS_OTHER);
 305
 306                 /* disable IAM for ICR interrupt bits */
 307                 wr32(E1000_IAM, 0);
 308
 309                 tmp = rd32(E1000_CTRL_EXT);
 310                 /* enable MSI-X PBA support*/
 311                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 312
 313                 /* Auto-Mask interrupts upon ICR read. */
 314                 tmp |= E1000_CTRL_EXT_EIAME;
 315                 tmp |= E1000_CTRL_EXT_IRCA;
 316
 317                 wr32(E1000_CTRL_EXT, tmp);
 318                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
 319
 320         wrfl();
 321 }
 322
 323 /**
 324  * igb_request_msix - Initialize MSI-X interrupts
 325  *
 326  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 327  * kernel.
 328  **/
 329 static int igb_request_msix(struct igb_adapter *adapter)
 330 {
 331         struct net_device *netdev = adapter->netdev;
 332         int i, err = 0, vector = 0;
 333
 334         vector = 0;
 335
 336         for (i = 0; i < adapter->num_tx_queues; i++) {
 337                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 338                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
 339                 err = request_irq(adapter->msix_entries[vector].vector,
 340                                   &igb_msix_tx, 0, ring->name,
 341                                   &(adapter->tx_ring[i]));
 342                 if (err)
 343                         goto out;
 344                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 345                 ring->itr_val = adapter->itr;
 346                 vector++;
 347         }
 348         for (i = 0; i < adapter->num_rx_queues; i++) {
 349                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 350                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
 351                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
 352                 else
 353                         memcpy(ring->name, netdev->name, IFNAMSIZ);
 354                 err = request_irq(adapter->msix_entries[vector].vector,
 355                                   &igb_msix_rx, 0, ring->name,
 356                                   &(adapter->rx_ring[i]));
 357                 if (err)
 358                         goto out;
 359                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 360                 ring->itr_val = adapter->itr;
 361                 vector++;
 362         }
 363
 364         err = request_irq(adapter->msix_entries[vector].vector,
 365                           &igb_msix_other, 0, netdev->name, netdev);
 366         if (err)
 367                 goto out;
 368
 369         adapter->napi.poll = igb_clean_rx_ring_msix;
 370         for (i = 0; i < adapter->num_rx_queues; i++)
 371                 adapter->rx_ring[i].napi.poll = adapter->napi.poll;
 372         igb_configure_msix(adapter);
 373         return 0;
 374 out:
 375         return err;
 376 }
 377
 378 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 379 {
 380         if (adapter->msix_entries) {
 381                 pci_disable_msix(adapter->pdev);
 382                 kfree(adapter->msix_entries);
 383                 adapter->msix_entries = NULL;
 384         } else if (adapter->msi_enabled)
 385                 pci_disable_msi(adapter->pdev);
 386         return;
 387 }
 388
 389
 390 /**
 391  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 392  *
 393  * Attempt to configure interrupts using the best available
 394  * capabilities of the hardware and kernel.
 395  **/
 396 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
 397 {
 398         int err;
 399         int numvecs, i;
 400
 401         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
 402         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
 403                                         GFP_KERNEL);
 404         if (!adapter->msix_entries)
 405                 goto msi_only;
 406
 407         for (i = 0; i < numvecs; i++)
 408                 adapter->msix_entries[i].entry = i;
 409
 410         err = pci_enable_msix(adapter->pdev,
 411                               adapter->msix_entries,
 412                               numvecs);
 413         if (err == 0)
 414                 return;
 415
 416         igb_reset_interrupt_capability(adapter);
 417
 418         /* If we can't do MSI-X, try MSI */
 419 msi_only:
 420         adapter->num_rx_queues = 1;
 421         if (!pci_enable_msi(adapter->pdev))
 422                 adapter->msi_enabled = 1;
 423         return;
 424 }
 425
 426 /**
 427  * igb_request_irq - initialize interrupts
 428  *
 429  * Attempts to configure interrupts using the best available
 430  * capabilities of the hardware and kernel.
 431  **/
 432 static int igb_request_irq(struct igb_adapter *adapter)
 433 {
 434         struct net_device *netdev = adapter->netdev;
 435         struct e1000_hw *hw = &adapter->hw;
 436         int err = 0;
 437
 438         if (adapter->msix_entries) {
 439                 err = igb_request_msix(adapter);
 440                 if (!err) {
 441                         /* enable IAM, auto-mask,
 442                          * DO NOT USE EIAM or IAM in legacy mode */
 443                         wr32(E1000_IAM, IMS_ENABLE_MASK);
 444                         goto request_done;
 445                 }
 446                 /* fall back to MSI */
 447                 igb_reset_interrupt_capability(adapter);
 448                 if (!pci_enable_msi(adapter->pdev))
 449                         adapter->msi_enabled = 1;
 450                 igb_free_all_tx_resources(adapter);
 451                 igb_free_all_rx_resources(adapter);
 452                 adapter->num_rx_queues = 1;
 453                 igb_alloc_queues(adapter);
 454         }
 455         if (adapter->msi_enabled) {
 456                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
 457                                   netdev->name, netdev);
 458                 if (!err)
 459                         goto request_done;
 460                 /* fall back to legacy interrupts */
 461                 igb_reset_interrupt_capability(adapter);
 462                 adapter->msi_enabled = 0;
 463         }
 464
 465         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
 466                           netdev->name, netdev);
 467
 468         if (err)
 469                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
 470                         err);
 471
 472 request_done:
 473         return err;
 474 }
 475
 476 static void igb_free_irq(struct igb_adapter *adapter)
 477 {
 478         struct net_device *netdev = adapter->netdev;
 479
 480         if (adapter->msix_entries) {
 481                 int vector = 0, i;
 482
 483                 for (i = 0; i < adapter->num_tx_queues; i++)
 484                         free_irq(adapter->msix_entries[vector++].vector,
 485                                 &(adapter->tx_ring[i]));
 486                 for (i = 0; i < adapter->num_rx_queues; i++)
 487                         free_irq(adapter->msix_entries[vector++].vector,
 488                                 &(adapter->rx_ring[i]));
 489
 490                 free_irq(adapter->msix_entries[vector++].vector, netdev);
 491                 return;
 492         }
 493
 494         free_irq(adapter->pdev->irq, netdev);
 495 }
 496
 497 /**
 498  * igb_irq_disable - Mask off interrupt generation on the NIC
 499  * @adapter: board private structure
 500  **/
 501 static void igb_irq_disable(struct igb_adapter *adapter)
 502 {
 503         struct e1000_hw *hw = &adapter->hw;
 504
 505         if (adapter->msix_entries) {
 506                 wr32(E1000_EIMC, ~0);
 507                 wr32(E1000_EIAC, 0);
 508         }
 509         wr32(E1000_IMC, ~0);
 510         wrfl();
 511         synchronize_irq(adapter->pdev->irq);
 512 }
 513
 514 /**
 515  * igb_irq_enable - Enable default interrupt generation settings
 516  * @adapter: board private structure
 517  **/
 518 static void igb_irq_enable(struct igb_adapter *adapter)
 519 {
 520         struct e1000_hw *hw = &adapter->hw;
 521
 522         if (adapter->msix_entries) {
 523                 wr32(E1000_EIMS,
 524                                 adapter->eims_enable_mask);
 525                 wr32(E1000_EIAC,
 526                                 adapter->eims_enable_mask);
 527                 wr32(E1000_IMS, E1000_IMS_LSC);
 528         } else
 529         wr32(E1000_IMS, IMS_ENABLE_MASK);
 530 }
 531
 532 static void igb_update_mng_vlan(struct igb_adapter *adapter)
 533 {
 534         struct net_device *netdev = adapter->netdev;
 535         u16 vid = adapter->hw.mng_cookie.vlan_id;
 536         u16 old_vid = adapter->mng_vlan_id;
 537         if (adapter->vlgrp) {
 538                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
 539                         if (adapter->hw.mng_cookie.status &
 540                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
 541                                 igb_vlan_rx_add_vid(netdev, vid);
 542                                 adapter->mng_vlan_id = vid;
 543                         } else
 544                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
 545
 546                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
 547                                         (vid != old_vid) &&
 548                             !vlan_group_get_device(adapter->vlgrp, old_vid))
 549                                 igb_vlan_rx_kill_vid(netdev, old_vid);
 550                 } else
 551                         adapter->mng_vlan_id = vid;
 552         }
 553 }
 554
 555 /**
 556  * igb_release_hw_control - release control of the h/w to f/w
 557  * @adapter: address of board private structure
 558  *
 559  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
 560  * For ASF and Pass Through versions of f/w this means that the
 561  * driver is no longer loaded.
 562  *
 563  **/
 564 static void igb_release_hw_control(struct igb_adapter *adapter)
 565 {
 566         struct e1000_hw *hw = &adapter->hw;
 567         u32 ctrl_ext;
 568
 569         /* Let firmware take over control of h/w */
 570         ctrl_ext = rd32(E1000_CTRL_EXT);
 571         wr32(E1000_CTRL_EXT,
 572                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
 573 }
 574
 575
 576 /**
 577  * igb_get_hw_control - get control of the h/w from f/w
 578  * @adapter: address of board private structure
 579  *
 580  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
 581  * For ASF and Pass Through versions of f/w this means that
 582  * the driver is loaded.
 583  *
 584  **/
 585 static void igb_get_hw_control(struct igb_adapter *adapter)
 586 {
 587         struct e1000_hw *hw = &adapter->hw;
 588         u32 ctrl_ext;
 589
 590         /* Let firmware know the driver has taken over */
 591         ctrl_ext = rd32(E1000_CTRL_EXT);
 592         wr32(E1000_CTRL_EXT,
 593                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
 594 }
 595
 596 static void igb_init_manageability(struct igb_adapter *adapter)
 597 {
 598         struct e1000_hw *hw = &adapter->hw;
 599
 600         if (adapter->en_mng_pt) {
 601                 u32 manc2h = rd32(E1000_MANC2H);
 602                 u32 manc = rd32(E1000_MANC);
 603
 604                 /* enable receiving management packets to the host */
 605                 /* this will probably generate destination unreachable messages
 606                  * from the host OS, but the packets will be handled on SMBUS */
 607                 manc |= E1000_MANC_EN_MNG2HOST;
 608 #define E1000_MNG2HOST_PORT_623 (1 << 5)
 609 #define E1000_MNG2HOST_PORT_664 (1 << 6)
 610                 manc2h |= E1000_MNG2HOST_PORT_623;
 611                 manc2h |= E1000_MNG2HOST_PORT_664;
 612                 wr32(E1000_MANC2H, manc2h);
 613
 614                 wr32(E1000_MANC, manc);
 615         }
 616 }
 617
 618 /**
 619  * igb_configure - configure the hardware for RX and TX
 620  * @adapter: private board structure
 621  **/
 622 static void igb_configure(struct igb_adapter *adapter)
 623 {
 624         struct net_device *netdev = adapter->netdev;
 625         int i;
 626
 627         igb_get_hw_control(adapter);
 628         igb_set_multi(netdev);
 629
 630         igb_restore_vlan(adapter);
 631         igb_init_manageability(adapter);
 632
 633         igb_configure_tx(adapter);
 634         igb_setup_rctl(adapter);
 635         igb_configure_rx(adapter);
 636         /* call IGB_DESC_UNUSED which always leaves
 637          * at least 1 descriptor unused to make sure
 638          * next_to_use != next_to_clean */
 639         for (i = 0; i < adapter->num_rx_queues; i++) {
 640                 struct igb_ring *ring = &adapter->rx_ring[i];
 641                 igb_alloc_rx_buffers_adv(adapter, ring, IGB_DESC_UNUSED(ring));
 642         }
 643
 644
 645         adapter->tx_queue_len = netdev->tx_queue_len;
 646 }
 647
 648
 649 /**
 650  * igb_up - Open the interface and prepare it to handle traffic
 651  * @adapter: board private structure
 652  **/
 653
 654 int igb_up(struct igb_adapter *adapter)
 655 {
 656         struct e1000_hw *hw = &adapter->hw;
 657         int i;
 658
 659         /* hardware has been reset, we need to reload some things */
 660         igb_configure(adapter);
 661
 662         clear_bit(__IGB_DOWN, &adapter->state);
 663
 664         napi_enable(&adapter->napi);
 665
 666         if (adapter->msix_entries) {
 667                 for (i = 0; i < adapter->num_rx_queues; i++)
 668                         napi_enable(&adapter->rx_ring[i].napi);
 669                 igb_configure_msix(adapter);
 670         }
 671
 672         /* Clear any pending interrupts. */
 673         rd32(E1000_ICR);
 674         igb_irq_enable(adapter);
 675
 676         /* Fire a link change interrupt to start the watchdog. */
 677         wr32(E1000_ICS, E1000_ICS_LSC);
 678         return 0;
 679 }
 680
 681 void igb_down(struct igb_adapter *adapter)
 682 {
 683         struct e1000_hw *hw = &adapter->hw;
 684         struct net_device *netdev = adapter->netdev;
 685         u32 tctl, rctl;
 686         int i;
 687
 688         /* signal that we're down so the interrupt handler does not
 689          * reschedule our watchdog timer */
 690         set_bit(__IGB_DOWN, &adapter->state);
 691
 692         /* disable receives in the hardware */
 693         rctl = rd32(E1000_RCTL);
 694         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
 695         /* flush and sleep below */
 696
 697         netif_stop_queue(netdev);
 698
 699         /* disable transmits in the hardware */
 700         tctl = rd32(E1000_TCTL);
 701         tctl &= ~E1000_TCTL_EN;
 702         wr32(E1000_TCTL, tctl);
 703         /* flush both disables and wait for them to finish */
 704         wrfl();
 705         msleep(10);
 706
 707         napi_disable(&adapter->napi);
 708
 709         if (adapter->msix_entries)
 710                 for (i = 0; i < adapter->num_rx_queues; i++)
 711                         napi_disable(&adapter->rx_ring[i].napi);
 712         igb_irq_disable(adapter);
 713
 714         del_timer_sync(&adapter->watchdog_timer);
 715         del_timer_sync(&adapter->phy_info_timer);
 716
 717         netdev->tx_queue_len = adapter->tx_queue_len;
 718         netif_carrier_off(netdev);
 719         adapter->link_speed = 0;
 720         adapter->link_duplex = 0;
 721
 722         igb_reset(adapter);
 723         igb_clean_all_tx_rings(adapter);
 724         igb_clean_all_rx_rings(adapter);
 725 }
 726
 727 void igb_reinit_locked(struct igb_adapter *adapter)
 728 {
 729         WARN_ON(in_interrupt());
 730         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 731                 msleep(1);
 732         igb_down(adapter);
 733         igb_up(adapter);
 734         clear_bit(__IGB_RESETTING, &adapter->state);
 735 }
 736
 737 void igb_reset(struct igb_adapter *adapter)
 738 {
 739         struct e1000_hw *hw = &adapter->hw;
 740         struct e1000_fc_info *fc = &adapter->hw.fc;
 741         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
 742         u16 hwm;
 743
 744         /* Repartition Pba for greater than 9k mtu
 745          * To take effect CTRL.RST is required.
 746          */
 747         pba = E1000_PBA_34K;
 748
 749         if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
 750                 /* adjust PBA for jumbo frames */
 751                 wr32(E1000_PBA, pba);
 752
 753                 /* To maintain wire speed transmits, the Tx FIFO should be
 754                  * large enough to accommodate two full transmit packets,
 755                  * rounded up to the next 1KB and expressed in KB.  Likewise,
 756                  * the Rx FIFO should be large enough to accommodate at least
 757                  * one full receive packet and is similarly rounded up and
 758                  * expressed in KB. */
 759                 pba = rd32(E1000_PBA);
 760                 /* upper 16 bits has Tx packet buffer allocation size in KB */
 761                 tx_space = pba >> 16;
 762                 /* lower 16 bits has Rx packet buffer allocation size in KB */
 763                 pba &= 0xffff;
 764                 /* the tx fifo also stores 16 bytes of information about the tx
 765                  * but don't include ethernet FCS because hardware appends it */
 766                 min_tx_space = (adapter->max_frame_size +
 767                                 sizeof(struct e1000_tx_desc) -
 768                                 ETH_FCS_LEN) * 2;
 769                 min_tx_space = ALIGN(min_tx_space, 1024);
 770                 min_tx_space >>= 10;
 771                 /* software strips receive CRC, so leave room for it */
 772                 min_rx_space = adapter->max_frame_size;
 773                 min_rx_space = ALIGN(min_rx_space, 1024);
 774                 min_rx_space >>= 10;
 775
 776                 /* If current Tx allocation is less than the min Tx FIFO size,
 777                  * and the min Tx FIFO size is less than the current Rx FIFO
 778                  * allocation, take space away from current Rx allocation */
 779                 if (tx_space < min_tx_space &&
 780                     ((min_tx_space - tx_space) < pba)) {
 781                         pba = pba - (min_tx_space - tx_space);
 782
 783                         /* if short on rx space, rx wins and must trump tx
 784                          * adjustment */
 785                         if (pba < min_rx_space)
 786                                 pba = min_rx_space;
 787                 }
 788         }
 789         wr32(E1000_PBA, pba);
 790
 791         /* flow control settings */
 792         /* The high water mark must be low enough to fit one full frame
 793          * (or the size used for early receive) above it in the Rx FIFO.
 794          * Set it to the lower of:
 795          * - 90% of the Rx FIFO size, or
 796          * - the full Rx FIFO size minus one full frame */
 797         hwm = min(((pba << 10) * 9 / 10),
 798                   ((pba << 10) - adapter->max_frame_size));
 799
 800         fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
 801         fc->low_water = fc->high_water - 8;
 802         fc->pause_time = 0xFFFF;
 803         fc->send_xon = 1;
 804         fc->type = fc->original_type;
 805
 806         /* Allow time for pending master requests to run */
 807         adapter->hw.mac.ops.reset_hw(&adapter->hw);
 808         wr32(E1000_WUC, 0);
 809
 810         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
 811                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
 812
 813         igb_update_mng_vlan(adapter);
 814
 815         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
 816         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
 817
 818         igb_reset_adaptive(&adapter->hw);
 819         if (adapter->hw.phy.ops.get_phy_info)
 820                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
 821 }
 822
 823 /**
 824  * igb_probe - Device Initialization Routine
 825  * @pdev: PCI device information struct
 826  * @ent: entry in igb_pci_tbl
 827  *
 828  * Returns 0 on success, negative on failure
 829  *
 830  * igb_probe initializes an adapter identified by a pci_dev structure.
 831  * The OS initialization, configuring of the adapter private structure,
 832  * and a hardware reset occur.
 833  **/
 834 static int __devinit igb_probe(struct pci_dev *pdev,
 835                                const struct pci_device_id *ent)
 836 {
 837         struct net_device *netdev;
 838         struct igb_adapter *adapter;
 839         struct e1000_hw *hw;
 840         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
 841         unsigned long mmio_start, mmio_len;
 842         static int cards_found;
 843         int i, err, pci_using_dac;
 844         u16 eeprom_data = 0;
 845         u16 eeprom_apme_mask = IGB_EEPROM_APME;
 846         u32 part_num;
 847
 848         err = pci_enable_device(pdev);
 849         if (err)
 850                 return err;
 851
 852         pci_using_dac = 0;
 853         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 854         if (!err) {
 855                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 856                 if (!err)
 857                         pci_using_dac = 1;
 858         } else {
 859                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 860                 if (err) {
 861                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
 862                         if (err) {
 863                                 dev_err(&pdev->dev, "No usable DMA "
 864                                         "configuration, aborting\n");
 865                                 goto err_dma;
 866                         }
 867                 }
 868         }
 869
 870         err = pci_request_regions(pdev, igb_driver_name);
 871         if (err)
 872                 goto err_pci_reg;
 873
 874         pci_set_master(pdev);
 875
 876         err = -ENOMEM;
 877         netdev = alloc_etherdev(sizeof(struct igb_adapter));
 878         if (!netdev)
 879                 goto err_alloc_etherdev;
 880
 881         SET_NETDEV_DEV(netdev, &pdev->dev);
 882
 883         pci_set_drvdata(pdev, netdev);
 884         adapter = netdev_priv(netdev);
 885         adapter->netdev = netdev;
 886         adapter->pdev = pdev;
 887         hw = &adapter->hw;
 888         hw->back = adapter;
 889         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 890
 891         mmio_start = pci_resource_start(pdev, 0);
 892         mmio_len = pci_resource_len(pdev, 0);
 893
 894         err = -EIO;
 895         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
 896         if (!adapter->hw.hw_addr)
 897                 goto err_ioremap;
 898
 899         netdev->open = &igb_open;
 900         netdev->stop = &igb_close;
 901         netdev->get_stats = &igb_get_stats;
 902         netdev->set_multicast_list = &igb_set_multi;
 903         netdev->set_mac_address = &igb_set_mac;
 904         netdev->change_mtu = &igb_change_mtu;
 905         netdev->do_ioctl = &igb_ioctl;
 906         igb_set_ethtool_ops(netdev);
 907         netdev->tx_timeout = &igb_tx_timeout;
 908         netdev->watchdog_timeo = 5 * HZ;
 909         netif_napi_add(netdev, &adapter->napi, igb_clean, 64);
 910         netdev->vlan_rx_register = igb_vlan_rx_register;
 911         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
 912         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
 913 #ifdef CONFIG_NET_POLL_CONTROLLER
 914         netdev->poll_controller = igb_netpoll;
 915 #endif
 916         netdev->hard_start_xmit = &igb_xmit_frame_adv;
 917
 918         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
 919
 920         netdev->mem_start = mmio_start;
 921         netdev->mem_end = mmio_start + mmio_len;
 922
 923         adapter->bd_number = cards_found;
 924
 925         /* PCI config space info */
 926         hw->vendor_id = pdev->vendor;
 927         hw->device_id = pdev->device;
 928         hw->revision_id = pdev->revision;
 929         hw->subsystem_vendor_id = pdev->subsystem_vendor;
 930         hw->subsystem_device_id = pdev->subsystem_device;
 931
 932         /* setup the private structure */
 933         hw->back = adapter;
 934         /* Copy the default MAC, PHY and NVM function pointers */
 935         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
 936         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
 937         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
 938         /* Initialize skew-specific constants */
 939         err = ei->get_invariants(hw);
 940         if (err)
 941                 goto err_hw_init;
 942
 943         err = igb_sw_init(adapter);
 944         if (err)
 945                 goto err_sw_init;
 946
 947         igb_get_bus_info_pcie(hw);
 948
 949         hw->phy.autoneg_wait_to_complete = false;
 950         hw->mac.adaptive_ifs = true;
 951
 952         /* Copper options */
 953         if (hw->phy.media_type == e1000_media_type_copper) {
 954                 hw->phy.mdix = AUTO_ALL_MODES;
 955                 hw->phy.disable_polarity_correction = false;
 956                 hw->phy.ms_type = e1000_ms_hw_default;
 957         }
 958
 959         if (igb_check_reset_block(hw))
 960                 dev_info(&pdev->dev,
 961                         "PHY reset is blocked due to SOL/IDER session.\n");
 962
 963         netdev->features = NETIF_F_SG |
 964                            NETIF_F_HW_CSUM |
 965                            NETIF_F_HW_VLAN_TX |
 966                            NETIF_F_HW_VLAN_RX |
 967                            NETIF_F_HW_VLAN_FILTER;
 968
 969         netdev->features |= NETIF_F_TSO;
 970
 971         netdev->features |= NETIF_F_TSO6;
 972         if (pci_using_dac)
 973                 netdev->features |= NETIF_F_HIGHDMA;
 974
 975         netdev->features |= NETIF_F_LLTX;
 976         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
 977
 978         /* before reading the NVM, reset the controller to put the device in a
 979          * known good starting state */
 980         hw->mac.ops.reset_hw(hw);
 981
 982         /* make sure the NVM is good */
 983         if (igb_validate_nvm_checksum(hw) < 0) {
 984                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
 985                 err = -EIO;
 986                 goto err_eeprom;
 987         }
 988
 989         /* copy the MAC address out of the NVM */
 990         if (hw->mac.ops.read_mac_addr(hw))
 991                 dev_err(&pdev->dev, "NVM Read Error\n");
 992
 993         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
 994         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
 995
 996         if (!is_valid_ether_addr(netdev->perm_addr)) {
 997                 dev_err(&pdev->dev, "Invalid MAC Address\n");
 998                 err = -EIO;
 999                 goto err_eeprom;
1000         }
1001
1002         init_timer(&adapter->watchdog_timer);
1003         adapter->watchdog_timer.function = &igb_watchdog;
1004         adapter->watchdog_timer.data = (unsigned long) adapter;
1005
1006         init_timer(&adapter->phy_info_timer);
1007         adapter->phy_info_timer.function = &igb_update_phy_info;
1008         adapter->phy_info_timer.data = (unsigned long) adapter;
1009
1010         INIT_WORK(&adapter->reset_task, igb_reset_task);
1011         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1012
1013         /* Initialize link & ring properties that are user-changeable */
1014         adapter->tx_ring->count = 256;
1015         for (i = 0; i < adapter->num_tx_queues; i++)
1016                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1017         adapter->rx_ring->count = 256;
1018         for (i = 0; i < adapter->num_rx_queues; i++)
1019                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1020
1021         adapter->fc_autoneg = true;
1022         hw->mac.autoneg = true;
1023         hw->phy.autoneg_advertised = 0x2f;
1024
1025         hw->fc.original_type = e1000_fc_default;
1026         hw->fc.type = e1000_fc_default;
1027
1028         adapter->itr_setting = 3;
1029         adapter->itr = IGB_START_ITR;
1030
1031         igb_validate_mdi_setting(hw);
1032
1033         adapter->rx_csum = 1;
1034
1035         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1036          * enable the ACPI Magic Packet filter
1037          */
1038
1039         if (hw->bus.func == 0 ||
1040             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1041                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1042                                      &eeprom_data);
1043
1044         if (eeprom_data & eeprom_apme_mask)
1045                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1046
1047         /* now that we have the eeprom settings, apply the special cases where
1048          * the eeprom may be wrong or the board simply won't support wake on
1049          * lan on a particular port */
1050         switch (pdev->device) {
1051         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1052                 adapter->eeprom_wol = 0;
1053                 break;
1054         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1055                 /* Wake events only supported on port A for dual fiber
1056                  * regardless of eeprom setting */
1057                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1058                         adapter->eeprom_wol = 0;
1059                 break;
1060         }
1061
1062         /* initialize the wol settings based on the eeprom settings */
1063         adapter->wol = adapter->eeprom_wol;
1064
1065         /* reset the hardware with the new settings */
1066         igb_reset(adapter);
1067
1068         /* let the f/w know that the h/w is now under the control of the
1069          * driver. */
1070         igb_get_hw_control(adapter);
1071
1072         /* tell the stack to leave us alone until igb_open() is called */
1073         netif_carrier_off(netdev);
1074         netif_stop_queue(netdev);
1075
1076         strcpy(netdev->name, "eth%d");
1077         err = register_netdev(netdev);
1078         if (err)
1079                 goto err_register;
1080
1081         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1082         /* print bus type/speed/width info */
1083         dev_info(&pdev->dev,
1084                  "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1085                  netdev->name,
1086                  ((hw->bus.speed == e1000_bus_speed_2500)
1087                   ? "2.5Gb/s" : "unknown"),
1088                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1089                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1090                   ? "Width x1" : "unknown"),
1091                  netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1092                  netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1093
1094         igb_read_part_num(hw, &part_num);
1095         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1096                 (part_num >> 8), (part_num & 0xff));
1097
1098         dev_info(&pdev->dev,
1099                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1100                 adapter->msix_entries ? "MSI-X" :
1101                 adapter->msi_enabled ? "MSI" : "legacy",
1102                 adapter->num_rx_queues, adapter->num_tx_queues);
1103
1104         cards_found++;
1105         return 0;
1106
1107 err_register:
1108         igb_release_hw_control(adapter);
1109 err_eeprom:
1110         if (!igb_check_reset_block(hw))
1111                 hw->phy.ops.reset_phy(hw);
1112
1113         if (hw->flash_address)
1114                 iounmap(hw->flash_address);
1115
1116         igb_remove_device(hw);
1117         kfree(adapter->tx_ring);
1118         kfree(adapter->rx_ring);
1119 err_sw_init:
1120 err_hw_init:
1121         iounmap(hw->hw_addr);
1122 err_ioremap:
1123         free_netdev(netdev);
1124 err_alloc_etherdev:
1125         pci_release_regions(pdev);
1126 err_pci_reg:
1127 err_dma:
1128         pci_disable_device(pdev);
1129         return err;
1130 }
1131
1132 /**
1133  * igb_remove - Device Removal Routine
1134  * @pdev: PCI device information struct
1135  *
1136  * igb_remove is called by the PCI subsystem to alert the driver
1137  * that it should release a PCI device.  The could be caused by a
1138  * Hot-Plug event, or because the driver is going to be removed from
1139  * memory.
1140  **/
1141 static void __devexit igb_remove(struct pci_dev *pdev)
1142 {
1143         struct net_device *netdev = pci_get_drvdata(pdev);
1144         struct igb_adapter *adapter = netdev_priv(netdev);
1145
1146         /* flush_scheduled work may reschedule our watchdog task, so
1147          * explicitly disable watchdog tasks from being rescheduled  */
1148         set_bit(__IGB_DOWN, &adapter->state);
1149         del_timer_sync(&adapter->watchdog_timer);
1150         del_timer_sync(&adapter->phy_info_timer);
1151
1152         flush_scheduled_work();
1153
1154         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1155          * would have already happened in close and is redundant. */
1156         igb_release_hw_control(adapter);
1157
1158         unregister_netdev(netdev);
1159
1160         if (!igb_check_reset_block(&adapter->hw))
1161                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1162
1163         igb_remove_device(&adapter->hw);
1164         igb_reset_interrupt_capability(adapter);
1165
1166         kfree(adapter->tx_ring);
1167         kfree(adapter->rx_ring);
1168
1169         iounmap(adapter->hw.hw_addr);
1170         if (adapter->hw.flash_address)
1171                 iounmap(adapter->hw.flash_address);
1172         pci_release_regions(pdev);
1173
1174         free_netdev(netdev);
1175
1176         pci_disable_device(pdev);
1177 }
1178
1179 /**
1180  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1181  * @adapter: board private structure to initialize
1182  *
1183  * igb_sw_init initializes the Adapter private data structure.
1184  * Fields are initialized based on PCI device information and
1185  * OS network device settings (MTU size).
1186  **/
1187 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1188 {
1189         struct e1000_hw *hw = &adapter->hw;
1190         struct net_device *netdev = adapter->netdev;
1191         struct pci_dev *pdev = adapter->pdev;
1192
1193         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1194
1195         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1196         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1197         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1198         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1199
1200         /* Number of supported queues. */
1201         /* Having more queues than CPUs doesn't make sense. */
1202         adapter->num_tx_queues = 1;
1203         adapter->num_rx_queues = min(IGB_MAX_RX_QUEUES, num_online_cpus());
1204
1205         igb_set_interrupt_capability(adapter);
1206
1207         if (igb_alloc_queues(adapter)) {
1208                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1209                 return -ENOMEM;
1210         }
1211
1212         /* Explicitly disable IRQ since the NIC can be in any state. */
1213         igb_irq_disable(adapter);
1214
1215         set_bit(__IGB_DOWN, &adapter->state);
1216         return 0;
1217 }
1218
1219 /**
1220  * igb_open - Called when a network interface is made active
1221  * @netdev: network interface device structure
1222  *
1223  * Returns 0 on success, negative value on failure
1224  *
1225  * The open entry point is called when a network interface is made
1226  * active by the system (IFF_UP).  At this point all resources needed
1227  * for transmit and receive operations are allocated, the interrupt
1228  * handler is registered with the OS, the watchdog timer is started,
1229  * and the stack is notified that the interface is ready.
1230  **/
1231 static int igb_open(struct net_device *netdev)
1232 {
1233         struct igb_adapter *adapter = netdev_priv(netdev);
1234         struct e1000_hw *hw = &adapter->hw;
1235         int err;
1236         int i;
1237
1238         /* disallow open during test */
1239         if (test_bit(__IGB_TESTING, &adapter->state))
1240                 return -EBUSY;
1241
1242         /* allocate transmit descriptors */
1243         err = igb_setup_all_tx_resources(adapter);
1244         if (err)
1245                 goto err_setup_tx;
1246
1247         /* allocate receive descriptors */
1248         err = igb_setup_all_rx_resources(adapter);
1249         if (err)
1250                 goto err_setup_rx;
1251
1252         /* e1000_power_up_phy(adapter); */
1253
1254         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1255         if ((adapter->hw.mng_cookie.status &
1256              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1257                 igb_update_mng_vlan(adapter);
1258
1259         /* before we allocate an interrupt, we must be ready to handle it.
1260          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1261          * as soon as we call pci_request_irq, so we have to setup our
1262          * clean_rx handler before we do so.  */
1263         igb_configure(adapter);
1264
1265         err = igb_request_irq(adapter);
1266         if (err)
1267                 goto err_req_irq;
1268
1269         /* From here on the code is the same as igb_up() */
1270         clear_bit(__IGB_DOWN, &adapter->state);
1271
1272         napi_enable(&adapter->napi);
1273         if (adapter->msix_entries)
1274                 for (i = 0; i < adapter->num_rx_queues; i++)
1275                         napi_enable(&adapter->rx_ring[i].napi);
1276
1277         igb_irq_enable(adapter);
1278
1279         /* Clear any pending interrupts. */
1280         rd32(E1000_ICR);
1281         /* Fire a link status change interrupt to start the watchdog. */
1282         wr32(E1000_ICS, E1000_ICS_LSC);
1283
1284         return 0;
1285
1286 err_req_irq:
1287         igb_release_hw_control(adapter);
1288         /* e1000_power_down_phy(adapter); */
1289         igb_free_all_rx_resources(adapter);
1290 err_setup_rx:
1291         igb_free_all_tx_resources(adapter);
1292 err_setup_tx:
1293         igb_reset(adapter);
1294
1295         return err;
1296 }
1297
1298 /**
1299  * igb_close - Disables a network interface
1300  * @netdev: network interface device structure
1301  *
1302  * Returns 0, this is not allowed to fail
1303  *
1304  * The close entry point is called when an interface is de-activated
1305  * by the OS.  The hardware is still under the driver's control, but
1306  * needs to be disabled.  A global MAC reset is issued to stop the
1307  * hardware, and all transmit and receive resources are freed.
1308  **/
1309 static int igb_close(struct net_device *netdev)
1310 {
1311         struct igb_adapter *adapter = netdev_priv(netdev);
1312
1313         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1314         igb_down(adapter);
1315
1316         igb_free_irq(adapter);
1317
1318         igb_free_all_tx_resources(adapter);
1319         igb_free_all_rx_resources(adapter);
1320
1321         /* kill manageability vlan ID if supported, but not if a vlan with
1322          * the same ID is registered on the host OS (let 8021q kill it) */
1323         if ((adapter->hw.mng_cookie.status &
1324                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1325              !(adapter->vlgrp &&
1326                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1327                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1328
1329         return 0;
1330 }
1331
1332 /**
1333  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1334  * @adapter: board private structure
1335  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1336  *
1337  * Return 0 on success, negative on failure
1338  **/
1339
1340 int igb_setup_tx_resources(struct igb_adapter *adapter,
1341                            struct igb_ring *tx_ring)
1342 {
1343         struct pci_dev *pdev = adapter->pdev;
1344         int size;
1345
1346         size = sizeof(struct igb_buffer) * tx_ring->count;
1347         tx_ring->buffer_info = vmalloc(size);
1348         if (!tx_ring->buffer_info)
1349                 goto err;
1350         memset(tx_ring->buffer_info, 0, size);
1351
1352         /* round up to nearest 4K */
1353         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1354                         + sizeof(u32);
1355         tx_ring->size = ALIGN(tx_ring->size, 4096);
1356
1357         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1358                                              &tx_ring->dma);
1359
1360         if (!tx_ring->desc)
1361                 goto err;
1362
1363         tx_ring->adapter = adapter;
1364         tx_ring->next_to_use = 0;
1365         tx_ring->next_to_clean = 0;
1366         spin_lock_init(&tx_ring->tx_clean_lock);
1367         spin_lock_init(&tx_ring->tx_lock);
1368         return 0;
1369
1370 err:
1371         vfree(tx_ring->buffer_info);
1372         dev_err(&adapter->pdev->dev,
1373                 "Unable to allocate memory for the transmit descriptor ring\n");
1374         return -ENOMEM;
1375 }
1376
1377 /**
1378  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1379  *                                (Descriptors) for all queues
1380  * @adapter: board private structure
1381  *
1382  * Return 0 on success, negative on failure
1383  **/
1384 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1385 {
1386         int i, err = 0;
1387
1388         for (i = 0; i < adapter->num_tx_queues; i++) {
1389                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1390                 if (err) {
1391                         dev_err(&adapter->pdev->dev,
1392                                 "Allocation for Tx Queue %u failed\n", i);
1393                         for (i--; i >= 0; i--)
1394                                 igb_free_tx_resources(adapter,
1395                                                         &adapter->tx_ring[i]);
1396                         break;
1397                 }
1398         }
1399
1400         return err;
1401 }
1402
1403 /**
1404  * igb_configure_tx - Configure transmit Unit after Reset
1405  * @adapter: board private structure
1406  *
1407  * Configure the Tx unit of the MAC after a reset.
1408  **/
1409 static void igb_configure_tx(struct igb_adapter *adapter)
1410 {
1411         u64 tdba, tdwba;
1412         struct e1000_hw *hw = &adapter->hw;
1413         u32 tctl;
1414         u32 txdctl, txctrl;
1415         int i;
1416
1417         for (i = 0; i < adapter->num_tx_queues; i++) {
1418                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1419
1420                 wr32(E1000_TDLEN(i),
1421                                 ring->count * sizeof(struct e1000_tx_desc));
1422                 tdba = ring->dma;
1423                 wr32(E1000_TDBAL(i),
1424                                 tdba & 0x00000000ffffffffULL);
1425                 wr32(E1000_TDBAH(i), tdba >> 32);
1426
1427                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1428                 tdwba |= 1; /* enable head wb */
1429                 wr32(E1000_TDWBAL(i),
1430                                 tdwba & 0x00000000ffffffffULL);
1431                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1432
1433                 ring->head = E1000_TDH(i);
1434                 ring->tail = E1000_TDT(i);
1435                 writel(0, hw->hw_addr + ring->tail);
1436                 writel(0, hw->hw_addr + ring->head);
1437                 txdctl = rd32(E1000_TXDCTL(i));
1438                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1439                 wr32(E1000_TXDCTL(i), txdctl);
1440
1441                 /* Turn off Relaxed Ordering on head write-backs.  The
1442                  * writebacks MUST be delivered in order or it will
1443                  * completely screw up our bookeeping.
1444                  */
1445                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1446                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1447                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1448         }
1449
1450
1451
1452         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1453
1454         /* Program the Transmit Control Register */
1455
1456         tctl = rd32(E1000_TCTL);
1457         tctl &= ~E1000_TCTL_CT;
1458         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1459                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1460
1461         igb_config_collision_dist(hw);
1462
1463         /* Setup Transmit Descriptor Settings for eop descriptor */
1464         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1465
1466         /* Enable transmits */
1467         tctl |= E1000_TCTL_EN;
1468
1469         wr32(E1000_TCTL, tctl);
1470 }
1471
1472 /**
1473  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1474  * @adapter: board private structure
1475  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1476  *
1477  * Returns 0 on success, negative on failure
1478  **/
1479
1480 int igb_setup_rx_resources(struct igb_adapter *adapter,
1481                            struct igb_ring *rx_ring)
1482 {
1483         struct pci_dev *pdev = adapter->pdev;
1484         int size, desc_len;
1485
1486         size = sizeof(struct igb_buffer) * rx_ring->count;
1487         rx_ring->buffer_info = vmalloc(size);
1488         if (!rx_ring->buffer_info)
1489                 goto err;
1490         memset(rx_ring->buffer_info, 0, size);
1491
1492         desc_len = sizeof(union e1000_adv_rx_desc);
1493
1494         /* Round up to nearest 4K */
1495         rx_ring->size = rx_ring->count * desc_len;
1496         rx_ring->size = ALIGN(rx_ring->size, 4096);
1497
1498         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1499                                              &rx_ring->dma);
1500
1501         if (!rx_ring->desc)
1502                 goto err;
1503
1504         rx_ring->next_to_clean = 0;
1505         rx_ring->next_to_use = 0;
1506         rx_ring->pending_skb = NULL;
1507
1508         rx_ring->adapter = adapter;
1509         /* FIXME: do we want to setup ring->napi->poll here? */
1510         rx_ring->napi.poll = adapter->napi.poll;
1511
1512         return 0;
1513
1514 err:
1515         vfree(rx_ring->buffer_info);
1516         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1517                 "the receive descriptor ring\n");
1518         return -ENOMEM;
1519 }
1520
1521 /**
1522  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1523  *                                (Descriptors) for all queues
1524  * @adapter: board private structure
1525  *
1526  * Return 0 on success, negative on failure
1527  **/
1528 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1529 {
1530         int i, err = 0;
1531
1532         for (i = 0; i < adapter->num_rx_queues; i++) {
1533                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1534                 if (err) {
1535                         dev_err(&adapter->pdev->dev,
1536                                 "Allocation for Rx Queue %u failed\n", i);
1537                         for (i--; i >= 0; i--)
1538                                 igb_free_rx_resources(adapter,
1539                                                         &adapter->rx_ring[i]);
1540                         break;
1541                 }
1542         }
1543
1544         return err;
1545 }
1546
1547 /**
1548  * igb_setup_rctl - configure the receive control registers
1549  * @adapter: Board private structure
1550  **/
1551 static void igb_setup_rctl(struct igb_adapter *adapter)
1552 {
1553         struct e1000_hw *hw = &adapter->hw;
1554         u32 rctl;
1555         u32 srrctl = 0;
1556         int i;
1557
1558         rctl = rd32(E1000_RCTL);
1559
1560         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1561
1562         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1563                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1564                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1565
1566         /* disable the stripping of CRC because it breaks
1567          * BMC firmware connected over SMBUS
1568         rctl |= E1000_RCTL_SECRC;
1569         */
1570
1571         rctl &= ~E1000_RCTL_SBP;
1572
1573         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1574                 rctl &= ~E1000_RCTL_LPE;
1575         else
1576                 rctl |= E1000_RCTL_LPE;
1577         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1578                 /* Setup buffer sizes */
1579                 rctl &= ~E1000_RCTL_SZ_4096;
1580                 rctl |= E1000_RCTL_BSEX;
1581                 switch (adapter->rx_buffer_len) {
1582                 case IGB_RXBUFFER_256:
1583                         rctl |= E1000_RCTL_SZ_256;
1584                         rctl &= ~E1000_RCTL_BSEX;
1585                         break;
1586                 case IGB_RXBUFFER_512:
1587                         rctl |= E1000_RCTL_SZ_512;
1588                         rctl &= ~E1000_RCTL_BSEX;
1589                         break;
1590                 case IGB_RXBUFFER_1024:
1591                         rctl |= E1000_RCTL_SZ_1024;
1592                         rctl &= ~E1000_RCTL_BSEX;
1593                         break;
1594                 case IGB_RXBUFFER_2048:
1595                 default:
1596                         rctl |= E1000_RCTL_SZ_2048;
1597                         rctl &= ~E1000_RCTL_BSEX;
1598                         break;
1599                 case IGB_RXBUFFER_4096:
1600                         rctl |= E1000_RCTL_SZ_4096;
1601                         break;
1602                 case IGB_RXBUFFER_8192:
1603                         rctl |= E1000_RCTL_SZ_8192;
1604                         break;
1605                 case IGB_RXBUFFER_16384:
1606                         rctl |= E1000_RCTL_SZ_16384;
1607                         break;
1608                 }
1609         } else {
1610                 rctl &= ~E1000_RCTL_BSEX;
1611                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1612         }
1613
1614         /* 82575 and greater support packet-split where the protocol
1615          * header is placed in skb->data and the packet data is
1616          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1617          * In the case of a non-split, skb->data is linearly filled,
1618          * followed by the page buffers.  Therefore, skb->data is
1619          * sized to hold the largest protocol header.
1620          */
1621         /* allocations using alloc_page take too long for regular MTU
1622          * so only enable packet split for jumbo frames */
1623         if (rctl & E1000_RCTL_LPE) {
1624                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1625                 srrctl = adapter->rx_ps_hdr_size <<
1626                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1627                 /* buffer size is ALWAYS one page */
1628                 srrctl |= PAGE_SIZE >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1629                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1630         } else {
1631                 adapter->rx_ps_hdr_size = 0;
1632                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1633         }
1634
1635         for (i = 0; i < adapter->num_rx_queues; i++)
1636                 wr32(E1000_SRRCTL(i), srrctl);
1637
1638         wr32(E1000_RCTL, rctl);
1639 }
1640
1641 /**
1642  * igb_configure_rx - Configure receive Unit after Reset
1643  * @adapter: board private structure
1644  *
1645  * Configure the Rx unit of the MAC after a reset.
1646  **/
1647 static void igb_configure_rx(struct igb_adapter *adapter)
1648 {
1649         u64 rdba;
1650         struct e1000_hw *hw = &adapter->hw;
1651         u32 rctl, rxcsum;
1652         u32 rxdctl;
1653         int i;
1654
1655         /* disable receives while setting up the descriptors */
1656         rctl = rd32(E1000_RCTL);
1657         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1658         wrfl();
1659         mdelay(10);
1660
1661         if (adapter->itr_setting > 3)
1662                 wr32(E1000_ITR,
1663                                 1000000000 / (adapter->itr * 256));
1664
1665         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1666          * the Base and Length of the Rx Descriptor Ring */
1667         for (i = 0; i < adapter->num_rx_queues; i++) {
1668                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1669                 rdba = ring->dma;
1670                 wr32(E1000_RDBAL(i),
1671                                 rdba & 0x00000000ffffffffULL);
1672                 wr32(E1000_RDBAH(i), rdba >> 32);
1673                 wr32(E1000_RDLEN(i),
1674                                ring->count * sizeof(union e1000_adv_rx_desc));
1675
1676                 ring->head = E1000_RDH(i);
1677                 ring->tail = E1000_RDT(i);
1678                 writel(0, hw->hw_addr + ring->tail);
1679                 writel(0, hw->hw_addr + ring->head);
1680
1681                 rxdctl = rd32(E1000_RXDCTL(i));
1682                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1683                 rxdctl &= 0xFFF00000;
1684                 rxdctl |= IGB_RX_PTHRESH;
1685                 rxdctl |= IGB_RX_HTHRESH << 8;
1686                 rxdctl |= IGB_RX_WTHRESH << 16;
1687                 wr32(E1000_RXDCTL(i), rxdctl);
1688         }
1689
1690         if (adapter->num_rx_queues > 1) {
1691                 u32 random[10];
1692                 u32 mrqc;
1693                 u32 j, shift;
1694                 union e1000_reta {
1695                         u32 dword;
1696                         u8  bytes[4];
1697                 } reta;
1698
1699                 get_random_bytes(&random[0], 40);
1700
1701                 shift = 6;
1702                 for (j = 0; j < (32 * 4); j++) {
1703                         reta.bytes[j & 3] =
1704                                 (j % adapter->num_rx_queues) << shift;
1705                         if ((j & 3) == 3)
1706                                 writel(reta.dword,
1707                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1708                 }
1709                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1710
1711                 /* Fill out hash function seeds */
1712                 for (j = 0; j < 10; j++)
1713                         array_wr32(E1000_RSSRK(0), j, random[j]);
1714
1715                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1716                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1717                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1718                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1719                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1720                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1721                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1722                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1723
1724
1725                 wr32(E1000_MRQC, mrqc);
1726
1727                 /* Multiqueue and raw packet checksumming are mutually
1728                  * exclusive.  Note that this not the same as TCP/IP
1729                  * checksumming, which works fine. */
1730                 rxcsum = rd32(E1000_RXCSUM);
1731                 rxcsum |= E1000_RXCSUM_PCSD;
1732                 wr32(E1000_RXCSUM, rxcsum);
1733         } else {
1734                 /* Enable Receive Checksum Offload for TCP and UDP */
1735                 rxcsum = rd32(E1000_RXCSUM);
1736                 if (adapter->rx_csum) {
1737                         rxcsum |= E1000_RXCSUM_TUOFL;
1738
1739                         /* Enable IPv4 payload checksum for UDP fragments
1740                          * Must be used in conjunction with packet-split. */
1741                         if (adapter->rx_ps_hdr_size)
1742                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1743                 } else {
1744                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1745                         /* don't need to clear IPPCSE as it defaults to 0 */
1746                 }
1747                 wr32(E1000_RXCSUM, rxcsum);
1748         }
1749
1750         if (adapter->vlgrp)
1751                 wr32(E1000_RLPML,
1752                                 adapter->max_frame_size + VLAN_TAG_SIZE);
1753         else
1754                 wr32(E1000_RLPML, adapter->max_frame_size);
1755
1756         /* Enable Receives */
1757         wr32(E1000_RCTL, rctl);
1758 }
1759
1760 /**
1761  * igb_free_tx_resources - Free Tx Resources per Queue
1762  * @adapter: board private structure
1763  * @tx_ring: Tx descriptor ring for a specific queue
1764  *
1765  * Free all transmit software resources
1766  **/
1767 static void igb_free_tx_resources(struct igb_adapter *adapter,
1768                                   struct igb_ring *tx_ring)
1769 {
1770         struct pci_dev *pdev = adapter->pdev;
1771
1772         igb_clean_tx_ring(adapter, tx_ring);
1773
1774         vfree(tx_ring->buffer_info);
1775         tx_ring->buffer_info = NULL;
1776
1777         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1778
1779         tx_ring->desc = NULL;
1780 }
1781
1782 /**
1783  * igb_free_all_tx_resources - Free Tx Resources for All Queues
1784  * @adapter: board private structure
1785  *
1786  * Free all transmit software resources
1787  **/
1788 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
1789 {
1790         int i;
1791
1792         for (i = 0; i < adapter->num_tx_queues; i++)
1793                 igb_free_tx_resources(adapter, &adapter->tx_ring[i]);
1794 }
1795
1796 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
1797                                            struct igb_buffer *buffer_info)
1798 {
1799         if (buffer_info->dma) {
1800                 pci_unmap_page(adapter->pdev,
1801                                 buffer_info->dma,
1802                                 buffer_info->length,
1803                                 PCI_DMA_TODEVICE);
1804                 buffer_info->dma = 0;
1805         }
1806         if (buffer_info->skb) {
1807                 dev_kfree_skb_any(buffer_info->skb);
1808                 buffer_info->skb = NULL;
1809         }
1810         buffer_info->time_stamp = 0;
1811         /* buffer_info must be completely set up in the transmit path */
1812 }
1813
1814 /**
1815  * igb_clean_tx_ring - Free Tx Buffers
1816  * @adapter: board private structure
1817  * @tx_ring: ring to be cleaned
1818  **/
1819 static void igb_clean_tx_ring(struct igb_adapter *adapter,
1820                               struct igb_ring *tx_ring)
1821 {
1822         struct igb_buffer *buffer_info;
1823         unsigned long size;
1824         unsigned int i;
1825
1826         if (!tx_ring->buffer_info)
1827                 return;
1828         /* Free all the Tx ring sk_buffs */
1829
1830         for (i = 0; i < tx_ring->count; i++) {
1831                 buffer_info = &tx_ring->buffer_info[i];
1832                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
1833         }
1834
1835         size = sizeof(struct igb_buffer) * tx_ring->count;
1836         memset(tx_ring->buffer_info, 0, size);
1837
1838         /* Zero out the descriptor ring */
1839
1840         memset(tx_ring->desc, 0, tx_ring->size);
1841
1842         tx_ring->next_to_use = 0;
1843         tx_ring->next_to_clean = 0;
1844
1845         writel(0, adapter->hw.hw_addr + tx_ring->head);
1846         writel(0, adapter->hw.hw_addr + tx_ring->tail);
1847 }
1848
1849 /**
1850  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
1851  * @adapter: board private structure
1852  **/
1853 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
1854 {
1855         int i;
1856
1857         for (i = 0; i < adapter->num_tx_queues; i++)
1858                 igb_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1859 }
1860
1861 /**
1862  * igb_free_rx_resources - Free Rx Resources
1863  * @adapter: board private structure
1864  * @rx_ring: ring to clean the resources from
1865  *
1866  * Free all receive software resources
1867  **/
1868 static void igb_free_rx_resources(struct igb_adapter *adapter,
1869                                   struct igb_ring *rx_ring)
1870 {
1871         struct pci_dev *pdev = adapter->pdev;
1872
1873         igb_clean_rx_ring(adapter, rx_ring);
1874
1875         vfree(rx_ring->buffer_info);
1876         rx_ring->buffer_info = NULL;
1877
1878         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1879
1880         rx_ring->desc = NULL;
1881 }
1882
1883 /**
1884  * igb_free_all_rx_resources - Free Rx Resources for All Queues
1885  * @adapter: board private structure
1886  *
1887  * Free all receive software resources
1888  **/
1889 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
1890 {
1891         int i;
1892
1893         for (i = 0; i < adapter->num_rx_queues; i++)
1894                 igb_free_rx_resources(adapter, &adapter->rx_ring[i]);
1895 }
1896
1897 /**
1898  * igb_clean_rx_ring - Free Rx Buffers per Queue
1899  * @adapter: board private structure
1900  * @rx_ring: ring to free buffers from
1901  **/
1902 static void igb_clean_rx_ring(struct igb_adapter *adapter,
1903                               struct igb_ring *rx_ring)
1904 {
1905         struct igb_buffer *buffer_info;
1906         struct pci_dev *pdev = adapter->pdev;
1907         unsigned long size;
1908         unsigned int i;
1909
1910         if (!rx_ring->buffer_info)
1911                 return;
1912         /* Free all the Rx ring sk_buffs */
1913         for (i = 0; i < rx_ring->count; i++) {
1914                 buffer_info = &rx_ring->buffer_info[i];
1915                 if (buffer_info->dma) {
1916                         if (adapter->rx_ps_hdr_size)
1917                                 pci_unmap_single(pdev, buffer_info->dma,
1918                                                  adapter->rx_ps_hdr_size,
1919                                                  PCI_DMA_FROMDEVICE);
1920                         else
1921                                 pci_unmap_single(pdev, buffer_info->dma,
1922                                                  adapter->rx_buffer_len,
1923                                                  PCI_DMA_FROMDEVICE);
1924                         buffer_info->dma = 0;
1925                 }
1926
1927                 if (buffer_info->skb) {
1928                         dev_kfree_skb(buffer_info->skb);
1929                         buffer_info->skb = NULL;
1930                 }
1931                 if (buffer_info->page) {
1932                         pci_unmap_page(pdev, buffer_info->page_dma,
1933                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
1934                         put_page(buffer_info->page);
1935                         buffer_info->page = NULL;
1936                         buffer_info->page_dma = 0;
1937                 }
1938         }
1939
1940         /* there also may be some cached data from a chained receive */
1941         if (rx_ring->pending_skb) {
1942                 dev_kfree_skb(rx_ring->pending_skb);
1943                 rx_ring->pending_skb = NULL;
1944         }
1945
1946         size = sizeof(struct igb_buffer) * rx_ring->count;
1947         memset(rx_ring->buffer_info, 0, size);
1948
1949         /* Zero out the descriptor ring */
1950         memset(rx_ring->desc, 0, rx_ring->size);
1951
1952         rx_ring->next_to_clean = 0;
1953         rx_ring->next_to_use = 0;
1954
1955         writel(0, adapter->hw.hw_addr + rx_ring->head);
1956         writel(0, adapter->hw.hw_addr + rx_ring->tail);
1957 }
1958
1959 /**
1960  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
1961  * @adapter: board private structure
1962  **/
1963 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
1964 {
1965         int i;
1966
1967         for (i = 0; i < adapter->num_rx_queues; i++)
1968                 igb_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1969 }
1970
1971 /**
1972  * igb_set_mac - Change the Ethernet Address of the NIC
1973  * @netdev: network interface device structure
1974  * @p: pointer to an address structure
1975  *
1976  * Returns 0 on success, negative on failure
1977  **/
1978 static int igb_set_mac(struct net_device *netdev, void *p)
1979 {
1980         struct igb_adapter *adapter = netdev_priv(netdev);
1981         struct sockaddr *addr = p;
1982
1983         if (!is_valid_ether_addr(addr->sa_data))
1984                 return -EADDRNOTAVAIL;
1985
1986         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1987         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
1988
1989         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1990
1991         return 0;
1992 }
1993
1994 /**
1995  * igb_set_multi - Multicast and Promiscuous mode set
1996  * @netdev: network interface device structure
1997  *
1998  * The set_multi entry point is called whenever the multicast address
1999  * list or the network interface flags are updated.  This routine is
2000  * responsible for configuring the hardware for proper multicast,
2001  * promiscuous mode, and all-multi behavior.
2002  **/
2003 static void igb_set_multi(struct net_device *netdev)
2004 {
2005         struct igb_adapter *adapter = netdev_priv(netdev);
2006         struct e1000_hw *hw = &adapter->hw;
2007         struct e1000_mac_info *mac = &hw->mac;
2008         struct dev_mc_list *mc_ptr;
2009         u8  *mta_list;
2010         u32 rctl;
2011         int i;
2012
2013         /* Check for Promiscuous and All Multicast modes */
2014
2015         rctl = rd32(E1000_RCTL);
2016
2017         if (netdev->flags & IFF_PROMISC)
2018                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2019         else if (netdev->flags & IFF_ALLMULTI) {
2020                 rctl |= E1000_RCTL_MPE;
2021                 rctl &= ~E1000_RCTL_UPE;
2022         } else
2023                 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2024
2025         wr32(E1000_RCTL, rctl);
2026
2027         if (!netdev->mc_count) {
2028                 /* nothing to program, so clear mc list */
2029                 igb_update_mc_addr_list(hw, NULL, 0, 1,
2030                                           mac->rar_entry_count);
2031                 return;
2032         }
2033
2034         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2035         if (!mta_list)
2036                 return;
2037
2038         /* The shared function expects a packed array of only addresses. */
2039         mc_ptr = netdev->mc_list;
2040
2041         for (i = 0; i < netdev->mc_count; i++) {
2042                 if (!mc_ptr)
2043                         break;
2044                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2045                 mc_ptr = mc_ptr->next;
2046         }
2047         igb_update_mc_addr_list(hw, mta_list, i, 1, mac->rar_entry_count);
2048         kfree(mta_list);
2049 }
2050
2051 /* Need to wait a few seconds after link up to get diagnostic information from
2052  * the phy */
2053 static void igb_update_phy_info(unsigned long data)
2054 {
2055         struct igb_adapter *adapter = (struct igb_adapter *) data;
2056         if (adapter->hw.phy.ops.get_phy_info)
2057                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2058 }
2059
2060 /**
2061  * igb_watchdog - Timer Call-back
2062  * @data: pointer to adapter cast into an unsigned long
2063  **/
2064 static void igb_watchdog(unsigned long data)
2065 {
2066         struct igb_adapter *adapter = (struct igb_adapter *)data;
2067         /* Do the rest outside of interrupt context */
2068         schedule_work(&adapter->watchdog_task);
2069 }
2070
2071 static void igb_watchdog_task(struct work_struct *work)
2072 {
2073         struct igb_adapter *adapter = container_of(work,
2074                                         struct igb_adapter, watchdog_task);
2075         struct e1000_hw *hw = &adapter->hw;
2076
2077         struct net_device *netdev = adapter->netdev;
2078         struct igb_ring *tx_ring = adapter->tx_ring;
2079         struct e1000_mac_info *mac = &adapter->hw.mac;
2080         u32 link;
2081         s32 ret_val;
2082
2083         if ((netif_carrier_ok(netdev)) &&
2084             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2085                 goto link_up;
2086
2087         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2088         if ((ret_val == E1000_ERR_PHY) &&
2089             (hw->phy.type == e1000_phy_igp_3) &&
2090             (rd32(E1000_CTRL) &
2091              E1000_PHY_CTRL_GBE_DISABLE))
2092                 dev_info(&adapter->pdev->dev,
2093                          "Gigabit has been disabled, downgrading speed\n");
2094
2095         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2096             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2097                 link = mac->serdes_has_link;
2098         else
2099                 link = rd32(E1000_STATUS) &
2100                                       E1000_STATUS_LU;
2101
2102         if (link) {
2103                 if (!netif_carrier_ok(netdev)) {
2104                         u32 ctrl;
2105                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2106                                                    &adapter->link_speed,
2107                                                    &adapter->link_duplex);
2108
2109                         ctrl = rd32(E1000_CTRL);
2110                         dev_info(&adapter->pdev->dev,
2111                                  "NIC Link is Up %d Mbps %s, "
2112                                  "Flow Control: %s\n",
2113                                  adapter->link_speed,
2114                                  adapter->link_duplex == FULL_DUPLEX ?
2115                                  "Full Duplex" : "Half Duplex",
2116                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2117                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2118                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2119                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2120
2121                         /* tweak tx_queue_len according to speed/duplex and
2122                          * adjust the timeout factor */
2123                         netdev->tx_queue_len = adapter->tx_queue_len;
2124                         adapter->tx_timeout_factor = 1;
2125                         switch (adapter->link_speed) {
2126                         case SPEED_10:
2127                                 netdev->tx_queue_len = 10;
2128                                 adapter->tx_timeout_factor = 14;
2129                                 break;
2130                         case SPEED_100:
2131                                 netdev->tx_queue_len = 100;
2132                                 /* maybe add some timeout factor ? */
2133                                 break;
2134                         }
2135
2136                         netif_carrier_on(netdev);
2137                         netif_wake_queue(netdev);
2138
2139                         if (!test_bit(__IGB_DOWN, &adapter->state))
2140                                 mod_timer(&adapter->phy_info_timer,
2141                                           round_jiffies(jiffies + 2 * HZ));
2142                 }
2143         } else {
2144                 if (netif_carrier_ok(netdev)) {
2145                         adapter->link_speed = 0;
2146                         adapter->link_duplex = 0;
2147                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2148                         netif_carrier_off(netdev);
2149                         netif_stop_queue(netdev);
2150                         if (!test_bit(__IGB_DOWN, &adapter->state))
2151                                 mod_timer(&adapter->phy_info_timer,
2152                                           round_jiffies(jiffies + 2 * HZ));
2153                 }
2154         }
2155
2156 link_up:
2157         igb_update_stats(adapter);
2158
2159         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2160         adapter->tpt_old = adapter->stats.tpt;
2161         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2162         adapter->colc_old = adapter->stats.colc;
2163
2164         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2165         adapter->gorc_old = adapter->stats.gorc;
2166         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2167         adapter->gotc_old = adapter->stats.gotc;
2168
2169         igb_update_adaptive(&adapter->hw);
2170
2171         if (!netif_carrier_ok(netdev)) {
2172                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2173                         /* We've lost link, so the controller stops DMA,
2174                          * but we've got queued Tx work that's never going
2175                          * to get done, so reset controller to flush Tx.
2176                          * (Do the reset outside of interrupt context). */
2177                         adapter->tx_timeout_count++;
2178                         schedule_work(&adapter->reset_task);
2179                 }
2180         }
2181
2182         /* Cause software interrupt to ensure rx ring is cleaned */
2183         wr32(E1000_ICS, E1000_ICS_RXDMT0);
2184
2185         /* Force detection of hung controller every watchdog period */
2186         tx_ring->detect_tx_hung = true;
2187
2188         /* Reset the timer */
2189         if (!test_bit(__IGB_DOWN, &adapter->state))
2190                 mod_timer(&adapter->watchdog_timer,
2191                           round_jiffies(jiffies + 2 * HZ));
2192 }
2193
2194 enum latency_range {
2195         lowest_latency = 0,
2196         low_latency = 1,
2197         bulk_latency = 2,
2198         latency_invalid = 255
2199 };
2200
2201
2202 static void igb_lower_rx_eitr(struct igb_adapter *adapter,
2203                               struct igb_ring *rx_ring)
2204 {
2205         struct e1000_hw *hw = &adapter->hw;
2206         int new_val;
2207
2208         new_val = rx_ring->itr_val / 2;
2209         if (new_val < IGB_MIN_DYN_ITR)
2210                 new_val = IGB_MIN_DYN_ITR;
2211
2212         if (new_val != rx_ring->itr_val) {
2213                 rx_ring->itr_val = new_val;
2214                 wr32(rx_ring->itr_register,
2215                                 1000000000 / (new_val * 256));
2216         }
2217 }
2218
2219 static void igb_raise_rx_eitr(struct igb_adapter *adapter,
2220                               struct igb_ring *rx_ring)
2221 {
2222         struct e1000_hw *hw = &adapter->hw;
2223         int new_val;
2224
2225         new_val = rx_ring->itr_val * 2;
2226         if (new_val > IGB_MAX_DYN_ITR)
2227                 new_val = IGB_MAX_DYN_ITR;
2228
2229         if (new_val != rx_ring->itr_val) {
2230                 rx_ring->itr_val = new_val;
2231                 wr32(rx_ring->itr_register,
2232                                 1000000000 / (new_val * 256));
2233         }
2234 }
2235
2236 /**
2237  * igb_update_itr - update the dynamic ITR value based on statistics
2238  *      Stores a new ITR value based on packets and byte
2239  *      counts during the last interrupt.  The advantage of per interrupt
2240  *      computation is faster updates and more accurate ITR for the current
2241  *      traffic pattern.  Constants in this function were computed
2242  *      based on theoretical maximum wire speed and thresholds were set based
2243  *      on testing data as well as attempting to minimize response time
2244  *      while increasing bulk throughput.
2245  *      this functionality is controlled by the InterruptThrottleRate module
2246  *      parameter (see igb_param.c)
2247  *      NOTE:  These calculations are only valid when operating in a single-
2248  *             queue environment.
2249  * @adapter: pointer to adapter
2250  * @itr_setting: current adapter->itr
2251  * @packets: the number of packets during this measurement interval
2252  * @bytes: the number of bytes during this measurement interval
2253  **/
2254 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2255                                    int packets, int bytes)
2256 {
2257         unsigned int retval = itr_setting;
2258
2259         if (packets == 0)
2260                 goto update_itr_done;
2261
2262         switch (itr_setting) {
2263         case lowest_latency:
2264                 /* handle TSO and jumbo frames */
2265                 if (bytes/packets > 8000)
2266                         retval = bulk_latency;
2267                 else if ((packets < 5) && (bytes > 512))
2268                         retval = low_latency;
2269                 break;
2270         case low_latency:  /* 50 usec aka 20000 ints/s */
2271                 if (bytes > 10000) {
2272                         /* this if handles the TSO accounting */
2273                         if (bytes/packets > 8000) {
2274                                 retval = bulk_latency;
2275                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2276                                 retval = bulk_latency;
2277                         } else if ((packets > 35)) {
2278                                 retval = lowest_latency;
2279                         }
2280                 } else if (bytes/packets > 2000) {
2281                         retval = bulk_latency;
2282                 } else if (packets <= 2 && bytes < 512) {
2283                         retval = lowest_latency;
2284                 }
2285                 break;
2286         case bulk_latency: /* 250 usec aka 4000 ints/s */
2287                 if (bytes > 25000) {
2288                         if (packets > 35)
2289                                 retval = low_latency;
2290                 } else if (bytes < 6000) {
2291                         retval = low_latency;
2292                 }
2293                 break;
2294         }
2295
2296 update_itr_done:
2297         return retval;
2298 }
2299
2300 static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register,
2301                         int rx_only)
2302 {
2303         u16 current_itr;
2304         u32 new_itr = adapter->itr;
2305
2306         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2307         if (adapter->link_speed != SPEED_1000) {
2308                 current_itr = 0;
2309                 new_itr = 4000;
2310                 goto set_itr_now;
2311         }
2312
2313         adapter->rx_itr = igb_update_itr(adapter,
2314                                     adapter->rx_itr,
2315                                     adapter->rx_ring->total_packets,
2316                                     adapter->rx_ring->total_bytes);
2317         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2318         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2319                 adapter->rx_itr = low_latency;
2320
2321         if (!rx_only) {
2322                 adapter->tx_itr = igb_update_itr(adapter,
2323                                             adapter->tx_itr,
2324                                             adapter->tx_ring->total_packets,
2325                                             adapter->tx_ring->total_bytes);
2326                 /* conservative mode (itr 3) eliminates the
2327                  * lowest_latency setting */
2328                 if (adapter->itr_setting == 3 &&
2329                     adapter->tx_itr == lowest_latency)
2330                         adapter->tx_itr = low_latency;
2331
2332                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2333         } else {
2334                 current_itr = adapter->rx_itr;
2335         }
2336
2337         switch (current_itr) {
2338         /* counts and packets in update_itr are dependent on these numbers */
2339         case lowest_latency:
2340                 new_itr = 70000;
2341                 break;
2342         case low_latency:
2343                 new_itr = 20000; /* aka hwitr = ~200 */
2344                 break;
2345         case bulk_latency:
2346                 new_itr = 4000;
2347                 break;
2348         default:
2349                 break;
2350         }
2351
2352 set_itr_now:
2353         if (new_itr != adapter->itr) {
2354                 /* this attempts to bias the interrupt rate towards Bulk
2355                  * by adding intermediate steps when interrupt rate is
2356                  * increasing */
2357                 new_itr = new_itr > adapter->itr ?
2358                              min(adapter->itr + (new_itr >> 2), new_itr) :
2359                              new_itr;
2360                 /* Don't write the value here; it resets the adapter's
2361                  * internal timer, and causes us to delay far longer than
2362                  * we should between interrupts.  Instead, we write the ITR
2363                  * value at the beginning of the next interrupt so the timing
2364                  * ends up being correct.
2365                  */
2366                 adapter->itr = new_itr;
2367                 adapter->set_itr = 1;
2368         }
2369
2370         return;
2371 }
2372
2373
2374 #define IGB_TX_FLAGS_CSUM               0x00000001
2375 #define IGB_TX_FLAGS_VLAN               0x00000002
2376 #define IGB_TX_FLAGS_TSO                0x00000004
2377 #define IGB_TX_FLAGS_IPV4               0x00000008
2378 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2379 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2380
2381 static inline int igb_tso_adv(struct igb_adapter *adapter,
2382                               struct igb_ring *tx_ring,
2383                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2384 {
2385         struct e1000_adv_tx_context_desc *context_desc;
2386         unsigned int i;
2387         int err;
2388         struct igb_buffer *buffer_info;
2389         u32 info = 0, tu_cmd = 0;
2390         u32 mss_l4len_idx, l4len;
2391         *hdr_len = 0;
2392
2393         if (skb_header_cloned(skb)) {
2394                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2395                 if (err)
2396                         return err;
2397         }
2398
2399         l4len = tcp_hdrlen(skb);
2400         *hdr_len += l4len;
2401
2402         if (skb->protocol == htons(ETH_P_IP)) {
2403                 struct iphdr *iph = ip_hdr(skb);
2404                 iph->tot_len = 0;
2405                 iph->check = 0;
2406                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2407                                                          iph->daddr, 0,
2408                                                          IPPROTO_TCP,
2409                                                          0);
2410         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2411                 ipv6_hdr(skb)->payload_len = 0;
2412                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2413                                                        &ipv6_hdr(skb)->daddr,
2414                                                        0, IPPROTO_TCP, 0);
2415         }
2416
2417         i = tx_ring->next_to_use;
2418
2419         buffer_info = &tx_ring->buffer_info[i];
2420         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2421         /* VLAN MACLEN IPLEN */
2422         if (tx_flags & IGB_TX_FLAGS_VLAN)
2423                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2424         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2425         *hdr_len += skb_network_offset(skb);
2426         info |= skb_network_header_len(skb);
2427         *hdr_len += skb_network_header_len(skb);
2428         context_desc->vlan_macip_lens = cpu_to_le32(info);
2429
2430         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2431         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2432
2433         if (skb->protocol == htons(ETH_P_IP))
2434                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2435         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2436
2437         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2438
2439         /* MSS L4LEN IDX */
2440         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2441         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2442
2443         /* Context index must be unique per ring.  Luckily, so is the interrupt
2444          * mask value. */
2445         mss_l4len_idx |= tx_ring->eims_value >> 4;
2446
2447         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2448         context_desc->seqnum_seed = 0;
2449
2450         buffer_info->time_stamp = jiffies;
2451         buffer_info->dma = 0;
2452         i++;
2453         if (i == tx_ring->count)
2454                 i = 0;
2455
2456         tx_ring->next_to_use = i;
2457
2458         return true;
2459 }
2460
2461 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2462                                         struct igb_ring *tx_ring,
2463                                         struct sk_buff *skb, u32 tx_flags)
2464 {
2465         struct e1000_adv_tx_context_desc *context_desc;
2466         unsigned int i;
2467         struct igb_buffer *buffer_info;
2468         u32 info = 0, tu_cmd = 0;
2469
2470         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2471             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2472                 i = tx_ring->next_to_use;
2473                 buffer_info = &tx_ring->buffer_info[i];
2474                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2475
2476                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2477                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2478                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2479                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2480                         info |= skb_network_header_len(skb);
2481
2482                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2483
2484                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2485
2486                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2487                         if (skb->protocol == htons(ETH_P_IP))
2488                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2489                         if (skb->sk && (skb->sk->sk_protocol == IPPROTO_TCP))
2490                                 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2491                 }
2492
2493                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2494                 context_desc->seqnum_seed = 0;
2495                 context_desc->mss_l4len_idx =
2496                                           cpu_to_le32(tx_ring->eims_value >> 4);
2497
2498                 buffer_info->time_stamp = jiffies;
2499                 buffer_info->dma = 0;
2500
2501                 i++;
2502                 if (i == tx_ring->count)
2503                         i = 0;
2504                 tx_ring->next_to_use = i;
2505
2506                 return true;
2507         }
2508
2509
2510         return false;
2511 }
2512
2513 #define IGB_MAX_TXD_PWR 16
2514 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2515
2516 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2517                                  struct igb_ring *tx_ring,
2518                                  struct sk_buff *skb)
2519 {
2520         struct igb_buffer *buffer_info;
2521         unsigned int len = skb_headlen(skb);
2522         unsigned int count = 0, i;
2523         unsigned int f;
2524
2525         i = tx_ring->next_to_use;
2526
2527         buffer_info = &tx_ring->buffer_info[i];
2528         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2529         buffer_info->length = len;
2530         /* set time_stamp *before* dma to help avoid a possible race */
2531         buffer_info->time_stamp = jiffies;
2532         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2533                                           PCI_DMA_TODEVICE);
2534         count++;
2535         i++;
2536         if (i == tx_ring->count)
2537                 i = 0;
2538
2539         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2540                 struct skb_frag_struct *frag;
2541
2542                 frag = &skb_shinfo(skb)->frags[f];
2543                 len = frag->size;
2544
2545                 buffer_info = &tx_ring->buffer_info[i];
2546                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2547                 buffer_info->length = len;
2548                 buffer_info->time_stamp = jiffies;
2549                 buffer_info->dma = pci_map_page(adapter->pdev,
2550                                                 frag->page,
2551                                                 frag->page_offset,
2552                                                 len,
2553                                                 PCI_DMA_TODEVICE);
2554
2555                 count++;
2556                 i++;
2557                 if (i == tx_ring->count)
2558                         i = 0;
2559         }
2560
2561         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2562         tx_ring->buffer_info[i].skb = skb;
2563
2564         return count;
2565 }
2566
2567 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2568                                     struct igb_ring *tx_ring,
2569                                     int tx_flags, int count, u32 paylen,
2570                                     u8 hdr_len)
2571 {
2572         union e1000_adv_tx_desc *tx_desc = NULL;
2573         struct igb_buffer *buffer_info;
2574         u32 olinfo_status = 0, cmd_type_len;
2575         unsigned int i;
2576
2577         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2578                         E1000_ADVTXD_DCMD_DEXT);
2579
2580         if (tx_flags & IGB_TX_FLAGS_VLAN)
2581                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2582
2583         if (tx_flags & IGB_TX_FLAGS_TSO) {
2584                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2585
2586                 /* insert tcp checksum */
2587                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2588
2589                 /* insert ip checksum */
2590                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2591                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2592
2593         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2594                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2595         }
2596
2597         if (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2598                         IGB_TX_FLAGS_VLAN))
2599                 olinfo_status |= tx_ring->eims_value >> 4;
2600
2601         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2602
2603         i = tx_ring->next_to_use;
2604         while (count--) {
2605                 buffer_info = &tx_ring->buffer_info[i];
2606                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2607                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2608                 tx_desc->read.cmd_type_len =
2609                         cpu_to_le32(cmd_type_len | buffer_info->length);
2610                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2611                 i++;
2612                 if (i == tx_ring->count)
2613                         i = 0;
2614         }
2615
2616         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2617         /* Force memory writes to complete before letting h/w
2618          * know there are new descriptors to fetch.  (Only
2619          * applicable for weak-ordered memory model archs,
2620          * such as IA-64). */
2621         wmb();
2622
2623         tx_ring->next_to_use = i;
2624         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2625         /* we need this if more than one processor can write to our tail
2626          * at a time, it syncronizes IO on IA64/Altix systems */
2627         mmiowb();
2628 }
2629
2630 static int __igb_maybe_stop_tx(struct net_device *netdev,
2631                                struct igb_ring *tx_ring, int size)
2632 {
2633         struct igb_adapter *adapter = netdev_priv(netdev);
2634
2635         netif_stop_queue(netdev);
2636         /* Herbert's original patch had:
2637          *  smp_mb__after_netif_stop_queue();
2638          * but since that doesn't exist yet, just open code it. */
2639         smp_mb();
2640
2641         /* We need to check again in a case another CPU has just
2642          * made room available. */
2643         if (IGB_DESC_UNUSED(tx_ring) < size)
2644                 return -EBUSY;
2645
2646         /* A reprieve! */
2647         netif_start_queue(netdev);
2648         ++adapter->restart_queue;
2649         return 0;
2650 }
2651
2652 static int igb_maybe_stop_tx(struct net_device *netdev,
2653                              struct igb_ring *tx_ring, int size)
2654 {
2655         if (IGB_DESC_UNUSED(tx_ring) >= size)
2656                 return 0;
2657         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2658 }
2659
2660 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2661
2662 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2663                                    struct net_device *netdev,
2664                                    struct igb_ring *tx_ring)
2665 {
2666         struct igb_adapter *adapter = netdev_priv(netdev);
2667         unsigned int tx_flags = 0;
2668         unsigned int len;
2669         unsigned long irq_flags;
2670         u8 hdr_len = 0;
2671         int tso = 0;
2672
2673         len = skb_headlen(skb);
2674
2675         if (test_bit(__IGB_DOWN, &adapter->state)) {
2676                 dev_kfree_skb_any(skb);
2677                 return NETDEV_TX_OK;
2678         }
2679
2680         if (skb->len <= 0) {
2681                 dev_kfree_skb_any(skb);
2682                 return NETDEV_TX_OK;
2683         }
2684
2685         if (!spin_trylock_irqsave(&tx_ring->tx_lock, irq_flags))
2686                 /* Collision - tell upper layer to requeue */
2687                 return NETDEV_TX_LOCKED;
2688
2689         /* need: 1 descriptor per page,
2690          *       + 2 desc gap to keep tail from touching head,
2691          *       + 1 desc for skb->data,
2692          *       + 1 desc for context descriptor,
2693          * otherwise try next time */
2694         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2695                 /* this is a hard error */
2696                 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2697                 return NETDEV_TX_BUSY;
2698         }
2699
2700         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2701                 tx_flags |= IGB_TX_FLAGS_VLAN;
2702                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2703         }
2704
2705         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2706                                               &hdr_len) : 0;
2707
2708         if (tso < 0) {
2709                 dev_kfree_skb_any(skb);
2710                 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2711                 return NETDEV_TX_OK;
2712         }
2713
2714         if (tso)
2715                 tx_flags |= IGB_TX_FLAGS_TSO;
2716         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2717                         if (skb->ip_summed == CHECKSUM_PARTIAL)
2718                                 tx_flags |= IGB_TX_FLAGS_CSUM;
2719
2720         if (skb->protocol == htons(ETH_P_IP))
2721                 tx_flags |= IGB_TX_FLAGS_IPV4;
2722
2723         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2724                          igb_tx_map_adv(adapter, tx_ring, skb),
2725                          skb->len, hdr_len);
2726
2727         netdev->trans_start = jiffies;
2728
2729         /* Make sure there is space in the ring for the next send. */
2730         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
2731
2732         spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2733         return NETDEV_TX_OK;
2734 }
2735
2736 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
2737 {
2738         struct igb_adapter *adapter = netdev_priv(netdev);
2739         struct igb_ring *tx_ring = &adapter->tx_ring[0];
2740
2741         /* This goes back to the question of how to logically map a tx queue
2742          * to a flow.  Right now, performance is impacted slightly negatively
2743          * if using multiple tx queues.  If the stack breaks away from a
2744          * single qdisc implementation, we can look at this again. */
2745         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
2746 }
2747
2748 /**
2749  * igb_tx_timeout - Respond to a Tx Hang
2750  * @netdev: network interface device structure
2751  **/
2752 static void igb_tx_timeout(struct net_device *netdev)
2753 {
2754         struct igb_adapter *adapter = netdev_priv(netdev);
2755         struct e1000_hw *hw = &adapter->hw;
2756
2757         /* Do the reset outside of interrupt context */
2758         adapter->tx_timeout_count++;
2759         schedule_work(&adapter->reset_task);
2760         wr32(E1000_EICS, adapter->eims_enable_mask &
2761                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
2762 }
2763
2764 static void igb_reset_task(struct work_struct *work)
2765 {
2766         struct igb_adapter *adapter;
2767         adapter = container_of(work, struct igb_adapter, reset_task);
2768
2769         igb_reinit_locked(adapter);
2770 }
2771
2772 /**
2773  * igb_get_stats - Get System Network Statistics
2774  * @netdev: network interface device structure
2775  *
2776  * Returns the address of the device statistics structure.
2777  * The statistics are actually updated from the timer callback.
2778  **/
2779 static struct net_device_stats *
2780 igb_get_stats(struct net_device *netdev)
2781 {
2782         struct igb_adapter *adapter = netdev_priv(netdev);
2783
2784         /* only return the current stats */
2785         return &adapter->net_stats;
2786 }
2787
2788 /**
2789  * igb_change_mtu - Change the Maximum Transfer Unit
2790  * @netdev: network interface device structure
2791  * @new_mtu: new value for maximum frame size
2792  *
2793  * Returns 0 on success, negative on failure
2794  **/
2795 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
2796 {
2797         struct igb_adapter *adapter = netdev_priv(netdev);
2798         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2799
2800         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2801             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2802                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
2803                 return -EINVAL;
2804         }
2805
2806 #define MAX_STD_JUMBO_FRAME_SIZE 9234
2807         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2808                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
2809                 return -EINVAL;
2810         }
2811
2812         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2813                 msleep(1);
2814         /* igb_down has a dependency on max_frame_size */
2815         adapter->max_frame_size = max_frame;
2816         if (netif_running(netdev))
2817                 igb_down(adapter);
2818
2819         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
2820          * means we reserve 2 more, this pushes us to allocate from the next
2821          * larger slab size.
2822          * i.e. RXBUFFER_2048 --> size-4096 slab
2823          */
2824
2825         if (max_frame <= IGB_RXBUFFER_256)
2826                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
2827         else if (max_frame <= IGB_RXBUFFER_512)
2828                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
2829         else if (max_frame <= IGB_RXBUFFER_1024)
2830                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
2831         else if (max_frame <= IGB_RXBUFFER_2048)
2832                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
2833         else
2834                 adapter->rx_buffer_len = IGB_RXBUFFER_4096;
2835         /* adjust allocation if LPE protects us, and we aren't using SBP */
2836         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
2837              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
2838                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
2839
2840         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
2841                  netdev->mtu, new_mtu);
2842         netdev->mtu = new_mtu;
2843
2844         if (netif_running(netdev))
2845                 igb_up(adapter);
2846         else
2847                 igb_reset(adapter);
2848
2849         clear_bit(__IGB_RESETTING, &adapter->state);
2850
2851         return 0;
2852 }
2853
2854 /**
2855  * igb_update_stats - Update the board statistics counters
2856  * @adapter: board private structure
2857  **/
2858
2859 void igb_update_stats(struct igb_adapter *adapter)
2860 {
2861         struct e1000_hw *hw = &adapter->hw;
2862         struct pci_dev *pdev = adapter->pdev;
2863         u16 phy_tmp;
2864
2865 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2866
2867         /*
2868          * Prevent stats update while adapter is being reset, or if the pci
2869          * connection is down.
2870          */
2871         if (adapter->link_speed == 0)
2872                 return;
2873         if (pci_channel_offline(pdev))
2874                 return;
2875
2876         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
2877         adapter->stats.gprc += rd32(E1000_GPRC);
2878         adapter->stats.gorc += rd32(E1000_GORCL);
2879         rd32(E1000_GORCH); /* clear GORCL */
2880         adapter->stats.bprc += rd32(E1000_BPRC);
2881         adapter->stats.mprc += rd32(E1000_MPRC);
2882         adapter->stats.roc += rd32(E1000_ROC);
2883
2884         adapter->stats.prc64 += rd32(E1000_PRC64);
2885         adapter->stats.prc127 += rd32(E1000_PRC127);
2886         adapter->stats.prc255 += rd32(E1000_PRC255);
2887         adapter->stats.prc511 += rd32(E1000_PRC511);
2888         adapter->stats.prc1023 += rd32(E1000_PRC1023);
2889         adapter->stats.prc1522 += rd32(E1000_PRC1522);
2890         adapter->stats.symerrs += rd32(E1000_SYMERRS);
2891         adapter->stats.sec += rd32(E1000_SEC);
2892
2893         adapter->stats.mpc += rd32(E1000_MPC);
2894         adapter->stats.scc += rd32(E1000_SCC);
2895         adapter->stats.ecol += rd32(E1000_ECOL);
2896         adapter->stats.mcc += rd32(E1000_MCC);
2897         adapter->stats.latecol += rd32(E1000_LATECOL);
2898         adapter->stats.dc += rd32(E1000_DC);
2899         adapter->stats.rlec += rd32(E1000_RLEC);
2900         adapter->stats.xonrxc += rd32(E1000_XONRXC);
2901         adapter->stats.xontxc += rd32(E1000_XONTXC);
2902         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
2903         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
2904         adapter->stats.fcruc += rd32(E1000_FCRUC);
2905         adapter->stats.gptc += rd32(E1000_GPTC);
2906         adapter->stats.gotc += rd32(E1000_GOTCL);
2907         rd32(E1000_GOTCH); /* clear GOTCL */
2908         adapter->stats.rnbc += rd32(E1000_RNBC);
2909         adapter->stats.ruc += rd32(E1000_RUC);
2910         adapter->stats.rfc += rd32(E1000_RFC);
2911         adapter->stats.rjc += rd32(E1000_RJC);
2912         adapter->stats.tor += rd32(E1000_TORH);
2913         adapter->stats.tot += rd32(E1000_TOTH);
2914         adapter->stats.tpr += rd32(E1000_TPR);
2915
2916         adapter->stats.ptc64 += rd32(E1000_PTC64);
2917         adapter->stats.ptc127 += rd32(E1000_PTC127);
2918         adapter->stats.ptc255 += rd32(E1000_PTC255);
2919         adapter->stats.ptc511 += rd32(E1000_PTC511);
2920         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
2921         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
2922
2923         adapter->stats.mptc += rd32(E1000_MPTC);
2924         adapter->stats.bptc += rd32(E1000_BPTC);
2925
2926         /* used for adaptive IFS */
2927
2928         hw->mac.tx_packet_delta = rd32(E1000_TPT);
2929         adapter->stats.tpt += hw->mac.tx_packet_delta;
2930         hw->mac.collision_delta = rd32(E1000_COLC);
2931         adapter->stats.colc += hw->mac.collision_delta;
2932
2933         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
2934         adapter->stats.rxerrc += rd32(E1000_RXERRC);
2935         adapter->stats.tncrs += rd32(E1000_TNCRS);
2936         adapter->stats.tsctc += rd32(E1000_TSCTC);
2937         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
2938
2939         adapter->stats.iac += rd32(E1000_IAC);
2940         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
2941         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
2942         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
2943         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
2944         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
2945         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
2946         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
2947         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
2948
2949         /* Fill out the OS statistics structure */
2950         adapter->net_stats.multicast = adapter->stats.mprc;
2951         adapter->net_stats.collisions = adapter->stats.colc;
2952
2953         /* Rx Errors */
2954
2955         /* RLEC on some newer hardware can be incorrect so build
2956         * our own version based on RUC and ROC */
2957         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
2958                 adapter->stats.crcerrs + adapter->stats.algnerrc +
2959                 adapter->stats.ruc + adapter->stats.roc +
2960                 adapter->stats.cexterr;
2961         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
2962                                               adapter->stats.roc;
2963         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2964         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
2965         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
2966
2967         /* Tx Errors */
2968         adapter->net_stats.tx_errors = adapter->stats.ecol +
2969                                        adapter->stats.latecol;
2970         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
2971         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
2972         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
2973
2974         /* Tx Dropped needs to be maintained elsewhere */
2975
2976         /* Phy Stats */
2977         if (hw->phy.media_type == e1000_media_type_copper) {
2978                 if ((adapter->link_speed == SPEED_1000) &&
2979                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
2980                                               &phy_tmp))) {
2981                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
2982                         adapter->phy_stats.idle_errors += phy_tmp;
2983                 }
2984         }
2985
2986         /* Management Stats */
2987         adapter->stats.mgptc += rd32(E1000_MGTPTC);
2988         adapter->stats.mgprc += rd32(E1000_MGTPRC);
2989         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
2990 }
2991
2992
2993 static irqreturn_t igb_msix_other(int irq, void *data)
2994 {
2995         struct net_device *netdev = data;
2996         struct igb_adapter *adapter = netdev_priv(netdev);
2997         struct e1000_hw *hw = &adapter->hw;
2998         u32 eicr;
2999         /* disable interrupts from the "other" bit, avoid re-entry */
3000         wr32(E1000_EIMC, E1000_EIMS_OTHER);
3001
3002         eicr = rd32(E1000_EICR);
3003
3004         if (eicr & E1000_EIMS_OTHER) {
3005                 u32 icr = rd32(E1000_ICR);
3006                 /* reading ICR causes bit 31 of EICR to be cleared */
3007                 if (!(icr & E1000_ICR_LSC))
3008                         goto no_link_interrupt;
3009                 hw->mac.get_link_status = 1;
3010                 /* guard against interrupt when we're going down */
3011                 if (!test_bit(__IGB_DOWN, &adapter->state))
3012                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3013         }
3014
3015 no_link_interrupt:
3016         wr32(E1000_IMS, E1000_IMS_LSC);
3017         wr32(E1000_EIMS, E1000_EIMS_OTHER);
3018
3019         return IRQ_HANDLED;
3020 }
3021
3022 static irqreturn_t igb_msix_tx(int irq, void *data)
3023 {
3024         struct igb_ring *tx_ring = data;
3025         struct igb_adapter *adapter = tx_ring->adapter;
3026         struct e1000_hw *hw = &adapter->hw;
3027
3028         if (!tx_ring->itr_val)
3029                 wr32(E1000_EIMC, tx_ring->eims_value);
3030
3031         tx_ring->total_bytes = 0;
3032         tx_ring->total_packets = 0;
3033         if (!igb_clean_tx_irq(adapter, tx_ring))
3034                 /* Ring was not completely cleaned, so fire another interrupt */
3035                 wr32(E1000_EICS, tx_ring->eims_value);
3036
3037         if (!tx_ring->itr_val)
3038                 wr32(E1000_EIMS, tx_ring->eims_value);
3039         return IRQ_HANDLED;
3040 }
3041
3042 static irqreturn_t igb_msix_rx(int irq, void *data)
3043 {
3044         struct igb_ring *rx_ring = data;
3045         struct igb_adapter *adapter = rx_ring->adapter;
3046         struct e1000_hw *hw = &adapter->hw;
3047
3048         if (!rx_ring->itr_val)
3049                 wr32(E1000_EIMC, rx_ring->eims_value);
3050
3051         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi)) {
3052                 rx_ring->total_bytes = 0;
3053                 rx_ring->total_packets = 0;
3054                 rx_ring->no_itr_adjust = 0;
3055                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3056         } else {
3057                 if (!rx_ring->no_itr_adjust) {
3058                         igb_lower_rx_eitr(adapter, rx_ring);
3059                         rx_ring->no_itr_adjust = 1;
3060                 }
3061         }
3062
3063         return IRQ_HANDLED;
3064 }
3065
3066
3067 /**
3068  * igb_intr_msi - Interrupt Handler
3069  * @irq: interrupt number
3070  * @data: pointer to a network interface device structure
3071  **/
3072 static irqreturn_t igb_intr_msi(int irq, void *data)
3073 {
3074         struct net_device *netdev = data;
3075         struct igb_adapter *adapter = netdev_priv(netdev);
3076         struct napi_struct *napi = &adapter->napi;
3077         struct e1000_hw *hw = &adapter->hw;
3078         /* read ICR disables interrupts using IAM */
3079         u32 icr = rd32(E1000_ICR);
3080
3081         /* Write the ITR value calculated at the end of the
3082          * previous interrupt.
3083          */
3084         if (adapter->set_itr) {
3085                 wr32(E1000_ITR,
3086                         1000000000 / (adapter->itr * 256));
3087                 adapter->set_itr = 0;
3088         }
3089
3090         /* read ICR disables interrupts using IAM */
3091         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3092                 hw->mac.get_link_status = 1;
3093                 if (!test_bit(__IGB_DOWN, &adapter->state))
3094                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3095         }
3096
3097         if (netif_rx_schedule_prep(netdev, napi)) {
3098                 adapter->tx_ring->total_bytes = 0;
3099                 adapter->tx_ring->total_packets = 0;
3100                 adapter->rx_ring->total_bytes = 0;
3101                 adapter->rx_ring->total_packets = 0;
3102                 __netif_rx_schedule(netdev, napi);
3103         }
3104
3105         return IRQ_HANDLED;
3106 }
3107
3108 /**
3109  * igb_intr - Interrupt Handler
3110  * @irq: interrupt number
3111  * @data: pointer to a network interface device structure
3112  **/
3113 static irqreturn_t igb_intr(int irq, void *data)
3114 {
3115         struct net_device *netdev = data;
3116         struct igb_adapter *adapter = netdev_priv(netdev);
3117         struct napi_struct *napi = &adapter->napi;
3118         struct e1000_hw *hw = &adapter->hw;
3119         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3120          * need for the IMC write */
3121         u32 icr = rd32(E1000_ICR);
3122         u32 eicr = 0;
3123         if (!icr)
3124                 return IRQ_NONE;  /* Not our interrupt */
3125
3126         /* Write the ITR value calculated at the end of the
3127          * previous interrupt.
3128          */
3129         if (adapter->set_itr) {
3130                 wr32(E1000_ITR,
3131                         1000000000 / (adapter->itr * 256));
3132                 adapter->set_itr = 0;
3133         }
3134
3135         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3136          * not set, then the adapter didn't send an interrupt */
3137         if (!(icr & E1000_ICR_INT_ASSERTED))
3138                 return IRQ_NONE;
3139
3140         eicr = rd32(E1000_EICR);
3141
3142         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3143                 hw->mac.get_link_status = 1;
3144                 /* guard against interrupt when we're going down */
3145                 if (!test_bit(__IGB_DOWN, &adapter->state))
3146                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3147         }
3148
3149         if (netif_rx_schedule_prep(netdev, napi)) {
3150                 adapter->tx_ring->total_bytes = 0;
3151                 adapter->rx_ring->total_bytes = 0;
3152                 adapter->tx_ring->total_packets = 0;
3153                 adapter->rx_ring->total_packets = 0;
3154                 __netif_rx_schedule(netdev, napi);
3155         }
3156
3157         return IRQ_HANDLED;
3158 }
3159
3160 /**
3161  * igb_clean - NAPI Rx polling callback
3162  * @adapter: board private structure
3163  **/
3164 static int igb_clean(struct napi_struct *napi, int budget)
3165 {
3166         struct igb_adapter *adapter = container_of(napi, struct igb_adapter,
3167                                                    napi);
3168         struct net_device *netdev = adapter->netdev;
3169         int tx_clean_complete = 1, work_done = 0;
3170         int i;
3171
3172         /* Must NOT use netdev_priv macro here. */
3173         adapter = netdev->priv;
3174
3175         /* Keep link state information with original netdev */
3176         if (!netif_carrier_ok(netdev))
3177                 goto quit_polling;
3178
3179         /* igb_clean is called per-cpu.  This lock protects tx_ring[i] from
3180          * being cleaned by multiple cpus simultaneously.  A failure obtaining
3181          * the lock means tx_ring[i] is currently being cleaned anyway. */
3182         for (i = 0; i < adapter->num_tx_queues; i++) {
3183                 if (spin_trylock(&adapter->tx_ring[i].tx_clean_lock)) {
3184                         tx_clean_complete &= igb_clean_tx_irq(adapter,
3185                                                         &adapter->tx_ring[i]);
3186                         spin_unlock(&adapter->tx_ring[i].tx_clean_lock);
3187                 }
3188         }
3189
3190         for (i = 0; i < adapter->num_rx_queues; i++)
3191                 igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i], &work_done,
3192                                      adapter->rx_ring[i].napi.weight);
3193
3194         /* If no Tx and not enough Rx work done, exit the polling mode */
3195         if ((tx_clean_complete && (work_done < budget)) ||
3196             !netif_running(netdev)) {
3197 quit_polling:
3198                 if (adapter->itr_setting & 3)
3199                         igb_set_itr(adapter, E1000_ITR, false);
3200                 netif_rx_complete(netdev, napi);
3201                 if (!test_bit(__IGB_DOWN, &adapter->state))
3202                         igb_irq_enable(adapter);
3203                 return 0;
3204         }
3205
3206         return 1;
3207 }
3208
3209 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3210 {
3211         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3212         struct igb_adapter *adapter = rx_ring->adapter;
3213         struct e1000_hw *hw = &adapter->hw;
3214         struct net_device *netdev = adapter->netdev;
3215         int work_done = 0;
3216
3217         /* Keep link state information with original netdev */
3218         if (!netif_carrier_ok(netdev))
3219                 goto quit_polling;
3220
3221         igb_clean_rx_irq_adv(adapter, rx_ring, &work_done, budget);
3222
3223
3224         /* If not enough Rx work done, exit the polling mode */
3225         if ((work_done == 0) || !netif_running(netdev)) {
3226 quit_polling:
3227                 netif_rx_complete(netdev, napi);
3228
3229                 wr32(E1000_EIMS, rx_ring->eims_value);
3230                 if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust &&
3231                     (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) {
3232                         int mean_size = rx_ring->total_bytes /
3233                                         rx_ring->total_packets;
3234                         if (mean_size < IGB_DYN_ITR_LENGTH_LOW)
3235                                 igb_raise_rx_eitr(adapter, rx_ring);
3236                         else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH)
3237                                 igb_lower_rx_eitr(adapter, rx_ring);
3238                 }
3239                 return 0;
3240         }
3241
3242         return 1;
3243 }
3244 /**
3245  * igb_clean_tx_irq - Reclaim resources after transmit completes
3246  * @adapter: board private structure
3247  * returns true if ring is completely cleaned
3248  **/
3249 static bool igb_clean_tx_irq(struct igb_adapter *adapter,
3250                                   struct igb_ring *tx_ring)
3251 {
3252         struct net_device *netdev = adapter->netdev;
3253         struct e1000_hw *hw = &adapter->hw;
3254         struct e1000_tx_desc *tx_desc;
3255         struct igb_buffer *buffer_info;
3256         struct sk_buff *skb;
3257         unsigned int i;
3258         u32 head, oldhead;
3259         unsigned int count = 0;
3260         bool cleaned = false;
3261         bool retval = true;
3262         unsigned int total_bytes = 0, total_packets = 0;
3263
3264         rmb();
3265         head = *(volatile u32 *)((struct e1000_tx_desc *)tx_ring->desc
3266                                  + tx_ring->count);
3267         head = le32_to_cpu(head);
3268         i = tx_ring->next_to_clean;
3269         while (1) {
3270                 while (i != head) {
3271                         cleaned = true;
3272                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3273                         buffer_info = &tx_ring->buffer_info[i];
3274                         skb = buffer_info->skb;
3275
3276                         if (skb) {
3277                                 unsigned int segs, bytecount;
3278                                 /* gso_segs is currently only valid for tcp */
3279                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3280                                 /* multiply data chunks by size of headers */
3281                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3282                                             skb->len;
3283                                 total_packets += segs;
3284                                 total_bytes += bytecount;
3285                         }
3286
3287                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3288                         tx_desc->upper.data = 0;
3289
3290                         i++;
3291                         if (i == tx_ring->count)
3292                                 i = 0;
3293
3294                         count++;
3295                         if (count == IGB_MAX_TX_CLEAN) {
3296                                 retval = false;
3297                                 goto done_cleaning;
3298                         }
3299                 }
3300                 oldhead = head;
3301                 rmb();
3302                 head = *(volatile u32 *)((struct e1000_tx_desc *)tx_ring->desc
3303                                          + tx_ring->count);
3304                 head = le32_to_cpu(head);
3305                 if (head == oldhead)
3306                         goto done_cleaning;
3307         }  /* while (1) */
3308
3309 done_cleaning:
3310         tx_ring->next_to_clean = i;
3311
3312         if (unlikely(cleaned &&
3313                      netif_carrier_ok(netdev) &&
3314                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3315                 /* Make sure that anybody stopping the queue after this
3316                  * sees the new next_to_clean.
3317                  */
3318                 smp_mb();
3319                 if (netif_queue_stopped(netdev) &&
3320                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3321                         netif_wake_queue(netdev);
3322                         ++adapter->restart_queue;
3323                 }
3324         }
3325
3326         if (tx_ring->detect_tx_hung) {
3327                 /* Detect a transmit hang in hardware, this serializes the
3328                  * check with the clearing of time_stamp and movement of i */
3329                 tx_ring->detect_tx_hung = false;
3330                 if (tx_ring->buffer_info[i].time_stamp &&
3331                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3332                                (adapter->tx_timeout_factor * HZ))
3333                     && !(rd32(E1000_STATUS) &
3334                          E1000_STATUS_TXOFF)) {
3335
3336                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3337                         /* detected Tx unit hang */
3338                         dev_err(&adapter->pdev->dev,
3339                                 "Detected Tx Unit Hang\n"
3340                                 "  Tx Queue             <%lu>\n"
3341                                 "  TDH                  <%x>\n"
3342                                 "  TDT                  <%x>\n"
3343                                 "  next_to_use          <%x>\n"
3344                                 "  next_to_clean        <%x>\n"
3345                                 "  head (WB)            <%x>\n"
3346                                 "buffer_info[next_to_clean]\n"
3347                                 "  time_stamp           <%lx>\n"
3348                                 "  jiffies              <%lx>\n"
3349                                 "  desc.status          <%x>\n",
3350                                 (unsigned long)((tx_ring - adapter->tx_ring) /
3351                                         sizeof(struct igb_ring)),
3352                                 readl(adapter->hw.hw_addr + tx_ring->head),
3353                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3354                                 tx_ring->next_to_use,
3355                                 tx_ring->next_to_clean,
3356                                 head,
3357                                 tx_ring->buffer_info[i].time_stamp,
3358                                 jiffies,
3359                                 tx_desc->upper.fields.status);
3360                         netif_stop_queue(netdev);
3361                 }
3362         }
3363         tx_ring->total_bytes += total_bytes;
3364         tx_ring->total_packets += total_packets;
3365         adapter->net_stats.tx_bytes += total_bytes;
3366         adapter->net_stats.tx_packets += total_packets;
3367         return retval;
3368 }
3369
3370
3371 /**
3372  * igb_receive_skb - helper function to handle rx indications
3373  * @adapter: board private structure
3374  * @status: descriptor status field as written by hardware
3375  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3376  * @skb: pointer to sk_buff to be indicated to stack
3377  **/
3378 static void igb_receive_skb(struct igb_adapter *adapter, u8 status, u16 vlan,
3379                             struct sk_buff *skb)
3380 {
3381         if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
3382                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3383                                          le16_to_cpu(vlan) &
3384                                          E1000_RXD_SPC_VLAN_MASK);
3385         else
3386                 netif_receive_skb(skb);
3387 }
3388
3389
3390 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3391                                        u32 status_err, struct sk_buff *skb)
3392 {
3393         skb->ip_summed = CHECKSUM_NONE;
3394
3395         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3396         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3397                 return;
3398         /* TCP/UDP checksum error bit is set */
3399         if (status_err &
3400             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3401                 /* let the stack verify checksum errors */
3402                 adapter->hw_csum_err++;
3403                 return;
3404         }
3405         /* It must be a TCP or UDP packet with a valid checksum */
3406         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3407                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3408
3409         adapter->hw_csum_good++;
3410 }
3411
3412 static bool igb_clean_rx_irq_adv(struct igb_adapter *adapter,
3413                                       struct igb_ring *rx_ring,
3414                                       int *work_done, int budget)
3415 {
3416         struct net_device *netdev = adapter->netdev;
3417         struct pci_dev *pdev = adapter->pdev;
3418         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3419         struct igb_buffer *buffer_info , *next_buffer;
3420         struct sk_buff *skb;
3421         unsigned int i, j;
3422         u32 length, hlen, staterr;
3423         bool cleaned = false;
3424         int cleaned_count = 0;
3425         unsigned int total_bytes = 0, total_packets = 0;
3426
3427         i = rx_ring->next_to_clean;
3428         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3429         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3430
3431         while (staterr & E1000_RXD_STAT_DD) {
3432                 if (*work_done >= budget)
3433                         break;
3434                 (*work_done)++;
3435                 buffer_info = &rx_ring->buffer_info[i];
3436
3437                 /* HW will not DMA in data larger than the given buffer, even
3438                  * if it parses the (NFS, of course) header to be larger.  In
3439                  * that case, it fills the header buffer and spills the rest
3440                  * into the page.
3441                  */
3442                 hlen = le16_to_cpu((rx_desc->wb.lower.lo_dword.hdr_info &
3443                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT);
3444                 if (hlen > adapter->rx_ps_hdr_size)
3445                         hlen = adapter->rx_ps_hdr_size;
3446
3447                 length = le16_to_cpu(rx_desc->wb.upper.length);
3448                 cleaned = true;
3449                 cleaned_count++;
3450
3451                 if (rx_ring->pending_skb != NULL) {
3452                         skb = rx_ring->pending_skb;
3453                         rx_ring->pending_skb = NULL;
3454                         j = rx_ring->pending_skb_page;
3455                 } else {
3456                         skb = buffer_info->skb;
3457                         prefetch(skb->data - NET_IP_ALIGN);
3458                         buffer_info->skb = NULL;
3459                         if (hlen) {
3460                                 pci_unmap_single(pdev, buffer_info->dma,
3461                                                  adapter->rx_ps_hdr_size +
3462                                                    NET_IP_ALIGN,
3463                                                  PCI_DMA_FROMDEVICE);
3464                                 skb_put(skb, hlen);
3465                         } else {
3466                                 pci_unmap_single(pdev, buffer_info->dma,
3467                                                  adapter->rx_buffer_len +
3468                                                    NET_IP_ALIGN,
3469                                                  PCI_DMA_FROMDEVICE);
3470                                 skb_put(skb, length);
3471                                 goto send_up;
3472                         }
3473                         j = 0;
3474                 }
3475
3476                 while (length) {
3477                         pci_unmap_page(pdev, buffer_info->page_dma,
3478                                 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3479                         buffer_info->page_dma = 0;
3480                         skb_fill_page_desc(skb, j, buffer_info->page,
3481                                                 0, length);
3482                         buffer_info->page = NULL;
3483
3484                         skb->len += length;
3485                         skb->data_len += length;
3486                         skb->truesize += length;
3487                         rx_desc->wb.upper.status_error = 0;
3488                         if (staterr & E1000_RXD_STAT_EOP)
3489                                 break;
3490
3491                         j++;
3492                         cleaned_count++;
3493                         i++;
3494                         if (i == rx_ring->count)
3495                                 i = 0;
3496
3497                         buffer_info = &rx_ring->buffer_info[i];
3498                         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3499                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3500                         length = le16_to_cpu(rx_desc->wb.upper.length);
3501                         if (!(staterr & E1000_RXD_STAT_DD)) {
3502                                 rx_ring->pending_skb = skb;
3503                                 rx_ring->pending_skb_page = j;
3504                                 goto out;
3505                         }
3506                 }
3507 send_up:
3508                 pskb_trim(skb, skb->len - 4);
3509                 i++;
3510                 if (i == rx_ring->count)
3511                         i = 0;
3512                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3513                 prefetch(next_rxd);
3514                 next_buffer = &rx_ring->buffer_info[i];
3515
3516                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3517                         dev_kfree_skb_irq(skb);
3518                         goto next_desc;
3519                 }
3520                 rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT);
3521
3522                 total_bytes += skb->len;
3523                 total_packets++;
3524
3525                 igb_rx_checksum_adv(adapter, staterr, skb);
3526
3527                 skb->protocol = eth_type_trans(skb, netdev);
3528
3529                 igb_receive_skb(adapter, staterr, rx_desc->wb.upper.vlan, skb);
3530
3531                 netdev->last_rx = jiffies;
3532
3533 next_desc:
3534                 rx_desc->wb.upper.status_error = 0;
3535
3536                 /* return some buffers to hardware, one at a time is too slow */
3537                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3538                         igb_alloc_rx_buffers_adv(adapter, rx_ring,
3539                                                  cleaned_count);
3540                         cleaned_count = 0;
3541                 }
3542
3543                 /* use prefetched values */
3544                 rx_desc = next_rxd;
3545                 buffer_info = next_buffer;
3546
3547                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3548         }
3549 out:
3550         rx_ring->next_to_clean = i;
3551         cleaned_count = IGB_DESC_UNUSED(rx_ring);
3552
3553         if (cleaned_count)
3554                 igb_alloc_rx_buffers_adv(adapter, rx_ring, cleaned_count);
3555
3556         rx_ring->total_packets += total_packets;
3557         rx_ring->total_bytes += total_bytes;
3558         rx_ring->rx_stats.packets += total_packets;
3559         rx_ring->rx_stats.bytes += total_bytes;
3560         adapter->net_stats.rx_bytes += total_bytes;
3561         adapter->net_stats.rx_packets += total_packets;
3562         return cleaned;
3563 }
3564
3565
3566 /**
3567  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3568  * @adapter: address of board private structure
3569  **/
3570 static void igb_alloc_rx_buffers_adv(struct igb_adapter *adapter,
3571                                      struct igb_ring *rx_ring,
3572                                      int cleaned_count)
3573 {
3574         struct net_device *netdev = adapter->netdev;
3575         struct pci_dev *pdev = adapter->pdev;
3576         union e1000_adv_rx_desc *rx_desc;
3577         struct igb_buffer *buffer_info;
3578         struct sk_buff *skb;
3579         unsigned int i;
3580
3581         i = rx_ring->next_to_use;
3582         buffer_info = &rx_ring->buffer_info[i];
3583
3584         while (cleaned_count--) {
3585                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3586
3587                 if (adapter->rx_ps_hdr_size && !buffer_info->page) {
3588                         buffer_info->page = alloc_page(GFP_ATOMIC);
3589                         if (!buffer_info->page) {
3590                                 adapter->alloc_rx_buff_failed++;
3591                                 goto no_buffers;
3592                         }
3593                         buffer_info->page_dma =
3594                                 pci_map_page(pdev,
3595                                              buffer_info->page,
3596                                              0, PAGE_SIZE,
3597                                              PCI_DMA_FROMDEVICE);
3598                 }
3599
3600                 if (!buffer_info->skb) {
3601                         int bufsz;
3602
3603                         if (adapter->rx_ps_hdr_size)
3604                                 bufsz = adapter->rx_ps_hdr_size;
3605                         else
3606                                 bufsz = adapter->rx_buffer_len;
3607                         bufsz += NET_IP_ALIGN;
3608                         skb = netdev_alloc_skb(netdev, bufsz);
3609
3610                         if (!skb) {
3611                                 adapter->alloc_rx_buff_failed++;
3612                                 goto no_buffers;
3613                         }
3614
3615                         /* Make buffer alignment 2 beyond a 16 byte boundary
3616                          * this will result in a 16 byte aligned IP header after
3617                          * the 14 byte MAC header is removed
3618                          */
3619                         skb_reserve(skb, NET_IP_ALIGN);
3620
3621                         buffer_info->skb = skb;
3622                         buffer_info->dma = pci_map_single(pdev, skb->data,
3623                                                           bufsz,
3624                                                           PCI_DMA_FROMDEVICE);
3625
3626                 }
3627                 /* Refresh the desc even if buffer_addrs didn't change because
3628                  * each write-back erases this info. */
3629                 if (adapter->rx_ps_hdr_size) {
3630                         rx_desc->read.pkt_addr =
3631                              cpu_to_le64(buffer_info->page_dma);
3632                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
3633                 } else {
3634                         rx_desc->read.pkt_addr =
3635                              cpu_to_le64(buffer_info->dma);
3636                         rx_desc->read.hdr_addr = 0;
3637                 }
3638
3639                 i++;
3640                 if (i == rx_ring->count)
3641                         i = 0;
3642                 buffer_info = &rx_ring->buffer_info[i];
3643         }
3644
3645 no_buffers:
3646         if (rx_ring->next_to_use != i) {
3647                 rx_ring->next_to_use = i;
3648                 if (i == 0)
3649                         i = (rx_ring->count - 1);
3650                 else
3651                         i--;
3652
3653                 /* Force memory writes to complete before letting h/w
3654                  * know there are new descriptors to fetch.  (Only
3655                  * applicable for weak-ordered memory model archs,
3656                  * such as IA-64). */
3657                 wmb();
3658                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
3659         }
3660 }
3661
3662 /**
3663  * igb_mii_ioctl -
3664  * @netdev:
3665  * @ifreq:
3666  * @cmd:
3667  **/
3668 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3669 {
3670         struct igb_adapter *adapter = netdev_priv(netdev);
3671         struct mii_ioctl_data *data = if_mii(ifr);
3672
3673         if (adapter->hw.phy.media_type != e1000_media_type_copper)
3674                 return -EOPNOTSUPP;
3675
3676         switch (cmd) {
3677         case SIOCGMIIPHY:
3678                 data->phy_id = adapter->hw.phy.addr;
3679                 break;
3680         case SIOCGMIIREG:
3681                 if (!capable(CAP_NET_ADMIN))
3682                         return -EPERM;
3683                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
3684                                                      data->reg_num
3685                                                      & 0x1F, &data->val_out))
3686                         return -EIO;
3687                 break;
3688         case SIOCSMIIREG:
3689         default:
3690                 return -EOPNOTSUPP;
3691         }
3692         return 0;
3693 }
3694
3695 /**
3696  * igb_ioctl -
3697  * @netdev:
3698  * @ifreq:
3699  * @cmd:
3700  **/
3701 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3702 {
3703         switch (cmd) {
3704         case SIOCGMIIPHY:
3705         case SIOCGMIIREG:
3706         case SIOCSMIIREG:
3707                 return igb_mii_ioctl(netdev, ifr, cmd);
3708         default:
3709                 return -EOPNOTSUPP;
3710         }
3711 }
3712
3713 static void igb_vlan_rx_register(struct net_device *netdev,
3714                                  struct vlan_group *grp)
3715 {
3716         struct igb_adapter *adapter = netdev_priv(netdev);
3717         struct e1000_hw *hw = &adapter->hw;
3718         u32 ctrl, rctl;
3719
3720         igb_irq_disable(adapter);
3721         adapter->vlgrp = grp;
3722
3723         if (grp) {
3724                 /* enable VLAN tag insert/strip */
3725                 ctrl = rd32(E1000_CTRL);
3726                 ctrl |= E1000_CTRL_VME;
3727                 wr32(E1000_CTRL, ctrl);
3728
3729                 /* enable VLAN receive filtering */
3730                 rctl = rd32(E1000_RCTL);
3731                 rctl |= E1000_RCTL_VFE;
3732                 rctl &= ~E1000_RCTL_CFIEN;
3733                 wr32(E1000_RCTL, rctl);
3734                 igb_update_mng_vlan(adapter);
3735                 wr32(E1000_RLPML,
3736                                 adapter->max_frame_size + VLAN_TAG_SIZE);
3737         } else {
3738                 /* disable VLAN tag insert/strip */
3739                 ctrl = rd32(E1000_CTRL);
3740                 ctrl &= ~E1000_CTRL_VME;
3741                 wr32(E1000_CTRL, ctrl);
3742
3743                 /* disable VLAN filtering */
3744                 rctl = rd32(E1000_RCTL);
3745                 rctl &= ~E1000_RCTL_VFE;
3746                 wr32(E1000_RCTL, rctl);
3747                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
3748                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3749                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
3750                 }
3751                 wr32(E1000_RLPML,
3752                                 adapter->max_frame_size);
3753         }
3754
3755         if (!test_bit(__IGB_DOWN, &adapter->state))
3756                 igb_irq_enable(adapter);
3757 }
3758
3759 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3760 {
3761         struct igb_adapter *adapter = netdev_priv(netdev);
3762         struct e1000_hw *hw = &adapter->hw;
3763         u32 vfta, index;
3764
3765         if ((adapter->hw.mng_cookie.status &
3766              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3767             (vid == adapter->mng_vlan_id))
3768                 return;
3769         /* add VID to filter table */
3770         index = (vid >> 5) & 0x7F;
3771         vfta = array_rd32(E1000_VFTA, index);
3772         vfta |= (1 << (vid & 0x1F));
3773         igb_write_vfta(&adapter->hw, index, vfta);
3774 }
3775
3776 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3777 {
3778         struct igb_adapter *adapter = netdev_priv(netdev);
3779         struct e1000_hw *hw = &adapter->hw;
3780         u32 vfta, index;
3781
3782         igb_irq_disable(adapter);
3783         vlan_group_set_device(adapter->vlgrp, vid, NULL);
3784
3785         if (!test_bit(__IGB_DOWN, &adapter->state))
3786                 igb_irq_enable(adapter);
3787
3788         if ((adapter->hw.mng_cookie.status &
3789              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3790             (vid == adapter->mng_vlan_id)) {
3791                 /* release control to f/w */
3792                 igb_release_hw_control(adapter);
3793                 return;
3794         }
3795
3796         /* remove VID from filter table */
3797         index = (vid >> 5) & 0x7F;
3798         vfta = array_rd32(E1000_VFTA, index);
3799         vfta &= ~(1 << (vid & 0x1F));
3800         igb_write_vfta(&adapter->hw, index, vfta);
3801 }
3802
3803 static void igb_restore_vlan(struct igb_adapter *adapter)
3804 {
3805         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
3806
3807         if (adapter->vlgrp) {
3808                 u16 vid;
3809                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
3810                         if (!vlan_group_get_device(adapter->vlgrp, vid))
3811                                 continue;
3812                         igb_vlan_rx_add_vid(adapter->netdev, vid);
3813                 }
3814         }
3815 }
3816
3817 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
3818 {
3819         struct e1000_mac_info *mac = &adapter->hw.mac;
3820
3821         mac->autoneg = 0;
3822
3823         /* Fiber NICs only allow 1000 gbps Full duplex */
3824         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
3825                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
3826                 dev_err(&adapter->pdev->dev,
3827                         "Unsupported Speed/Duplex configuration\n");
3828                 return -EINVAL;
3829         }
3830
3831         switch (spddplx) {
3832         case SPEED_10 + DUPLEX_HALF:
3833                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
3834                 break;
3835         case SPEED_10 + DUPLEX_FULL:
3836                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
3837                 break;
3838         case SPEED_100 + DUPLEX_HALF:
3839                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
3840                 break;
3841         case SPEED_100 + DUPLEX_FULL:
3842                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
3843                 break;
3844         case SPEED_1000 + DUPLEX_FULL:
3845                 mac->autoneg = 1;
3846                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
3847                 break;
3848         case SPEED_1000 + DUPLEX_HALF: /* not supported */
3849         default:
3850                 dev_err(&adapter->pdev->dev,
3851                         "Unsupported Speed/Duplex configuration\n");
3852                 return -EINVAL;
3853         }
3854         return 0;
3855 }
3856
3857
3858 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
3859 {
3860         struct net_device *netdev = pci_get_drvdata(pdev);
3861         struct igb_adapter *adapter = netdev_priv(netdev);
3862         struct e1000_hw *hw = &adapter->hw;
3863         u32 ctrl, ctrl_ext, rctl, status;
3864         u32 wufc = adapter->wol;
3865 #ifdef CONFIG_PM
3866         int retval = 0;
3867 #endif
3868
3869         netif_device_detach(netdev);
3870
3871         if (netif_running(netdev)) {
3872                 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3873                 igb_down(adapter);
3874                 igb_free_irq(adapter);
3875         }
3876
3877 #ifdef CONFIG_PM
3878         retval = pci_save_state(pdev);
3879         if (retval)
3880                 return retval;
3881 #endif
3882
3883         status = rd32(E1000_STATUS);
3884         if (status & E1000_STATUS_LU)
3885                 wufc &= ~E1000_WUFC_LNKC;
3886
3887         if (wufc) {
3888                 igb_setup_rctl(adapter);
3889                 igb_set_multi(netdev);
3890
3891                 /* turn on all-multi mode if wake on multicast is enabled */
3892                 if (wufc & E1000_WUFC_MC) {
3893                         rctl = rd32(E1000_RCTL);
3894                         rctl |= E1000_RCTL_MPE;
3895                         wr32(E1000_RCTL, rctl);
3896                 }
3897
3898                 ctrl = rd32(E1000_CTRL);
3899                 /* advertise wake from D3Cold */
3900                 #define E1000_CTRL_ADVD3WUC 0x00100000
3901                 /* phy power management enable */
3902                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
3903                 ctrl |= E1000_CTRL_ADVD3WUC;
3904                 wr32(E1000_CTRL, ctrl);
3905
3906                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
3907                    adapter->hw.phy.media_type ==
3908                                         e1000_media_type_internal_serdes) {
3909                         /* keep the laser running in D3 */
3910                         ctrl_ext = rd32(E1000_CTRL_EXT);
3911                         ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
3912                         wr32(E1000_CTRL_EXT, ctrl_ext);
3913                 }
3914
3915                 /* Allow time for pending master requests to run */
3916                 igb_disable_pcie_master(&adapter->hw);
3917
3918                 wr32(E1000_WUC, E1000_WUC_PME_EN);
3919                 wr32(E1000_WUFC, wufc);
3920                 pci_enable_wake(pdev, PCI_D3hot, 1);
3921                 pci_enable_wake(pdev, PCI_D3cold, 1);
3922         } else {
3923                 wr32(E1000_WUC, 0);
3924                 wr32(E1000_WUFC, 0);
3925                 pci_enable_wake(pdev, PCI_D3hot, 0);
3926                 pci_enable_wake(pdev, PCI_D3cold, 0);
3927         }
3928
3929         /* make sure adapter isn't asleep if manageability is enabled */
3930         if (adapter->en_mng_pt) {
3931                 pci_enable_wake(pdev, PCI_D3hot, 1);
3932                 pci_enable_wake(pdev, PCI_D3cold, 1);
3933         }
3934
3935         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3936          * would have already happened in close and is redundant. */
3937         igb_release_hw_control(adapter);
3938
3939         pci_disable_device(pdev);
3940
3941         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3942
3943         return 0;
3944 }
3945
3946 #ifdef CONFIG_PM
3947 static int igb_resume(struct pci_dev *pdev)
3948 {
3949         struct net_device *netdev = pci_get_drvdata(pdev);
3950         struct igb_adapter *adapter = netdev_priv(netdev);
3951         struct e1000_hw *hw = &adapter->hw;
3952         u32 err;
3953
3954         pci_set_power_state(pdev, PCI_D0);
3955         pci_restore_state(pdev);
3956         err = pci_enable_device(pdev);
3957         if (err) {
3958                 dev_err(&pdev->dev,
3959                         "igb: Cannot enable PCI device from suspend\n");
3960                 return err;
3961         }
3962         pci_set_master(pdev);
3963
3964         pci_enable_wake(pdev, PCI_D3hot, 0);
3965         pci_enable_wake(pdev, PCI_D3cold, 0);
3966
3967         if (netif_running(netdev)) {
3968                 err = igb_request_irq(adapter);
3969                 if (err)
3970                         return err;
3971         }
3972
3973         /* e1000_power_up_phy(adapter); */
3974
3975         igb_reset(adapter);
3976         wr32(E1000_WUS, ~0);
3977
3978         igb_init_manageability(adapter);
3979
3980         if (netif_running(netdev))
3981                 igb_up(adapter);
3982
3983         netif_device_attach(netdev);
3984
3985         /* let the f/w know that the h/w is now under the control of the
3986          * driver. */
3987         igb_get_hw_control(adapter);
3988
3989         return 0;
3990 }
3991 #endif
3992
3993 static void igb_shutdown(struct pci_dev *pdev)
3994 {
3995         igb_suspend(pdev, PMSG_SUSPEND);
3996 }
3997
3998 #ifdef CONFIG_NET_POLL_CONTROLLER
3999 /*
4000  * Polling 'interrupt' - used by things like netconsole to send skbs
4001  * without having to re-enable interrupts. It's not called while
4002  * the interrupt routine is executing.
4003  */
4004 static void igb_netpoll(struct net_device *netdev)
4005 {
4006         struct igb_adapter *adapter = netdev_priv(netdev);
4007         int i;
4008         int work_done = 0;
4009
4010         igb_irq_disable(adapter);
4011         for (i = 0; i < adapter->num_tx_queues; i++)
4012                 igb_clean_tx_irq(adapter, &adapter->tx_ring[i]);
4013
4014         for (i = 0; i < adapter->num_rx_queues; i++)
4015                 igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i],
4016                                      &work_done,
4017                                      adapter->rx_ring[i].napi.weight);
4018
4019         igb_irq_enable(adapter);
4020 }
4021 #endif /* CONFIG_NET_POLL_CONTROLLER */
4022
4023 /**
4024  * igb_io_error_detected - called when PCI error is detected
4025  * @pdev: Pointer to PCI device
4026  * @state: The current pci connection state
4027  *
4028  * This function is called after a PCI bus error affecting
4029  * this device has been detected.
4030  */
4031 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4032                                               pci_channel_state_t state)
4033 {
4034         struct net_device *netdev = pci_get_drvdata(pdev);
4035         struct igb_adapter *adapter = netdev_priv(netdev);
4036
4037         netif_device_detach(netdev);
4038
4039         if (netif_running(netdev))
4040                 igb_down(adapter);
4041         pci_disable_device(pdev);
4042
4043         /* Request a slot slot reset. */
4044         return PCI_ERS_RESULT_NEED_RESET;
4045 }
4046
4047 /**
4048  * igb_io_slot_reset - called after the pci bus has been reset.
4049  * @pdev: Pointer to PCI device
4050  *
4051  * Restart the card from scratch, as if from a cold-boot. Implementation
4052  * resembles the first-half of the igb_resume routine.
4053  */
4054 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4055 {
4056         struct net_device *netdev = pci_get_drvdata(pdev);
4057         struct igb_adapter *adapter = netdev_priv(netdev);
4058         struct e1000_hw *hw = &adapter->hw;
4059
4060         if (pci_enable_device(pdev)) {
4061                 dev_err(&pdev->dev,
4062                         "Cannot re-enable PCI device after reset.\n");
4063                 return PCI_ERS_RESULT_DISCONNECT;
4064         }
4065         pci_set_master(pdev);
4066
4067         pci_enable_wake(pdev, PCI_D3hot, 0);
4068         pci_enable_wake(pdev, PCI_D3cold, 0);
4069
4070         igb_reset(adapter);
4071         wr32(E1000_WUS, ~0);
4072
4073         return PCI_ERS_RESULT_RECOVERED;
4074 }
4075
4076 /**
4077  * igb_io_resume - called when traffic can start flowing again.
4078  * @pdev: Pointer to PCI device
4079  *
4080  * This callback is called when the error recovery driver tells us that
4081  * its OK to resume normal operation. Implementation resembles the
4082  * second-half of the igb_resume routine.
4083  */
4084 static void igb_io_resume(struct pci_dev *pdev)
4085 {
4086         struct net_device *netdev = pci_get_drvdata(pdev);
4087         struct igb_adapter *adapter = netdev_priv(netdev);
4088
4089         igb_init_manageability(adapter);
4090
4091         if (netif_running(netdev)) {
4092                 if (igb_up(adapter)) {
4093                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4094                         return;
4095                 }
4096         }
4097
4098         netif_device_attach(netdev);
4099
4100         /* let the f/w know that the h/w is now under the control of the
4101          * driver. */
4102         igb_get_hw_control(adapter);
4103
4104 }
4105
4106 /* igb_main.c */