drivers/net/ethernet/qlogic/qed/qed_rdma.c

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015-2017  QLogic Corporation
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and /or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #include <linux/types.h>
  33 #include <asm/byteorder.h>
  34 #include <linux/bitops.h>
  35 #include <linux/delay.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/errno.h>
  38 #include <linux/io.h>
  39 #include <linux/kernel.h>
  40 #include <linux/list.h>
  41 #include <linux/module.h>
  42 #include <linux/mutex.h>
  43 #include <linux/pci.h>
  44 #include <linux/slab.h>
  45 #include <linux/spinlock.h>
  46 #include <linux/string.h>
  47 #include "qed.h"
  48 #include "qed_cxt.h"
  49 #include "qed_hsi.h"
  50 #include "qed_hw.h"
  51 #include "qed_init_ops.h"
  52 #include "qed_int.h"
  53 #include "qed_ll2.h"
  54 #include "qed_mcp.h"
  55 #include "qed_reg_addr.h"
  56 #include <linux/qed/qed_rdma_if.h>
  57 #include "qed_rdma.h"
  58 #include "qed_roce.h"
  59 #include "qed_sp.h"
  60
  61
  62 int qed_rdma_bmap_alloc(struct qed_hwfn *p_hwfn,
  63                         struct qed_bmap *bmap, u32 max_count, char *name)
  64 {
  65         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "max_count = %08x\n", max_count);
  66
  67         bmap->max_count = max_count;
  68
  69         bmap->bitmap = kcalloc(BITS_TO_LONGS(max_count), sizeof(long),
  70                                GFP_KERNEL);
  71         if (!bmap->bitmap)
  72                 return -ENOMEM;
  73
  74         snprintf(bmap->name, QED_RDMA_MAX_BMAP_NAME, "%s", name);
  75
  76         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "0\n");
  77         return 0;
  78 }
  79
  80 int qed_rdma_bmap_alloc_id(struct qed_hwfn *p_hwfn,
  81                            struct qed_bmap *bmap, u32 *id_num)
  82 {
  83         *id_num = find_first_zero_bit(bmap->bitmap, bmap->max_count);
  84         if (*id_num >= bmap->max_count)
  85                 return -EINVAL;
  86
  87         __set_bit(*id_num, bmap->bitmap);
  88
  89         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "%s bitmap: allocated id %d\n",
  90                    bmap->name, *id_num);
  91
  92         return 0;
  93 }
  94
  95 void qed_bmap_set_id(struct qed_hwfn *p_hwfn,
  96                      struct qed_bmap *bmap, u32 id_num)
  97 {
  98         if (id_num >= bmap->max_count)
  99                 return;
 100
 101         __set_bit(id_num, bmap->bitmap);
 102 }
 103
 104 void qed_bmap_release_id(struct qed_hwfn *p_hwfn,
 105                          struct qed_bmap *bmap, u32 id_num)
 106 {
 107         bool b_acquired;
 108
 109         if (id_num >= bmap->max_count)
 110                 return;
 111
 112         b_acquired = test_and_clear_bit(id_num, bmap->bitmap);
 113         if (!b_acquired) {
 114                 DP_NOTICE(p_hwfn, "%s bitmap: id %d already released\n",
 115                           bmap->name, id_num);
 116                 return;
 117         }
 118
 119         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "%s bitmap: released id %d\n",
 120                    bmap->name, id_num);
 121 }
 122
 123 int qed_bmap_test_id(struct qed_hwfn *p_hwfn,
 124                      struct qed_bmap *bmap, u32 id_num)
 125 {
 126         if (id_num >= bmap->max_count)
 127                 return -1;
 128
 129         return test_bit(id_num, bmap->bitmap);
 130 }
 131
 132 static bool qed_bmap_is_empty(struct qed_bmap *bmap)
 133 {
 134         return bmap->max_count == find_first_bit(bmap->bitmap, bmap->max_count);
 135 }
 136
 137 u32 qed_rdma_get_sb_id(void *p_hwfn, u32 rel_sb_id)
 138 {
 139         /* First sb id for RoCE is after all the l2 sb */
 140         return FEAT_NUM((struct qed_hwfn *)p_hwfn, QED_PF_L2_QUE) + rel_sb_id;
 141 }
 142
 143 static int qed_rdma_alloc(struct qed_hwfn *p_hwfn,
 144                           struct qed_ptt *p_ptt,
 145                           struct qed_rdma_start_in_params *params)
 146 {
 147         struct qed_rdma_info *p_rdma_info;
 148         u32 num_cons, num_tasks;
 149         int rc = -ENOMEM;
 150
 151         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Allocating RDMA\n");
 152
 153         /* Allocate a struct with current pf rdma info */
 154         p_rdma_info = kzalloc(sizeof(*p_rdma_info), GFP_KERNEL);
 155         if (!p_rdma_info)
 156                 return rc;
 157
 158         p_hwfn->p_rdma_info = p_rdma_info;
 159         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 160                 p_rdma_info->proto = PROTOCOLID_IWARP;
 161         else
 162                 p_rdma_info->proto = PROTOCOLID_ROCE;
 163
 164         num_cons = qed_cxt_get_proto_cid_count(p_hwfn, p_rdma_info->proto,
 165                                                NULL);
 166
 167         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 168                 p_rdma_info->num_qps = num_cons;
 169         else
 170                 p_rdma_info->num_qps = num_cons / 2; /* 2 cids per qp */
 171
 172         num_tasks = qed_cxt_get_proto_tid_count(p_hwfn, PROTOCOLID_ROCE);
 173
 174         /* Each MR uses a single task */
 175         p_rdma_info->num_mrs = num_tasks;
 176
 177         /* Queue zone lines are shared between RoCE and L2 in such a way that
 178          * they can be used by each without obstructing the other.
 179          */
 180         p_rdma_info->queue_zone_base = (u16)RESC_START(p_hwfn, QED_L2_QUEUE);
 181         p_rdma_info->max_queue_zones = (u16)RESC_NUM(p_hwfn, QED_L2_QUEUE);
 182
 183         /* Allocate a struct with device params and fill it */
 184         p_rdma_info->dev = kzalloc(sizeof(*p_rdma_info->dev), GFP_KERNEL);
 185         if (!p_rdma_info->dev)
 186                 goto free_rdma_info;
 187
 188         /* Allocate a struct with port params and fill it */
 189         p_rdma_info->port = kzalloc(sizeof(*p_rdma_info->port), GFP_KERNEL);
 190         if (!p_rdma_info->port)
 191                 goto free_rdma_dev;
 192
 193         /* Allocate bit map for pd's */
 194         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->pd_map, RDMA_MAX_PDS,
 195                                  "PD");
 196         if (rc) {
 197                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 198                            "Failed to allocate pd_map, rc = %d\n",
 199                            rc);
 200                 goto free_rdma_port;
 201         }
 202
 203         /* Allocate DPI bitmap */
 204         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->dpi_map,
 205                                  p_hwfn->dpi_count, "DPI");
 206         if (rc) {
 207                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 208                            "Failed to allocate DPI bitmap, rc = %d\n", rc);
 209                 goto free_pd_map;
 210         }
 211
 212         /* Allocate bitmap for cq's. The maximum number of CQs is bound to
 213          * the number of connections we support. (num_qps in iWARP or
 214          * num_qps/2 in RoCE).
 215          */
 216         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->cq_map, num_cons, "CQ");
 217         if (rc) {
 218                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 219                            "Failed to allocate cq bitmap, rc = %d\n", rc);
 220                 goto free_dpi_map;
 221         }
 222
 223         /* Allocate bitmap for toggle bit for cq icids
 224          * We toggle the bit every time we create or resize cq for a given icid.
 225          * Size needs to equal the size of the cq bmap.
 226          */
 227         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->toggle_bits,
 228                                  num_cons, "Toggle");
 229         if (rc) {
 230                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 231                            "Failed to allocate toogle bits, rc = %d\n", rc);
 232                 goto free_cq_map;
 233         }
 234
 235         /* Allocate bitmap for itids */
 236         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->tid_map,
 237                                  p_rdma_info->num_mrs, "MR");
 238         if (rc) {
 239                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 240                            "Failed to allocate itids bitmaps, rc = %d\n", rc);
 241                 goto free_toggle_map;
 242         }
 243
 244         /* Allocate bitmap for cids used for qps. */
 245         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->cid_map, num_cons,
 246                                  "CID");
 247         if (rc) {
 248                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 249                            "Failed to allocate cid bitmap, rc = %d\n", rc);
 250                 goto free_tid_map;
 251         }
 252
 253         /* Allocate bitmap for cids used for responders/requesters. */
 254         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->real_cid_map, num_cons,
 255                                  "REAL_CID");
 256         if (rc) {
 257                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 258                            "Failed to allocate real cid bitmap, rc = %d\n", rc);
 259                 goto free_cid_map;
 260         }
 261
 262         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 263                 rc = qed_iwarp_alloc(p_hwfn);
 264
 265         if (rc)
 266                 goto free_cid_map;
 267
 268         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Allocation successful\n");
 269         return 0;
 270
 271 free_cid_map:
 272         kfree(p_rdma_info->cid_map.bitmap);
 273 free_tid_map:
 274         kfree(p_rdma_info->tid_map.bitmap);
 275 free_toggle_map:
 276         kfree(p_rdma_info->toggle_bits.bitmap);
 277 free_cq_map:
 278         kfree(p_rdma_info->cq_map.bitmap);
 279 free_dpi_map:
 280         kfree(p_rdma_info->dpi_map.bitmap);
 281 free_pd_map:
 282         kfree(p_rdma_info->pd_map.bitmap);
 283 free_rdma_port:
 284         kfree(p_rdma_info->port);
 285 free_rdma_dev:
 286         kfree(p_rdma_info->dev);
 287 free_rdma_info:
 288         kfree(p_rdma_info);
 289
 290         return rc;
 291 }
 292
 293 void qed_rdma_bmap_free(struct qed_hwfn *p_hwfn,
 294                         struct qed_bmap *bmap, bool check)
 295 {
 296         int weight = bitmap_weight(bmap->bitmap, bmap->max_count);
 297         int last_line = bmap->max_count / (64 * 8);
 298         int last_item = last_line * 8 +
 299             DIV_ROUND_UP(bmap->max_count % (64 * 8), 64);
 300         u64 *pmap = (u64 *)bmap->bitmap;
 301         int line, item, offset;
 302         u8 str_last_line[200] = { 0 };
 303
 304         if (!weight || !check)
 305                 goto end;
 306
 307         DP_NOTICE(p_hwfn,
 308                   "%s bitmap not free - size=%d, weight=%d, 512 bits per line\n",
 309                   bmap->name, bmap->max_count, weight);
 310
 311         /* print aligned non-zero lines, if any */
 312         for (item = 0, line = 0; line < last_line; line++, item += 8)
 313                 if (bitmap_weight((unsigned long *)&pmap[item], 64 * 8))
 314                         DP_NOTICE(p_hwfn,
 315                                   "line 0x%04x: 0x%016llx 0x%016llx 0x%016llx 0x%016llx 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n",
 316                                   line,
 317                                   pmap[item],
 318                                   pmap[item + 1],
 319                                   pmap[item + 2],
 320                                   pmap[item + 3],
 321                                   pmap[item + 4],
 322                                   pmap[item + 5],
 323                                   pmap[item + 6], pmap[item + 7]);
 324
 325         /* print last unaligned non-zero line, if any */
 326         if ((bmap->max_count % (64 * 8)) &&
 327             (bitmap_weight((unsigned long *)&pmap[item],
 328                            bmap->max_count - item * 64))) {
 329                 offset = sprintf(str_last_line, "line 0x%04x: ", line);
 330                 for (; item < last_item; item++)
 331                         offset += sprintf(str_last_line + offset,
 332                                           "0x%016llx ", pmap[item]);
 333                 DP_NOTICE(p_hwfn, "%s\n", str_last_line);
 334         }
 335
 336 end:
 337         kfree(bmap->bitmap);
 338         bmap->bitmap = NULL;
 339 }
 340
 341 static void qed_rdma_resc_free(struct qed_hwfn *p_hwfn)
 342 {
 343         struct qed_rdma_info *p_rdma_info = p_hwfn->p_rdma_info;
 344
 345         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 346                 qed_iwarp_resc_free(p_hwfn);
 347
 348         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->cid_map, 1);
 349         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->pd_map, 1);
 350         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->dpi_map, 1);
 351         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->cq_map, 1);
 352         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->toggle_bits, 0);
 353         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->tid_map, 1);
 354
 355         kfree(p_rdma_info->port);
 356         kfree(p_rdma_info->dev);
 357
 358         kfree(p_rdma_info);
 359 }
 360
 361 static void qed_rdma_free_tid(void *rdma_cxt, u32 itid)
 362 {
 363         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 364
 365         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "itid = %08x\n", itid);
 366
 367         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 368         qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->tid_map, itid);
 369         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 370 }
 371
 372 static void qed_rdma_free_reserved_lkey(struct qed_hwfn *p_hwfn)
 373 {
 374         qed_rdma_free_tid(p_hwfn, p_hwfn->p_rdma_info->dev->reserved_lkey);
 375 }
 376
 377 static void qed_rdma_free(struct qed_hwfn *p_hwfn)
 378 {
 379         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Freeing RDMA\n");
 380
 381         qed_rdma_free_reserved_lkey(p_hwfn);
 382         qed_rdma_resc_free(p_hwfn);
 383 }
 384
 385 static void qed_rdma_get_guid(struct qed_hwfn *p_hwfn, u8 *guid)
 386 {
 387         guid[0] = p_hwfn->hw_info.hw_mac_addr[0] ^ 2;
 388         guid[1] = p_hwfn->hw_info.hw_mac_addr[1];
 389         guid[2] = p_hwfn->hw_info.hw_mac_addr[2];
 390         guid[3] = 0xff;
 391         guid[4] = 0xfe;
 392         guid[5] = p_hwfn->hw_info.hw_mac_addr[3];
 393         guid[6] = p_hwfn->hw_info.hw_mac_addr[4];
 394         guid[7] = p_hwfn->hw_info.hw_mac_addr[5];
 395 }
 396
 397 static void qed_rdma_init_events(struct qed_hwfn *p_hwfn,
 398                                  struct qed_rdma_start_in_params *params)
 399 {
 400         struct qed_rdma_events *events;
 401
 402         events = &p_hwfn->p_rdma_info->events;
 403
 404         events->unaffiliated_event = params->events->unaffiliated_event;
 405         events->affiliated_event = params->events->affiliated_event;
 406         events->context = params->events->context;
 407 }
 408
 409 static void qed_rdma_init_devinfo(struct qed_hwfn *p_hwfn,
 410                                   struct qed_rdma_start_in_params *params)
 411 {
 412         struct qed_rdma_device *dev = p_hwfn->p_rdma_info->dev;
 413         struct qed_dev *cdev = p_hwfn->cdev;
 414         u32 pci_status_control;
 415         u32 num_qps;
 416
 417         /* Vendor specific information */
 418         dev->vendor_id = cdev->vendor_id;
 419         dev->vendor_part_id = cdev->device_id;
 420         dev->hw_ver = 0;
 421         dev->fw_ver = (FW_MAJOR_VERSION << 24) | (FW_MINOR_VERSION << 16) |
 422                       (FW_REVISION_VERSION << 8) | (FW_ENGINEERING_VERSION);
 423
 424         qed_rdma_get_guid(p_hwfn, (u8 *)&dev->sys_image_guid);
 425         dev->node_guid = dev->sys_image_guid;
 426
 427         dev->max_sge = min_t(u32, RDMA_MAX_SGE_PER_SQ_WQE,
 428                              RDMA_MAX_SGE_PER_RQ_WQE);
 429
 430         if (cdev->rdma_max_sge)
 431                 dev->max_sge = min_t(u32, cdev->rdma_max_sge, dev->max_sge);
 432
 433         dev->max_inline = ROCE_REQ_MAX_INLINE_DATA_SIZE;
 434
 435         dev->max_inline = (cdev->rdma_max_inline) ?
 436                           min_t(u32, cdev->rdma_max_inline, dev->max_inline) :
 437                           dev->max_inline;
 438
 439         dev->max_wqe = QED_RDMA_MAX_WQE;
 440         dev->max_cnq = (u8)FEAT_NUM(p_hwfn, QED_RDMA_CNQ);
 441
 442         /* The number of QPs may be higher than QED_ROCE_MAX_QPS, because
 443          * it is up-aligned to 16 and then to ILT page size within qed cxt.
 444          * This is OK in terms of ILT but we don't want to configure the FW
 445          * above its abilities
 446          */
 447         num_qps = ROCE_MAX_QPS;
 448         num_qps = min_t(u64, num_qps, p_hwfn->p_rdma_info->num_qps);
 449         dev->max_qp = num_qps;
 450
 451         /* CQs uses the same icids that QPs use hence they are limited by the
 452          * number of icids. There are two icids per QP.
 453          */
 454         dev->max_cq = num_qps * 2;
 455
 456         /* The number of mrs is smaller by 1 since the first is reserved */
 457         dev->max_mr = p_hwfn->p_rdma_info->num_mrs - 1;
 458         dev->max_mr_size = QED_RDMA_MAX_MR_SIZE;
 459
 460         /* The maximum CQE capacity per CQ supported.
 461          * max number of cqes will be in two layer pbl,
 462          * 8 is the pointer size in bytes
 463          * 32 is the size of cq element in bytes
 464          */
 465         if (params->cq_mode == QED_RDMA_CQ_MODE_32_BITS)
 466                 dev->max_cqe = QED_RDMA_MAX_CQE_32_BIT;
 467         else
 468                 dev->max_cqe = QED_RDMA_MAX_CQE_16_BIT;
 469
 470         dev->max_mw = 0;
 471         dev->max_fmr = QED_RDMA_MAX_FMR;
 472         dev->max_mr_mw_fmr_pbl = (PAGE_SIZE / 8) * (PAGE_SIZE / 8);
 473         dev->max_mr_mw_fmr_size = dev->max_mr_mw_fmr_pbl * PAGE_SIZE;
 474         dev->max_pkey = QED_RDMA_MAX_P_KEY;
 475
 476         dev->max_qp_resp_rd_atomic_resc = RDMA_RING_PAGE_SIZE /
 477                                           (RDMA_RESP_RD_ATOMIC_ELM_SIZE * 2);
 478         dev->max_qp_req_rd_atomic_resc = RDMA_RING_PAGE_SIZE /
 479                                          RDMA_REQ_RD_ATOMIC_ELM_SIZE;
 480         dev->max_dev_resp_rd_atomic_resc = dev->max_qp_resp_rd_atomic_resc *
 481                                            p_hwfn->p_rdma_info->num_qps;
 482         dev->page_size_caps = QED_RDMA_PAGE_SIZE_CAPS;
 483         dev->dev_ack_delay = QED_RDMA_ACK_DELAY;
 484         dev->max_pd = RDMA_MAX_PDS;
 485         dev->max_ah = p_hwfn->p_rdma_info->num_qps;
 486         dev->max_stats_queues = (u8)RESC_NUM(p_hwfn, QED_RDMA_STATS_QUEUE);
 487
 488         /* Set capablities */
 489         dev->dev_caps = 0;
 490         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_RNR_NAK, 1);
 491         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_PORT_ACTIVE_EVENT, 1);
 492         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_PORT_CHANGE_EVENT, 1);
 493         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_RESIZE_CQ, 1);
 494         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_BASE_MEMORY_EXT, 1);
 495         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_BASE_QUEUE_EXT, 1);
 496         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_ZBVA, 1);
 497         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_LOCAL_INV_FENCE, 1);
 498
 499         /* Check atomic operations support in PCI configuration space. */
 500         pci_read_config_dword(cdev->pdev,
 501                               cdev->pdev->pcie_cap + PCI_EXP_DEVCTL2,
 502                               &pci_status_control);
 503
 504         if (pci_status_control & PCI_EXP_DEVCTL2_LTR_EN)
 505                 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_ATOMIC_OP, 1);
 506
 507         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 508                 qed_iwarp_init_devinfo(p_hwfn);
 509 }
 510
 511 static void qed_rdma_init_port(struct qed_hwfn *p_hwfn)
 512 {
 513         struct qed_rdma_port *port = p_hwfn->p_rdma_info->port;
 514         struct qed_rdma_device *dev = p_hwfn->p_rdma_info->dev;
 515
 516         port->port_state = p_hwfn->mcp_info->link_output.link_up ?
 517                            QED_RDMA_PORT_UP : QED_RDMA_PORT_DOWN;
 518
 519         port->max_msg_size = min_t(u64,
 520                                    (dev->max_mr_mw_fmr_size *
 521                                     p_hwfn->cdev->rdma_max_sge),
 522                                    BIT(31));
 523
 524         port->pkey_bad_counter = 0;
 525 }
 526
 527 static int qed_rdma_init_hw(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
 528 {
 529         int rc = 0;
 530
 531         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Initializing HW\n");
 532         p_hwfn->b_rdma_enabled_in_prs = false;
 533
 534         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 535                 qed_iwarp_init_hw(p_hwfn, p_ptt);
 536         else
 537                 rc = qed_roce_init_hw(p_hwfn, p_ptt);
 538
 539         return rc;
 540 }
 541
 542 static int qed_rdma_start_fw(struct qed_hwfn *p_hwfn,
 543                              struct qed_rdma_start_in_params *params,
 544                              struct qed_ptt *p_ptt)
 545 {
 546         struct rdma_init_func_ramrod_data *p_ramrod;
 547         struct qed_rdma_cnq_params *p_cnq_pbl_list;
 548         struct rdma_init_func_hdr *p_params_header;
 549         struct rdma_cnq_params *p_cnq_params;
 550         struct qed_sp_init_data init_data;
 551         struct qed_spq_entry *p_ent;
 552         u32 cnq_id, sb_id;
 553         u16 igu_sb_id;
 554         int rc;
 555
 556         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Starting FW\n");
 557
 558         /* Save the number of cnqs for the function close ramrod */
 559         p_hwfn->p_rdma_info->num_cnqs = params->desired_cnq;
 560
 561         /* Get SPQ entry */
 562         memset(&init_data, 0, sizeof(init_data));
 563         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 564         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 565
 566         rc = qed_sp_init_request(p_hwfn, &p_ent, RDMA_RAMROD_FUNC_INIT,
 567                                  p_hwfn->p_rdma_info->proto, &init_data);
 568         if (rc)
 569                 return rc;
 570
 571         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
 572                 qed_iwarp_init_fw_ramrod(p_hwfn,
 573                                          &p_ent->ramrod.iwarp_init_func.iwarp);
 574                 p_ramrod = &p_ent->ramrod.iwarp_init_func.rdma;
 575         } else {
 576                 p_ramrod = &p_ent->ramrod.roce_init_func.rdma;
 577         }
 578
 579         p_params_header = &p_ramrod->params_header;
 580         p_params_header->cnq_start_offset = (u8)RESC_START(p_hwfn,
 581                                                            QED_RDMA_CNQ_RAM);
 582         p_params_header->num_cnqs = params->desired_cnq;
 583
 584         if (params->cq_mode == QED_RDMA_CQ_MODE_16_BITS)
 585                 p_params_header->cq_ring_mode = 1;
 586         else
 587                 p_params_header->cq_ring_mode = 0;
 588
 589         for (cnq_id = 0; cnq_id < params->desired_cnq; cnq_id++) {
 590                 sb_id = qed_rdma_get_sb_id(p_hwfn, cnq_id);
 591                 igu_sb_id = qed_get_igu_sb_id(p_hwfn, sb_id);
 592                 p_ramrod->cnq_params[cnq_id].sb_num = cpu_to_le16(igu_sb_id);
 593                 p_cnq_params = &p_ramrod->cnq_params[cnq_id];
 594                 p_cnq_pbl_list = &params->cnq_pbl_list[cnq_id];
 595
 596                 p_cnq_params->sb_index = p_hwfn->pf_params.rdma_pf_params.gl_pi;
 597                 p_cnq_params->num_pbl_pages = p_cnq_pbl_list->num_pbl_pages;
 598
 599                 DMA_REGPAIR_LE(p_cnq_params->pbl_base_addr,
 600                                p_cnq_pbl_list->pbl_ptr);
 601
 602                 /* we assume here that cnq_id and qz_offset are the same */
 603                 p_cnq_params->queue_zone_num =
 604                         cpu_to_le16(p_hwfn->p_rdma_info->queue_zone_base +
 605                                     cnq_id);
 606         }
 607
 608         return qed_spq_post(p_hwfn, p_ent, NULL);
 609 }
 610
 611 static int qed_rdma_alloc_tid(void *rdma_cxt, u32 *itid)
 612 {
 613         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 614         int rc;
 615
 616         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Allocate TID\n");
 617
 618         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 619         rc = qed_rdma_bmap_alloc_id(p_hwfn,
 620                                     &p_hwfn->p_rdma_info->tid_map, itid);
 621         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 622         if (rc)
 623                 goto out;
 624
 625         rc = qed_cxt_dynamic_ilt_alloc(p_hwfn, QED_ELEM_TASK, *itid);
 626 out:
 627         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Allocate TID - done, rc = %d\n", rc);
 628         return rc;
 629 }
 630
 631 static int qed_rdma_reserve_lkey(struct qed_hwfn *p_hwfn)
 632 {
 633         struct qed_rdma_device *dev = p_hwfn->p_rdma_info->dev;
 634
 635         /* Tid 0 will be used as the key for "reserved MR".
 636          * The driver should allocate memory for it so it can be loaded but no
 637          * ramrod should be passed on it.
 638          */
 639         qed_rdma_alloc_tid(p_hwfn, &dev->reserved_lkey);
 640         if (dev->reserved_lkey != RDMA_RESERVED_LKEY) {
 641                 DP_NOTICE(p_hwfn,
 642                           "Reserved lkey should be equal to RDMA_RESERVED_LKEY\n");
 643                 return -EINVAL;
 644         }
 645
 646         return 0;
 647 }
 648
 649 static int qed_rdma_setup(struct qed_hwfn *p_hwfn,
 650                           struct qed_ptt *p_ptt,
 651                           struct qed_rdma_start_in_params *params)
 652 {
 653         int rc;
 654
 655         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA setup\n");
 656
 657         spin_lock_init(&p_hwfn->p_rdma_info->lock);
 658
 659         qed_rdma_init_devinfo(p_hwfn, params);
 660         qed_rdma_init_port(p_hwfn);
 661         qed_rdma_init_events(p_hwfn, params);
 662
 663         rc = qed_rdma_reserve_lkey(p_hwfn);
 664         if (rc)
 665                 return rc;
 666
 667         rc = qed_rdma_init_hw(p_hwfn, p_ptt);
 668         if (rc)
 669                 return rc;
 670
 671         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
 672                 rc = qed_iwarp_setup(p_hwfn, p_ptt, params);
 673                 if (rc)
 674                         return rc;
 675         } else {
 676                 rc = qed_roce_setup(p_hwfn);
 677                 if (rc)
 678                         return rc;
 679         }
 680
 681         return qed_rdma_start_fw(p_hwfn, params, p_ptt);
 682 }
 683
 684 int qed_rdma_stop(void *rdma_cxt)
 685 {
 686         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 687         struct rdma_close_func_ramrod_data *p_ramrod;
 688         struct qed_sp_init_data init_data;
 689         struct qed_spq_entry *p_ent;
 690         struct qed_ptt *p_ptt;
 691         u32 ll2_ethertype_en;
 692         int rc = -EBUSY;
 693
 694         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA stop\n");
 695
 696         p_ptt = qed_ptt_acquire(p_hwfn);
 697         if (!p_ptt) {
 698                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Failed to acquire PTT\n");
 699                 return rc;
 700         }
 701
 702         /* Disable RoCE search */
 703         qed_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 0);
 704         p_hwfn->b_rdma_enabled_in_prs = false;
 705
 706         qed_wr(p_hwfn, p_ptt, PRS_REG_ROCE_DEST_QP_MAX_PF, 0);
 707
 708         ll2_ethertype_en = qed_rd(p_hwfn, p_ptt, PRS_REG_LIGHT_L2_ETHERTYPE_EN);
 709
 710         qed_wr(p_hwfn, p_ptt, PRS_REG_LIGHT_L2_ETHERTYPE_EN,
 711                (ll2_ethertype_en & 0xFFFE));
 712
 713         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
 714                 rc = qed_iwarp_stop(p_hwfn, p_ptt);
 715                 if (rc) {
 716                         qed_ptt_release(p_hwfn, p_ptt);
 717                         return rc;
 718                 }
 719         } else {
 720                 qed_roce_stop(p_hwfn);
 721         }
 722
 723         qed_ptt_release(p_hwfn, p_ptt);
 724
 725         /* Get SPQ entry */
 726         memset(&init_data, 0, sizeof(init_data));
 727         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 728         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 729
 730         /* Stop RoCE */
 731         rc = qed_sp_init_request(p_hwfn, &p_ent, RDMA_RAMROD_FUNC_CLOSE,
 732                                  p_hwfn->p_rdma_info->proto, &init_data);
 733         if (rc)
 734                 goto out;
 735
 736         p_ramrod = &p_ent->ramrod.rdma_close_func;
 737
 738         p_ramrod->num_cnqs = p_hwfn->p_rdma_info->num_cnqs;
 739         p_ramrod->cnq_start_offset = (u8)RESC_START(p_hwfn, QED_RDMA_CNQ_RAM);
 740
 741         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 742
 743 out:
 744         qed_rdma_free(p_hwfn);
 745
 746         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA stop done, rc = %d\n", rc);
 747         return rc;
 748 }
 749
 750 static int qed_rdma_add_user(void *rdma_cxt,
 751                              struct qed_rdma_add_user_out_params *out_params)
 752 {
 753         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 754         u32 dpi_start_offset;
 755         u32 returned_id = 0;
 756         int rc;
 757
 758         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Adding User\n");
 759
 760         /* Allocate DPI */
 761         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 762         rc = qed_rdma_bmap_alloc_id(p_hwfn, &p_hwfn->p_rdma_info->dpi_map,
 763                                     &returned_id);
 764         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 765
 766         out_params->dpi = (u16)returned_id;
 767
 768         /* Calculate the corresponding DPI address */
 769         dpi_start_offset = p_hwfn->dpi_start_offset;
 770
 771         out_params->dpi_addr = (u64)((u8 __iomem *)p_hwfn->doorbells +
 772                                      dpi_start_offset +
 773                                      ((out_params->dpi) * p_hwfn->dpi_size));
 774
 775         out_params->dpi_phys_addr = p_hwfn->cdev->db_phys_addr +
 776                                     dpi_start_offset +
 777                                     ((out_params->dpi) * p_hwfn->dpi_size);
 778
 779         out_params->dpi_size = p_hwfn->dpi_size;
 780         out_params->wid_count = p_hwfn->wid_count;
 781
 782         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Adding user - done, rc = %d\n", rc);
 783         return rc;
 784 }
 785
 786 static struct qed_rdma_port *qed_rdma_query_port(void *rdma_cxt)
 787 {
 788         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 789         struct qed_rdma_port *p_port = p_hwfn->p_rdma_info->port;
 790
 791         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA Query port\n");
 792
 793         /* Link may have changed */
 794         p_port->port_state = p_hwfn->mcp_info->link_output.link_up ?
 795                              QED_RDMA_PORT_UP : QED_RDMA_PORT_DOWN;
 796
 797         p_port->link_speed = p_hwfn->mcp_info->link_output.speed;
 798
 799         p_port->max_msg_size = RDMA_MAX_DATA_SIZE_IN_WQE;
 800
 801         return p_port;
 802 }
 803
 804 static struct qed_rdma_device *qed_rdma_query_device(void *rdma_cxt)
 805 {
 806         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 807
 808         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Query device\n");
 809
 810         /* Return struct with device parameters */
 811         return p_hwfn->p_rdma_info->dev;
 812 }
 813
 814 static void qed_rdma_cnq_prod_update(void *rdma_cxt, u8 qz_offset, u16 prod)
 815 {
 816         struct qed_hwfn *p_hwfn;
 817         u16 qz_num;
 818         u32 addr;
 819
 820         p_hwfn = (struct qed_hwfn *)rdma_cxt;
 821
 822         if (qz_offset > p_hwfn->p_rdma_info->max_queue_zones) {
 823                 DP_NOTICE(p_hwfn,
 824                           "queue zone offset %d is too large (max is %d)\n",
 825                           qz_offset, p_hwfn->p_rdma_info->max_queue_zones);
 826                 return;
 827         }
 828
 829         qz_num = p_hwfn->p_rdma_info->queue_zone_base + qz_offset;
 830         addr = GTT_BAR0_MAP_REG_USDM_RAM +
 831                USTORM_COMMON_QUEUE_CONS_OFFSET(qz_num);
 832
 833         REG_WR16(p_hwfn, addr, prod);
 834
 835         /* keep prod updates ordered */
 836         wmb();
 837 }
 838
 839 static int qed_fill_rdma_dev_info(struct qed_dev *cdev,
 840                                   struct qed_dev_rdma_info *info)
 841 {
 842         struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
 843
 844         memset(info, 0, sizeof(*info));
 845
 846         info->rdma_type = QED_IS_ROCE_PERSONALITY(p_hwfn) ?
 847             QED_RDMA_TYPE_ROCE : QED_RDMA_TYPE_IWARP;
 848
 849         info->user_dpm_enabled = (p_hwfn->db_bar_no_edpm == 0);
 850
 851         qed_fill_dev_info(cdev, &info->common);
 852
 853         return 0;
 854 }
 855
 856 static int qed_rdma_get_sb_start(struct qed_dev *cdev)
 857 {
 858         int feat_num;
 859
 860         if (cdev->num_hwfns > 1)
 861                 feat_num = FEAT_NUM(QED_LEADING_HWFN(cdev), QED_PF_L2_QUE);
 862         else
 863                 feat_num = FEAT_NUM(QED_LEADING_HWFN(cdev), QED_PF_L2_QUE) *
 864                            cdev->num_hwfns;
 865
 866         return feat_num;
 867 }
 868
 869 static int qed_rdma_get_min_cnq_msix(struct qed_dev *cdev)
 870 {
 871         int n_cnq = FEAT_NUM(QED_LEADING_HWFN(cdev), QED_RDMA_CNQ);
 872         int n_msix = cdev->int_params.rdma_msix_cnt;
 873
 874         return min_t(int, n_cnq, n_msix);
 875 }
 876
 877 static int qed_rdma_set_int(struct qed_dev *cdev, u16 cnt)
 878 {
 879         int limit = 0;
 880
 881         /* Mark the fastpath as free/used */
 882         cdev->int_params.fp_initialized = cnt ? true : false;
 883
 884         if (cdev->int_params.out.int_mode != QED_INT_MODE_MSIX) {
 885                 DP_ERR(cdev,
 886                        "qed roce supports only MSI-X interrupts (detected %d).\n",
 887                        cdev->int_params.out.int_mode);
 888                 return -EINVAL;
 889         } else if (cdev->int_params.fp_msix_cnt) {
 890                 limit = cdev->int_params.rdma_msix_cnt;
 891         }
 892
 893         if (!limit)
 894                 return -ENOMEM;
 895
 896         return min_t(int, cnt, limit);
 897 }
 898
 899 static int qed_rdma_get_int(struct qed_dev *cdev, struct qed_int_info *info)
 900 {
 901         memset(info, 0, sizeof(*info));
 902
 903         if (!cdev->int_params.fp_initialized) {
 904                 DP_INFO(cdev,
 905                         "Protocol driver requested interrupt information, but its support is not yet configured\n");
 906                 return -EINVAL;
 907         }
 908
 909         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 910                 int msix_base = cdev->int_params.rdma_msix_base;
 911
 912                 info->msix_cnt = cdev->int_params.rdma_msix_cnt;
 913                 info->msix = &cdev->int_params.msix_table[msix_base];
 914
 915                 DP_VERBOSE(cdev, QED_MSG_RDMA, "msix_cnt = %d msix_base=%d\n",
 916                            info->msix_cnt, msix_base);
 917         }
 918
 919         return 0;
 920 }
 921
 922 static int qed_rdma_alloc_pd(void *rdma_cxt, u16 *pd)
 923 {
 924         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 925         u32 returned_id;
 926         int rc;
 927
 928         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Alloc PD\n");
 929
 930         /* Allocates an unused protection domain */
 931         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 932         rc = qed_rdma_bmap_alloc_id(p_hwfn,
 933                                     &p_hwfn->p_rdma_info->pd_map, &returned_id);
 934         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 935
 936         *pd = (u16)returned_id;
 937
 938         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Alloc PD - done, rc = %d\n", rc);
 939         return rc;
 940 }
 941
 942 static void qed_rdma_free_pd(void *rdma_cxt, u16 pd)
 943 {
 944         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 945
 946         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "pd = %08x\n", pd);
 947
 948         /* Returns a previously allocated protection domain for reuse */
 949         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 950         qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->pd_map, pd);
 951         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 952 }
 953
 954 static enum qed_rdma_toggle_bit
 955 qed_rdma_toggle_bit_create_resize_cq(struct qed_hwfn *p_hwfn, u16 icid)
 956 {
 957         struct qed_rdma_info *p_info = p_hwfn->p_rdma_info;
 958         enum qed_rdma_toggle_bit toggle_bit;
 959         u32 bmap_id;
 960
 961         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", icid);
 962
 963         /* the function toggle the bit that is related to a given icid
 964          * and returns the new toggle bit's value
 965          */
 966         bmap_id = icid - qed_cxt_get_proto_cid_start(p_hwfn, p_info->proto);
 967
 968         spin_lock_bh(&p_info->lock);
 969         toggle_bit = !test_and_change_bit(bmap_id,
 970                                           p_info->toggle_bits.bitmap);
 971         spin_unlock_bh(&p_info->lock);
 972
 973         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "QED_RDMA_TOGGLE_BIT_= %d\n",
 974                    toggle_bit);
 975
 976         return toggle_bit;
 977 }
 978
 979 static int qed_rdma_create_cq(void *rdma_cxt,
 980                               struct qed_rdma_create_cq_in_params *params,
 981                               u16 *icid)
 982 {
 983         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 984         struct qed_rdma_info *p_info = p_hwfn->p_rdma_info;
 985         struct rdma_create_cq_ramrod_data *p_ramrod;
 986         enum qed_rdma_toggle_bit toggle_bit;
 987         struct qed_sp_init_data init_data;
 988         struct qed_spq_entry *p_ent;
 989         u32 returned_id, start_cid;
 990         int rc;
 991
 992         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "cq_handle = %08x%08x\n",
 993                    params->cq_handle_hi, params->cq_handle_lo);
 994
 995         /* Allocate icid */
 996         spin_lock_bh(&p_info->lock);
 997         rc = qed_rdma_bmap_alloc_id(p_hwfn, &p_info->cq_map, &returned_id);
 998         spin_unlock_bh(&p_info->lock);
 999
1000         if (rc) {
1001                 DP_NOTICE(p_hwfn, "Can't create CQ, rc = %d\n", rc);
1002                 return rc;
1003         }
1004
1005         start_cid = qed_cxt_get_proto_cid_start(p_hwfn,
1006                                                 p_info->proto);
1007         *icid = returned_id + start_cid;
1008
1009         /* Check if icid requires a page allocation */
1010         rc = qed_cxt_dynamic_ilt_alloc(p_hwfn, QED_ELEM_CXT, *icid);
1011         if (rc)
1012                 goto err;
1013
1014         /* Get SPQ entry */
1015         memset(&init_data, 0, sizeof(init_data));
1016         init_data.cid = *icid;
1017         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1018         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1019
1020         /* Send create CQ ramrod */
1021         rc = qed_sp_init_request(p_hwfn, &p_ent,
1022                                  RDMA_RAMROD_CREATE_CQ,
1023                                  p_info->proto, &init_data);
1024         if (rc)
1025                 goto err;
1026
1027         p_ramrod = &p_ent->ramrod.rdma_create_cq;
1028
1029         p_ramrod->cq_handle.hi = cpu_to_le32(params->cq_handle_hi);
1030         p_ramrod->cq_handle.lo = cpu_to_le32(params->cq_handle_lo);
1031         p_ramrod->dpi = cpu_to_le16(params->dpi);
1032         p_ramrod->is_two_level_pbl = params->pbl_two_level;
1033         p_ramrod->max_cqes = cpu_to_le32(params->cq_size);
1034         DMA_REGPAIR_LE(p_ramrod->pbl_addr, params->pbl_ptr);
1035         p_ramrod->pbl_num_pages = cpu_to_le16(params->pbl_num_pages);
1036         p_ramrod->cnq_id = (u8)RESC_START(p_hwfn, QED_RDMA_CNQ_RAM) +
1037                            params->cnq_id;
1038         p_ramrod->int_timeout = params->int_timeout;
1039
1040         /* toggle the bit for every resize or create cq for a given icid */
1041         toggle_bit = qed_rdma_toggle_bit_create_resize_cq(p_hwfn, *icid);
1042
1043         p_ramrod->toggle_bit = toggle_bit;
1044
1045         rc = qed_spq_post(p_hwfn, p_ent, NULL);
1046         if (rc) {
1047                 /* restore toggle bit */
1048                 qed_rdma_toggle_bit_create_resize_cq(p_hwfn, *icid);
1049                 goto err;
1050         }
1051
1052         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Created CQ, rc = %d\n", rc);
1053         return rc;
1054
1055 err:
1056         /* release allocated icid */
1057         spin_lock_bh(&p_info->lock);
1058         qed_bmap_release_id(p_hwfn, &p_info->cq_map, returned_id);
1059         spin_unlock_bh(&p_info->lock);
1060         DP_NOTICE(p_hwfn, "Create CQ failed, rc = %d\n", rc);
1061
1062         return rc;
1063 }
1064
1065 static int
1066 qed_rdma_destroy_cq(void *rdma_cxt,
1067                     struct qed_rdma_destroy_cq_in_params *in_params,
1068                     struct qed_rdma_destroy_cq_out_params *out_params)
1069 {
1070         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1071         struct rdma_destroy_cq_output_params *p_ramrod_res;
1072         struct rdma_destroy_cq_ramrod_data *p_ramrod;
1073         struct qed_sp_init_data init_data;
1074         struct qed_spq_entry *p_ent;
1075         dma_addr_t ramrod_res_phys;
1076         enum protocol_type proto;
1077         int rc = -ENOMEM;
1078
1079         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", in_params->icid);
1080
1081         p_ramrod_res =
1082             (struct rdma_destroy_cq_output_params *)
1083             dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1084                                sizeof(struct rdma_destroy_cq_output_params),
1085                                &ramrod_res_phys, GFP_KERNEL);
1086         if (!p_ramrod_res) {
1087                 DP_NOTICE(p_hwfn,
1088                           "qed destroy cq failed: cannot allocate memory (ramrod)\n");
1089                 return rc;
1090         }
1091
1092         /* Get SPQ entry */
1093         memset(&init_data, 0, sizeof(init_data));
1094         init_data.cid = in_params->icid;
1095         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1096         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1097         proto = p_hwfn->p_rdma_info->proto;
1098         /* Send destroy CQ ramrod */
1099         rc = qed_sp_init_request(p_hwfn, &p_ent,
1100                                  RDMA_RAMROD_DESTROY_CQ,
1101                                  proto, &init_data);
1102         if (rc)
1103                 goto err;
1104
1105         p_ramrod = &p_ent->ramrod.rdma_destroy_cq;
1106         DMA_REGPAIR_LE(p_ramrod->output_params_addr, ramrod_res_phys);
1107
1108         rc = qed_spq_post(p_hwfn, p_ent, NULL);
1109         if (rc)
1110                 goto err;
1111
1112         out_params->num_cq_notif = le16_to_cpu(p_ramrod_res->cnq_num);
1113
1114         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
1115                           sizeof(struct rdma_destroy_cq_output_params),
1116                           p_ramrod_res, ramrod_res_phys);
1117
1118         /* Free icid */
1119         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
1120
1121         qed_bmap_release_id(p_hwfn,
1122                             &p_hwfn->p_rdma_info->cq_map,
1123                             (in_params->icid -
1124                              qed_cxt_get_proto_cid_start(p_hwfn, proto)));
1125
1126         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
1127
1128         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Destroyed CQ, rc = %d\n", rc);
1129         return rc;
1130
1131 err:    dma_free_coherent(&p_hwfn->cdev->pdev->dev,
1132                           sizeof(struct rdma_destroy_cq_output_params),
1133                           p_ramrod_res, ramrod_res_phys);
1134
1135         return rc;
1136 }
1137
1138 void qed_rdma_set_fw_mac(u16 *p_fw_mac, u8 *p_qed_mac)
1139 {
1140         p_fw_mac[0] = cpu_to_le16((p_qed_mac[0] << 8) + p_qed_mac[1]);
1141         p_fw_mac[1] = cpu_to_le16((p_qed_mac[2] << 8) + p_qed_mac[3]);
1142         p_fw_mac[2] = cpu_to_le16((p_qed_mac[4] << 8) + p_qed_mac[5]);
1143 }
1144
1145 static int qed_rdma_query_qp(void *rdma_cxt,
1146                              struct qed_rdma_qp *qp,
1147                              struct qed_rdma_query_qp_out_params *out_params)
1148 {
1149         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1150         int rc = 0;
1151
1152         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
1153
1154         /* The following fields are filled in from qp and not FW as they can't
1155          * be modified by FW
1156          */
1157         out_params->mtu = qp->mtu;
1158         out_params->dest_qp = qp->dest_qp;
1159         out_params->incoming_atomic_en = qp->incoming_atomic_en;
1160         out_params->e2e_flow_control_en = qp->e2e_flow_control_en;
1161         out_params->incoming_rdma_read_en = qp->incoming_rdma_read_en;
1162         out_params->incoming_rdma_write_en = qp->incoming_rdma_write_en;
1163         out_params->dgid = qp->dgid;
1164         out_params->flow_label = qp->flow_label;
1165         out_params->hop_limit_ttl = qp->hop_limit_ttl;
1166         out_params->traffic_class_tos = qp->traffic_class_tos;
1167         out_params->timeout = qp->ack_timeout;
1168         out_params->rnr_retry = qp->rnr_retry_cnt;
1169         out_params->retry_cnt = qp->retry_cnt;
1170         out_params->min_rnr_nak_timer = qp->min_rnr_nak_timer;
1171         out_params->pkey_index = 0;
1172         out_params->max_rd_atomic = qp->max_rd_atomic_req;
1173         out_params->max_dest_rd_atomic = qp->max_rd_atomic_resp;
1174         out_params->sqd_async = qp->sqd_async;
1175
1176         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
1177                 qed_iwarp_query_qp(qp, out_params);
1178         else
1179                 rc = qed_roce_query_qp(p_hwfn, qp, out_params);
1180
1181         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Query QP, rc = %d\n", rc);
1182         return rc;
1183 }
1184
1185 static int qed_rdma_destroy_qp(void *rdma_cxt, struct qed_rdma_qp *qp)
1186 {
1187         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1188         int rc = 0;
1189
1190         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
1191
1192         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
1193                 rc = qed_iwarp_destroy_qp(p_hwfn, qp);
1194         else
1195                 rc = qed_roce_destroy_qp(p_hwfn, qp);
1196
1197         /* free qp params struct */
1198         kfree(qp);
1199
1200         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "QP destroyed\n");
1201         return rc;
1202 }
1203
1204 static struct qed_rdma_qp *
1205 qed_rdma_create_qp(void *rdma_cxt,
1206                    struct qed_rdma_create_qp_in_params *in_params,
1207                    struct qed_rdma_create_qp_out_params *out_params)
1208 {
1209         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1210         struct qed_rdma_qp *qp;
1211         u8 max_stats_queues;
1212         int rc;
1213
1214         if (!rdma_cxt || !in_params || !out_params || !p_hwfn->p_rdma_info) {
1215                 DP_ERR(p_hwfn->cdev,
1216                        "qed roce create qp failed due to NULL entry (rdma_cxt=%p, in=%p, out=%p, roce_info=?\n",
1217                        rdma_cxt, in_params, out_params);
1218                 return NULL;
1219         }
1220
1221         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1222                    "qed rdma create qp called with qp_handle = %08x%08x\n",
1223                    in_params->qp_handle_hi, in_params->qp_handle_lo);
1224
1225         /* Some sanity checks... */
1226         max_stats_queues = p_hwfn->p_rdma_info->dev->max_stats_queues;
1227         if (in_params->stats_queue >= max_stats_queues) {
1228                 DP_ERR(p_hwfn->cdev,
1229                        "qed rdma create qp failed due to invalid statistics queue %d. maximum is %d\n",
1230                        in_params->stats_queue, max_stats_queues);
1231                 return NULL;
1232         }
1233
1234         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
1235                 if (in_params->sq_num_pages * sizeof(struct regpair) >
1236                     IWARP_SHARED_QUEUE_PAGE_SQ_PBL_MAX_SIZE) {
1237                         DP_NOTICE(p_hwfn->cdev,
1238                                   "Sq num pages: %d exceeds maximum\n",
1239                                   in_params->sq_num_pages);
1240                         return NULL;
1241                 }
1242                 if (in_params->rq_num_pages * sizeof(struct regpair) >
1243                     IWARP_SHARED_QUEUE_PAGE_RQ_PBL_MAX_SIZE) {
1244                         DP_NOTICE(p_hwfn->cdev,
1245                                   "Rq num pages: %d exceeds maximum\n",
1246                                   in_params->rq_num_pages);
1247                         return NULL;
1248                 }
1249         }
1250
1251         qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1252         if (!qp)
1253                 return NULL;
1254
1255         qp->cur_state = QED_ROCE_QP_STATE_RESET;
1256         qp->qp_handle.hi = cpu_to_le32(in_params->qp_handle_hi);
1257         qp->qp_handle.lo = cpu_to_le32(in_params->qp_handle_lo);
1258         qp->qp_handle_async.hi = cpu_to_le32(in_params->qp_handle_async_hi);
1259         qp->qp_handle_async.lo = cpu_to_le32(in_params->qp_handle_async_lo);
1260         qp->use_srq = in_params->use_srq;
1261         qp->signal_all = in_params->signal_all;
1262         qp->fmr_and_reserved_lkey = in_params->fmr_and_reserved_lkey;
1263         qp->pd = in_params->pd;
1264         qp->dpi = in_params->dpi;
1265         qp->sq_cq_id = in_params->sq_cq_id;
1266         qp->sq_num_pages = in_params->sq_num_pages;
1267         qp->sq_pbl_ptr = in_params->sq_pbl_ptr;
1268         qp->rq_cq_id = in_params->rq_cq_id;
1269         qp->rq_num_pages = in_params->rq_num_pages;
1270         qp->rq_pbl_ptr = in_params->rq_pbl_ptr;
1271         qp->srq_id = in_params->srq_id;
1272         qp->req_offloaded = false;
1273         qp->resp_offloaded = false;
1274         qp->e2e_flow_control_en = qp->use_srq ? false : true;
1275         qp->stats_queue = in_params->stats_queue;
1276
1277         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
1278                 rc = qed_iwarp_create_qp(p_hwfn, qp, out_params);
1279                 qp->qpid = qp->icid;
1280         } else {
1281                 rc = qed_roce_alloc_cid(p_hwfn, &qp->icid);
1282                 qp->qpid = ((0xFF << 16) | qp->icid);
1283         }
1284
1285         if (rc) {
1286                 kfree(qp);
1287                 return NULL;
1288         }
1289
1290         out_params->icid = qp->icid;
1291         out_params->qp_id = qp->qpid;
1292
1293         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Create QP, rc = %d\n", rc);
1294         return qp;
1295 }
1296
1297 static int qed_rdma_modify_qp(void *rdma_cxt,
1298                               struct qed_rdma_qp *qp,
1299                               struct qed_rdma_modify_qp_in_params *params)
1300 {
1301         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1302         enum qed_roce_qp_state prev_state;
1303         int rc = 0;
1304
1305         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x params->new_state=%d\n",
1306                    qp->icid, params->new_state);
1307
1308         if (rc) {
1309                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "rc = %d\n", rc);
1310                 return rc;
1311         }
1312
1313         if (GET_FIELD(params->modify_flags,
1314                       QED_RDMA_MODIFY_QP_VALID_RDMA_OPS_EN)) {
1315                 qp->incoming_rdma_read_en = params->incoming_rdma_read_en;
1316                 qp->incoming_rdma_write_en = params->incoming_rdma_write_en;
1317                 qp->incoming_atomic_en = params->incoming_atomic_en;
1318         }
1319
1320         /* Update QP structure with the updated values */
1321         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_ROCE_MODE))
1322                 qp->roce_mode = params->roce_mode;
1323         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_PKEY))
1324                 qp->pkey = params->pkey;
1325         if (GET_FIELD(params->modify_flags,
1326                       QED_ROCE_MODIFY_QP_VALID_E2E_FLOW_CONTROL_EN))
1327                 qp->e2e_flow_control_en = params->e2e_flow_control_en;
1328         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_DEST_QP))
1329                 qp->dest_qp = params->dest_qp;
1330         if (GET_FIELD(params->modify_flags,
1331                       QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR)) {
1332                 /* Indicates that the following parameters have changed:
1333                  * Traffic class, flow label, hop limit, source GID,
1334                  * destination GID, loopback indicator
1335                  */
1336                 qp->traffic_class_tos = params->traffic_class_tos;
1337                 qp->flow_label = params->flow_label;
1338                 qp->hop_limit_ttl = params->hop_limit_ttl;
1339
1340                 qp->sgid = params->sgid;
1341                 qp->dgid = params->dgid;
1342                 qp->udp_src_port = 0;
1343                 qp->vlan_id = params->vlan_id;
1344                 qp->mtu = params->mtu;
1345                 qp->lb_indication = params->lb_indication;
1346                 memcpy((u8 *)&qp->remote_mac_addr[0],
1347                        (u8 *)&params->remote_mac_addr[0], ETH_ALEN);
1348                 if (params->use_local_mac) {
1349                         memcpy((u8 *)&qp->local_mac_addr[0],
1350                                (u8 *)&params->local_mac_addr[0], ETH_ALEN);
1351                 } else {
1352                         memcpy((u8 *)&qp->local_mac_addr[0],
1353                                (u8 *)&p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1354                 }
1355         }
1356         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_RQ_PSN))
1357                 qp->rq_psn = params->rq_psn;
1358         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_SQ_PSN))
1359                 qp->sq_psn = params->sq_psn;
1360         if (GET_FIELD(params->modify_flags,
1361                       QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_REQ))
1362                 qp->max_rd_atomic_req = params->max_rd_atomic_req;
1363         if (GET_FIELD(params->modify_flags,
1364                       QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_RESP))
1365                 qp->max_rd_atomic_resp = params->max_rd_atomic_resp;
1366         if (GET_FIELD(params->modify_flags,
1367                       QED_ROCE_MODIFY_QP_VALID_ACK_TIMEOUT))
1368                 qp->ack_timeout = params->ack_timeout;
1369         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_RETRY_CNT))
1370                 qp->retry_cnt = params->retry_cnt;
1371         if (GET_FIELD(params->modify_flags,
1372                       QED_ROCE_MODIFY_QP_VALID_RNR_RETRY_CNT))
1373                 qp->rnr_retry_cnt = params->rnr_retry_cnt;
1374         if (GET_FIELD(params->modify_flags,
1375                       QED_ROCE_MODIFY_QP_VALID_MIN_RNR_NAK_TIMER))
1376                 qp->min_rnr_nak_timer = params->min_rnr_nak_timer;
1377
1378         qp->sqd_async = params->sqd_async;
1379
1380         prev_state = qp->cur_state;
1381         if (GET_FIELD(params->modify_flags,
1382                       QED_RDMA_MODIFY_QP_VALID_NEW_STATE)) {
1383                 qp->cur_state = params->new_state;
1384                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "qp->cur_state=%d\n",
1385                            qp->cur_state);
1386         }
1387
1388         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
1389                 enum qed_iwarp_qp_state new_state =
1390                     qed_roce2iwarp_state(qp->cur_state);
1391
1392                 rc = qed_iwarp_modify_qp(p_hwfn, qp, new_state, 0);
1393         } else {
1394                 rc = qed_roce_modify_qp(p_hwfn, qp, prev_state, params);
1395         }
1396
1397         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Modify QP, rc = %d\n", rc);
1398         return rc;
1399 }
1400
1401 static int
1402 qed_rdma_register_tid(void *rdma_cxt,
1403                       struct qed_rdma_register_tid_in_params *params)
1404 {
1405         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1406         struct rdma_register_tid_ramrod_data *p_ramrod;
1407         struct qed_sp_init_data init_data;
1408         struct qed_spq_entry *p_ent;
1409         enum rdma_tid_type tid_type;
1410         u8 fw_return_code;
1411         int rc;
1412
1413         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "itid = %08x\n", params->itid);
1414
1415         /* Get SPQ entry */
1416         memset(&init_data, 0, sizeof(init_data));
1417         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1418         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1419
1420         rc = qed_sp_init_request(p_hwfn, &p_ent, RDMA_RAMROD_REGISTER_MR,
1421                                  p_hwfn->p_rdma_info->proto, &init_data);
1422         if (rc) {
1423                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "rc = %d\n", rc);
1424                 return rc;
1425         }
1426
1427         if (p_hwfn->p_rdma_info->last_tid < params->itid)
1428                 p_hwfn->p_rdma_info->last_tid = params->itid;
1429
1430         p_ramrod = &p_ent->ramrod.rdma_register_tid;
1431
1432         p_ramrod->flags = 0;
1433         SET_FIELD(p_ramrod->flags,
1434                   RDMA_REGISTER_TID_RAMROD_DATA_TWO_LEVEL_PBL,
1435                   params->pbl_two_level);
1436
1437         SET_FIELD(p_ramrod->flags,
1438                   RDMA_REGISTER_TID_RAMROD_DATA_ZERO_BASED, params->zbva);
1439
1440         SET_FIELD(p_ramrod->flags,
1441                   RDMA_REGISTER_TID_RAMROD_DATA_PHY_MR, params->phy_mr);
1442
1443         /* Don't initialize D/C field, as it may override other bits. */
1444         if (!(params->tid_type == QED_RDMA_TID_FMR) && !(params->dma_mr))
1445                 SET_FIELD(p_ramrod->flags,
1446                           RDMA_REGISTER_TID_RAMROD_DATA_PAGE_SIZE_LOG,
1447                           params->page_size_log - 12);
1448
1449         SET_FIELD(p_ramrod->flags,
1450                   RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_READ,
1451                   params->remote_read);
1452
1453         SET_FIELD(p_ramrod->flags,
1454                   RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_WRITE,
1455                   params->remote_write);
1456
1457         SET_FIELD(p_ramrod->flags,
1458                   RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_ATOMIC,
1459                   params->remote_atomic);
1460
1461         SET_FIELD(p_ramrod->flags,
1462                   RDMA_REGISTER_TID_RAMROD_DATA_LOCAL_WRITE,
1463                   params->local_write);
1464
1465         SET_FIELD(p_ramrod->flags,
1466                   RDMA_REGISTER_TID_RAMROD_DATA_LOCAL_READ, params->local_read);
1467
1468         SET_FIELD(p_ramrod->flags,
1469                   RDMA_REGISTER_TID_RAMROD_DATA_ENABLE_MW_BIND,
1470                   params->mw_bind);
1471
1472         SET_FIELD(p_ramrod->flags1,
1473                   RDMA_REGISTER_TID_RAMROD_DATA_PBL_PAGE_SIZE_LOG,
1474                   params->pbl_page_size_log - 12);
1475
1476         SET_FIELD(p_ramrod->flags2,
1477                   RDMA_REGISTER_TID_RAMROD_DATA_DMA_MR, params->dma_mr);
1478
1479         switch (params->tid_type) {
1480         case QED_RDMA_TID_REGISTERED_MR:
1481                 tid_type = RDMA_TID_REGISTERED_MR;
1482                 break;
1483         case QED_RDMA_TID_FMR:
1484                 tid_type = RDMA_TID_FMR;
1485                 break;
1486         case QED_RDMA_TID_MW_TYPE1:
1487                 tid_type = RDMA_TID_MW_TYPE1;
1488                 break;
1489         case QED_RDMA_TID_MW_TYPE2A:
1490                 tid_type = RDMA_TID_MW_TYPE2A;
1491                 break;
1492         default:
1493                 rc = -EINVAL;
1494                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "rc = %d\n", rc);
1495                 return rc;
1496         }
1497         SET_FIELD(p_ramrod->flags1,
1498                   RDMA_REGISTER_TID_RAMROD_DATA_TID_TYPE, tid_type);
1499
1500         p_ramrod->itid = cpu_to_le32(params->itid);
1501         p_ramrod->key = params->key;
1502         p_ramrod->pd = cpu_to_le16(params->pd);
1503         p_ramrod->length_hi = (u8)(params->length >> 32);
1504         p_ramrod->length_lo = DMA_LO_LE(params->length);
1505         if (params->zbva) {
1506                 /* Lower 32 bits of the registered MR address.
1507                  * In case of zero based MR, will hold FBO
1508                  */
1509                 p_ramrod->va.hi = 0;
1510                 p_ramrod->va.lo = cpu_to_le32(params->fbo);
1511         } else {
1512                 DMA_REGPAIR_LE(p_ramrod->va, params->vaddr);
1513         }
1514         DMA_REGPAIR_LE(p_ramrod->pbl_base, params->pbl_ptr);
1515
1516         /* DIF */
1517         if (params->dif_enabled) {
1518                 SET_FIELD(p_ramrod->flags2,
1519                           RDMA_REGISTER_TID_RAMROD_DATA_DIF_ON_HOST_FLG, 1);
1520                 DMA_REGPAIR_LE(p_ramrod->dif_error_addr,
1521                                params->dif_error_addr);
1522                 DMA_REGPAIR_LE(p_ramrod->dif_runt_addr, params->dif_runt_addr);
1523         }
1524
1525         rc = qed_spq_post(p_hwfn, p_ent, &fw_return_code);
1526         if (rc)
1527                 return rc;
1528
1529         if (fw_return_code != RDMA_RETURN_OK) {
1530                 DP_NOTICE(p_hwfn, "fw_return_code = %d\n", fw_return_code);
1531                 return -EINVAL;
1532         }
1533
1534         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Register TID, rc = %d\n", rc);
1535         return rc;
1536 }
1537
1538 static int qed_rdma_deregister_tid(void *rdma_cxt, u32 itid)
1539 {
1540         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1541         struct rdma_deregister_tid_ramrod_data *p_ramrod;
1542         struct qed_sp_init_data init_data;
1543         struct qed_spq_entry *p_ent;
1544         struct qed_ptt *p_ptt;
1545         u8 fw_return_code;
1546         int rc;
1547
1548         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "itid = %08x\n", itid);
1549
1550         /* Get SPQ entry */
1551         memset(&init_data, 0, sizeof(init_data));
1552         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1553         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1554
1555         rc = qed_sp_init_request(p_hwfn, &p_ent, RDMA_RAMROD_DEREGISTER_MR,
1556                                  p_hwfn->p_rdma_info->proto, &init_data);
1557         if (rc) {
1558                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "rc = %d\n", rc);
1559                 return rc;
1560         }
1561
1562         p_ramrod = &p_ent->ramrod.rdma_deregister_tid;
1563         p_ramrod->itid = cpu_to_le32(itid);
1564
1565         rc = qed_spq_post(p_hwfn, p_ent, &fw_return_code);
1566         if (rc) {
1567                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "rc = %d\n", rc);
1568                 return rc;
1569         }
1570
1571         if (fw_return_code == RDMA_RETURN_DEREGISTER_MR_BAD_STATE_ERR) {
1572                 DP_NOTICE(p_hwfn, "fw_return_code = %d\n", fw_return_code);
1573                 return -EINVAL;
1574         } else if (fw_return_code == RDMA_RETURN_NIG_DRAIN_REQ) {
1575                 /* Bit indicating that the TID is in use and a nig drain is
1576                  * required before sending the ramrod again
1577                  */
1578                 p_ptt = qed_ptt_acquire(p_hwfn);
1579                 if (!p_ptt) {
1580                         rc = -EBUSY;
1581                         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1582                                    "Failed to acquire PTT\n");
1583                         return rc;
1584                 }
1585
1586                 rc = qed_mcp_drain(p_hwfn, p_ptt);
1587                 if (rc) {
1588                         qed_ptt_release(p_hwfn, p_ptt);
1589                         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1590                                    "Drain failed\n");
1591                         return rc;
1592                 }
1593
1594                 qed_ptt_release(p_hwfn, p_ptt);
1595
1596                 /* Resend the ramrod */
1597                 rc = qed_sp_init_request(p_hwfn, &p_ent,
1598                                          RDMA_RAMROD_DEREGISTER_MR,
1599                                          p_hwfn->p_rdma_info->proto,
1600                                          &init_data);
1601                 if (rc) {
1602                         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1603                                    "Failed to init sp-element\n");
1604                         return rc;
1605                 }
1606
1607                 rc = qed_spq_post(p_hwfn, p_ent, &fw_return_code);
1608                 if (rc) {
1609                         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1610                                    "Ramrod failed\n");
1611                         return rc;
1612                 }
1613
1614                 if (fw_return_code != RDMA_RETURN_OK) {
1615                         DP_NOTICE(p_hwfn, "fw_return_code = %d\n",
1616                                   fw_return_code);
1617                         return rc;
1618                 }
1619         }
1620
1621         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "De-registered TID, rc = %d\n", rc);
1622         return rc;
1623 }
1624
1625 static void *qed_rdma_get_rdma_ctx(struct qed_dev *cdev)
1626 {
1627         return QED_LEADING_HWFN(cdev);
1628 }
1629
1630 bool qed_rdma_allocated_qps(struct qed_hwfn *p_hwfn)
1631 {
1632         bool result;
1633
1634         /* if rdma info has not been allocated, naturally there are no qps */
1635         if (!p_hwfn->p_rdma_info)
1636                 return false;
1637
1638         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
1639         if (!p_hwfn->p_rdma_info->cid_map.bitmap)
1640                 result = false;
1641         else
1642                 result = !qed_bmap_is_empty(&p_hwfn->p_rdma_info->cid_map);
1643         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
1644         return result;
1645 }
1646
1647 void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1648 {
1649         u32 val;
1650
1651         val = (p_hwfn->dcbx_no_edpm || p_hwfn->db_bar_no_edpm) ? 0 : 1;
1652
1653         qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_DPM_ENABLE, val);
1654         DP_VERBOSE(p_hwfn, (QED_MSG_DCB | QED_MSG_RDMA),
1655                    "Changing DPM_EN state to %d (DCBX=%d, DB_BAR=%d)\n",
1656                    val, p_hwfn->dcbx_no_edpm, p_hwfn->db_bar_no_edpm);
1657 }
1658
1659
1660 void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1661 {
1662         p_hwfn->db_bar_no_edpm = true;
1663
1664         qed_rdma_dpm_conf(p_hwfn, p_ptt);
1665 }
1666
1667 static int qed_rdma_start(void *rdma_cxt,
1668                           struct qed_rdma_start_in_params *params)
1669 {
1670         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1671         struct qed_ptt *p_ptt;
1672         int rc = -EBUSY;
1673
1674         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1675                    "desired_cnq = %08x\n", params->desired_cnq);
1676
1677         p_ptt = qed_ptt_acquire(p_hwfn);
1678         if (!p_ptt)
1679                 goto err;
1680
1681         rc = qed_rdma_alloc(p_hwfn, p_ptt, params);
1682         if (rc)
1683                 goto err1;
1684
1685         rc = qed_rdma_setup(p_hwfn, p_ptt, params);
1686         if (rc)
1687                 goto err2;
1688
1689         qed_ptt_release(p_hwfn, p_ptt);
1690
1691         return rc;
1692
1693 err2:
1694         qed_rdma_free(p_hwfn);
1695 err1:
1696         qed_ptt_release(p_hwfn, p_ptt);
1697 err:
1698         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA start - error, rc = %d\n", rc);
1699         return rc;
1700 }
1701
1702 static int qed_rdma_init(struct qed_dev *cdev,
1703                          struct qed_rdma_start_in_params *params)
1704 {
1705         return qed_rdma_start(QED_LEADING_HWFN(cdev), params);
1706 }
1707
1708 static void qed_rdma_remove_user(void *rdma_cxt, u16 dpi)
1709 {
1710         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1711
1712         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "dpi = %08x\n", dpi);
1713
1714         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
1715         qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->dpi_map, dpi);
1716         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
1717 }
1718
1719 static int qed_roce_ll2_set_mac_filter(struct qed_dev *cdev,
1720                                        u8 *old_mac_address,
1721                                        u8 *new_mac_address)
1722 {
1723         struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
1724         struct qed_ptt *p_ptt;
1725         int rc = 0;
1726
1727         p_ptt = qed_ptt_acquire(p_hwfn);
1728         if (!p_ptt) {
1729                 DP_ERR(cdev,
1730                        "qed roce ll2 mac filter set: failed to acquire PTT\n");
1731                 return -EINVAL;
1732         }
1733
1734         if (old_mac_address)
1735                 qed_llh_remove_mac_filter(p_hwfn, p_ptt, old_mac_address);
1736         if (new_mac_address)
1737                 rc = qed_llh_add_mac_filter(p_hwfn, p_ptt, new_mac_address);
1738
1739         qed_ptt_release(p_hwfn, p_ptt);
1740
1741         if (rc)
1742                 DP_ERR(cdev,
1743                        "qed roce ll2 mac filter set: failed to add MAC filter\n");
1744
1745         return rc;
1746 }
1747
1748 static const struct qed_rdma_ops qed_rdma_ops_pass = {
1749         .common = &qed_common_ops_pass,
1750         .fill_dev_info = &qed_fill_rdma_dev_info,
1751         .rdma_get_rdma_ctx = &qed_rdma_get_rdma_ctx,
1752         .rdma_init = &qed_rdma_init,
1753         .rdma_add_user = &qed_rdma_add_user,
1754         .rdma_remove_user = &qed_rdma_remove_user,
1755         .rdma_stop = &qed_rdma_stop,
1756         .rdma_query_port = &qed_rdma_query_port,
1757         .rdma_query_device = &qed_rdma_query_device,
1758         .rdma_get_start_sb = &qed_rdma_get_sb_start,
1759         .rdma_get_rdma_int = &qed_rdma_get_int,
1760         .rdma_set_rdma_int = &qed_rdma_set_int,
1761         .rdma_get_min_cnq_msix = &qed_rdma_get_min_cnq_msix,
1762         .rdma_cnq_prod_update = &qed_rdma_cnq_prod_update,
1763         .rdma_alloc_pd = &qed_rdma_alloc_pd,
1764         .rdma_dealloc_pd = &qed_rdma_free_pd,
1765         .rdma_create_cq = &qed_rdma_create_cq,
1766         .rdma_destroy_cq = &qed_rdma_destroy_cq,
1767         .rdma_create_qp = &qed_rdma_create_qp,
1768         .rdma_modify_qp = &qed_rdma_modify_qp,
1769         .rdma_query_qp = &qed_rdma_query_qp,
1770         .rdma_destroy_qp = &qed_rdma_destroy_qp,
1771         .rdma_alloc_tid = &qed_rdma_alloc_tid,
1772         .rdma_free_tid = &qed_rdma_free_tid,
1773         .rdma_register_tid = &qed_rdma_register_tid,
1774         .rdma_deregister_tid = &qed_rdma_deregister_tid,
1775         .ll2_acquire_connection = &qed_ll2_acquire_connection,
1776         .ll2_establish_connection = &qed_ll2_establish_connection,
1777         .ll2_terminate_connection = &qed_ll2_terminate_connection,
1778         .ll2_release_connection = &qed_ll2_release_connection,
1779         .ll2_post_rx_buffer = &qed_ll2_post_rx_buffer,
1780         .ll2_prepare_tx_packet = &qed_ll2_prepare_tx_packet,
1781         .ll2_set_fragment_of_tx_packet = &qed_ll2_set_fragment_of_tx_packet,
1782         .ll2_set_mac_filter = &qed_roce_ll2_set_mac_filter,
1783         .ll2_get_stats = &qed_ll2_get_stats,
1784         .iwarp_connect = &qed_iwarp_connect,
1785         .iwarp_create_listen = &qed_iwarp_create_listen,
1786         .iwarp_destroy_listen = &qed_iwarp_destroy_listen,
1787         .iwarp_accept = &qed_iwarp_accept,
1788         .iwarp_reject = &qed_iwarp_reject,
1789         .iwarp_send_rtr = &qed_iwarp_send_rtr,
1790 };
1791
1792 const struct qed_rdma_ops *qed_get_rdma_ops(void)
1793 {
1794         return &qed_rdma_ops_pass;
1795 }
1796 EXPORT_SYMBOL(qed_get_rdma_ops);