drivers/net/ethernet/qlogic/qed/qed_rdma.c

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015-2017  QLogic Corporation
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and /or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #include <linux/types.h>
  33 #include <asm/byteorder.h>
  34 #include <linux/bitops.h>
  35 #include <linux/delay.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/errno.h>
  38 #include <linux/io.h>
  39 #include <linux/kernel.h>
  40 #include <linux/list.h>
  41 #include <linux/module.h>
  42 #include <linux/mutex.h>
  43 #include <linux/pci.h>
  44 #include <linux/slab.h>
  45 #include <linux/spinlock.h>
  46 #include <linux/string.h>
  47 #include "qed.h"
  48 #include "qed_cxt.h"
  49 #include "qed_hsi.h"
  50 #include "qed_hw.h"
  51 #include "qed_init_ops.h"
  52 #include "qed_int.h"
  53 #include "qed_ll2.h"
  54 #include "qed_mcp.h"
  55 #include "qed_reg_addr.h"
  56 #include <linux/qed/qed_rdma_if.h>
  57 #include "qed_rdma.h"
  58 #include "qed_roce.h"
  59 #include "qed_sp.h"
  60
  61
  62 int qed_rdma_bmap_alloc(struct qed_hwfn *p_hwfn,
  63                         struct qed_bmap *bmap, u32 max_count, char *name)
  64 {
  65         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "max_count = %08x\n", max_count);
  66
  67         bmap->max_count = max_count;
  68
  69         bmap->bitmap = kcalloc(BITS_TO_LONGS(max_count), sizeof(long),
  70                                GFP_KERNEL);
  71         if (!bmap->bitmap)
  72                 return -ENOMEM;
  73
  74         snprintf(bmap->name, QED_RDMA_MAX_BMAP_NAME, "%s", name);
  75
  76         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "0\n");
  77         return 0;
  78 }
  79
  80 int qed_rdma_bmap_alloc_id(struct qed_hwfn *p_hwfn,
  81                            struct qed_bmap *bmap, u32 *id_num)
  82 {
  83         *id_num = find_first_zero_bit(bmap->bitmap, bmap->max_count);
  84         if (*id_num >= bmap->max_count)
  85                 return -EINVAL;
  86
  87         __set_bit(*id_num, bmap->bitmap);
  88
  89         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "%s bitmap: allocated id %d\n",
  90                    bmap->name, *id_num);
  91
  92         return 0;
  93 }
  94
  95 void qed_bmap_set_id(struct qed_hwfn *p_hwfn,
  96                      struct qed_bmap *bmap, u32 id_num)
  97 {
  98         if (id_num >= bmap->max_count)
  99                 return;
 100
 101         __set_bit(id_num, bmap->bitmap);
 102 }
 103
 104 void qed_bmap_release_id(struct qed_hwfn *p_hwfn,
 105                          struct qed_bmap *bmap, u32 id_num)
 106 {
 107         bool b_acquired;
 108
 109         if (id_num >= bmap->max_count)
 110                 return;
 111
 112         b_acquired = test_and_clear_bit(id_num, bmap->bitmap);
 113         if (!b_acquired) {
 114                 DP_NOTICE(p_hwfn, "%s bitmap: id %d already released\n",
 115                           bmap->name, id_num);
 116                 return;
 117         }
 118
 119         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "%s bitmap: released id %d\n",
 120                    bmap->name, id_num);
 121 }
 122
 123 int qed_bmap_test_id(struct qed_hwfn *p_hwfn,
 124                      struct qed_bmap *bmap, u32 id_num)
 125 {
 126         if (id_num >= bmap->max_count)
 127                 return -1;
 128
 129         return test_bit(id_num, bmap->bitmap);
 130 }
 131
 132 static bool qed_bmap_is_empty(struct qed_bmap *bmap)
 133 {
 134         return bmap->max_count == find_first_bit(bmap->bitmap, bmap->max_count);
 135 }
 136
 137 u32 qed_rdma_get_sb_id(void *p_hwfn, u32 rel_sb_id)
 138 {
 139         /* First sb id for RoCE is after all the l2 sb */
 140         return FEAT_NUM((struct qed_hwfn *)p_hwfn, QED_PF_L2_QUE) + rel_sb_id;
 141 }
 142
 143 static int qed_rdma_alloc(struct qed_hwfn *p_hwfn,
 144                           struct qed_ptt *p_ptt,
 145                           struct qed_rdma_start_in_params *params)
 146 {
 147         struct qed_rdma_info *p_rdma_info;
 148         u32 num_cons, num_tasks;
 149         int rc = -ENOMEM;
 150
 151         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Allocating RDMA\n");
 152
 153         /* Allocate a struct with current pf rdma info */
 154         p_rdma_info = kzalloc(sizeof(*p_rdma_info), GFP_KERNEL);
 155         if (!p_rdma_info)
 156                 return rc;
 157
 158         p_hwfn->p_rdma_info = p_rdma_info;
 159         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 160                 p_rdma_info->proto = PROTOCOLID_IWARP;
 161         else
 162                 p_rdma_info->proto = PROTOCOLID_ROCE;
 163
 164         num_cons = qed_cxt_get_proto_cid_count(p_hwfn, p_rdma_info->proto,
 165                                                NULL);
 166
 167         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 168                 p_rdma_info->num_qps = num_cons;
 169         else
 170                 p_rdma_info->num_qps = num_cons / 2; /* 2 cids per qp */
 171
 172         num_tasks = qed_cxt_get_proto_tid_count(p_hwfn, PROTOCOLID_ROCE);
 173
 174         /* Each MR uses a single task */
 175         p_rdma_info->num_mrs = num_tasks;
 176
 177         /* Queue zone lines are shared between RoCE and L2 in such a way that
 178          * they can be used by each without obstructing the other.
 179          */
 180         p_rdma_info->queue_zone_base = (u16)RESC_START(p_hwfn, QED_L2_QUEUE);
 181         p_rdma_info->max_queue_zones = (u16)RESC_NUM(p_hwfn, QED_L2_QUEUE);
 182
 183         /* Allocate a struct with device params and fill it */
 184         p_rdma_info->dev = kzalloc(sizeof(*p_rdma_info->dev), GFP_KERNEL);
 185         if (!p_rdma_info->dev)
 186                 goto free_rdma_info;
 187
 188         /* Allocate a struct with port params and fill it */
 189         p_rdma_info->port = kzalloc(sizeof(*p_rdma_info->port), GFP_KERNEL);
 190         if (!p_rdma_info->port)
 191                 goto free_rdma_dev;
 192
 193         /* Allocate bit map for pd's */
 194         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->pd_map, RDMA_MAX_PDS,
 195                                  "PD");
 196         if (rc) {
 197                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 198                            "Failed to allocate pd_map, rc = %d\n",
 199                            rc);
 200                 goto free_rdma_port;
 201         }
 202
 203         /* Allocate DPI bitmap */
 204         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->dpi_map,
 205                                  p_hwfn->dpi_count, "DPI");
 206         if (rc) {
 207                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 208                            "Failed to allocate DPI bitmap, rc = %d\n", rc);
 209                 goto free_pd_map;
 210         }
 211
 212         /* Allocate bitmap for cq's. The maximum number of CQs is bound to
 213          * the number of connections we support. (num_qps in iWARP or
 214          * num_qps/2 in RoCE).
 215          */
 216         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->cq_map, num_cons, "CQ");
 217         if (rc) {
 218                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 219                            "Failed to allocate cq bitmap, rc = %d\n", rc);
 220                 goto free_dpi_map;
 221         }
 222
 223         /* Allocate bitmap for toggle bit for cq icids
 224          * We toggle the bit every time we create or resize cq for a given icid.
 225          * Size needs to equal the size of the cq bmap.
 226          */
 227         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->toggle_bits,
 228                                  num_cons, "Toggle");
 229         if (rc) {
 230                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 231                            "Failed to allocate toogle bits, rc = %d\n", rc);
 232                 goto free_cq_map;
 233         }
 234
 235         /* Allocate bitmap for itids */
 236         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->tid_map,
 237                                  p_rdma_info->num_mrs, "MR");
 238         if (rc) {
 239                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 240                            "Failed to allocate itids bitmaps, rc = %d\n", rc);
 241                 goto free_toggle_map;
 242         }
 243
 244         /* Allocate bitmap for cids used for qps. */
 245         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->cid_map, num_cons,
 246                                  "CID");
 247         if (rc) {
 248                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 249                            "Failed to allocate cid bitmap, rc = %d\n", rc);
 250                 goto free_tid_map;
 251         }
 252
 253         /* Allocate bitmap for cids used for responders/requesters. */
 254         rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->real_cid_map, num_cons,
 255                                  "REAL_CID");
 256         if (rc) {
 257                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 258                            "Failed to allocate real cid bitmap, rc = %d\n", rc);
 259                 goto free_cid_map;
 260         }
 261
 262         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 263                 rc = qed_iwarp_alloc(p_hwfn);
 264
 265         if (rc)
 266                 goto free_cid_map;
 267
 268         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Allocation successful\n");
 269         return 0;
 270
 271 free_cid_map:
 272         kfree(p_rdma_info->cid_map.bitmap);
 273 free_tid_map:
 274         kfree(p_rdma_info->tid_map.bitmap);
 275 free_toggle_map:
 276         kfree(p_rdma_info->toggle_bits.bitmap);
 277 free_cq_map:
 278         kfree(p_rdma_info->cq_map.bitmap);
 279 free_dpi_map:
 280         kfree(p_rdma_info->dpi_map.bitmap);
 281 free_pd_map:
 282         kfree(p_rdma_info->pd_map.bitmap);
 283 free_rdma_port:
 284         kfree(p_rdma_info->port);
 285 free_rdma_dev:
 286         kfree(p_rdma_info->dev);
 287 free_rdma_info:
 288         kfree(p_rdma_info);
 289
 290         return rc;
 291 }
 292
 293 void qed_rdma_bmap_free(struct qed_hwfn *p_hwfn,
 294                         struct qed_bmap *bmap, bool check)
 295 {
 296         int weight = bitmap_weight(bmap->bitmap, bmap->max_count);
 297         int last_line = bmap->max_count / (64 * 8);
 298         int last_item = last_line * 8 +
 299             DIV_ROUND_UP(bmap->max_count % (64 * 8), 64);
 300         u64 *pmap = (u64 *)bmap->bitmap;
 301         int line, item, offset;
 302         u8 str_last_line[200] = { 0 };
 303
 304         if (!weight || !check)
 305                 goto end;
 306
 307         DP_NOTICE(p_hwfn,
 308                   "%s bitmap not free - size=%d, weight=%d, 512 bits per line\n",
 309                   bmap->name, bmap->max_count, weight);
 310
 311         /* print aligned non-zero lines, if any */
 312         for (item = 0, line = 0; line < last_line; line++, item += 8)
 313                 if (bitmap_weight((unsigned long *)&pmap[item], 64 * 8))
 314                         DP_NOTICE(p_hwfn,
 315                                   "line 0x%04x: 0x%016llx 0x%016llx 0x%016llx 0x%016llx 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n",
 316                                   line,
 317                                   pmap[item],
 318                                   pmap[item + 1],
 319                                   pmap[item + 2],
 320                                   pmap[item + 3],
 321                                   pmap[item + 4],
 322                                   pmap[item + 5],
 323                                   pmap[item + 6], pmap[item + 7]);
 324
 325         /* print last unaligned non-zero line, if any */
 326         if ((bmap->max_count % (64 * 8)) &&
 327             (bitmap_weight((unsigned long *)&pmap[item],
 328                            bmap->max_count - item * 64))) {
 329                 offset = sprintf(str_last_line, "line 0x%04x: ", line);
 330                 for (; item < last_item; item++)
 331                         offset += sprintf(str_last_line + offset,
 332                                           "0x%016llx ", pmap[item]);
 333                 DP_NOTICE(p_hwfn, "%s\n", str_last_line);
 334         }
 335
 336 end:
 337         kfree(bmap->bitmap);
 338         bmap->bitmap = NULL;
 339 }
 340
 341 static void qed_rdma_resc_free(struct qed_hwfn *p_hwfn)
 342 {
 343         struct qed_rdma_info *p_rdma_info = p_hwfn->p_rdma_info;
 344
 345         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 346                 qed_iwarp_resc_free(p_hwfn);
 347
 348         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->cid_map, 1);
 349         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->pd_map, 1);
 350         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->dpi_map, 1);
 351         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->cq_map, 1);
 352         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->toggle_bits, 0);
 353         qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->tid_map, 1);
 354
 355         kfree(p_rdma_info->port);
 356         kfree(p_rdma_info->dev);
 357
 358         kfree(p_rdma_info);
 359 }
 360
 361 static void qed_rdma_free(struct qed_hwfn *p_hwfn)
 362 {
 363         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Freeing RDMA\n");
 364
 365         qed_rdma_resc_free(p_hwfn);
 366 }
 367
 368 static void qed_rdma_get_guid(struct qed_hwfn *p_hwfn, u8 *guid)
 369 {
 370         guid[0] = p_hwfn->hw_info.hw_mac_addr[0] ^ 2;
 371         guid[1] = p_hwfn->hw_info.hw_mac_addr[1];
 372         guid[2] = p_hwfn->hw_info.hw_mac_addr[2];
 373         guid[3] = 0xff;
 374         guid[4] = 0xfe;
 375         guid[5] = p_hwfn->hw_info.hw_mac_addr[3];
 376         guid[6] = p_hwfn->hw_info.hw_mac_addr[4];
 377         guid[7] = p_hwfn->hw_info.hw_mac_addr[5];
 378 }
 379
 380 static void qed_rdma_init_events(struct qed_hwfn *p_hwfn,
 381                                  struct qed_rdma_start_in_params *params)
 382 {
 383         struct qed_rdma_events *events;
 384
 385         events = &p_hwfn->p_rdma_info->events;
 386
 387         events->unaffiliated_event = params->events->unaffiliated_event;
 388         events->affiliated_event = params->events->affiliated_event;
 389         events->context = params->events->context;
 390 }
 391
 392 static void qed_rdma_init_devinfo(struct qed_hwfn *p_hwfn,
 393                                   struct qed_rdma_start_in_params *params)
 394 {
 395         struct qed_rdma_device *dev = p_hwfn->p_rdma_info->dev;
 396         struct qed_dev *cdev = p_hwfn->cdev;
 397         u32 pci_status_control;
 398         u32 num_qps;
 399
 400         /* Vendor specific information */
 401         dev->vendor_id = cdev->vendor_id;
 402         dev->vendor_part_id = cdev->device_id;
 403         dev->hw_ver = 0;
 404         dev->fw_ver = (FW_MAJOR_VERSION << 24) | (FW_MINOR_VERSION << 16) |
 405                       (FW_REVISION_VERSION << 8) | (FW_ENGINEERING_VERSION);
 406
 407         qed_rdma_get_guid(p_hwfn, (u8 *)&dev->sys_image_guid);
 408         dev->node_guid = dev->sys_image_guid;
 409
 410         dev->max_sge = min_t(u32, RDMA_MAX_SGE_PER_SQ_WQE,
 411                              RDMA_MAX_SGE_PER_RQ_WQE);
 412
 413         if (cdev->rdma_max_sge)
 414                 dev->max_sge = min_t(u32, cdev->rdma_max_sge, dev->max_sge);
 415
 416         dev->max_inline = ROCE_REQ_MAX_INLINE_DATA_SIZE;
 417
 418         dev->max_inline = (cdev->rdma_max_inline) ?
 419                           min_t(u32, cdev->rdma_max_inline, dev->max_inline) :
 420                           dev->max_inline;
 421
 422         dev->max_wqe = QED_RDMA_MAX_WQE;
 423         dev->max_cnq = (u8)FEAT_NUM(p_hwfn, QED_RDMA_CNQ);
 424
 425         /* The number of QPs may be higher than QED_ROCE_MAX_QPS, because
 426          * it is up-aligned to 16 and then to ILT page size within qed cxt.
 427          * This is OK in terms of ILT but we don't want to configure the FW
 428          * above its abilities
 429          */
 430         num_qps = ROCE_MAX_QPS;
 431         num_qps = min_t(u64, num_qps, p_hwfn->p_rdma_info->num_qps);
 432         dev->max_qp = num_qps;
 433
 434         /* CQs uses the same icids that QPs use hence they are limited by the
 435          * number of icids. There are two icids per QP.
 436          */
 437         dev->max_cq = num_qps * 2;
 438
 439         /* The number of mrs is smaller by 1 since the first is reserved */
 440         dev->max_mr = p_hwfn->p_rdma_info->num_mrs - 1;
 441         dev->max_mr_size = QED_RDMA_MAX_MR_SIZE;
 442
 443         /* The maximum CQE capacity per CQ supported.
 444          * max number of cqes will be in two layer pbl,
 445          * 8 is the pointer size in bytes
 446          * 32 is the size of cq element in bytes
 447          */
 448         if (params->cq_mode == QED_RDMA_CQ_MODE_32_BITS)
 449                 dev->max_cqe = QED_RDMA_MAX_CQE_32_BIT;
 450         else
 451                 dev->max_cqe = QED_RDMA_MAX_CQE_16_BIT;
 452
 453         dev->max_mw = 0;
 454         dev->max_fmr = QED_RDMA_MAX_FMR;
 455         dev->max_mr_mw_fmr_pbl = (PAGE_SIZE / 8) * (PAGE_SIZE / 8);
 456         dev->max_mr_mw_fmr_size = dev->max_mr_mw_fmr_pbl * PAGE_SIZE;
 457         dev->max_pkey = QED_RDMA_MAX_P_KEY;
 458
 459         dev->max_qp_resp_rd_atomic_resc = RDMA_RING_PAGE_SIZE /
 460                                           (RDMA_RESP_RD_ATOMIC_ELM_SIZE * 2);
 461         dev->max_qp_req_rd_atomic_resc = RDMA_RING_PAGE_SIZE /
 462                                          RDMA_REQ_RD_ATOMIC_ELM_SIZE;
 463         dev->max_dev_resp_rd_atomic_resc = dev->max_qp_resp_rd_atomic_resc *
 464                                            p_hwfn->p_rdma_info->num_qps;
 465         dev->page_size_caps = QED_RDMA_PAGE_SIZE_CAPS;
 466         dev->dev_ack_delay = QED_RDMA_ACK_DELAY;
 467         dev->max_pd = RDMA_MAX_PDS;
 468         dev->max_ah = p_hwfn->p_rdma_info->num_qps;
 469         dev->max_stats_queues = (u8)RESC_NUM(p_hwfn, QED_RDMA_STATS_QUEUE);
 470
 471         /* Set capablities */
 472         dev->dev_caps = 0;
 473         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_RNR_NAK, 1);
 474         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_PORT_ACTIVE_EVENT, 1);
 475         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_PORT_CHANGE_EVENT, 1);
 476         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_RESIZE_CQ, 1);
 477         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_BASE_MEMORY_EXT, 1);
 478         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_BASE_QUEUE_EXT, 1);
 479         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_ZBVA, 1);
 480         SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_LOCAL_INV_FENCE, 1);
 481
 482         /* Check atomic operations support in PCI configuration space. */
 483         pci_read_config_dword(cdev->pdev,
 484                               cdev->pdev->pcie_cap + PCI_EXP_DEVCTL2,
 485                               &pci_status_control);
 486
 487         if (pci_status_control & PCI_EXP_DEVCTL2_LTR_EN)
 488                 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_ATOMIC_OP, 1);
 489
 490         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 491                 qed_iwarp_init_devinfo(p_hwfn);
 492 }
 493
 494 static void qed_rdma_init_port(struct qed_hwfn *p_hwfn)
 495 {
 496         struct qed_rdma_port *port = p_hwfn->p_rdma_info->port;
 497         struct qed_rdma_device *dev = p_hwfn->p_rdma_info->dev;
 498
 499         port->port_state = p_hwfn->mcp_info->link_output.link_up ?
 500                            QED_RDMA_PORT_UP : QED_RDMA_PORT_DOWN;
 501
 502         port->max_msg_size = min_t(u64,
 503                                    (dev->max_mr_mw_fmr_size *
 504                                     p_hwfn->cdev->rdma_max_sge),
 505                                    BIT(31));
 506
 507         port->pkey_bad_counter = 0;
 508 }
 509
 510 static int qed_rdma_init_hw(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
 511 {
 512         int rc = 0;
 513
 514         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Initializing HW\n");
 515         p_hwfn->b_rdma_enabled_in_prs = false;
 516
 517         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
 518                 qed_iwarp_init_hw(p_hwfn, p_ptt);
 519         else
 520                 rc = qed_roce_init_hw(p_hwfn, p_ptt);
 521
 522         return rc;
 523 }
 524
 525 static int qed_rdma_start_fw(struct qed_hwfn *p_hwfn,
 526                              struct qed_rdma_start_in_params *params,
 527                              struct qed_ptt *p_ptt)
 528 {
 529         struct rdma_init_func_ramrod_data *p_ramrod;
 530         struct qed_rdma_cnq_params *p_cnq_pbl_list;
 531         struct rdma_init_func_hdr *p_params_header;
 532         struct rdma_cnq_params *p_cnq_params;
 533         struct qed_sp_init_data init_data;
 534         struct qed_spq_entry *p_ent;
 535         u32 cnq_id, sb_id;
 536         u16 igu_sb_id;
 537         int rc;
 538
 539         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Starting FW\n");
 540
 541         /* Save the number of cnqs for the function close ramrod */
 542         p_hwfn->p_rdma_info->num_cnqs = params->desired_cnq;
 543
 544         /* Get SPQ entry */
 545         memset(&init_data, 0, sizeof(init_data));
 546         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 547         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 548
 549         rc = qed_sp_init_request(p_hwfn, &p_ent, RDMA_RAMROD_FUNC_INIT,
 550                                  p_hwfn->p_rdma_info->proto, &init_data);
 551         if (rc)
 552                 return rc;
 553
 554         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
 555                 qed_iwarp_init_fw_ramrod(p_hwfn,
 556                                          &p_ent->ramrod.iwarp_init_func.iwarp);
 557                 p_ramrod = &p_ent->ramrod.iwarp_init_func.rdma;
 558         } else {
 559                 p_ramrod = &p_ent->ramrod.roce_init_func.rdma;
 560         }
 561
 562         p_params_header = &p_ramrod->params_header;
 563         p_params_header->cnq_start_offset = (u8)RESC_START(p_hwfn,
 564                                                            QED_RDMA_CNQ_RAM);
 565         p_params_header->num_cnqs = params->desired_cnq;
 566
 567         if (params->cq_mode == QED_RDMA_CQ_MODE_16_BITS)
 568                 p_params_header->cq_ring_mode = 1;
 569         else
 570                 p_params_header->cq_ring_mode = 0;
 571
 572         for (cnq_id = 0; cnq_id < params->desired_cnq; cnq_id++) {
 573                 sb_id = qed_rdma_get_sb_id(p_hwfn, cnq_id);
 574                 igu_sb_id = qed_get_igu_sb_id(p_hwfn, sb_id);
 575                 p_ramrod->cnq_params[cnq_id].sb_num = cpu_to_le16(igu_sb_id);
 576                 p_cnq_params = &p_ramrod->cnq_params[cnq_id];
 577                 p_cnq_pbl_list = &params->cnq_pbl_list[cnq_id];
 578
 579                 p_cnq_params->sb_index = p_hwfn->pf_params.rdma_pf_params.gl_pi;
 580                 p_cnq_params->num_pbl_pages = p_cnq_pbl_list->num_pbl_pages;
 581
 582                 DMA_REGPAIR_LE(p_cnq_params->pbl_base_addr,
 583                                p_cnq_pbl_list->pbl_ptr);
 584
 585                 /* we assume here that cnq_id and qz_offset are the same */
 586                 p_cnq_params->queue_zone_num =
 587                         cpu_to_le16(p_hwfn->p_rdma_info->queue_zone_base +
 588                                     cnq_id);
 589         }
 590
 591         return qed_spq_post(p_hwfn, p_ent, NULL);
 592 }
 593
 594 static int qed_rdma_alloc_tid(void *rdma_cxt, u32 *itid)
 595 {
 596         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 597         int rc;
 598
 599         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Allocate TID\n");
 600
 601         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 602         rc = qed_rdma_bmap_alloc_id(p_hwfn,
 603                                     &p_hwfn->p_rdma_info->tid_map, itid);
 604         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 605         if (rc)
 606                 goto out;
 607
 608         rc = qed_cxt_dynamic_ilt_alloc(p_hwfn, QED_ELEM_TASK, *itid);
 609 out:
 610         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Allocate TID - done, rc = %d\n", rc);
 611         return rc;
 612 }
 613
 614 static int qed_rdma_reserve_lkey(struct qed_hwfn *p_hwfn)
 615 {
 616         struct qed_rdma_device *dev = p_hwfn->p_rdma_info->dev;
 617
 618         /* The first DPI is reserved for the Kernel */
 619         __set_bit(0, p_hwfn->p_rdma_info->dpi_map.bitmap);
 620
 621         /* Tid 0 will be used as the key for "reserved MR".
 622          * The driver should allocate memory for it so it can be loaded but no
 623          * ramrod should be passed on it.
 624          */
 625         qed_rdma_alloc_tid(p_hwfn, &dev->reserved_lkey);
 626         if (dev->reserved_lkey != RDMA_RESERVED_LKEY) {
 627                 DP_NOTICE(p_hwfn,
 628                           "Reserved lkey should be equal to RDMA_RESERVED_LKEY\n");
 629                 return -EINVAL;
 630         }
 631
 632         return 0;
 633 }
 634
 635 static int qed_rdma_setup(struct qed_hwfn *p_hwfn,
 636                           struct qed_ptt *p_ptt,
 637                           struct qed_rdma_start_in_params *params)
 638 {
 639         int rc;
 640
 641         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA setup\n");
 642
 643         spin_lock_init(&p_hwfn->p_rdma_info->lock);
 644
 645         qed_rdma_init_devinfo(p_hwfn, params);
 646         qed_rdma_init_port(p_hwfn);
 647         qed_rdma_init_events(p_hwfn, params);
 648
 649         rc = qed_rdma_reserve_lkey(p_hwfn);
 650         if (rc)
 651                 return rc;
 652
 653         rc = qed_rdma_init_hw(p_hwfn, p_ptt);
 654         if (rc)
 655                 return rc;
 656
 657         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
 658                 rc = qed_iwarp_setup(p_hwfn, p_ptt, params);
 659                 if (rc)
 660                         return rc;
 661         } else {
 662                 rc = qed_roce_setup(p_hwfn);
 663                 if (rc)
 664                         return rc;
 665         }
 666
 667         return qed_rdma_start_fw(p_hwfn, params, p_ptt);
 668 }
 669
 670 int qed_rdma_stop(void *rdma_cxt)
 671 {
 672         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 673         struct rdma_close_func_ramrod_data *p_ramrod;
 674         struct qed_sp_init_data init_data;
 675         struct qed_spq_entry *p_ent;
 676         struct qed_ptt *p_ptt;
 677         u32 ll2_ethertype_en;
 678         int rc = -EBUSY;
 679
 680         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA stop\n");
 681
 682         p_ptt = qed_ptt_acquire(p_hwfn);
 683         if (!p_ptt) {
 684                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Failed to acquire PTT\n");
 685                 return rc;
 686         }
 687
 688         /* Disable RoCE search */
 689         qed_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 0);
 690         p_hwfn->b_rdma_enabled_in_prs = false;
 691
 692         qed_wr(p_hwfn, p_ptt, PRS_REG_ROCE_DEST_QP_MAX_PF, 0);
 693
 694         ll2_ethertype_en = qed_rd(p_hwfn, p_ptt, PRS_REG_LIGHT_L2_ETHERTYPE_EN);
 695
 696         qed_wr(p_hwfn, p_ptt, PRS_REG_LIGHT_L2_ETHERTYPE_EN,
 697                (ll2_ethertype_en & 0xFFFE));
 698
 699         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
 700                 rc = qed_iwarp_stop(p_hwfn, p_ptt);
 701                 if (rc) {
 702                         qed_ptt_release(p_hwfn, p_ptt);
 703                         return rc;
 704                 }
 705         } else {
 706                 qed_roce_stop(p_hwfn);
 707         }
 708
 709         qed_ptt_release(p_hwfn, p_ptt);
 710
 711         /* Get SPQ entry */
 712         memset(&init_data, 0, sizeof(init_data));
 713         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 714         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 715
 716         /* Stop RoCE */
 717         rc = qed_sp_init_request(p_hwfn, &p_ent, RDMA_RAMROD_FUNC_CLOSE,
 718                                  p_hwfn->p_rdma_info->proto, &init_data);
 719         if (rc)
 720                 goto out;
 721
 722         p_ramrod = &p_ent->ramrod.rdma_close_func;
 723
 724         p_ramrod->num_cnqs = p_hwfn->p_rdma_info->num_cnqs;
 725         p_ramrod->cnq_start_offset = (u8)RESC_START(p_hwfn, QED_RDMA_CNQ_RAM);
 726
 727         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 728
 729 out:
 730         qed_rdma_free(p_hwfn);
 731
 732         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA stop done, rc = %d\n", rc);
 733         return rc;
 734 }
 735
 736 static int qed_rdma_add_user(void *rdma_cxt,
 737                              struct qed_rdma_add_user_out_params *out_params)
 738 {
 739         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 740         u32 dpi_start_offset;
 741         u32 returned_id = 0;
 742         int rc;
 743
 744         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Adding User\n");
 745
 746         /* Allocate DPI */
 747         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 748         rc = qed_rdma_bmap_alloc_id(p_hwfn, &p_hwfn->p_rdma_info->dpi_map,
 749                                     &returned_id);
 750         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 751
 752         out_params->dpi = (u16)returned_id;
 753
 754         /* Calculate the corresponding DPI address */
 755         dpi_start_offset = p_hwfn->dpi_start_offset;
 756
 757         out_params->dpi_addr = (u64)((u8 __iomem *)p_hwfn->doorbells +
 758                                      dpi_start_offset +
 759                                      ((out_params->dpi) * p_hwfn->dpi_size));
 760
 761         out_params->dpi_phys_addr = p_hwfn->cdev->db_phys_addr +
 762                                     dpi_start_offset +
 763                                     ((out_params->dpi) * p_hwfn->dpi_size);
 764
 765         out_params->dpi_size = p_hwfn->dpi_size;
 766         out_params->wid_count = p_hwfn->wid_count;
 767
 768         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Adding user - done, rc = %d\n", rc);
 769         return rc;
 770 }
 771
 772 static struct qed_rdma_port *qed_rdma_query_port(void *rdma_cxt)
 773 {
 774         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 775         struct qed_rdma_port *p_port = p_hwfn->p_rdma_info->port;
 776
 777         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA Query port\n");
 778
 779         /* Link may have changed */
 780         p_port->port_state = p_hwfn->mcp_info->link_output.link_up ?
 781                              QED_RDMA_PORT_UP : QED_RDMA_PORT_DOWN;
 782
 783         p_port->link_speed = p_hwfn->mcp_info->link_output.speed;
 784
 785         p_port->max_msg_size = RDMA_MAX_DATA_SIZE_IN_WQE;
 786
 787         return p_port;
 788 }
 789
 790 static struct qed_rdma_device *qed_rdma_query_device(void *rdma_cxt)
 791 {
 792         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 793
 794         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Query device\n");
 795
 796         /* Return struct with device parameters */
 797         return p_hwfn->p_rdma_info->dev;
 798 }
 799
 800 static void qed_rdma_free_tid(void *rdma_cxt, u32 itid)
 801 {
 802         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 803
 804         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "itid = %08x\n", itid);
 805
 806         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 807         qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->tid_map, itid);
 808         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 809 }
 810
 811 static void qed_rdma_cnq_prod_update(void *rdma_cxt, u8 qz_offset, u16 prod)
 812 {
 813         struct qed_hwfn *p_hwfn;
 814         u16 qz_num;
 815         u32 addr;
 816
 817         p_hwfn = (struct qed_hwfn *)rdma_cxt;
 818
 819         if (qz_offset > p_hwfn->p_rdma_info->max_queue_zones) {
 820                 DP_NOTICE(p_hwfn,
 821                           "queue zone offset %d is too large (max is %d)\n",
 822                           qz_offset, p_hwfn->p_rdma_info->max_queue_zones);
 823                 return;
 824         }
 825
 826         qz_num = p_hwfn->p_rdma_info->queue_zone_base + qz_offset;
 827         addr = GTT_BAR0_MAP_REG_USDM_RAM +
 828                USTORM_COMMON_QUEUE_CONS_OFFSET(qz_num);
 829
 830         REG_WR16(p_hwfn, addr, prod);
 831
 832         /* keep prod updates ordered */
 833         wmb();
 834 }
 835
 836 static int qed_fill_rdma_dev_info(struct qed_dev *cdev,
 837                                   struct qed_dev_rdma_info *info)
 838 {
 839         struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
 840
 841         memset(info, 0, sizeof(*info));
 842
 843         info->rdma_type = QED_IS_ROCE_PERSONALITY(p_hwfn) ?
 844             QED_RDMA_TYPE_ROCE : QED_RDMA_TYPE_IWARP;
 845
 846         info->user_dpm_enabled = (p_hwfn->db_bar_no_edpm == 0);
 847
 848         qed_fill_dev_info(cdev, &info->common);
 849
 850         return 0;
 851 }
 852
 853 static int qed_rdma_get_sb_start(struct qed_dev *cdev)
 854 {
 855         int feat_num;
 856
 857         if (cdev->num_hwfns > 1)
 858                 feat_num = FEAT_NUM(QED_LEADING_HWFN(cdev), QED_PF_L2_QUE);
 859         else
 860                 feat_num = FEAT_NUM(QED_LEADING_HWFN(cdev), QED_PF_L2_QUE) *
 861                            cdev->num_hwfns;
 862
 863         return feat_num;
 864 }
 865
 866 static int qed_rdma_get_min_cnq_msix(struct qed_dev *cdev)
 867 {
 868         int n_cnq = FEAT_NUM(QED_LEADING_HWFN(cdev), QED_RDMA_CNQ);
 869         int n_msix = cdev->int_params.rdma_msix_cnt;
 870
 871         return min_t(int, n_cnq, n_msix);
 872 }
 873
 874 static int qed_rdma_set_int(struct qed_dev *cdev, u16 cnt)
 875 {
 876         int limit = 0;
 877
 878         /* Mark the fastpath as free/used */
 879         cdev->int_params.fp_initialized = cnt ? true : false;
 880
 881         if (cdev->int_params.out.int_mode != QED_INT_MODE_MSIX) {
 882                 DP_ERR(cdev,
 883                        "qed roce supports only MSI-X interrupts (detected %d).\n",
 884                        cdev->int_params.out.int_mode);
 885                 return -EINVAL;
 886         } else if (cdev->int_params.fp_msix_cnt) {
 887                 limit = cdev->int_params.rdma_msix_cnt;
 888         }
 889
 890         if (!limit)
 891                 return -ENOMEM;
 892
 893         return min_t(int, cnt, limit);
 894 }
 895
 896 static int qed_rdma_get_int(struct qed_dev *cdev, struct qed_int_info *info)
 897 {
 898         memset(info, 0, sizeof(*info));
 899
 900         if (!cdev->int_params.fp_initialized) {
 901                 DP_INFO(cdev,
 902                         "Protocol driver requested interrupt information, but its support is not yet configured\n");
 903                 return -EINVAL;
 904         }
 905
 906         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 907                 int msix_base = cdev->int_params.rdma_msix_base;
 908
 909                 info->msix_cnt = cdev->int_params.rdma_msix_cnt;
 910                 info->msix = &cdev->int_params.msix_table[msix_base];
 911
 912                 DP_VERBOSE(cdev, QED_MSG_RDMA, "msix_cnt = %d msix_base=%d\n",
 913                            info->msix_cnt, msix_base);
 914         }
 915
 916         return 0;
 917 }
 918
 919 static int qed_rdma_alloc_pd(void *rdma_cxt, u16 *pd)
 920 {
 921         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 922         u32 returned_id;
 923         int rc;
 924
 925         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Alloc PD\n");
 926
 927         /* Allocates an unused protection domain */
 928         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 929         rc = qed_rdma_bmap_alloc_id(p_hwfn,
 930                                     &p_hwfn->p_rdma_info->pd_map, &returned_id);
 931         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 932
 933         *pd = (u16)returned_id;
 934
 935         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Alloc PD - done, rc = %d\n", rc);
 936         return rc;
 937 }
 938
 939 static void qed_rdma_free_pd(void *rdma_cxt, u16 pd)
 940 {
 941         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 942
 943         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "pd = %08x\n", pd);
 944
 945         /* Returns a previously allocated protection domain for reuse */
 946         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 947         qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->pd_map, pd);
 948         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 949 }
 950
 951 static enum qed_rdma_toggle_bit
 952 qed_rdma_toggle_bit_create_resize_cq(struct qed_hwfn *p_hwfn, u16 icid)
 953 {
 954         struct qed_rdma_info *p_info = p_hwfn->p_rdma_info;
 955         enum qed_rdma_toggle_bit toggle_bit;
 956         u32 bmap_id;
 957
 958         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", icid);
 959
 960         /* the function toggle the bit that is related to a given icid
 961          * and returns the new toggle bit's value
 962          */
 963         bmap_id = icid - qed_cxt_get_proto_cid_start(p_hwfn, p_info->proto);
 964
 965         spin_lock_bh(&p_info->lock);
 966         toggle_bit = !test_and_change_bit(bmap_id,
 967                                           p_info->toggle_bits.bitmap);
 968         spin_unlock_bh(&p_info->lock);
 969
 970         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "QED_RDMA_TOGGLE_BIT_= %d\n",
 971                    toggle_bit);
 972
 973         return toggle_bit;
 974 }
 975
 976 static int qed_rdma_create_cq(void *rdma_cxt,
 977                               struct qed_rdma_create_cq_in_params *params,
 978                               u16 *icid)
 979 {
 980         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
 981         struct qed_rdma_info *p_info = p_hwfn->p_rdma_info;
 982         struct rdma_create_cq_ramrod_data *p_ramrod;
 983         enum qed_rdma_toggle_bit toggle_bit;
 984         struct qed_sp_init_data init_data;
 985         struct qed_spq_entry *p_ent;
 986         u32 returned_id, start_cid;
 987         int rc;
 988
 989         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "cq_handle = %08x%08x\n",
 990                    params->cq_handle_hi, params->cq_handle_lo);
 991
 992         /* Allocate icid */
 993         spin_lock_bh(&p_info->lock);
 994         rc = qed_rdma_bmap_alloc_id(p_hwfn, &p_info->cq_map, &returned_id);
 995         spin_unlock_bh(&p_info->lock);
 996
 997         if (rc) {
 998                 DP_NOTICE(p_hwfn, "Can't create CQ, rc = %d\n", rc);
 999                 return rc;
1000         }
1001
1002         start_cid = qed_cxt_get_proto_cid_start(p_hwfn,
1003                                                 p_info->proto);
1004         *icid = returned_id + start_cid;
1005
1006         /* Check if icid requires a page allocation */
1007         rc = qed_cxt_dynamic_ilt_alloc(p_hwfn, QED_ELEM_CXT, *icid);
1008         if (rc)
1009                 goto err;
1010
1011         /* Get SPQ entry */
1012         memset(&init_data, 0, sizeof(init_data));
1013         init_data.cid = *icid;
1014         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1015         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1016
1017         /* Send create CQ ramrod */
1018         rc = qed_sp_init_request(p_hwfn, &p_ent,
1019                                  RDMA_RAMROD_CREATE_CQ,
1020                                  p_info->proto, &init_data);
1021         if (rc)
1022                 goto err;
1023
1024         p_ramrod = &p_ent->ramrod.rdma_create_cq;
1025
1026         p_ramrod->cq_handle.hi = cpu_to_le32(params->cq_handle_hi);
1027         p_ramrod->cq_handle.lo = cpu_to_le32(params->cq_handle_lo);
1028         p_ramrod->dpi = cpu_to_le16(params->dpi);
1029         p_ramrod->is_two_level_pbl = params->pbl_two_level;
1030         p_ramrod->max_cqes = cpu_to_le32(params->cq_size);
1031         DMA_REGPAIR_LE(p_ramrod->pbl_addr, params->pbl_ptr);
1032         p_ramrod->pbl_num_pages = cpu_to_le16(params->pbl_num_pages);
1033         p_ramrod->cnq_id = (u8)RESC_START(p_hwfn, QED_RDMA_CNQ_RAM) +
1034                            params->cnq_id;
1035         p_ramrod->int_timeout = params->int_timeout;
1036
1037         /* toggle the bit for every resize or create cq for a given icid */
1038         toggle_bit = qed_rdma_toggle_bit_create_resize_cq(p_hwfn, *icid);
1039
1040         p_ramrod->toggle_bit = toggle_bit;
1041
1042         rc = qed_spq_post(p_hwfn, p_ent, NULL);
1043         if (rc) {
1044                 /* restore toggle bit */
1045                 qed_rdma_toggle_bit_create_resize_cq(p_hwfn, *icid);
1046                 goto err;
1047         }
1048
1049         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Created CQ, rc = %d\n", rc);
1050         return rc;
1051
1052 err:
1053         /* release allocated icid */
1054         spin_lock_bh(&p_info->lock);
1055         qed_bmap_release_id(p_hwfn, &p_info->cq_map, returned_id);
1056         spin_unlock_bh(&p_info->lock);
1057         DP_NOTICE(p_hwfn, "Create CQ failed, rc = %d\n", rc);
1058
1059         return rc;
1060 }
1061
1062 static int
1063 qed_rdma_destroy_cq(void *rdma_cxt,
1064                     struct qed_rdma_destroy_cq_in_params *in_params,
1065                     struct qed_rdma_destroy_cq_out_params *out_params)
1066 {
1067         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1068         struct rdma_destroy_cq_output_params *p_ramrod_res;
1069         struct rdma_destroy_cq_ramrod_data *p_ramrod;
1070         struct qed_sp_init_data init_data;
1071         struct qed_spq_entry *p_ent;
1072         dma_addr_t ramrod_res_phys;
1073         enum protocol_type proto;
1074         int rc = -ENOMEM;
1075
1076         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", in_params->icid);
1077
1078         p_ramrod_res =
1079             (struct rdma_destroy_cq_output_params *)
1080             dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1081                                sizeof(struct rdma_destroy_cq_output_params),
1082                                &ramrod_res_phys, GFP_KERNEL);
1083         if (!p_ramrod_res) {
1084                 DP_NOTICE(p_hwfn,
1085                           "qed destroy cq failed: cannot allocate memory (ramrod)\n");
1086                 return rc;
1087         }
1088
1089         /* Get SPQ entry */
1090         memset(&init_data, 0, sizeof(init_data));
1091         init_data.cid = in_params->icid;
1092         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1093         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1094         proto = p_hwfn->p_rdma_info->proto;
1095         /* Send destroy CQ ramrod */
1096         rc = qed_sp_init_request(p_hwfn, &p_ent,
1097                                  RDMA_RAMROD_DESTROY_CQ,
1098                                  proto, &init_data);
1099         if (rc)
1100                 goto err;
1101
1102         p_ramrod = &p_ent->ramrod.rdma_destroy_cq;
1103         DMA_REGPAIR_LE(p_ramrod->output_params_addr, ramrod_res_phys);
1104
1105         rc = qed_spq_post(p_hwfn, p_ent, NULL);
1106         if (rc)
1107                 goto err;
1108
1109         out_params->num_cq_notif = le16_to_cpu(p_ramrod_res->cnq_num);
1110
1111         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
1112                           sizeof(struct rdma_destroy_cq_output_params),
1113                           p_ramrod_res, ramrod_res_phys);
1114
1115         /* Free icid */
1116         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
1117
1118         qed_bmap_release_id(p_hwfn,
1119                             &p_hwfn->p_rdma_info->cq_map,
1120                             (in_params->icid -
1121                              qed_cxt_get_proto_cid_start(p_hwfn, proto)));
1122
1123         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
1124
1125         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Destroyed CQ, rc = %d\n", rc);
1126         return rc;
1127
1128 err:    dma_free_coherent(&p_hwfn->cdev->pdev->dev,
1129                           sizeof(struct rdma_destroy_cq_output_params),
1130                           p_ramrod_res, ramrod_res_phys);
1131
1132         return rc;
1133 }
1134
1135 void qed_rdma_set_fw_mac(u16 *p_fw_mac, u8 *p_qed_mac)
1136 {
1137         p_fw_mac[0] = cpu_to_le16((p_qed_mac[0] << 8) + p_qed_mac[1]);
1138         p_fw_mac[1] = cpu_to_le16((p_qed_mac[2] << 8) + p_qed_mac[3]);
1139         p_fw_mac[2] = cpu_to_le16((p_qed_mac[4] << 8) + p_qed_mac[5]);
1140 }
1141
1142 static int qed_rdma_query_qp(void *rdma_cxt,
1143                              struct qed_rdma_qp *qp,
1144                              struct qed_rdma_query_qp_out_params *out_params)
1145 {
1146         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1147         int rc = 0;
1148
1149         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
1150
1151         /* The following fields are filled in from qp and not FW as they can't
1152          * be modified by FW
1153          */
1154         out_params->mtu = qp->mtu;
1155         out_params->dest_qp = qp->dest_qp;
1156         out_params->incoming_atomic_en = qp->incoming_atomic_en;
1157         out_params->e2e_flow_control_en = qp->e2e_flow_control_en;
1158         out_params->incoming_rdma_read_en = qp->incoming_rdma_read_en;
1159         out_params->incoming_rdma_write_en = qp->incoming_rdma_write_en;
1160         out_params->dgid = qp->dgid;
1161         out_params->flow_label = qp->flow_label;
1162         out_params->hop_limit_ttl = qp->hop_limit_ttl;
1163         out_params->traffic_class_tos = qp->traffic_class_tos;
1164         out_params->timeout = qp->ack_timeout;
1165         out_params->rnr_retry = qp->rnr_retry_cnt;
1166         out_params->retry_cnt = qp->retry_cnt;
1167         out_params->min_rnr_nak_timer = qp->min_rnr_nak_timer;
1168         out_params->pkey_index = 0;
1169         out_params->max_rd_atomic = qp->max_rd_atomic_req;
1170         out_params->max_dest_rd_atomic = qp->max_rd_atomic_resp;
1171         out_params->sqd_async = qp->sqd_async;
1172
1173         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
1174                 qed_iwarp_query_qp(qp, out_params);
1175         else
1176                 rc = qed_roce_query_qp(p_hwfn, qp, out_params);
1177
1178         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Query QP, rc = %d\n", rc);
1179         return rc;
1180 }
1181
1182 static int qed_rdma_destroy_qp(void *rdma_cxt, struct qed_rdma_qp *qp)
1183 {
1184         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1185         int rc = 0;
1186
1187         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
1188
1189         if (QED_IS_IWARP_PERSONALITY(p_hwfn))
1190                 rc = qed_iwarp_destroy_qp(p_hwfn, qp);
1191         else
1192                 rc = qed_roce_destroy_qp(p_hwfn, qp);
1193
1194         /* free qp params struct */
1195         kfree(qp);
1196
1197         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "QP destroyed\n");
1198         return rc;
1199 }
1200
1201 static struct qed_rdma_qp *
1202 qed_rdma_create_qp(void *rdma_cxt,
1203                    struct qed_rdma_create_qp_in_params *in_params,
1204                    struct qed_rdma_create_qp_out_params *out_params)
1205 {
1206         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1207         struct qed_rdma_qp *qp;
1208         u8 max_stats_queues;
1209         int rc;
1210
1211         if (!rdma_cxt || !in_params || !out_params || !p_hwfn->p_rdma_info) {
1212                 DP_ERR(p_hwfn->cdev,
1213                        "qed roce create qp failed due to NULL entry (rdma_cxt=%p, in=%p, out=%p, roce_info=?\n",
1214                        rdma_cxt, in_params, out_params);
1215                 return NULL;
1216         }
1217
1218         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1219                    "qed rdma create qp called with qp_handle = %08x%08x\n",
1220                    in_params->qp_handle_hi, in_params->qp_handle_lo);
1221
1222         /* Some sanity checks... */
1223         max_stats_queues = p_hwfn->p_rdma_info->dev->max_stats_queues;
1224         if (in_params->stats_queue >= max_stats_queues) {
1225                 DP_ERR(p_hwfn->cdev,
1226                        "qed rdma create qp failed due to invalid statistics queue %d. maximum is %d\n",
1227                        in_params->stats_queue, max_stats_queues);
1228                 return NULL;
1229         }
1230
1231         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
1232                 if (in_params->sq_num_pages * sizeof(struct regpair) >
1233                     IWARP_SHARED_QUEUE_PAGE_SQ_PBL_MAX_SIZE) {
1234                         DP_NOTICE(p_hwfn->cdev,
1235                                   "Sq num pages: %d exceeds maximum\n",
1236                                   in_params->sq_num_pages);
1237                         return NULL;
1238                 }
1239                 if (in_params->rq_num_pages * sizeof(struct regpair) >
1240                     IWARP_SHARED_QUEUE_PAGE_RQ_PBL_MAX_SIZE) {
1241                         DP_NOTICE(p_hwfn->cdev,
1242                                   "Rq num pages: %d exceeds maximum\n",
1243                                   in_params->rq_num_pages);
1244                         return NULL;
1245                 }
1246         }
1247
1248         qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1249         if (!qp)
1250                 return NULL;
1251
1252         qp->cur_state = QED_ROCE_QP_STATE_RESET;
1253         qp->qp_handle.hi = cpu_to_le32(in_params->qp_handle_hi);
1254         qp->qp_handle.lo = cpu_to_le32(in_params->qp_handle_lo);
1255         qp->qp_handle_async.hi = cpu_to_le32(in_params->qp_handle_async_hi);
1256         qp->qp_handle_async.lo = cpu_to_le32(in_params->qp_handle_async_lo);
1257         qp->use_srq = in_params->use_srq;
1258         qp->signal_all = in_params->signal_all;
1259         qp->fmr_and_reserved_lkey = in_params->fmr_and_reserved_lkey;
1260         qp->pd = in_params->pd;
1261         qp->dpi = in_params->dpi;
1262         qp->sq_cq_id = in_params->sq_cq_id;
1263         qp->sq_num_pages = in_params->sq_num_pages;
1264         qp->sq_pbl_ptr = in_params->sq_pbl_ptr;
1265         qp->rq_cq_id = in_params->rq_cq_id;
1266         qp->rq_num_pages = in_params->rq_num_pages;
1267         qp->rq_pbl_ptr = in_params->rq_pbl_ptr;
1268         qp->srq_id = in_params->srq_id;
1269         qp->req_offloaded = false;
1270         qp->resp_offloaded = false;
1271         qp->e2e_flow_control_en = qp->use_srq ? false : true;
1272         qp->stats_queue = in_params->stats_queue;
1273
1274         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
1275                 rc = qed_iwarp_create_qp(p_hwfn, qp, out_params);
1276                 qp->qpid = qp->icid;
1277         } else {
1278                 rc = qed_roce_alloc_cid(p_hwfn, &qp->icid);
1279                 qp->qpid = ((0xFF << 16) | qp->icid);
1280         }
1281
1282         if (rc) {
1283                 kfree(qp);
1284                 return NULL;
1285         }
1286
1287         out_params->icid = qp->icid;
1288         out_params->qp_id = qp->qpid;
1289
1290         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Create QP, rc = %d\n", rc);
1291         return qp;
1292 }
1293
1294 static int qed_rdma_modify_qp(void *rdma_cxt,
1295                               struct qed_rdma_qp *qp,
1296                               struct qed_rdma_modify_qp_in_params *params)
1297 {
1298         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1299         enum qed_roce_qp_state prev_state;
1300         int rc = 0;
1301
1302         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x params->new_state=%d\n",
1303                    qp->icid, params->new_state);
1304
1305         if (rc) {
1306                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "rc = %d\n", rc);
1307                 return rc;
1308         }
1309
1310         if (GET_FIELD(params->modify_flags,
1311                       QED_RDMA_MODIFY_QP_VALID_RDMA_OPS_EN)) {
1312                 qp->incoming_rdma_read_en = params->incoming_rdma_read_en;
1313                 qp->incoming_rdma_write_en = params->incoming_rdma_write_en;
1314                 qp->incoming_atomic_en = params->incoming_atomic_en;
1315         }
1316
1317         /* Update QP structure with the updated values */
1318         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_ROCE_MODE))
1319                 qp->roce_mode = params->roce_mode;
1320         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_PKEY))
1321                 qp->pkey = params->pkey;
1322         if (GET_FIELD(params->modify_flags,
1323                       QED_ROCE_MODIFY_QP_VALID_E2E_FLOW_CONTROL_EN))
1324                 qp->e2e_flow_control_en = params->e2e_flow_control_en;
1325         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_DEST_QP))
1326                 qp->dest_qp = params->dest_qp;
1327         if (GET_FIELD(params->modify_flags,
1328                       QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR)) {
1329                 /* Indicates that the following parameters have changed:
1330                  * Traffic class, flow label, hop limit, source GID,
1331                  * destination GID, loopback indicator
1332                  */
1333                 qp->traffic_class_tos = params->traffic_class_tos;
1334                 qp->flow_label = params->flow_label;
1335                 qp->hop_limit_ttl = params->hop_limit_ttl;
1336
1337                 qp->sgid = params->sgid;
1338                 qp->dgid = params->dgid;
1339                 qp->udp_src_port = 0;
1340                 qp->vlan_id = params->vlan_id;
1341                 qp->mtu = params->mtu;
1342                 qp->lb_indication = params->lb_indication;
1343                 memcpy((u8 *)&qp->remote_mac_addr[0],
1344                        (u8 *)&params->remote_mac_addr[0], ETH_ALEN);
1345                 if (params->use_local_mac) {
1346                         memcpy((u8 *)&qp->local_mac_addr[0],
1347                                (u8 *)&params->local_mac_addr[0], ETH_ALEN);
1348                 } else {
1349                         memcpy((u8 *)&qp->local_mac_addr[0],
1350                                (u8 *)&p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1351                 }
1352         }
1353         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_RQ_PSN))
1354                 qp->rq_psn = params->rq_psn;
1355         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_SQ_PSN))
1356                 qp->sq_psn = params->sq_psn;
1357         if (GET_FIELD(params->modify_flags,
1358                       QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_REQ))
1359                 qp->max_rd_atomic_req = params->max_rd_atomic_req;
1360         if (GET_FIELD(params->modify_flags,
1361                       QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_RESP))
1362                 qp->max_rd_atomic_resp = params->max_rd_atomic_resp;
1363         if (GET_FIELD(params->modify_flags,
1364                       QED_ROCE_MODIFY_QP_VALID_ACK_TIMEOUT))
1365                 qp->ack_timeout = params->ack_timeout;
1366         if (GET_FIELD(params->modify_flags, QED_ROCE_MODIFY_QP_VALID_RETRY_CNT))
1367                 qp->retry_cnt = params->retry_cnt;
1368         if (GET_FIELD(params->modify_flags,
1369                       QED_ROCE_MODIFY_QP_VALID_RNR_RETRY_CNT))
1370                 qp->rnr_retry_cnt = params->rnr_retry_cnt;
1371         if (GET_FIELD(params->modify_flags,
1372                       QED_ROCE_MODIFY_QP_VALID_MIN_RNR_NAK_TIMER))
1373                 qp->min_rnr_nak_timer = params->min_rnr_nak_timer;
1374
1375         qp->sqd_async = params->sqd_async;
1376
1377         prev_state = qp->cur_state;
1378         if (GET_FIELD(params->modify_flags,
1379                       QED_RDMA_MODIFY_QP_VALID_NEW_STATE)) {
1380                 qp->cur_state = params->new_state;
1381                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "qp->cur_state=%d\n",
1382                            qp->cur_state);
1383         }
1384
1385         if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
1386                 enum qed_iwarp_qp_state new_state =
1387                     qed_roce2iwarp_state(qp->cur_state);
1388
1389                 rc = qed_iwarp_modify_qp(p_hwfn, qp, new_state, 0);
1390         } else {
1391                 rc = qed_roce_modify_qp(p_hwfn, qp, prev_state, params);
1392         }
1393
1394         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Modify QP, rc = %d\n", rc);
1395         return rc;
1396 }
1397
1398 static int
1399 qed_rdma_register_tid(void *rdma_cxt,
1400                       struct qed_rdma_register_tid_in_params *params)
1401 {
1402         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1403         struct rdma_register_tid_ramrod_data *p_ramrod;
1404         struct qed_sp_init_data init_data;
1405         struct qed_spq_entry *p_ent;
1406         enum rdma_tid_type tid_type;
1407         u8 fw_return_code;
1408         int rc;
1409
1410         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "itid = %08x\n", params->itid);
1411
1412         /* Get SPQ entry */
1413         memset(&init_data, 0, sizeof(init_data));
1414         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1415         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1416
1417         rc = qed_sp_init_request(p_hwfn, &p_ent, RDMA_RAMROD_REGISTER_MR,
1418                                  p_hwfn->p_rdma_info->proto, &init_data);
1419         if (rc) {
1420                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "rc = %d\n", rc);
1421                 return rc;
1422         }
1423
1424         if (p_hwfn->p_rdma_info->last_tid < params->itid)
1425                 p_hwfn->p_rdma_info->last_tid = params->itid;
1426
1427         p_ramrod = &p_ent->ramrod.rdma_register_tid;
1428
1429         p_ramrod->flags = 0;
1430         SET_FIELD(p_ramrod->flags,
1431                   RDMA_REGISTER_TID_RAMROD_DATA_TWO_LEVEL_PBL,
1432                   params->pbl_two_level);
1433
1434         SET_FIELD(p_ramrod->flags,
1435                   RDMA_REGISTER_TID_RAMROD_DATA_ZERO_BASED, params->zbva);
1436
1437         SET_FIELD(p_ramrod->flags,
1438                   RDMA_REGISTER_TID_RAMROD_DATA_PHY_MR, params->phy_mr);
1439
1440         /* Don't initialize D/C field, as it may override other bits. */
1441         if (!(params->tid_type == QED_RDMA_TID_FMR) && !(params->dma_mr))
1442                 SET_FIELD(p_ramrod->flags,
1443                           RDMA_REGISTER_TID_RAMROD_DATA_PAGE_SIZE_LOG,
1444                           params->page_size_log - 12);
1445
1446         SET_FIELD(p_ramrod->flags,
1447                   RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_READ,
1448                   params->remote_read);
1449
1450         SET_FIELD(p_ramrod->flags,
1451                   RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_WRITE,
1452                   params->remote_write);
1453
1454         SET_FIELD(p_ramrod->flags,
1455                   RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_ATOMIC,
1456                   params->remote_atomic);
1457
1458         SET_FIELD(p_ramrod->flags,
1459                   RDMA_REGISTER_TID_RAMROD_DATA_LOCAL_WRITE,
1460                   params->local_write);
1461
1462         SET_FIELD(p_ramrod->flags,
1463                   RDMA_REGISTER_TID_RAMROD_DATA_LOCAL_READ, params->local_read);
1464
1465         SET_FIELD(p_ramrod->flags,
1466                   RDMA_REGISTER_TID_RAMROD_DATA_ENABLE_MW_BIND,
1467                   params->mw_bind);
1468
1469         SET_FIELD(p_ramrod->flags1,
1470                   RDMA_REGISTER_TID_RAMROD_DATA_PBL_PAGE_SIZE_LOG,
1471                   params->pbl_page_size_log - 12);
1472
1473         SET_FIELD(p_ramrod->flags2,
1474                   RDMA_REGISTER_TID_RAMROD_DATA_DMA_MR, params->dma_mr);
1475
1476         switch (params->tid_type) {
1477         case QED_RDMA_TID_REGISTERED_MR:
1478                 tid_type = RDMA_TID_REGISTERED_MR;
1479                 break;
1480         case QED_RDMA_TID_FMR:
1481                 tid_type = RDMA_TID_FMR;
1482                 break;
1483         case QED_RDMA_TID_MW_TYPE1:
1484                 tid_type = RDMA_TID_MW_TYPE1;
1485                 break;
1486         case QED_RDMA_TID_MW_TYPE2A:
1487                 tid_type = RDMA_TID_MW_TYPE2A;
1488                 break;
1489         default:
1490                 rc = -EINVAL;
1491                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "rc = %d\n", rc);
1492                 return rc;
1493         }
1494         SET_FIELD(p_ramrod->flags1,
1495                   RDMA_REGISTER_TID_RAMROD_DATA_TID_TYPE, tid_type);
1496
1497         p_ramrod->itid = cpu_to_le32(params->itid);
1498         p_ramrod->key = params->key;
1499         p_ramrod->pd = cpu_to_le16(params->pd);
1500         p_ramrod->length_hi = (u8)(params->length >> 32);
1501         p_ramrod->length_lo = DMA_LO_LE(params->length);
1502         if (params->zbva) {
1503                 /* Lower 32 bits of the registered MR address.
1504                  * In case of zero based MR, will hold FBO
1505                  */
1506                 p_ramrod->va.hi = 0;
1507                 p_ramrod->va.lo = cpu_to_le32(params->fbo);
1508         } else {
1509                 DMA_REGPAIR_LE(p_ramrod->va, params->vaddr);
1510         }
1511         DMA_REGPAIR_LE(p_ramrod->pbl_base, params->pbl_ptr);
1512
1513         /* DIF */
1514         if (params->dif_enabled) {
1515                 SET_FIELD(p_ramrod->flags2,
1516                           RDMA_REGISTER_TID_RAMROD_DATA_DIF_ON_HOST_FLG, 1);
1517                 DMA_REGPAIR_LE(p_ramrod->dif_error_addr,
1518                                params->dif_error_addr);
1519                 DMA_REGPAIR_LE(p_ramrod->dif_runt_addr, params->dif_runt_addr);
1520         }
1521
1522         rc = qed_spq_post(p_hwfn, p_ent, &fw_return_code);
1523         if (rc)
1524                 return rc;
1525
1526         if (fw_return_code != RDMA_RETURN_OK) {
1527                 DP_NOTICE(p_hwfn, "fw_return_code = %d\n", fw_return_code);
1528                 return -EINVAL;
1529         }
1530
1531         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Register TID, rc = %d\n", rc);
1532         return rc;
1533 }
1534
1535 static int qed_rdma_deregister_tid(void *rdma_cxt, u32 itid)
1536 {
1537         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1538         struct rdma_deregister_tid_ramrod_data *p_ramrod;
1539         struct qed_sp_init_data init_data;
1540         struct qed_spq_entry *p_ent;
1541         struct qed_ptt *p_ptt;
1542         u8 fw_return_code;
1543         int rc;
1544
1545         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "itid = %08x\n", itid);
1546
1547         /* Get SPQ entry */
1548         memset(&init_data, 0, sizeof(init_data));
1549         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1550         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1551
1552         rc = qed_sp_init_request(p_hwfn, &p_ent, RDMA_RAMROD_DEREGISTER_MR,
1553                                  p_hwfn->p_rdma_info->proto, &init_data);
1554         if (rc) {
1555                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "rc = %d\n", rc);
1556                 return rc;
1557         }
1558
1559         p_ramrod = &p_ent->ramrod.rdma_deregister_tid;
1560         p_ramrod->itid = cpu_to_le32(itid);
1561
1562         rc = qed_spq_post(p_hwfn, p_ent, &fw_return_code);
1563         if (rc) {
1564                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "rc = %d\n", rc);
1565                 return rc;
1566         }
1567
1568         if (fw_return_code == RDMA_RETURN_DEREGISTER_MR_BAD_STATE_ERR) {
1569                 DP_NOTICE(p_hwfn, "fw_return_code = %d\n", fw_return_code);
1570                 return -EINVAL;
1571         } else if (fw_return_code == RDMA_RETURN_NIG_DRAIN_REQ) {
1572                 /* Bit indicating that the TID is in use and a nig drain is
1573                  * required before sending the ramrod again
1574                  */
1575                 p_ptt = qed_ptt_acquire(p_hwfn);
1576                 if (!p_ptt) {
1577                         rc = -EBUSY;
1578                         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1579                                    "Failed to acquire PTT\n");
1580                         return rc;
1581                 }
1582
1583                 rc = qed_mcp_drain(p_hwfn, p_ptt);
1584                 if (rc) {
1585                         qed_ptt_release(p_hwfn, p_ptt);
1586                         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1587                                    "Drain failed\n");
1588                         return rc;
1589                 }
1590
1591                 qed_ptt_release(p_hwfn, p_ptt);
1592
1593                 /* Resend the ramrod */
1594                 rc = qed_sp_init_request(p_hwfn, &p_ent,
1595                                          RDMA_RAMROD_DEREGISTER_MR,
1596                                          p_hwfn->p_rdma_info->proto,
1597                                          &init_data);
1598                 if (rc) {
1599                         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1600                                    "Failed to init sp-element\n");
1601                         return rc;
1602                 }
1603
1604                 rc = qed_spq_post(p_hwfn, p_ent, &fw_return_code);
1605                 if (rc) {
1606                         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1607                                    "Ramrod failed\n");
1608                         return rc;
1609                 }
1610
1611                 if (fw_return_code != RDMA_RETURN_OK) {
1612                         DP_NOTICE(p_hwfn, "fw_return_code = %d\n",
1613                                   fw_return_code);
1614                         return rc;
1615                 }
1616         }
1617
1618         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "De-registered TID, rc = %d\n", rc);
1619         return rc;
1620 }
1621
1622 static void *qed_rdma_get_rdma_ctx(struct qed_dev *cdev)
1623 {
1624         return QED_LEADING_HWFN(cdev);
1625 }
1626
1627 bool qed_rdma_allocated_qps(struct qed_hwfn *p_hwfn)
1628 {
1629         bool result;
1630
1631         /* if rdma info has not been allocated, naturally there are no qps */
1632         if (!p_hwfn->p_rdma_info)
1633                 return false;
1634
1635         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
1636         if (!p_hwfn->p_rdma_info->cid_map.bitmap)
1637                 result = false;
1638         else
1639                 result = !qed_bmap_is_empty(&p_hwfn->p_rdma_info->cid_map);
1640         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
1641         return result;
1642 }
1643
1644 void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1645 {
1646         u32 val;
1647
1648         val = (p_hwfn->dcbx_no_edpm || p_hwfn->db_bar_no_edpm) ? 0 : 1;
1649
1650         qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_DPM_ENABLE, val);
1651         DP_VERBOSE(p_hwfn, (QED_MSG_DCB | QED_MSG_RDMA),
1652                    "Changing DPM_EN state to %d (DCBX=%d, DB_BAR=%d)\n",
1653                    val, p_hwfn->dcbx_no_edpm, p_hwfn->db_bar_no_edpm);
1654 }
1655
1656
1657 void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1658 {
1659         p_hwfn->db_bar_no_edpm = true;
1660
1661         qed_rdma_dpm_conf(p_hwfn, p_ptt);
1662 }
1663
1664 static int qed_rdma_start(void *rdma_cxt,
1665                           struct qed_rdma_start_in_params *params)
1666 {
1667         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1668         struct qed_ptt *p_ptt;
1669         int rc = -EBUSY;
1670
1671         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1672                    "desired_cnq = %08x\n", params->desired_cnq);
1673
1674         p_ptt = qed_ptt_acquire(p_hwfn);
1675         if (!p_ptt)
1676                 goto err;
1677
1678         rc = qed_rdma_alloc(p_hwfn, p_ptt, params);
1679         if (rc)
1680                 goto err1;
1681
1682         rc = qed_rdma_setup(p_hwfn, p_ptt, params);
1683         if (rc)
1684                 goto err2;
1685
1686         qed_ptt_release(p_hwfn, p_ptt);
1687
1688         return rc;
1689
1690 err2:
1691         qed_rdma_free(p_hwfn);
1692 err1:
1693         qed_ptt_release(p_hwfn, p_ptt);
1694 err:
1695         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA start - error, rc = %d\n", rc);
1696         return rc;
1697 }
1698
1699 static int qed_rdma_init(struct qed_dev *cdev,
1700                          struct qed_rdma_start_in_params *params)
1701 {
1702         return qed_rdma_start(QED_LEADING_HWFN(cdev), params);
1703 }
1704
1705 static void qed_rdma_remove_user(void *rdma_cxt, u16 dpi)
1706 {
1707         struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1708
1709         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "dpi = %08x\n", dpi);
1710
1711         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
1712         qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->dpi_map, dpi);
1713         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
1714 }
1715
1716 static int qed_roce_ll2_set_mac_filter(struct qed_dev *cdev,
1717                                        u8 *old_mac_address,
1718                                        u8 *new_mac_address)
1719 {
1720         struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
1721         struct qed_ptt *p_ptt;
1722         int rc = 0;
1723
1724         p_ptt = qed_ptt_acquire(p_hwfn);
1725         if (!p_ptt) {
1726                 DP_ERR(cdev,
1727                        "qed roce ll2 mac filter set: failed to acquire PTT\n");
1728                 return -EINVAL;
1729         }
1730
1731         if (old_mac_address)
1732                 qed_llh_remove_mac_filter(p_hwfn, p_ptt, old_mac_address);
1733         if (new_mac_address)
1734                 rc = qed_llh_add_mac_filter(p_hwfn, p_ptt, new_mac_address);
1735
1736         qed_ptt_release(p_hwfn, p_ptt);
1737
1738         if (rc)
1739                 DP_ERR(cdev,
1740                        "qed roce ll2 mac filter set: failed to add MAC filter\n");
1741
1742         return rc;
1743 }
1744
1745 static const struct qed_rdma_ops qed_rdma_ops_pass = {
1746         .common = &qed_common_ops_pass,
1747         .fill_dev_info = &qed_fill_rdma_dev_info,
1748         .rdma_get_rdma_ctx = &qed_rdma_get_rdma_ctx,
1749         .rdma_init = &qed_rdma_init,
1750         .rdma_add_user = &qed_rdma_add_user,
1751         .rdma_remove_user = &qed_rdma_remove_user,
1752         .rdma_stop = &qed_rdma_stop,
1753         .rdma_query_port = &qed_rdma_query_port,
1754         .rdma_query_device = &qed_rdma_query_device,
1755         .rdma_get_start_sb = &qed_rdma_get_sb_start,
1756         .rdma_get_rdma_int = &qed_rdma_get_int,
1757         .rdma_set_rdma_int = &qed_rdma_set_int,
1758         .rdma_get_min_cnq_msix = &qed_rdma_get_min_cnq_msix,
1759         .rdma_cnq_prod_update = &qed_rdma_cnq_prod_update,
1760         .rdma_alloc_pd = &qed_rdma_alloc_pd,
1761         .rdma_dealloc_pd = &qed_rdma_free_pd,
1762         .rdma_create_cq = &qed_rdma_create_cq,
1763         .rdma_destroy_cq = &qed_rdma_destroy_cq,
1764         .rdma_create_qp = &qed_rdma_create_qp,
1765         .rdma_modify_qp = &qed_rdma_modify_qp,
1766         .rdma_query_qp = &qed_rdma_query_qp,
1767         .rdma_destroy_qp = &qed_rdma_destroy_qp,
1768         .rdma_alloc_tid = &qed_rdma_alloc_tid,
1769         .rdma_free_tid = &qed_rdma_free_tid,
1770         .rdma_register_tid = &qed_rdma_register_tid,
1771         .rdma_deregister_tid = &qed_rdma_deregister_tid,
1772         .ll2_acquire_connection = &qed_ll2_acquire_connection,
1773         .ll2_establish_connection = &qed_ll2_establish_connection,
1774         .ll2_terminate_connection = &qed_ll2_terminate_connection,
1775         .ll2_release_connection = &qed_ll2_release_connection,
1776         .ll2_post_rx_buffer = &qed_ll2_post_rx_buffer,
1777         .ll2_prepare_tx_packet = &qed_ll2_prepare_tx_packet,
1778         .ll2_set_fragment_of_tx_packet = &qed_ll2_set_fragment_of_tx_packet,
1779         .ll2_set_mac_filter = &qed_roce_ll2_set_mac_filter,
1780         .ll2_get_stats = &qed_ll2_get_stats,
1781         .iwarp_connect = &qed_iwarp_connect,
1782         .iwarp_create_listen = &qed_iwarp_create_listen,
1783         .iwarp_destroy_listen = &qed_iwarp_destroy_listen,
1784         .iwarp_accept = &qed_iwarp_accept,
1785         .iwarp_reject = &qed_iwarp_reject,
1786         .iwarp_send_rtr = &qed_iwarp_send_rtr,
1787 };
1788
1789 const struct qed_rdma_ops *qed_get_rdma_ops(void)
1790 {
1791         return &qed_rdma_ops_pass;
1792 }
1793 EXPORT_SYMBOL(qed_get_rdma_ops);