drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c

   1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
   2 /* Copyright (c) 2019 Mellanox Technologies. */
   3
   4 #include "dr_types.h"
   5 #include "dr_ste.h"
   6
   7 enum dr_action_domain {
   8         DR_ACTION_DOMAIN_NIC_INGRESS,
   9         DR_ACTION_DOMAIN_NIC_EGRESS,
  10         DR_ACTION_DOMAIN_FDB_INGRESS,
  11         DR_ACTION_DOMAIN_FDB_EGRESS,
  12         DR_ACTION_DOMAIN_MAX,
  13 };
  14
  15 enum dr_action_valid_state {
  16         DR_ACTION_STATE_ERR,
  17         DR_ACTION_STATE_NO_ACTION,
  18         DR_ACTION_STATE_ENCAP,
  19         DR_ACTION_STATE_DECAP,
  20         DR_ACTION_STATE_MODIFY_HDR,
  21         DR_ACTION_STATE_POP_VLAN,
  22         DR_ACTION_STATE_PUSH_VLAN,
  23         DR_ACTION_STATE_NON_TERM,
  24         DR_ACTION_STATE_TERM,
  25         DR_ACTION_STATE_ASO,
  26         DR_ACTION_STATE_MAX,
  27 };
  28
  29 static const char * const action_type_to_str[] = {
  30         [DR_ACTION_TYP_TNL_L2_TO_L2] = "DR_ACTION_TYP_TNL_L2_TO_L2",
  31         [DR_ACTION_TYP_L2_TO_TNL_L2] = "DR_ACTION_TYP_L2_TO_TNL_L2",
  32         [DR_ACTION_TYP_TNL_L3_TO_L2] = "DR_ACTION_TYP_TNL_L3_TO_L2",
  33         [DR_ACTION_TYP_L2_TO_TNL_L3] = "DR_ACTION_TYP_L2_TO_TNL_L3",
  34         [DR_ACTION_TYP_DROP] = "DR_ACTION_TYP_DROP",
  35         [DR_ACTION_TYP_QP] = "DR_ACTION_TYP_QP",
  36         [DR_ACTION_TYP_FT] = "DR_ACTION_TYP_FT",
  37         [DR_ACTION_TYP_CTR] = "DR_ACTION_TYP_CTR",
  38         [DR_ACTION_TYP_TAG] = "DR_ACTION_TYP_TAG",
  39         [DR_ACTION_TYP_MODIFY_HDR] = "DR_ACTION_TYP_MODIFY_HDR",
  40         [DR_ACTION_TYP_VPORT] = "DR_ACTION_TYP_VPORT",
  41         [DR_ACTION_TYP_POP_VLAN] = "DR_ACTION_TYP_POP_VLAN",
  42         [DR_ACTION_TYP_PUSH_VLAN] = "DR_ACTION_TYP_PUSH_VLAN",
  43         [DR_ACTION_TYP_SAMPLER] = "DR_ACTION_TYP_SAMPLER",
  44         [DR_ACTION_TYP_INSERT_HDR] = "DR_ACTION_TYP_INSERT_HDR",
  45         [DR_ACTION_TYP_REMOVE_HDR] = "DR_ACTION_TYP_REMOVE_HDR",
  46         [DR_ACTION_TYP_ASO_FLOW_METER] = "DR_ACTION_TYP_ASO_FLOW_METER",
  47         [DR_ACTION_TYP_RANGE] = "DR_ACTION_TYP_RANGE",
  48         [DR_ACTION_TYP_MAX] = "DR_ACTION_UNKNOWN",
  49 };
  50
  51 static const char *dr_action_id_to_str(enum mlx5dr_action_type action_id)
  52 {
  53         if (action_id > DR_ACTION_TYP_MAX)
  54                 action_id = DR_ACTION_TYP_MAX;
  55         return action_type_to_str[action_id];
  56 }
  57
  58 static bool mlx5dr_action_supp_fwd_fdb_multi_ft(struct mlx5_core_dev *dev)
  59 {
  60         return (MLX5_CAP_GEN(dev, steering_format_version) < MLX5_STEERING_FORMAT_CONNECTX_6DX ||
  61                 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_any_table_limit_regc) ||
  62                 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_any_table));
  63 }
  64
  65 static const enum dr_action_valid_state
  66 next_action_state[DR_ACTION_DOMAIN_MAX][DR_ACTION_STATE_MAX][DR_ACTION_TYP_MAX] = {
  67         [DR_ACTION_DOMAIN_NIC_INGRESS] = {
  68                 [DR_ACTION_STATE_NO_ACTION] = {
  69                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
  70                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
  71                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
  72                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
  73                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
  74                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_NON_TERM,
  75                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
  76                         [DR_ACTION_TYP_TNL_L2_TO_L2]    = DR_ACTION_STATE_DECAP,
  77                         [DR_ACTION_TYP_TNL_L3_TO_L2]    = DR_ACTION_STATE_DECAP,
  78                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
  79                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
  80                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
  81                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
  82                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
  83                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
  84                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
  85                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
  86                 },
  87                 [DR_ACTION_STATE_DECAP] = {
  88                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
  89                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
  90                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
  91                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
  92                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
  93                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_DECAP,
  94                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_DECAP,
  95                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
  96                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
  97                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
  98                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
  99                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 100                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 101                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 102                 },
 103                 [DR_ACTION_STATE_ENCAP] = {
 104                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 105                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 106                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 107                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 108                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 109                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_ENCAP,
 110                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ENCAP,
 111                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 112                 },
 113                 [DR_ACTION_STATE_MODIFY_HDR] = {
 114                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 115                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 116                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 117                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 118                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 119                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_MODIFY_HDR,
 120                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_MODIFY_HDR,
 121                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 122                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 123                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 124                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 125                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 126                 },
 127                 [DR_ACTION_STATE_POP_VLAN] = {
 128                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 129                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 130                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 131                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 132                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 133                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_POP_VLAN,
 134                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_POP_VLAN,
 135                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 136                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 137                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 138                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 139                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 140                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 141                 },
 142                 [DR_ACTION_STATE_PUSH_VLAN] = {
 143                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 144                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 145                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 146                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 147                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_PUSH_VLAN,
 148                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_PUSH_VLAN,
 149                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 150                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 151                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 152                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 153                 },
 154                 [DR_ACTION_STATE_NON_TERM] = {
 155                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 156                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 157                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 158                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 159                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 160                         [DR_ACTION_TYP_TAG]             = DR_ACTION_STATE_NON_TERM,
 161                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 162                         [DR_ACTION_TYP_TNL_L2_TO_L2]    = DR_ACTION_STATE_DECAP,
 163                         [DR_ACTION_TYP_TNL_L3_TO_L2]    = DR_ACTION_STATE_DECAP,
 164                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 165                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 166                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 167                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 168                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 169                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 170                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 171                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 172                 },
 173                 [DR_ACTION_STATE_ASO] = {
 174                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 175                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 176                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 177                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 178                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ASO,
 179                 },
 180                 [DR_ACTION_STATE_TERM] = {
 181                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_TERM,
 182                 },
 183         },
 184         [DR_ACTION_DOMAIN_NIC_EGRESS] = {
 185                 [DR_ACTION_STATE_NO_ACTION] = {
 186                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 187                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 188                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 189                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 190                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 191                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 192                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 193                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 194                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 195                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 196                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 197                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 198                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 199                 },
 200                 [DR_ACTION_STATE_DECAP] = {
 201                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 202                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 203                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 204                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 205                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_DECAP,
 206                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 207                 },
 208                 [DR_ACTION_STATE_ENCAP] = {
 209                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 210                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 211                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 212                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 213                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ENCAP,
 214                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 215                 },
 216                 [DR_ACTION_STATE_MODIFY_HDR] = {
 217                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 218                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 219                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 220                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 221                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_MODIFY_HDR,
 222                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 223                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 224                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 225                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 226                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 227                 },
 228                 [DR_ACTION_STATE_POP_VLAN] = {
 229                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 230                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 231                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 232                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_POP_VLAN,
 233                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 234                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 235                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 236                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 237                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 238                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 239                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 240                 },
 241                 [DR_ACTION_STATE_PUSH_VLAN] = {
 242                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 243                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 244                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 245                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 246                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_PUSH_VLAN,
 247                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 248                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 249                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 250                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 251                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 252                 },
 253                 [DR_ACTION_STATE_NON_TERM] = {
 254                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 255                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 256                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 257                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 258                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 259                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 260                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 261                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 262                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 263                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 264                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 265                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 266                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 267                 },
 268                 [DR_ACTION_STATE_ASO] = {
 269                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 270                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 271                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 272                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 273                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ASO,
 274                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 275                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 276                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 277                 },
 278                 [DR_ACTION_STATE_TERM] = {
 279                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_TERM,
 280                 },
 281         },
 282         [DR_ACTION_DOMAIN_FDB_INGRESS] = {
 283                 [DR_ACTION_STATE_NO_ACTION] = {
 284                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 285                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 286                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 287                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 288                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 289                         [DR_ACTION_TYP_TNL_L2_TO_L2]    = DR_ACTION_STATE_DECAP,
 290                         [DR_ACTION_TYP_TNL_L3_TO_L2]    = DR_ACTION_STATE_DECAP,
 291                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 292                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 293                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 294                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 295                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 296                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 297                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 298                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 299                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 300                 },
 301                 [DR_ACTION_STATE_DECAP] = {
 302                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 303                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 304                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 305                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_DECAP,
 306                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 307                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 308                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 309                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 310                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 311                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 312                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 313                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 314                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 315                 },
 316                 [DR_ACTION_STATE_ENCAP] = {
 317                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 318                         [DR_ACTION_TYP_QP]              = DR_ACTION_STATE_TERM,
 319                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 320                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 321                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 322                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 323                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ENCAP,
 324                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 325                 },
 326                 [DR_ACTION_STATE_MODIFY_HDR] = {
 327                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 328                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 329                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 330                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 331                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_MODIFY_HDR,
 332                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 333                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 334                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 335                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 336                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 337                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 338                 },
 339                 [DR_ACTION_STATE_POP_VLAN] = {
 340                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 341                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 342                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 343                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 344                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 345                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_POP_VLAN,
 346                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 347                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 348                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 349                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 350                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 351                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 352                 },
 353                 [DR_ACTION_STATE_PUSH_VLAN] = {
 354                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 355                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 356                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 357                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 358                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 359                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_PUSH_VLAN,
 360                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 361                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 362                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 363                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 364                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 365                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 366                 },
 367                 [DR_ACTION_STATE_NON_TERM] = {
 368                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 369                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 370                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 371                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 372                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 373                         [DR_ACTION_TYP_TNL_L2_TO_L2]    = DR_ACTION_STATE_DECAP,
 374                         [DR_ACTION_TYP_TNL_L3_TO_L2]    = DR_ACTION_STATE_DECAP,
 375                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 376                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 377                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 378                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 379                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 380                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 381                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 382                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 383                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 384                 },
 385                 [DR_ACTION_STATE_ASO] = {
 386                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 387                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 388                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 389                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 390                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ASO,
 391                 },
 392                 [DR_ACTION_STATE_TERM] = {
 393                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_TERM,
 394                 },
 395         },
 396         [DR_ACTION_DOMAIN_FDB_EGRESS] = {
 397                 [DR_ACTION_STATE_NO_ACTION] = {
 398                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 399                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 400                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 401                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 402                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 403                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 404                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 405                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 406                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 407                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 408                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 409                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 410                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 411                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 412                 },
 413                 [DR_ACTION_STATE_DECAP] = {
 414                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 415                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 416                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 417                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_DECAP,
 418                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 419                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 420                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 421                 },
 422                 [DR_ACTION_STATE_ENCAP] = {
 423                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 424                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 425                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 426                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ENCAP,
 427                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 428                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 429                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 430                 },
 431                 [DR_ACTION_STATE_MODIFY_HDR] = {
 432                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 433                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 434                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 435                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 436                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_MODIFY_HDR,
 437                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 438                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 439                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 440                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 441                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 442                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 443                 },
 444                 [DR_ACTION_STATE_POP_VLAN] = {
 445                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 446                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 447                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 448                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_POP_VLAN,
 449                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 450                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 451                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 452                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 453                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 454                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 455                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 456                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 457                 },
 458                 [DR_ACTION_STATE_PUSH_VLAN] = {
 459                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 460                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 461                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 462                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 463                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 464                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_PUSH_VLAN,
 465                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 466                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 467                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 468                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 469                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 470                 },
 471                 [DR_ACTION_STATE_NON_TERM] = {
 472                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 473                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 474                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 475                         [DR_ACTION_TYP_SAMPLER]         = DR_ACTION_STATE_TERM,
 476                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_NON_TERM,
 477                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 478                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 479                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 480                         [DR_ACTION_TYP_INSERT_HDR]      = DR_ACTION_STATE_ENCAP,
 481                         [DR_ACTION_TYP_REMOVE_HDR]      = DR_ACTION_STATE_DECAP,
 482                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 483                         [DR_ACTION_TYP_POP_VLAN]        = DR_ACTION_STATE_POP_VLAN,
 484                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 485                         [DR_ACTION_TYP_ASO_FLOW_METER]  = DR_ACTION_STATE_ASO,
 486                 },
 487                 [DR_ACTION_STATE_ASO] = {
 488                         [DR_ACTION_TYP_L2_TO_TNL_L2]    = DR_ACTION_STATE_ENCAP,
 489                         [DR_ACTION_TYP_L2_TO_TNL_L3]    = DR_ACTION_STATE_ENCAP,
 490                         [DR_ACTION_TYP_MODIFY_HDR]      = DR_ACTION_STATE_MODIFY_HDR,
 491                         [DR_ACTION_TYP_PUSH_VLAN]       = DR_ACTION_STATE_PUSH_VLAN,
 492                         [DR_ACTION_TYP_DROP]            = DR_ACTION_STATE_TERM,
 493                         [DR_ACTION_TYP_FT]              = DR_ACTION_STATE_TERM,
 494                         [DR_ACTION_TYP_RANGE]           = DR_ACTION_STATE_TERM,
 495                         [DR_ACTION_TYP_VPORT]           = DR_ACTION_STATE_TERM,
 496                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_ASO,
 497                 },
 498                 [DR_ACTION_STATE_TERM] = {
 499                         [DR_ACTION_TYP_CTR]             = DR_ACTION_STATE_TERM,
 500                 },
 501         },
 502 };
 503
 504 static int
 505 dr_action_reformat_to_action_type(enum mlx5dr_action_reformat_type reformat_type,
 506                                   enum mlx5dr_action_type *action_type)
 507 {
 508         switch (reformat_type) {
 509         case DR_ACTION_REFORMAT_TYP_TNL_L2_TO_L2:
 510                 *action_type = DR_ACTION_TYP_TNL_L2_TO_L2;
 511                 break;
 512         case DR_ACTION_REFORMAT_TYP_L2_TO_TNL_L2:
 513                 *action_type = DR_ACTION_TYP_L2_TO_TNL_L2;
 514                 break;
 515         case DR_ACTION_REFORMAT_TYP_TNL_L3_TO_L2:
 516                 *action_type = DR_ACTION_TYP_TNL_L3_TO_L2;
 517                 break;
 518         case DR_ACTION_REFORMAT_TYP_L2_TO_TNL_L3:
 519                 *action_type = DR_ACTION_TYP_L2_TO_TNL_L3;
 520                 break;
 521         case DR_ACTION_REFORMAT_TYP_INSERT_HDR:
 522                 *action_type = DR_ACTION_TYP_INSERT_HDR;
 523                 break;
 524         case DR_ACTION_REFORMAT_TYP_REMOVE_HDR:
 525                 *action_type = DR_ACTION_TYP_REMOVE_HDR;
 526                 break;
 527         default:
 528                 return -EINVAL;
 529         }
 530
 531         return 0;
 532 }
 533
 534 /* Apply the actions on the rule STE array starting from the last_ste.
 535  * Actions might require more than one STE, new_num_stes will return
 536  * the new size of the STEs array, rule with actions.
 537  */
 538 static void dr_actions_apply(struct mlx5dr_domain *dmn,
 539                              enum mlx5dr_domain_nic_type nic_type,
 540                              u8 *action_type_set,
 541                              u8 *last_ste,
 542                              struct mlx5dr_ste_actions_attr *attr,
 543                              u32 *new_num_stes)
 544 {
 545         struct mlx5dr_ste_ctx *ste_ctx = dmn->ste_ctx;
 546         u32 added_stes = 0;
 547
 548         if (nic_type == DR_DOMAIN_NIC_TYPE_RX)
 549                 mlx5dr_ste_set_actions_rx(ste_ctx, dmn, action_type_set,
 550                                           last_ste, attr, &added_stes);
 551         else
 552                 mlx5dr_ste_set_actions_tx(ste_ctx, dmn, action_type_set,
 553                                           last_ste, attr, &added_stes);
 554
 555         *new_num_stes += added_stes;
 556 }
 557
 558 static enum dr_action_domain
 559 dr_action_get_action_domain(enum mlx5dr_domain_type domain,
 560                             enum mlx5dr_domain_nic_type nic_type)
 561 {
 562         switch (domain) {
 563         case MLX5DR_DOMAIN_TYPE_NIC_RX:
 564                 return DR_ACTION_DOMAIN_NIC_INGRESS;
 565         case MLX5DR_DOMAIN_TYPE_NIC_TX:
 566                 return DR_ACTION_DOMAIN_NIC_EGRESS;
 567         case MLX5DR_DOMAIN_TYPE_FDB:
 568                 if (nic_type == DR_DOMAIN_NIC_TYPE_RX)
 569                         return DR_ACTION_DOMAIN_FDB_INGRESS;
 570                 return DR_ACTION_DOMAIN_FDB_EGRESS;
 571         default:
 572                 WARN_ON(true);
 573                 return DR_ACTION_DOMAIN_MAX;
 574         }
 575 }
 576
 577 static
 578 int dr_action_validate_and_get_next_state(enum dr_action_domain action_domain,
 579                                           u32 action_type,
 580                                           u32 *state)
 581 {
 582         u32 cur_state = *state;
 583
 584         /* Check action state machine is valid */
 585         *state = next_action_state[action_domain][cur_state][action_type];
 586
 587         if (*state == DR_ACTION_STATE_ERR)
 588                 return -EOPNOTSUPP;
 589
 590         return 0;
 591 }
 592
 593 static int dr_action_handle_cs_recalc(struct mlx5dr_domain *dmn,
 594                                       struct mlx5dr_action *dest_action,
 595                                       u64 *final_icm_addr)
 596 {
 597         int ret;
 598
 599         switch (dest_action->action_type) {
 600         case DR_ACTION_TYP_FT:
 601                 /* Allow destination flow table only if table is a terminating
 602                  * table, since there is an *assumption* that in such case FW
 603                  * will recalculate the CS.
 604                  */
 605                 if (dest_action->dest_tbl->is_fw_tbl) {
 606                         *final_icm_addr = dest_action->dest_tbl->fw_tbl.rx_icm_addr;
 607                 } else {
 608                         mlx5dr_dbg(dmn,
 609                                    "Destination FT should be terminating when modify TTL is used\n");
 610                         return -EINVAL;
 611                 }
 612                 break;
 613
 614         case DR_ACTION_TYP_VPORT:
 615                 /* If destination is vport we will get the FW flow table
 616                  * that recalculates the CS and forwards to the vport.
 617                  */
 618                 ret = mlx5dr_domain_get_recalc_cs_ft_addr(dest_action->vport->dmn,
 619                                                           dest_action->vport->caps->num,
 620                                                           final_icm_addr);
 621                 if (ret) {
 622                         mlx5dr_err(dmn, "Failed to get FW cs recalc flow table\n");
 623                         return ret;
 624                 }
 625                 break;
 626
 627         default:
 628                 break;
 629         }
 630
 631         return 0;
 632 }
 633
 634 static void dr_action_modify_ttl_adjust(struct mlx5dr_domain *dmn,
 635                                         struct mlx5dr_ste_actions_attr *attr,
 636                                         bool rx_rule,
 637                                         bool *recalc_cs_required)
 638 {
 639         *recalc_cs_required = false;
 640
 641         /* if device supports csum recalculation - no adjustment needed */
 642         if (mlx5dr_ste_supp_ttl_cs_recalc(&dmn->info.caps))
 643                 return;
 644
 645         /* no adjustment needed on TX rules */
 646         if (!rx_rule)
 647                 return;
 648
 649         if (!MLX5_CAP_ESW_FLOWTABLE(dmn->mdev, fdb_ipv4_ttl_modify)) {
 650                 /* Ignore the modify TTL action.
 651                  * It is always kept as last HW action.
 652                  */
 653                 attr->modify_actions--;
 654                 return;
 655         }
 656
 657         if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB)
 658                 /* Due to a HW bug on some devices, modifying TTL on RX flows
 659                  * will cause an incorrect checksum calculation. In such cases
 660                  * we will use a FW table to recalculate the checksum.
 661                  */
 662                 *recalc_cs_required = true;
 663 }
 664
 665 static void dr_action_print_sequence(struct mlx5dr_domain *dmn,
 666                                      struct mlx5dr_action *actions[],
 667                                      int last_idx)
 668 {
 669         int i;
 670
 671         for (i = 0; i <= last_idx; i++)
 672                 mlx5dr_err(dmn, "< %s (%d) > ",
 673                            dr_action_id_to_str(actions[i]->action_type),
 674                            actions[i]->action_type);
 675 }
 676
 677 static int dr_action_get_dest_fw_tbl_addr(struct mlx5dr_matcher *matcher,
 678                                           struct mlx5dr_action_dest_tbl *dest_tbl,
 679                                           bool is_rx_rule,
 680                                           u64 *final_icm_addr)
 681 {
 682         struct mlx5dr_cmd_query_flow_table_details output;
 683         struct mlx5dr_domain *dmn = matcher->tbl->dmn;
 684         int ret;
 685
 686         if (!dest_tbl->fw_tbl.rx_icm_addr) {
 687                 ret = mlx5dr_cmd_query_flow_table(dmn->mdev,
 688                                                   dest_tbl->fw_tbl.type,
 689                                                   dest_tbl->fw_tbl.id,
 690                                                   &output);
 691                 if (ret) {
 692                         mlx5dr_err(dmn,
 693                                    "Failed mlx5_cmd_query_flow_table ret: %d\n",
 694                                    ret);
 695                         return ret;
 696                 }
 697
 698                 dest_tbl->fw_tbl.tx_icm_addr = output.sw_owner_icm_root_1;
 699                 dest_tbl->fw_tbl.rx_icm_addr = output.sw_owner_icm_root_0;
 700         }
 701
 702         *final_icm_addr = is_rx_rule ? dest_tbl->fw_tbl.rx_icm_addr :
 703                                        dest_tbl->fw_tbl.tx_icm_addr;
 704         return 0;
 705 }
 706
 707 static int dr_action_get_dest_sw_tbl_addr(struct mlx5dr_matcher *matcher,
 708                                           struct mlx5dr_action_dest_tbl *dest_tbl,
 709                                           bool is_rx_rule,
 710                                           u64 *final_icm_addr)
 711 {
 712         struct mlx5dr_domain *dmn = matcher->tbl->dmn;
 713         struct mlx5dr_icm_chunk *chunk;
 714
 715         if (dest_tbl->tbl->dmn != dmn) {
 716                 mlx5dr_err(dmn,
 717                            "Destination table belongs to a different domain\n");
 718                 return -EINVAL;
 719         }
 720
 721         if (dest_tbl->tbl->level <= matcher->tbl->level) {
 722                 mlx5_core_dbg_once(dmn->mdev,
 723                                    "Connecting table to a lower/same level destination table\n");
 724                 mlx5dr_dbg(dmn,
 725                            "Connecting table at level %d to a destination table at level %d\n",
 726                            matcher->tbl->level,
 727                            dest_tbl->tbl->level);
 728         }
 729
 730         chunk = is_rx_rule ? dest_tbl->tbl->rx.s_anchor->chunk :
 731                              dest_tbl->tbl->tx.s_anchor->chunk;
 732
 733         *final_icm_addr = mlx5dr_icm_pool_get_chunk_icm_addr(chunk);
 734         return 0;
 735 }
 736
 737 static int dr_action_get_dest_tbl_addr(struct mlx5dr_matcher *matcher,
 738                                        struct mlx5dr_action_dest_tbl *dest_tbl,
 739                                        bool is_rx_rule,
 740                                        u64 *final_icm_addr)
 741 {
 742         if (dest_tbl->is_fw_tbl)
 743                 return dr_action_get_dest_fw_tbl_addr(matcher,
 744                                                       dest_tbl,
 745                                                       is_rx_rule,
 746                                                       final_icm_addr);
 747
 748         return dr_action_get_dest_sw_tbl_addr(matcher,
 749                                               dest_tbl,
 750                                               is_rx_rule,
 751                                               final_icm_addr);
 752 }
 753
 754 #define WITH_VLAN_NUM_HW_ACTIONS 6
 755
 756 int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
 757                                  struct mlx5dr_matcher_rx_tx *nic_matcher,
 758                                  struct mlx5dr_action *actions[],
 759                                  u32 num_actions,
 760                                  u8 *ste_arr,
 761                                  u32 *new_hw_ste_arr_sz)
 762 {
 763         struct mlx5dr_domain_rx_tx *nic_dmn = nic_matcher->nic_tbl->nic_dmn;
 764         bool rx_rule = nic_dmn->type == DR_DOMAIN_NIC_TYPE_RX;
 765         struct mlx5dr_domain *dmn = matcher->tbl->dmn;
 766         u8 action_type_set[DR_ACTION_TYP_MAX] = {};
 767         struct mlx5dr_ste_actions_attr attr = {};
 768         struct mlx5dr_action *dest_action = NULL;
 769         u32 state = DR_ACTION_STATE_NO_ACTION;
 770         enum dr_action_domain action_domain;
 771         bool recalc_cs_required = false;
 772         u8 *last_ste;
 773         int i, ret;
 774
 775         attr.gvmi = dmn->info.caps.gvmi;
 776         attr.hit_gvmi = dmn->info.caps.gvmi;
 777         attr.final_icm_addr = nic_dmn->default_icm_addr;
 778         action_domain = dr_action_get_action_domain(dmn->type, nic_dmn->type);
 779
 780         for (i = 0; i < num_actions; i++) {
 781                 struct mlx5dr_action *action;
 782                 int max_actions_type = 1;
 783                 u32 action_type;
 784
 785                 action = actions[i];
 786                 action_type = action->action_type;
 787
 788                 switch (action_type) {
 789                 case DR_ACTION_TYP_DROP:
 790                         attr.final_icm_addr = nic_dmn->drop_icm_addr;
 791                         attr.hit_gvmi = nic_dmn->drop_icm_addr >> 48;
 792                         break;
 793                 case DR_ACTION_TYP_FT:
 794                         dest_action = action;
 795                         ret = dr_action_get_dest_tbl_addr(matcher, action->dest_tbl,
 796                                                           rx_rule, &attr.final_icm_addr);
 797                         if (ret)
 798                                 return ret;
 799                         break;
 800                 case DR_ACTION_TYP_RANGE:
 801                         ret = dr_action_get_dest_tbl_addr(matcher,
 802                                                           action->range->hit_tbl_action->dest_tbl,
 803                                                           rx_rule, &attr.final_icm_addr);
 804                         if (ret)
 805                                 return ret;
 806
 807                         ret = dr_action_get_dest_tbl_addr(matcher,
 808                                                           action->range->miss_tbl_action->dest_tbl,
 809                                                           rx_rule, &attr.range.miss_icm_addr);
 810                         if (ret)
 811                                 return ret;
 812
 813                         attr.range.definer_id = action->range->definer_id;
 814                         attr.range.min = action->range->min;
 815                         attr.range.max = action->range->max;
 816                         break;
 817                 case DR_ACTION_TYP_QP:
 818                         mlx5dr_info(dmn, "Domain doesn't support QP\n");
 819                         return -EOPNOTSUPP;
 820                 case DR_ACTION_TYP_CTR:
 821                         attr.ctr_id = action->ctr->ctr_id +
 822                                 action->ctr->offset;
 823                         break;
 824                 case DR_ACTION_TYP_TAG:
 825                         attr.flow_tag = action->flow_tag->flow_tag;
 826                         break;
 827                 case DR_ACTION_TYP_TNL_L2_TO_L2:
 828                         break;
 829                 case DR_ACTION_TYP_TNL_L3_TO_L2:
 830                         if (action->rewrite->ptrn && action->rewrite->arg) {
 831                                 attr.decap_index = mlx5dr_arg_get_obj_id(action->rewrite->arg);
 832                                 attr.decap_actions = action->rewrite->ptrn->num_of_actions;
 833                                 attr.decap_pat_idx = action->rewrite->ptrn->index;
 834                         } else {
 835                                 attr.decap_index = action->rewrite->index;
 836                                 attr.decap_actions = action->rewrite->num_of_actions;
 837                                 attr.decap_with_vlan =
 838                                         attr.decap_actions == WITH_VLAN_NUM_HW_ACTIONS;
 839                                 attr.decap_pat_idx = MLX5DR_INVALID_PATTERN_INDEX;
 840                         }
 841                         break;
 842                 case DR_ACTION_TYP_MODIFY_HDR:
 843                         if (action->rewrite->single_action_opt) {
 844                                 attr.modify_actions = action->rewrite->num_of_actions;
 845                                 attr.single_modify_action = action->rewrite->data;
 846                         } else {
 847                                 if (action->rewrite->ptrn && action->rewrite->arg) {
 848                                         attr.modify_index =
 849                                                 mlx5dr_arg_get_obj_id(action->rewrite->arg);
 850                                         attr.modify_actions = action->rewrite->ptrn->num_of_actions;
 851                                         attr.modify_pat_idx = action->rewrite->ptrn->index;
 852                                 } else {
 853                                         attr.modify_index = action->rewrite->index;
 854                                         attr.modify_actions = action->rewrite->num_of_actions;
 855                                         attr.modify_pat_idx = MLX5DR_INVALID_PATTERN_INDEX;
 856                                 }
 857                         }
 858                         if (action->rewrite->modify_ttl)
 859                                 dr_action_modify_ttl_adjust(dmn, &attr, rx_rule,
 860                                                             &recalc_cs_required);
 861                         break;
 862                 case DR_ACTION_TYP_L2_TO_TNL_L2:
 863                 case DR_ACTION_TYP_L2_TO_TNL_L3:
 864                         if (rx_rule &&
 865                             !(dmn->ste_ctx->actions_caps & DR_STE_CTX_ACTION_CAP_RX_ENCAP)) {
 866                                 mlx5dr_info(dmn, "Device doesn't support Encap on RX\n");
 867                                 return -EOPNOTSUPP;
 868                         }
 869                         attr.reformat.size = action->reformat->size;
 870                         attr.reformat.id = action->reformat->id;
 871                         break;
 872                 case DR_ACTION_TYP_SAMPLER:
 873                         attr.final_icm_addr = rx_rule ? action->sampler->rx_icm_addr :
 874                                                         action->sampler->tx_icm_addr;
 875                         break;
 876                 case DR_ACTION_TYP_VPORT:
 877                         if (unlikely(rx_rule && action->vport->caps->num == MLX5_VPORT_UPLINK)) {
 878                                 /* can't go to uplink on RX rule - dropping instead */
 879                                 attr.final_icm_addr = nic_dmn->drop_icm_addr;
 880                                 attr.hit_gvmi = nic_dmn->drop_icm_addr >> 48;
 881                         } else {
 882                                 attr.hit_gvmi = action->vport->caps->vhca_gvmi;
 883                                 dest_action = action;
 884                                 attr.final_icm_addr = rx_rule ?
 885                                                       action->vport->caps->icm_address_rx :
 886                                                       action->vport->caps->icm_address_tx;
 887                         }
 888                         break;
 889                 case DR_ACTION_TYP_POP_VLAN:
 890                         if (!rx_rule && !(dmn->ste_ctx->actions_caps &
 891                                           DR_STE_CTX_ACTION_CAP_TX_POP)) {
 892                                 mlx5dr_dbg(dmn, "Device doesn't support POP VLAN action on TX\n");
 893                                 return -EOPNOTSUPP;
 894                         }
 895
 896                         max_actions_type = MLX5DR_MAX_VLANS;
 897                         attr.vlans.count++;
 898                         break;
 899                 case DR_ACTION_TYP_PUSH_VLAN:
 900                         if (rx_rule && !(dmn->ste_ctx->actions_caps &
 901                                          DR_STE_CTX_ACTION_CAP_RX_PUSH)) {
 902                                 mlx5dr_dbg(dmn, "Device doesn't support PUSH VLAN action on RX\n");
 903                                 return -EOPNOTSUPP;
 904                         }
 905
 906                         max_actions_type = MLX5DR_MAX_VLANS;
 907                         if (attr.vlans.count == MLX5DR_MAX_VLANS) {
 908                                 mlx5dr_dbg(dmn, "Max VLAN push/pop count exceeded\n");
 909                                 return -EINVAL;
 910                         }
 911
 912                         attr.vlans.headers[attr.vlans.count++] = action->push_vlan->vlan_hdr;
 913                         break;
 914                 case DR_ACTION_TYP_INSERT_HDR:
 915                 case DR_ACTION_TYP_REMOVE_HDR:
 916                         attr.reformat.size = action->reformat->size;
 917                         attr.reformat.id = action->reformat->id;
 918                         attr.reformat.param_0 = action->reformat->param_0;
 919                         attr.reformat.param_1 = action->reformat->param_1;
 920                         break;
 921                 case DR_ACTION_TYP_ASO_FLOW_METER:
 922                         attr.aso_flow_meter.obj_id = action->aso->obj_id;
 923                         attr.aso_flow_meter.offset = action->aso->offset;
 924                         attr.aso_flow_meter.dest_reg_id = action->aso->dest_reg_id;
 925                         attr.aso_flow_meter.init_color = action->aso->init_color;
 926                         break;
 927                 default:
 928                         mlx5dr_err(dmn, "Unsupported action type %d\n", action_type);
 929                         return -EINVAL;
 930                 }
 931
 932                 /* Check action duplication */
 933                 if (++action_type_set[action_type] > max_actions_type) {
 934                         mlx5dr_err(dmn, "Action type %d supports only max %d time(s)\n",
 935                                    action_type, max_actions_type);
 936                         return -EINVAL;
 937                 }
 938
 939                 /* Check action state machine is valid */
 940                 if (dr_action_validate_and_get_next_state(action_domain,
 941                                                           action_type,
 942                                                           &state)) {
 943                         mlx5dr_err(dmn, "Invalid action (gvmi: %d, is_rx: %d) sequence provided:",
 944                                    attr.gvmi, rx_rule);
 945                         dr_action_print_sequence(dmn, actions, i);
 946                         return -EOPNOTSUPP;
 947                 }
 948         }
 949
 950         *new_hw_ste_arr_sz = nic_matcher->num_of_builders;
 951         last_ste = ste_arr + DR_STE_SIZE * (nic_matcher->num_of_builders - 1);
 952
 953         if (recalc_cs_required && dest_action) {
 954                 ret = dr_action_handle_cs_recalc(dmn, dest_action, &attr.final_icm_addr);
 955                 if (ret) {
 956                         mlx5dr_err(dmn,
 957                                    "Failed to handle checksum recalculation err %d\n",
 958                                    ret);
 959                         return ret;
 960                 }
 961         }
 962
 963         dr_actions_apply(dmn,
 964                          nic_dmn->type,
 965                          action_type_set,
 966                          last_ste,
 967                          &attr,
 968                          new_hw_ste_arr_sz);
 969
 970         return 0;
 971 }
 972
 973 static unsigned int action_size[DR_ACTION_TYP_MAX] = {
 974         [DR_ACTION_TYP_TNL_L2_TO_L2] = sizeof(struct mlx5dr_action_reformat),
 975         [DR_ACTION_TYP_L2_TO_TNL_L2] = sizeof(struct mlx5dr_action_reformat),
 976         [DR_ACTION_TYP_TNL_L3_TO_L2] = sizeof(struct mlx5dr_action_rewrite),
 977         [DR_ACTION_TYP_L2_TO_TNL_L3] = sizeof(struct mlx5dr_action_reformat),
 978         [DR_ACTION_TYP_FT]           = sizeof(struct mlx5dr_action_dest_tbl),
 979         [DR_ACTION_TYP_CTR]          = sizeof(struct mlx5dr_action_ctr),
 980         [DR_ACTION_TYP_TAG]          = sizeof(struct mlx5dr_action_flow_tag),
 981         [DR_ACTION_TYP_MODIFY_HDR]   = sizeof(struct mlx5dr_action_rewrite),
 982         [DR_ACTION_TYP_VPORT]        = sizeof(struct mlx5dr_action_vport),
 983         [DR_ACTION_TYP_PUSH_VLAN]    = sizeof(struct mlx5dr_action_push_vlan),
 984         [DR_ACTION_TYP_INSERT_HDR]   = sizeof(struct mlx5dr_action_reformat),
 985         [DR_ACTION_TYP_REMOVE_HDR]   = sizeof(struct mlx5dr_action_reformat),
 986         [DR_ACTION_TYP_SAMPLER]      = sizeof(struct mlx5dr_action_sampler),
 987         [DR_ACTION_TYP_ASO_FLOW_METER] = sizeof(struct mlx5dr_action_aso_flow_meter),
 988         [DR_ACTION_TYP_RANGE]        = sizeof(struct mlx5dr_action_range),
 989 };
 990
 991 static struct mlx5dr_action *
 992 dr_action_create_generic(enum mlx5dr_action_type action_type)
 993 {
 994         struct mlx5dr_action *action;
 995         int extra_size;
 996
 997         if (action_type < DR_ACTION_TYP_MAX)
 998                 extra_size = action_size[action_type];
 999         else
1000                 return NULL;
1001
1002         action = kzalloc(sizeof(*action) + extra_size, GFP_KERNEL);
1003         if (!action)
1004                 return NULL;
1005
1006         action->action_type = action_type;
1007         refcount_set(&action->refcount, 1);
1008         action->data = action + 1;
1009
1010         return action;
1011 }
1012
1013 struct mlx5dr_action *mlx5dr_action_create_drop(void)
1014 {
1015         return dr_action_create_generic(DR_ACTION_TYP_DROP);
1016 }
1017
1018 struct mlx5dr_action *
1019 mlx5dr_action_create_dest_table_num(struct mlx5dr_domain *dmn, u32 table_num)
1020 {
1021         struct mlx5dr_action *action;
1022
1023         action = dr_action_create_generic(DR_ACTION_TYP_FT);
1024         if (!action)
1025                 return NULL;
1026
1027         action->dest_tbl->is_fw_tbl = true;
1028         action->dest_tbl->fw_tbl.dmn = dmn;
1029         action->dest_tbl->fw_tbl.id = table_num;
1030         action->dest_tbl->fw_tbl.type = FS_FT_FDB;
1031         refcount_inc(&dmn->refcount);
1032
1033         return action;
1034 }
1035
1036 struct mlx5dr_action *
1037 mlx5dr_action_create_dest_table(struct mlx5dr_table *tbl)
1038 {
1039         struct mlx5dr_action *action;
1040
1041         refcount_inc(&tbl->refcount);
1042
1043         action = dr_action_create_generic(DR_ACTION_TYP_FT);
1044         if (!action)
1045                 goto dec_ref;
1046
1047         action->dest_tbl->tbl = tbl;
1048
1049         return action;
1050
1051 dec_ref:
1052         refcount_dec(&tbl->refcount);
1053         return NULL;
1054 }
1055
1056 static void dr_action_range_definer_fill(u16 *format_id,
1057                                          u8 *dw_selectors,
1058                                          u8 *byte_selectors,
1059                                          u8 *match_mask)
1060 {
1061         int i;
1062
1063         *format_id = MLX5_IFC_DEFINER_FORMAT_ID_SELECT;
1064
1065         dw_selectors[0] = MLX5_IFC_DEFINER_FORMAT_OFFSET_OUTER_ETH_PKT_LEN / 4;
1066
1067         for (i = 1; i < MLX5_IFC_DEFINER_DW_SELECTORS_NUM; i++)
1068                 dw_selectors[i] = MLX5_IFC_DEFINER_FORMAT_OFFSET_UNUSED;
1069
1070         for (i = 0; i < MLX5_IFC_DEFINER_BYTE_SELECTORS_NUM; i++)
1071                 byte_selectors[i] = MLX5_IFC_DEFINER_FORMAT_OFFSET_UNUSED;
1072
1073         MLX5_SET(match_definer_match_mask, match_mask,
1074                  match_dw_0, 0xffffUL << 16);
1075 }
1076
1077 static int dr_action_create_range_definer(struct mlx5dr_action *action)
1078 {
1079         u8 match_mask[MLX5_FLD_SZ_BYTES(match_definer, match_mask)] = {};
1080         u8 byte_selectors[MLX5_IFC_DEFINER_BYTE_SELECTORS_NUM] = {};
1081         u8 dw_selectors[MLX5_IFC_DEFINER_DW_SELECTORS_NUM] = {};
1082         struct mlx5dr_domain *dmn = action->range->dmn;
1083         u32 definer_id;
1084         u16 format_id;
1085         int ret;
1086
1087         dr_action_range_definer_fill(&format_id,
1088                                      dw_selectors,
1089                                      byte_selectors,
1090                                      match_mask);
1091
1092         ret = mlx5dr_definer_get(dmn, format_id,
1093                                  dw_selectors, byte_selectors,
1094                                  match_mask, &definer_id);
1095         if (ret)
1096                 return ret;
1097
1098         action->range->definer_id = definer_id;
1099         return 0;
1100 }
1101
1102 static void dr_action_destroy_range_definer(struct mlx5dr_action *action)
1103 {
1104         mlx5dr_definer_put(action->range->dmn, action->range->definer_id);
1105 }
1106
1107 struct mlx5dr_action *
1108 mlx5dr_action_create_dest_match_range(struct mlx5dr_domain *dmn,
1109                                       u32 field,
1110                                       struct mlx5_flow_table *hit_ft,
1111                                       struct mlx5_flow_table *miss_ft,
1112                                       u32 min,
1113                                       u32 max)
1114 {
1115         struct mlx5dr_action *action;
1116         int ret;
1117
1118         if (!mlx5dr_supp_match_ranges(dmn->mdev)) {
1119                 mlx5dr_dbg(dmn, "SELECT definer support is needed for match range\n");
1120                 return NULL;
1121         }
1122
1123         if (field != MLX5_FLOW_DEST_RANGE_FIELD_PKT_LEN ||
1124             min > 0xffff || max > 0xffff) {
1125                 mlx5dr_err(dmn, "Invalid match range parameters\n");
1126                 return NULL;
1127         }
1128
1129         action = dr_action_create_generic(DR_ACTION_TYP_RANGE);
1130         if (!action)
1131                 return NULL;
1132
1133         action->range->hit_tbl_action =
1134                 mlx5dr_is_fw_table(hit_ft) ?
1135                         mlx5dr_action_create_dest_flow_fw_table(dmn, hit_ft) :
1136                         mlx5dr_action_create_dest_table(hit_ft->fs_dr_table.dr_table);
1137
1138         if (!action->range->hit_tbl_action)
1139                 goto free_action;
1140
1141         action->range->miss_tbl_action =
1142                 mlx5dr_is_fw_table(miss_ft) ?
1143                         mlx5dr_action_create_dest_flow_fw_table(dmn, miss_ft) :
1144                         mlx5dr_action_create_dest_table(miss_ft->fs_dr_table.dr_table);
1145
1146         if (!action->range->miss_tbl_action)
1147                 goto free_hit_tbl_action;
1148
1149         action->range->min = min;
1150         action->range->max = max;
1151         action->range->dmn = dmn;
1152
1153         ret = dr_action_create_range_definer(action);
1154         if (ret)
1155                 goto free_miss_tbl_action;
1156
1157         /* No need to increase refcount on domain for this action,
1158          * the hit/miss table actions will do it internally.
1159          */
1160
1161         return action;
1162
1163 free_miss_tbl_action:
1164         mlx5dr_action_destroy(action->range->miss_tbl_action);
1165 free_hit_tbl_action:
1166         mlx5dr_action_destroy(action->range->hit_tbl_action);
1167 free_action:
1168         kfree(action);
1169
1170         return NULL;
1171 }
1172
1173 struct mlx5dr_action *
1174 mlx5dr_action_create_mult_dest_tbl(struct mlx5dr_domain *dmn,
1175                                    struct mlx5dr_action_dest *dests,
1176                                    u32 num_of_dests,
1177                                    bool ignore_flow_level,
1178                                    u32 flow_source)
1179 {
1180         struct mlx5dr_cmd_flow_destination_hw_info *hw_dests;
1181         struct mlx5dr_action **ref_actions;
1182         struct mlx5dr_action *action;
1183         bool reformat_req = false;
1184         bool is_ft_wire = false;
1185         u16 num_dst_ft = 0;
1186         u32 num_of_ref = 0;
1187         u32 ref_act_cnt;
1188         u16 last_dest;
1189         int ret;
1190         int i;
1191
1192         if (dmn->type != MLX5DR_DOMAIN_TYPE_FDB) {
1193                 mlx5dr_err(dmn, "Multiple destination support is for FDB only\n");
1194                 return NULL;
1195         }
1196
1197         hw_dests = kcalloc(num_of_dests, sizeof(*hw_dests), GFP_KERNEL);
1198         if (!hw_dests)
1199                 return NULL;
1200
1201         if (unlikely(check_mul_overflow(num_of_dests, 2u, &ref_act_cnt)))
1202                 goto free_hw_dests;
1203
1204         ref_actions = kcalloc(ref_act_cnt, sizeof(*ref_actions), GFP_KERNEL);
1205         if (!ref_actions)
1206                 goto free_hw_dests;
1207
1208         for (i = 0; i < num_of_dests; i++) {
1209                 struct mlx5dr_action *reformat_action = dests[i].reformat;
1210                 struct mlx5dr_action *dest_action = dests[i].dest;
1211
1212                 ref_actions[num_of_ref++] = dest_action;
1213
1214                 switch (dest_action->action_type) {
1215                 case DR_ACTION_TYP_VPORT:
1216                         hw_dests[i].vport.flags = MLX5_FLOW_DEST_VPORT_VHCA_ID;
1217                         hw_dests[i].type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
1218                         hw_dests[i].vport.num = dest_action->vport->caps->num;
1219                         hw_dests[i].vport.vhca_id = dest_action->vport->caps->vhca_gvmi;
1220                         if (reformat_action) {
1221                                 reformat_req = true;
1222                                 hw_dests[i].vport.reformat_id =
1223                                         reformat_action->reformat->id;
1224                                 ref_actions[num_of_ref++] = reformat_action;
1225                                 hw_dests[i].vport.flags |= MLX5_FLOW_DEST_VPORT_REFORMAT_ID;
1226                         }
1227                         break;
1228
1229                 case DR_ACTION_TYP_FT:
1230                         if (num_dst_ft &&
1231                             !mlx5dr_action_supp_fwd_fdb_multi_ft(dmn->mdev)) {
1232                                 mlx5dr_dbg(dmn, "multiple FT destinations not supported\n");
1233                                 goto free_ref_actions;
1234                         }
1235                         num_dst_ft++;
1236                         hw_dests[i].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
1237                         if (dest_action->dest_tbl->is_fw_tbl) {
1238                                 hw_dests[i].ft_id = dest_action->dest_tbl->fw_tbl.id;
1239                         } else {
1240                                 hw_dests[i].ft_id = dest_action->dest_tbl->tbl->table_id;
1241                                 if (dest_action->dest_tbl->is_wire_ft) {
1242                                         is_ft_wire = true;
1243                                         last_dest = i;
1244                                 }
1245                         }
1246                         break;
1247
1248                 default:
1249                         mlx5dr_dbg(dmn, "Invalid multiple destinations action\n");
1250                         goto free_ref_actions;
1251                 }
1252         }
1253
1254         /* In multidest, the FW does the iterator in the RX except of the last
1255          * one that done in the TX.
1256          * So, if one of the ft target is wire, put it at the end of the dest list.
1257          */
1258         if (is_ft_wire && num_dst_ft > 1)
1259                 swap(hw_dests[last_dest], hw_dests[num_of_dests - 1]);
1260
1261         action = dr_action_create_generic(DR_ACTION_TYP_FT);
1262         if (!action)
1263                 goto free_ref_actions;
1264
1265         ret = mlx5dr_fw_create_md_tbl(dmn,
1266                                       hw_dests,
1267                                       num_of_dests,
1268                                       reformat_req,
1269                                       &action->dest_tbl->fw_tbl.id,
1270                                       &action->dest_tbl->fw_tbl.group_id,
1271                                       ignore_flow_level,
1272                                       flow_source);
1273         if (ret)
1274                 goto free_action;
1275
1276         refcount_inc(&dmn->refcount);
1277
1278         for (i = 0; i < num_of_ref; i++)
1279                 refcount_inc(&ref_actions[i]->refcount);
1280
1281         action->dest_tbl->is_fw_tbl = true;
1282         action->dest_tbl->fw_tbl.dmn = dmn;
1283         action->dest_tbl->fw_tbl.type = FS_FT_FDB;
1284         action->dest_tbl->fw_tbl.ref_actions = ref_actions;
1285         action->dest_tbl->fw_tbl.num_of_ref_actions = num_of_ref;
1286
1287         kfree(hw_dests);
1288
1289         return action;
1290
1291 free_action:
1292         kfree(action);
1293 free_ref_actions:
1294         kfree(ref_actions);
1295 free_hw_dests:
1296         kfree(hw_dests);
1297         return NULL;
1298 }
1299
1300 struct mlx5dr_action *
1301 mlx5dr_action_create_dest_flow_fw_table(struct mlx5dr_domain *dmn,
1302                                         struct mlx5_flow_table *ft)
1303 {
1304         struct mlx5dr_action *action;
1305
1306         action = dr_action_create_generic(DR_ACTION_TYP_FT);
1307         if (!action)
1308                 return NULL;
1309
1310         action->dest_tbl->is_fw_tbl = 1;
1311         action->dest_tbl->fw_tbl.type = ft->type;
1312         action->dest_tbl->fw_tbl.id = ft->id;
1313         action->dest_tbl->fw_tbl.dmn = dmn;
1314
1315         refcount_inc(&dmn->refcount);
1316
1317         return action;
1318 }
1319
1320 struct mlx5dr_action *
1321 mlx5dr_action_create_flow_counter(u32 counter_id)
1322 {
1323         struct mlx5dr_action *action;
1324
1325         action = dr_action_create_generic(DR_ACTION_TYP_CTR);
1326         if (!action)
1327                 return NULL;
1328
1329         action->ctr->ctr_id = counter_id;
1330
1331         return action;
1332 }
1333
1334 struct mlx5dr_action *mlx5dr_action_create_tag(u32 tag_value)
1335 {
1336         struct mlx5dr_action *action;
1337
1338         action = dr_action_create_generic(DR_ACTION_TYP_TAG);
1339         if (!action)
1340                 return NULL;
1341
1342         action->flow_tag->flow_tag = tag_value & 0xffffff;
1343
1344         return action;
1345 }
1346
1347 struct mlx5dr_action *
1348 mlx5dr_action_create_flow_sampler(struct mlx5dr_domain *dmn, u32 sampler_id)
1349 {
1350         struct mlx5dr_action *action;
1351         u64 icm_rx, icm_tx;
1352         int ret;
1353
1354         ret = mlx5dr_cmd_query_flow_sampler(dmn->mdev, sampler_id,
1355                                             &icm_rx, &icm_tx);
1356         if (ret)
1357                 return NULL;
1358
1359         action = dr_action_create_generic(DR_ACTION_TYP_SAMPLER);
1360         if (!action)
1361                 return NULL;
1362
1363         action->sampler->dmn = dmn;
1364         action->sampler->sampler_id = sampler_id;
1365         action->sampler->rx_icm_addr = icm_rx;
1366         action->sampler->tx_icm_addr = icm_tx;
1367
1368         refcount_inc(&dmn->refcount);
1369         return action;
1370 }
1371
1372 static int
1373 dr_action_verify_reformat_params(enum mlx5dr_action_type reformat_type,
1374                                  struct mlx5dr_domain *dmn,
1375                                  u8 reformat_param_0,
1376                                  u8 reformat_param_1,
1377                                  size_t data_sz,
1378                                  void *data)
1379 {
1380         if (reformat_type == DR_ACTION_TYP_INSERT_HDR) {
1381                 if ((!data && data_sz) || (data && !data_sz) ||
1382                     MLX5_CAP_GEN_2(dmn->mdev, max_reformat_insert_size) < data_sz ||
1383                     MLX5_CAP_GEN_2(dmn->mdev, max_reformat_insert_offset) < reformat_param_1) {
1384                         mlx5dr_dbg(dmn, "Invalid reformat parameters for INSERT_HDR\n");
1385                         goto out_err;
1386                 }
1387         } else if (reformat_type == DR_ACTION_TYP_REMOVE_HDR) {
1388                 if (data ||
1389                     MLX5_CAP_GEN_2(dmn->mdev, max_reformat_remove_size) < data_sz ||
1390                     MLX5_CAP_GEN_2(dmn->mdev, max_reformat_remove_offset) < reformat_param_1) {
1391                         mlx5dr_dbg(dmn, "Invalid reformat parameters for REMOVE_HDR\n");
1392                         goto out_err;
1393                 }
1394         } else if (reformat_param_0 || reformat_param_1 ||
1395                    reformat_type > DR_ACTION_TYP_REMOVE_HDR) {
1396                 mlx5dr_dbg(dmn, "Invalid reformat parameters\n");
1397                 goto out_err;
1398         }
1399
1400         if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB)
1401                 return 0;
1402
1403         if (dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX) {
1404                 if (reformat_type != DR_ACTION_TYP_TNL_L2_TO_L2 &&
1405                     reformat_type != DR_ACTION_TYP_TNL_L3_TO_L2) {
1406                         mlx5dr_dbg(dmn, "Action reformat type not support on RX domain\n");
1407                         goto out_err;
1408                 }
1409         } else if (dmn->type == MLX5DR_DOMAIN_TYPE_NIC_TX) {
1410                 if (reformat_type != DR_ACTION_TYP_L2_TO_TNL_L2 &&
1411                     reformat_type != DR_ACTION_TYP_L2_TO_TNL_L3) {
1412                         mlx5dr_dbg(dmn, "Action reformat type not support on TX domain\n");
1413                         goto out_err;
1414                 }
1415         }
1416
1417         return 0;
1418
1419 out_err:
1420         return -EINVAL;
1421 }
1422
1423 static int
1424 dr_action_create_reformat_action(struct mlx5dr_domain *dmn,
1425                                  u8 reformat_param_0, u8 reformat_param_1,
1426                                  size_t data_sz, void *data,
1427                                  struct mlx5dr_action *action)
1428 {
1429         u32 reformat_id;
1430         int ret;
1431
1432         switch (action->action_type) {
1433         case DR_ACTION_TYP_L2_TO_TNL_L2:
1434         case DR_ACTION_TYP_L2_TO_TNL_L3:
1435         {
1436                 enum mlx5_reformat_ctx_type rt;
1437
1438                 if (action->action_type == DR_ACTION_TYP_L2_TO_TNL_L2)
1439                         rt = MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL;
1440                 else
1441                         rt = MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
1442
1443                 ret = mlx5dr_cmd_create_reformat_ctx(dmn->mdev, rt, 0, 0,
1444                                                      data_sz, data,
1445                                                      &reformat_id);
1446                 if (ret)
1447                         return ret;
1448
1449                 action->reformat->id = reformat_id;
1450                 action->reformat->size = data_sz;
1451                 return 0;
1452         }
1453         case DR_ACTION_TYP_TNL_L2_TO_L2:
1454         {
1455                 return 0;
1456         }
1457         case DR_ACTION_TYP_TNL_L3_TO_L2:
1458         {
1459                 u8 *hw_actions;
1460
1461                 hw_actions = kzalloc(DR_ACTION_CACHE_LINE_SIZE, GFP_KERNEL);
1462                 if (!hw_actions)
1463                         return -ENOMEM;
1464
1465                 ret = mlx5dr_ste_set_action_decap_l3_list(dmn->ste_ctx,
1466                                                           data, data_sz,
1467                                                           hw_actions,
1468                                                           DR_ACTION_CACHE_LINE_SIZE,
1469                                                           &action->rewrite->num_of_actions);
1470                 if (ret) {
1471                         mlx5dr_dbg(dmn, "Failed creating decap l3 action list\n");
1472                         kfree(hw_actions);
1473                         return ret;
1474                 }
1475
1476                 action->rewrite->data = hw_actions;
1477                 action->rewrite->dmn = dmn;
1478
1479                 ret = mlx5dr_ste_alloc_modify_hdr(action);
1480                 if (ret) {
1481                         mlx5dr_dbg(dmn, "Failed preparing reformat data\n");
1482                         kfree(hw_actions);
1483                         return ret;
1484                 }
1485                 return 0;
1486         }
1487         case DR_ACTION_TYP_INSERT_HDR:
1488                 ret = mlx5dr_cmd_create_reformat_ctx(dmn->mdev,
1489                                                      MLX5_REFORMAT_TYPE_INSERT_HDR,
1490                                                      reformat_param_0,
1491                                                      reformat_param_1,
1492                                                      data_sz, data,
1493                                                      &reformat_id);
1494                 if (ret)
1495                         return ret;
1496
1497                 action->reformat->id = reformat_id;
1498                 action->reformat->size = data_sz;
1499                 action->reformat->param_0 = reformat_param_0;
1500                 action->reformat->param_1 = reformat_param_1;
1501                 return 0;
1502         case DR_ACTION_TYP_REMOVE_HDR:
1503                 action->reformat->id = 0;
1504                 action->reformat->size = data_sz;
1505                 action->reformat->param_0 = reformat_param_0;
1506                 action->reformat->param_1 = reformat_param_1;
1507                 return 0;
1508         default:
1509                 mlx5dr_info(dmn, "Reformat type is not supported %d\n", action->action_type);
1510                 return -EINVAL;
1511         }
1512 }
1513
1514 #define CVLAN_ETHERTYPE 0x8100
1515 #define SVLAN_ETHERTYPE 0x88a8
1516
1517 struct mlx5dr_action *mlx5dr_action_create_pop_vlan(void)
1518 {
1519         return dr_action_create_generic(DR_ACTION_TYP_POP_VLAN);
1520 }
1521
1522 struct mlx5dr_action *mlx5dr_action_create_push_vlan(struct mlx5dr_domain *dmn,
1523                                                      __be32 vlan_hdr)
1524 {
1525         u32 vlan_hdr_h = ntohl(vlan_hdr);
1526         u16 ethertype = vlan_hdr_h >> 16;
1527         struct mlx5dr_action *action;
1528
1529         if (ethertype != SVLAN_ETHERTYPE && ethertype != CVLAN_ETHERTYPE) {
1530                 mlx5dr_dbg(dmn, "Invalid vlan ethertype\n");
1531                 return NULL;
1532         }
1533
1534         action = dr_action_create_generic(DR_ACTION_TYP_PUSH_VLAN);
1535         if (!action)
1536                 return NULL;
1537
1538         action->push_vlan->vlan_hdr = vlan_hdr_h;
1539         return action;
1540 }
1541
1542 struct mlx5dr_action *
1543 mlx5dr_action_create_packet_reformat(struct mlx5dr_domain *dmn,
1544                                      enum mlx5dr_action_reformat_type reformat_type,
1545                                      u8 reformat_param_0,
1546                                      u8 reformat_param_1,
1547                                      size_t data_sz,
1548                                      void *data)
1549 {
1550         enum mlx5dr_action_type action_type;
1551         struct mlx5dr_action *action;
1552         int ret;
1553
1554         refcount_inc(&dmn->refcount);
1555
1556         /* General checks */
1557         ret = dr_action_reformat_to_action_type(reformat_type, &action_type);
1558         if (ret) {
1559                 mlx5dr_dbg(dmn, "Invalid reformat_type provided\n");
1560                 goto dec_ref;
1561         }
1562
1563         ret = dr_action_verify_reformat_params(action_type, dmn,
1564                                                reformat_param_0, reformat_param_1,
1565                                                data_sz, data);
1566         if (ret)
1567                 goto dec_ref;
1568
1569         action = dr_action_create_generic(action_type);
1570         if (!action)
1571                 goto dec_ref;
1572
1573         action->reformat->dmn = dmn;
1574
1575         ret = dr_action_create_reformat_action(dmn,
1576                                                reformat_param_0,
1577                                                reformat_param_1,
1578                                                data_sz,
1579                                                data,
1580                                                action);
1581         if (ret) {
1582                 mlx5dr_dbg(dmn, "Failed creating reformat action %d\n", ret);
1583                 goto free_action;
1584         }
1585
1586         return action;
1587
1588 free_action:
1589         kfree(action);
1590 dec_ref:
1591         refcount_dec(&dmn->refcount);
1592         return NULL;
1593 }
1594
1595 static int
1596 dr_action_modify_sw_to_hw_add(struct mlx5dr_domain *dmn,
1597                               __be64 *sw_action,
1598                               __be64 *hw_action,
1599                               const struct mlx5dr_ste_action_modify_field **ret_hw_info)
1600 {
1601         const struct mlx5dr_ste_action_modify_field *hw_action_info;
1602         u8 max_length;
1603         u16 sw_field;
1604         u32 data;
1605
1606         /* Get SW modify action data */
1607         sw_field = MLX5_GET(set_action_in, sw_action, field);
1608         data = MLX5_GET(set_action_in, sw_action, data);
1609
1610         /* Convert SW data to HW modify action format */
1611         hw_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, sw_field);
1612         if (!hw_action_info) {
1613                 mlx5dr_dbg(dmn, "Modify add action invalid field given\n");
1614                 return -EINVAL;
1615         }
1616
1617         max_length = hw_action_info->end - hw_action_info->start + 1;
1618
1619         mlx5dr_ste_set_action_add(dmn->ste_ctx,
1620                                   hw_action,
1621                                   hw_action_info->hw_field,
1622                                   hw_action_info->start,
1623                                   max_length,
1624                                   data);
1625
1626         *ret_hw_info = hw_action_info;
1627
1628         return 0;
1629 }
1630
1631 static int
1632 dr_action_modify_sw_to_hw_set(struct mlx5dr_domain *dmn,
1633                               __be64 *sw_action,
1634                               __be64 *hw_action,
1635                               const struct mlx5dr_ste_action_modify_field **ret_hw_info)
1636 {
1637         const struct mlx5dr_ste_action_modify_field *hw_action_info;
1638         u8 offset, length, max_length;
1639         u16 sw_field;
1640         u32 data;
1641
1642         /* Get SW modify action data */
1643         length = MLX5_GET(set_action_in, sw_action, length);
1644         offset = MLX5_GET(set_action_in, sw_action, offset);
1645         sw_field = MLX5_GET(set_action_in, sw_action, field);
1646         data = MLX5_GET(set_action_in, sw_action, data);
1647
1648         /* Convert SW data to HW modify action format */
1649         hw_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, sw_field);
1650         if (!hw_action_info) {
1651                 mlx5dr_dbg(dmn, "Modify set action invalid field given\n");
1652                 return -EINVAL;
1653         }
1654
1655         /* PRM defines that length zero specific length of 32bits */
1656         length = length ? length : 32;
1657
1658         max_length = hw_action_info->end - hw_action_info->start + 1;
1659
1660         if (length + offset > max_length) {
1661                 mlx5dr_dbg(dmn, "Modify action length + offset exceeds limit\n");
1662                 return -EINVAL;
1663         }
1664
1665         mlx5dr_ste_set_action_set(dmn->ste_ctx,
1666                                   hw_action,
1667                                   hw_action_info->hw_field,
1668                                   hw_action_info->start + offset,
1669                                   length,
1670                                   data);
1671
1672         *ret_hw_info = hw_action_info;
1673
1674         return 0;
1675 }
1676
1677 static int
1678 dr_action_modify_sw_to_hw_copy(struct mlx5dr_domain *dmn,
1679                                __be64 *sw_action,
1680                                __be64 *hw_action,
1681                                const struct mlx5dr_ste_action_modify_field **ret_dst_hw_info,
1682                                const struct mlx5dr_ste_action_modify_field **ret_src_hw_info)
1683 {
1684         u8 src_offset, dst_offset, src_max_length, dst_max_length, length;
1685         const struct mlx5dr_ste_action_modify_field *hw_dst_action_info;
1686         const struct mlx5dr_ste_action_modify_field *hw_src_action_info;
1687         u16 src_field, dst_field;
1688
1689         /* Get SW modify action data */
1690         src_field = MLX5_GET(copy_action_in, sw_action, src_field);
1691         dst_field = MLX5_GET(copy_action_in, sw_action, dst_field);
1692         src_offset = MLX5_GET(copy_action_in, sw_action, src_offset);
1693         dst_offset = MLX5_GET(copy_action_in, sw_action, dst_offset);
1694         length = MLX5_GET(copy_action_in, sw_action, length);
1695
1696         /* Convert SW data to HW modify action format */
1697         hw_src_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, src_field);
1698         hw_dst_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, dst_field);
1699         if (!hw_src_action_info || !hw_dst_action_info) {
1700                 mlx5dr_dbg(dmn, "Modify copy action invalid field given\n");
1701                 return -EINVAL;
1702         }
1703
1704         /* PRM defines that length zero specific length of 32bits */
1705         length = length ? length : 32;
1706
1707         src_max_length = hw_src_action_info->end -
1708                          hw_src_action_info->start + 1;
1709         dst_max_length = hw_dst_action_info->end -
1710                          hw_dst_action_info->start + 1;
1711
1712         if (length + src_offset > src_max_length ||
1713             length + dst_offset > dst_max_length) {
1714                 mlx5dr_dbg(dmn, "Modify action length + offset exceeds limit\n");
1715                 return -EINVAL;
1716         }
1717
1718         mlx5dr_ste_set_action_copy(dmn->ste_ctx,
1719                                    hw_action,
1720                                    hw_dst_action_info->hw_field,
1721                                    hw_dst_action_info->start + dst_offset,
1722                                    length,
1723                                    hw_src_action_info->hw_field,
1724                                    hw_src_action_info->start + src_offset);
1725
1726         *ret_dst_hw_info = hw_dst_action_info;
1727         *ret_src_hw_info = hw_src_action_info;
1728
1729         return 0;
1730 }
1731
1732 static int
1733 dr_action_modify_sw_to_hw(struct mlx5dr_domain *dmn,
1734                           __be64 *sw_action,
1735                           __be64 *hw_action,
1736                           const struct mlx5dr_ste_action_modify_field **ret_dst_hw_info,
1737                           const struct mlx5dr_ste_action_modify_field **ret_src_hw_info)
1738 {
1739         u8 action;
1740         int ret;
1741
1742         *hw_action = 0;
1743         *ret_src_hw_info = NULL;
1744
1745         /* Get SW modify action type */
1746         action = MLX5_GET(set_action_in, sw_action, action_type);
1747
1748         switch (action) {
1749         case MLX5_ACTION_TYPE_SET:
1750                 ret = dr_action_modify_sw_to_hw_set(dmn, sw_action,
1751                                                     hw_action,
1752                                                     ret_dst_hw_info);
1753                 break;
1754
1755         case MLX5_ACTION_TYPE_ADD:
1756                 ret = dr_action_modify_sw_to_hw_add(dmn, sw_action,
1757                                                     hw_action,
1758                                                     ret_dst_hw_info);
1759                 break;
1760
1761         case MLX5_ACTION_TYPE_COPY:
1762                 ret = dr_action_modify_sw_to_hw_copy(dmn, sw_action,
1763                                                      hw_action,
1764                                                      ret_dst_hw_info,
1765                                                      ret_src_hw_info);
1766                 break;
1767
1768         default:
1769                 mlx5dr_info(dmn, "Unsupported action_type for modify action\n");
1770                 ret = -EOPNOTSUPP;
1771         }
1772
1773         return ret;
1774 }
1775
1776 static int
1777 dr_action_modify_check_set_field_limitation(struct mlx5dr_action *action,
1778                                             const __be64 *sw_action)
1779 {
1780         u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1781         struct mlx5dr_domain *dmn = action->rewrite->dmn;
1782
1783         if (sw_field == MLX5_ACTION_IN_FIELD_METADATA_REG_A) {
1784                 action->rewrite->allow_rx = 0;
1785                 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_TX) {
1786                         mlx5dr_dbg(dmn, "Unsupported field %d for RX/FDB set action\n",
1787                                    sw_field);
1788                         return -EINVAL;
1789                 }
1790         } else if (sw_field == MLX5_ACTION_IN_FIELD_METADATA_REG_B) {
1791                 action->rewrite->allow_tx = 0;
1792                 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_RX) {
1793                         mlx5dr_dbg(dmn, "Unsupported field %d for TX/FDB set action\n",
1794                                    sw_field);
1795                         return -EINVAL;
1796                 }
1797         }
1798
1799         if (!action->rewrite->allow_rx && !action->rewrite->allow_tx) {
1800                 mlx5dr_dbg(dmn, "Modify SET actions not supported on both RX and TX\n");
1801                 return -EINVAL;
1802         }
1803
1804         return 0;
1805 }
1806
1807 static int
1808 dr_action_modify_check_add_field_limitation(struct mlx5dr_action *action,
1809                                             const __be64 *sw_action)
1810 {
1811         u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1812         struct mlx5dr_domain *dmn = action->rewrite->dmn;
1813
1814         if (sw_field != MLX5_ACTION_IN_FIELD_OUT_IP_TTL &&
1815             sw_field != MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT &&
1816             sw_field != MLX5_ACTION_IN_FIELD_OUT_TCP_SEQ_NUM &&
1817             sw_field != MLX5_ACTION_IN_FIELD_OUT_TCP_ACK_NUM) {
1818                 mlx5dr_dbg(dmn, "Unsupported field %d for add action\n",
1819                            sw_field);
1820                 return -EINVAL;
1821         }
1822
1823         return 0;
1824 }
1825
1826 static int
1827 dr_action_modify_check_copy_field_limitation(struct mlx5dr_action *action,
1828                                              const __be64 *sw_action)
1829 {
1830         struct mlx5dr_domain *dmn = action->rewrite->dmn;
1831         u16 sw_fields[2];
1832         int i;
1833
1834         sw_fields[0] = MLX5_GET(copy_action_in, sw_action, src_field);
1835         sw_fields[1] = MLX5_GET(copy_action_in, sw_action, dst_field);
1836
1837         for (i = 0; i < 2; i++) {
1838                 if (sw_fields[i] == MLX5_ACTION_IN_FIELD_METADATA_REG_A) {
1839                         action->rewrite->allow_rx = 0;
1840                         if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_TX) {
1841                                 mlx5dr_dbg(dmn, "Unsupported field %d for RX/FDB set action\n",
1842                                            sw_fields[i]);
1843                                 return -EINVAL;
1844                         }
1845                 } else if (sw_fields[i] == MLX5_ACTION_IN_FIELD_METADATA_REG_B) {
1846                         action->rewrite->allow_tx = 0;
1847                         if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_RX) {
1848                                 mlx5dr_dbg(dmn, "Unsupported field %d for TX/FDB set action\n",
1849                                            sw_fields[i]);
1850                                 return -EINVAL;
1851                         }
1852                 }
1853         }
1854
1855         if (!action->rewrite->allow_rx && !action->rewrite->allow_tx) {
1856                 mlx5dr_dbg(dmn, "Modify copy actions not supported on both RX and TX\n");
1857                 return -EINVAL;
1858         }
1859
1860         return 0;
1861 }
1862
1863 static int
1864 dr_action_modify_check_field_limitation(struct mlx5dr_action *action,
1865                                         const __be64 *sw_action)
1866 {
1867         struct mlx5dr_domain *dmn = action->rewrite->dmn;
1868         u8 action_type;
1869         int ret;
1870
1871         action_type = MLX5_GET(set_action_in, sw_action, action_type);
1872
1873         switch (action_type) {
1874         case MLX5_ACTION_TYPE_SET:
1875                 ret = dr_action_modify_check_set_field_limitation(action,
1876                                                                   sw_action);
1877                 break;
1878
1879         case MLX5_ACTION_TYPE_ADD:
1880                 ret = dr_action_modify_check_add_field_limitation(action,
1881                                                                   sw_action);
1882                 break;
1883
1884         case MLX5_ACTION_TYPE_COPY:
1885                 ret = dr_action_modify_check_copy_field_limitation(action,
1886                                                                    sw_action);
1887                 break;
1888
1889         default:
1890                 mlx5dr_info(dmn, "Unsupported action %d modify action\n",
1891                             action_type);
1892                 ret = -EOPNOTSUPP;
1893         }
1894
1895         return ret;
1896 }
1897
1898 static bool
1899 dr_action_modify_check_is_ttl_modify(const void *sw_action)
1900 {
1901         u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1902
1903         return sw_field == MLX5_ACTION_IN_FIELD_OUT_IP_TTL;
1904 }
1905
1906 static int dr_actions_convert_modify_header(struct mlx5dr_action *action,
1907                                             u32 max_hw_actions,
1908                                             u32 num_sw_actions,
1909                                             __be64 sw_actions[],
1910                                             __be64 hw_actions[],
1911                                             u32 *num_hw_actions,
1912                                             bool *modify_ttl)
1913 {
1914         const struct mlx5dr_ste_action_modify_field *hw_dst_action_info;
1915         const struct mlx5dr_ste_action_modify_field *hw_src_action_info;
1916         struct mlx5dr_domain *dmn = action->rewrite->dmn;
1917         __be64 *modify_ttl_sw_action = NULL;
1918         int ret, i, hw_idx = 0;
1919         __be64 *sw_action;
1920         __be64 hw_action;
1921         u16 hw_field = 0;
1922         u32 l3_type = 0;
1923         u32 l4_type = 0;
1924
1925         *modify_ttl = false;
1926
1927         action->rewrite->allow_rx = 1;
1928         action->rewrite->allow_tx = 1;
1929
1930         for (i = 0; i < num_sw_actions || modify_ttl_sw_action; i++) {
1931                 /* modify TTL is handled separately, as a last action */
1932                 if (i == num_sw_actions) {
1933                         sw_action = modify_ttl_sw_action;
1934                         modify_ttl_sw_action = NULL;
1935                 } else {
1936                         sw_action = &sw_actions[i];
1937                 }
1938
1939                 ret = dr_action_modify_check_field_limitation(action,
1940                                                               sw_action);
1941                 if (ret)
1942                         return ret;
1943
1944                 if (!(*modify_ttl) &&
1945                     dr_action_modify_check_is_ttl_modify(sw_action)) {
1946                         modify_ttl_sw_action = sw_action;
1947                         *modify_ttl = true;
1948                         continue;
1949                 }
1950
1951                 /* Convert SW action to HW action */
1952                 ret = dr_action_modify_sw_to_hw(dmn,
1953                                                 sw_action,
1954                                                 &hw_action,
1955                                                 &hw_dst_action_info,
1956                                                 &hw_src_action_info);
1957                 if (ret)
1958                         return ret;
1959
1960                 /* Due to a HW limitation we cannot modify 2 different L3 types */
1961                 if (l3_type && hw_dst_action_info->l3_type &&
1962                     hw_dst_action_info->l3_type != l3_type) {
1963                         mlx5dr_dbg(dmn, "Action list can't support two different L3 types\n");
1964                         return -EINVAL;
1965                 }
1966                 if (hw_dst_action_info->l3_type)
1967                         l3_type = hw_dst_action_info->l3_type;
1968
1969                 /* Due to a HW limitation we cannot modify two different L4 types */
1970                 if (l4_type && hw_dst_action_info->l4_type &&
1971                     hw_dst_action_info->l4_type != l4_type) {
1972                         mlx5dr_dbg(dmn, "Action list can't support two different L4 types\n");
1973                         return -EINVAL;
1974                 }
1975                 if (hw_dst_action_info->l4_type)
1976                         l4_type = hw_dst_action_info->l4_type;
1977
1978                 /* HW reads and executes two actions at once this means we
1979                  * need to create a gap if two actions access the same field
1980                  */
1981                 if ((hw_idx % 2) && (hw_field == hw_dst_action_info->hw_field ||
1982                                      (hw_src_action_info &&
1983                                       hw_field == hw_src_action_info->hw_field))) {
1984                         /* Check if after gap insertion the total number of HW
1985                          * modify actions doesn't exceeds the limit
1986                          */
1987                         hw_idx++;
1988                         if (hw_idx >= max_hw_actions) {
1989                                 mlx5dr_dbg(dmn, "Modify header action number exceeds HW limit\n");
1990                                 return -EINVAL;
1991                         }
1992                 }
1993                 hw_field = hw_dst_action_info->hw_field;
1994
1995                 hw_actions[hw_idx] = hw_action;
1996                 hw_idx++;
1997         }
1998
1999         /* if the resulting HW actions list is empty, add NOP action */
2000         if (!hw_idx)
2001                 hw_idx++;
2002
2003         *num_hw_actions = hw_idx;
2004
2005         return 0;
2006 }
2007
2008 static int dr_action_create_modify_action(struct mlx5dr_domain *dmn,
2009                                           size_t actions_sz,
2010                                           __be64 actions[],
2011                                           struct mlx5dr_action *action)
2012 {
2013         u32 max_hw_actions;
2014         u32 num_hw_actions;
2015         u32 num_sw_actions;
2016         __be64 *hw_actions;
2017         bool modify_ttl;
2018         int ret;
2019
2020         num_sw_actions = actions_sz / DR_MODIFY_ACTION_SIZE;
2021         max_hw_actions = mlx5dr_icm_pool_chunk_size_to_entries(DR_CHUNK_SIZE_16);
2022
2023         if (num_sw_actions > max_hw_actions) {
2024                 mlx5dr_dbg(dmn, "Max number of actions %d exceeds limit %d\n",
2025                            num_sw_actions, max_hw_actions);
2026                 return -EINVAL;
2027         }
2028
2029         hw_actions = kcalloc(1, max_hw_actions * DR_MODIFY_ACTION_SIZE, GFP_KERNEL);
2030         if (!hw_actions)
2031                 return -ENOMEM;
2032
2033         ret = dr_actions_convert_modify_header(action,
2034                                                max_hw_actions,
2035                                                num_sw_actions,
2036                                                actions,
2037                                                hw_actions,
2038                                                &num_hw_actions,
2039                                                &modify_ttl);
2040         if (ret)
2041                 goto free_hw_actions;
2042
2043         action->rewrite->modify_ttl = modify_ttl;
2044         action->rewrite->data = (u8 *)hw_actions;
2045         action->rewrite->num_of_actions = num_hw_actions;
2046
2047         if (num_hw_actions == 1 &&
2048             dmn->info.caps.sw_format_ver >= MLX5_STEERING_FORMAT_CONNECTX_6DX) {
2049                 action->rewrite->single_action_opt = true;
2050         } else {
2051                 action->rewrite->single_action_opt = false;
2052                 ret = mlx5dr_ste_alloc_modify_hdr(action);
2053                 if (ret)
2054                         goto free_hw_actions;
2055         }
2056
2057         return 0;
2058
2059 free_hw_actions:
2060         kfree(hw_actions);
2061         return ret;
2062 }
2063
2064 struct mlx5dr_action *
2065 mlx5dr_action_create_modify_header(struct mlx5dr_domain *dmn,
2066                                    u32 flags,
2067                                    size_t actions_sz,
2068                                    __be64 actions[])
2069 {
2070         struct mlx5dr_action *action;
2071         int ret = 0;
2072
2073         refcount_inc(&dmn->refcount);
2074
2075         if (actions_sz % DR_MODIFY_ACTION_SIZE) {
2076                 mlx5dr_dbg(dmn, "Invalid modify actions size provided\n");
2077                 goto dec_ref;
2078         }
2079
2080         action = dr_action_create_generic(DR_ACTION_TYP_MODIFY_HDR);
2081         if (!action)
2082                 goto dec_ref;
2083
2084         action->rewrite->dmn = dmn;
2085
2086         ret = dr_action_create_modify_action(dmn,
2087                                              actions_sz,
2088                                              actions,
2089                                              action);
2090         if (ret) {
2091                 mlx5dr_dbg(dmn, "Failed creating modify header action %d\n", ret);
2092                 goto free_action;
2093         }
2094
2095         return action;
2096
2097 free_action:
2098         kfree(action);
2099 dec_ref:
2100         refcount_dec(&dmn->refcount);
2101         return NULL;
2102 }
2103
2104 struct mlx5dr_action *
2105 mlx5dr_action_create_dest_vport(struct mlx5dr_domain *dmn,
2106                                 u16 vport, u8 vhca_id_valid,
2107                                 u16 vhca_id)
2108 {
2109         struct mlx5dr_cmd_vport_cap *vport_cap;
2110         struct mlx5dr_domain *vport_dmn;
2111         struct mlx5dr_action *action;
2112         u8 peer_vport;
2113
2114         peer_vport = vhca_id_valid && mlx5_core_is_pf(dmn->mdev) &&
2115                 (vhca_id != dmn->info.caps.gvmi);
2116         vport_dmn = peer_vport ? xa_load(&dmn->peer_dmn_xa, vhca_id) : dmn;
2117         if (!vport_dmn) {
2118                 mlx5dr_dbg(dmn, "No peer vport domain for given vhca_id\n");
2119                 return NULL;
2120         }
2121
2122         if (vport_dmn->type != MLX5DR_DOMAIN_TYPE_FDB) {
2123                 mlx5dr_dbg(dmn, "Domain doesn't support vport actions\n");
2124                 return NULL;
2125         }
2126
2127         vport_cap = mlx5dr_domain_get_vport_cap(vport_dmn, vport);
2128         if (!vport_cap) {
2129                 mlx5dr_err(dmn,
2130                            "Failed to get vport 0x%x caps - vport is disabled or invalid\n",
2131                            vport);
2132                 return NULL;
2133         }
2134
2135         action = dr_action_create_generic(DR_ACTION_TYP_VPORT);
2136         if (!action)
2137                 return NULL;
2138
2139         action->vport->dmn = vport_dmn;
2140         action->vport->caps = vport_cap;
2141
2142         return action;
2143 }
2144
2145 struct mlx5dr_action *
2146 mlx5dr_action_create_aso(struct mlx5dr_domain *dmn, u32 obj_id,
2147                          u8 dest_reg_id, u8 aso_type,
2148                          u8 init_color, u8 meter_id)
2149 {
2150         struct mlx5dr_action *action;
2151
2152         if (aso_type != MLX5_EXE_ASO_FLOW_METER)
2153                 return NULL;
2154
2155         if (init_color > MLX5_FLOW_METER_COLOR_UNDEFINED)
2156                 return NULL;
2157
2158         action = dr_action_create_generic(DR_ACTION_TYP_ASO_FLOW_METER);
2159         if (!action)
2160                 return NULL;
2161
2162         action->aso->obj_id = obj_id;
2163         action->aso->offset = meter_id;
2164         action->aso->dest_reg_id = dest_reg_id;
2165         action->aso->init_color = init_color;
2166         action->aso->dmn = dmn;
2167
2168         refcount_inc(&dmn->refcount);
2169
2170         return action;
2171 }
2172
2173 u32 mlx5dr_action_get_pkt_reformat_id(struct mlx5dr_action *action)
2174 {
2175         return action->reformat->id;
2176 }
2177
2178 int mlx5dr_action_destroy(struct mlx5dr_action *action)
2179 {
2180         if (WARN_ON_ONCE(refcount_read(&action->refcount) > 1))
2181                 return -EBUSY;
2182
2183         switch (action->action_type) {
2184         case DR_ACTION_TYP_FT:
2185                 if (action->dest_tbl->is_fw_tbl)
2186                         refcount_dec(&action->dest_tbl->fw_tbl.dmn->refcount);
2187                 else
2188                         refcount_dec(&action->dest_tbl->tbl->refcount);
2189
2190                 if (action->dest_tbl->is_fw_tbl &&
2191                     action->dest_tbl->fw_tbl.num_of_ref_actions) {
2192                         struct mlx5dr_action **ref_actions;
2193                         int i;
2194
2195                         ref_actions = action->dest_tbl->fw_tbl.ref_actions;
2196                         for (i = 0; i < action->dest_tbl->fw_tbl.num_of_ref_actions; i++)
2197                                 refcount_dec(&ref_actions[i]->refcount);
2198
2199                         kfree(ref_actions);
2200
2201                         mlx5dr_fw_destroy_md_tbl(action->dest_tbl->fw_tbl.dmn,
2202                                                  action->dest_tbl->fw_tbl.id,
2203                                                  action->dest_tbl->fw_tbl.group_id);
2204                 }
2205                 break;
2206         case DR_ACTION_TYP_TNL_L2_TO_L2:
2207         case DR_ACTION_TYP_REMOVE_HDR:
2208                 refcount_dec(&action->reformat->dmn->refcount);
2209                 break;
2210         case DR_ACTION_TYP_TNL_L3_TO_L2:
2211                 mlx5dr_ste_free_modify_hdr(action);
2212                 kfree(action->rewrite->data);
2213                 refcount_dec(&action->rewrite->dmn->refcount);
2214                 break;
2215         case DR_ACTION_TYP_L2_TO_TNL_L2:
2216         case DR_ACTION_TYP_L2_TO_TNL_L3:
2217         case DR_ACTION_TYP_INSERT_HDR:
2218                 mlx5dr_cmd_destroy_reformat_ctx((action->reformat->dmn)->mdev,
2219                                                 action->reformat->id);
2220                 refcount_dec(&action->reformat->dmn->refcount);
2221                 break;
2222         case DR_ACTION_TYP_MODIFY_HDR:
2223                 if (!action->rewrite->single_action_opt)
2224                         mlx5dr_ste_free_modify_hdr(action);
2225                 kfree(action->rewrite->data);
2226                 refcount_dec(&action->rewrite->dmn->refcount);
2227                 break;
2228         case DR_ACTION_TYP_SAMPLER:
2229                 refcount_dec(&action->sampler->dmn->refcount);
2230                 break;
2231         case DR_ACTION_TYP_ASO_FLOW_METER:
2232                 refcount_dec(&action->aso->dmn->refcount);
2233                 break;
2234         case DR_ACTION_TYP_RANGE:
2235                 dr_action_destroy_range_definer(action);
2236                 mlx5dr_action_destroy(action->range->miss_tbl_action);
2237                 mlx5dr_action_destroy(action->range->hit_tbl_action);
2238                 break;
2239         default:
2240                 break;
2241         }
2242
2243         kfree(action);
2244         return 0;
2245 }