drivers/net/ethernet/mellanox/mlx4/en_ethtool.c

   1 /*
   2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  */
  33
  34 #include <linux/kernel.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/mlx4/driver.h>
  38 #include <linux/mlx4/device.h>
  39 #include <linux/in.h>
  40 #include <net/ip.h>
  41 #include <linux/bitmap.h>
  42
  43 #include "mlx4_en.h"
  44 #include "en_port.h"
  45
  46 #define EN_ETHTOOL_QP_ATTACH (1ull << 63)
  47 #define EN_ETHTOOL_SHORT_MASK cpu_to_be16(0xffff)
  48 #define EN_ETHTOOL_WORD_MASK  cpu_to_be32(0xffffffff)
  49
  50 static int mlx4_en_moderation_update(struct mlx4_en_priv *priv)
  51 {
  52         int i, t;
  53         int err = 0;
  54
  55         for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
  56                 for (i = 0; i < priv->tx_ring_num[t]; i++) {
  57                         priv->tx_cq[t][i]->moder_cnt = priv->tx_frames;
  58                         priv->tx_cq[t][i]->moder_time = priv->tx_usecs;
  59                         if (priv->port_up) {
  60                                 err = mlx4_en_set_cq_moder(priv,
  61                                                            priv->tx_cq[t][i]);
  62                                 if (err)
  63                                         return err;
  64                         }
  65                 }
  66         }
  67
  68         if (priv->adaptive_rx_coal)
  69                 return 0;
  70
  71         for (i = 0; i < priv->rx_ring_num; i++) {
  72                 priv->rx_cq[i]->moder_cnt = priv->rx_frames;
  73                 priv->rx_cq[i]->moder_time = priv->rx_usecs;
  74                 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  75                 if (priv->port_up) {
  76                         err = mlx4_en_set_cq_moder(priv, priv->rx_cq[i]);
  77                         if (err)
  78                                 return err;
  79                 }
  80         }
  81
  82         return err;
  83 }
  84
  85 static void
  86 mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
  87 {
  88         struct mlx4_en_priv *priv = netdev_priv(dev);
  89         struct mlx4_en_dev *mdev = priv->mdev;
  90
  91         strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
  92         strlcpy(drvinfo->version, DRV_VERSION,
  93                 sizeof(drvinfo->version));
  94         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  95                 "%d.%d.%d",
  96                 (u16) (mdev->dev->caps.fw_ver >> 32),
  97                 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
  98                 (u16) (mdev->dev->caps.fw_ver & 0xffff));
  99         strlcpy(drvinfo->bus_info, pci_name(mdev->dev->persist->pdev),
 100                 sizeof(drvinfo->bus_info));
 101 }
 102
 103 static const char mlx4_en_priv_flags[][ETH_GSTRING_LEN] = {
 104         "blueflame",
 105         "phv-bit"
 106 };
 107
 108 static const char main_strings[][ETH_GSTRING_LEN] = {
 109         /* main statistics */
 110         "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
 111         "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
 112         "rx_length_errors", "rx_over_errors", "rx_crc_errors",
 113         "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
 114         "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
 115         "tx_heartbeat_errors", "tx_window_errors",
 116
 117         /* port statistics */
 118         "tso_packets",
 119         "xmit_more",
 120         "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_pages",
 121         "rx_csum_good", "rx_csum_none", "rx_csum_complete", "tx_chksum_offload",
 122
 123         /* pf statistics */
 124         "pf_rx_packets",
 125         "pf_rx_bytes",
 126         "pf_tx_packets",
 127         "pf_tx_bytes",
 128
 129         /* priority flow control statistics rx */
 130         "rx_pause_prio_0", "rx_pause_duration_prio_0",
 131         "rx_pause_transition_prio_0",
 132         "rx_pause_prio_1", "rx_pause_duration_prio_1",
 133         "rx_pause_transition_prio_1",
 134         "rx_pause_prio_2", "rx_pause_duration_prio_2",
 135         "rx_pause_transition_prio_2",
 136         "rx_pause_prio_3", "rx_pause_duration_prio_3",
 137         "rx_pause_transition_prio_3",
 138         "rx_pause_prio_4", "rx_pause_duration_prio_4",
 139         "rx_pause_transition_prio_4",
 140         "rx_pause_prio_5", "rx_pause_duration_prio_5",
 141         "rx_pause_transition_prio_5",
 142         "rx_pause_prio_6", "rx_pause_duration_prio_6",
 143         "rx_pause_transition_prio_6",
 144         "rx_pause_prio_7", "rx_pause_duration_prio_7",
 145         "rx_pause_transition_prio_7",
 146
 147         /* flow control statistics rx */
 148         "rx_pause", "rx_pause_duration", "rx_pause_transition",
 149
 150         /* priority flow control statistics tx */
 151         "tx_pause_prio_0", "tx_pause_duration_prio_0",
 152         "tx_pause_transition_prio_0",
 153         "tx_pause_prio_1", "tx_pause_duration_prio_1",
 154         "tx_pause_transition_prio_1",
 155         "tx_pause_prio_2", "tx_pause_duration_prio_2",
 156         "tx_pause_transition_prio_2",
 157         "tx_pause_prio_3", "tx_pause_duration_prio_3",
 158         "tx_pause_transition_prio_3",
 159         "tx_pause_prio_4", "tx_pause_duration_prio_4",
 160         "tx_pause_transition_prio_4",
 161         "tx_pause_prio_5", "tx_pause_duration_prio_5",
 162         "tx_pause_transition_prio_5",
 163         "tx_pause_prio_6", "tx_pause_duration_prio_6",
 164         "tx_pause_transition_prio_6",
 165         "tx_pause_prio_7", "tx_pause_duration_prio_7",
 166         "tx_pause_transition_prio_7",
 167
 168         /* flow control statistics tx */
 169         "tx_pause", "tx_pause_duration", "tx_pause_transition",
 170
 171         /* packet statistics */
 172         "rx_multicast_packets",
 173         "rx_broadcast_packets",
 174         "rx_jabbers",
 175         "rx_in_range_length_error",
 176         "rx_out_range_length_error",
 177         "tx_multicast_packets",
 178         "tx_broadcast_packets",
 179         "rx_prio_0_packets", "rx_prio_0_bytes",
 180         "rx_prio_1_packets", "rx_prio_1_bytes",
 181         "rx_prio_2_packets", "rx_prio_2_bytes",
 182         "rx_prio_3_packets", "rx_prio_3_bytes",
 183         "rx_prio_4_packets", "rx_prio_4_bytes",
 184         "rx_prio_5_packets", "rx_prio_5_bytes",
 185         "rx_prio_6_packets", "rx_prio_6_bytes",
 186         "rx_prio_7_packets", "rx_prio_7_bytes",
 187         "rx_novlan_packets", "rx_novlan_bytes",
 188         "tx_prio_0_packets", "tx_prio_0_bytes",
 189         "tx_prio_1_packets", "tx_prio_1_bytes",
 190         "tx_prio_2_packets", "tx_prio_2_bytes",
 191         "tx_prio_3_packets", "tx_prio_3_bytes",
 192         "tx_prio_4_packets", "tx_prio_4_bytes",
 193         "tx_prio_5_packets", "tx_prio_5_bytes",
 194         "tx_prio_6_packets", "tx_prio_6_bytes",
 195         "tx_prio_7_packets", "tx_prio_7_bytes",
 196         "tx_novlan_packets", "tx_novlan_bytes",
 197
 198         /* xdp statistics */
 199         "rx_xdp_drop",
 200         "rx_xdp_tx",
 201         "rx_xdp_tx_full",
 202
 203         /* phy statistics */
 204         "rx_packets_phy", "rx_bytes_phy",
 205         "tx_packets_phy", "tx_bytes_phy",
 206 };
 207
 208 static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
 209         "Interrupt Test",
 210         "Link Test",
 211         "Speed Test",
 212         "Register Test",
 213         "Loopback Test",
 214 };
 215
 216 static u32 mlx4_en_get_msglevel(struct net_device *dev)
 217 {
 218         return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
 219 }
 220
 221 static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
 222 {
 223         ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
 224 }
 225
 226 static void mlx4_en_get_wol(struct net_device *netdev,
 227                             struct ethtool_wolinfo *wol)
 228 {
 229         struct mlx4_en_priv *priv = netdev_priv(netdev);
 230         struct mlx4_caps *caps = &priv->mdev->dev->caps;
 231         int err = 0;
 232         u64 config = 0;
 233         u64 mask;
 234
 235         if ((priv->port < 1) || (priv->port > 2)) {
 236                 en_err(priv, "Failed to get WoL information\n");
 237                 return;
 238         }
 239
 240         mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
 241                 MLX4_DEV_CAP_FLAG_WOL_PORT2;
 242
 243         if (!(caps->flags & mask)) {
 244                 wol->supported = 0;
 245                 wol->wolopts = 0;
 246                 return;
 247         }
 248
 249         if (caps->wol_port[priv->port])
 250                 wol->supported = WAKE_MAGIC;
 251         else
 252                 wol->supported = 0;
 253
 254         err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
 255         if (err) {
 256                 en_err(priv, "Failed to get WoL information\n");
 257                 return;
 258         }
 259
 260         if ((config & MLX4_EN_WOL_ENABLED) && (config & MLX4_EN_WOL_MAGIC))
 261                 wol->wolopts = WAKE_MAGIC;
 262         else
 263                 wol->wolopts = 0;
 264 }
 265
 266 static int mlx4_en_set_wol(struct net_device *netdev,
 267                             struct ethtool_wolinfo *wol)
 268 {
 269         struct mlx4_en_priv *priv = netdev_priv(netdev);
 270         u64 config = 0;
 271         int err = 0;
 272         u64 mask;
 273
 274         if ((priv->port < 1) || (priv->port > 2))
 275                 return -EOPNOTSUPP;
 276
 277         mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
 278                 MLX4_DEV_CAP_FLAG_WOL_PORT2;
 279
 280         if (!(priv->mdev->dev->caps.flags & mask))
 281                 return -EOPNOTSUPP;
 282
 283         if (wol->supported & ~WAKE_MAGIC)
 284                 return -EINVAL;
 285
 286         err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
 287         if (err) {
 288                 en_err(priv, "Failed to get WoL info, unable to modify\n");
 289                 return err;
 290         }
 291
 292         if (wol->wolopts & WAKE_MAGIC) {
 293                 config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
 294                                 MLX4_EN_WOL_MAGIC;
 295         } else {
 296                 config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
 297                 config |= MLX4_EN_WOL_DO_MODIFY;
 298         }
 299
 300         err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
 301         if (err)
 302                 en_err(priv, "Failed to set WoL information\n");
 303
 304         return err;
 305 }
 306
 307 struct bitmap_iterator {
 308         unsigned long *stats_bitmap;
 309         unsigned int count;
 310         unsigned int iterator;
 311         bool advance_array; /* if set, force no increments */
 312 };
 313
 314 static inline void bitmap_iterator_init(struct bitmap_iterator *h,
 315                                         unsigned long *stats_bitmap,
 316                                         int count)
 317 {
 318         h->iterator = 0;
 319         h->advance_array = !bitmap_empty(stats_bitmap, count);
 320         h->count = h->advance_array ? bitmap_weight(stats_bitmap, count)
 321                 : count;
 322         h->stats_bitmap = stats_bitmap;
 323 }
 324
 325 static inline int bitmap_iterator_test(struct bitmap_iterator *h)
 326 {
 327         return !h->advance_array ? 1 : test_bit(h->iterator, h->stats_bitmap);
 328 }
 329
 330 static inline int bitmap_iterator_inc(struct bitmap_iterator *h)
 331 {
 332         return h->iterator++;
 333 }
 334
 335 static inline unsigned int
 336 bitmap_iterator_count(struct bitmap_iterator *h)
 337 {
 338         return h->count;
 339 }
 340
 341 static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
 342 {
 343         struct mlx4_en_priv *priv = netdev_priv(dev);
 344         struct bitmap_iterator it;
 345
 346         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
 347
 348         switch (sset) {
 349         case ETH_SS_STATS:
 350                 return bitmap_iterator_count(&it) +
 351                         (priv->tx_ring_num[TX] * 2) +
 352                         (priv->rx_ring_num * (3 + NUM_XDP_STATS));
 353         case ETH_SS_TEST:
 354                 return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
 355                                         & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
 356         case ETH_SS_PRIV_FLAGS:
 357                 return ARRAY_SIZE(mlx4_en_priv_flags);
 358         default:
 359                 return -EOPNOTSUPP;
 360         }
 361 }
 362
 363 static void mlx4_en_get_ethtool_stats(struct net_device *dev,
 364                 struct ethtool_stats *stats, uint64_t *data)
 365 {
 366         struct mlx4_en_priv *priv = netdev_priv(dev);
 367         int index = 0;
 368         int i;
 369         struct bitmap_iterator it;
 370
 371         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
 372
 373         spin_lock_bh(&priv->stats_lock);
 374
 375         mlx4_en_fold_software_stats(dev);
 376
 377         for (i = 0; i < NUM_MAIN_STATS; i++, bitmap_iterator_inc(&it))
 378                 if (bitmap_iterator_test(&it))
 379                         data[index++] = ((unsigned long *)&dev->stats)[i];
 380
 381         for (i = 0; i < NUM_PORT_STATS; i++, bitmap_iterator_inc(&it))
 382                 if (bitmap_iterator_test(&it))
 383                         data[index++] = ((unsigned long *)&priv->port_stats)[i];
 384
 385         for (i = 0; i < NUM_PF_STATS; i++, bitmap_iterator_inc(&it))
 386                 if (bitmap_iterator_test(&it))
 387                         data[index++] =
 388                                 ((unsigned long *)&priv->pf_stats)[i];
 389
 390         for (i = 0; i < NUM_FLOW_PRIORITY_STATS_RX;
 391              i++, bitmap_iterator_inc(&it))
 392                 if (bitmap_iterator_test(&it))
 393                         data[index++] =
 394                                 ((u64 *)&priv->rx_priority_flowstats)[i];
 395
 396         for (i = 0; i < NUM_FLOW_STATS_RX; i++, bitmap_iterator_inc(&it))
 397                 if (bitmap_iterator_test(&it))
 398                         data[index++] = ((u64 *)&priv->rx_flowstats)[i];
 399
 400         for (i = 0; i < NUM_FLOW_PRIORITY_STATS_TX;
 401              i++, bitmap_iterator_inc(&it))
 402                 if (bitmap_iterator_test(&it))
 403                         data[index++] =
 404                                 ((u64 *)&priv->tx_priority_flowstats)[i];
 405
 406         for (i = 0; i < NUM_FLOW_STATS_TX; i++, bitmap_iterator_inc(&it))
 407                 if (bitmap_iterator_test(&it))
 408                         data[index++] = ((u64 *)&priv->tx_flowstats)[i];
 409
 410         for (i = 0; i < NUM_PKT_STATS; i++, bitmap_iterator_inc(&it))
 411                 if (bitmap_iterator_test(&it))
 412                         data[index++] = ((unsigned long *)&priv->pkstats)[i];
 413
 414         for (i = 0; i < NUM_XDP_STATS; i++, bitmap_iterator_inc(&it))
 415                 if (bitmap_iterator_test(&it))
 416                         data[index++] = ((unsigned long *)&priv->xdp_stats)[i];
 417
 418         for (i = 0; i < NUM_PHY_STATS; i++, bitmap_iterator_inc(&it))
 419                 if (bitmap_iterator_test(&it))
 420                         data[index++] = ((unsigned long *)&priv->phy_stats)[i];
 421
 422         for (i = 0; i < priv->tx_ring_num[TX]; i++) {
 423                 data[index++] = priv->tx_ring[TX][i]->packets;
 424                 data[index++] = priv->tx_ring[TX][i]->bytes;
 425         }
 426         for (i = 0; i < priv->rx_ring_num; i++) {
 427                 data[index++] = priv->rx_ring[i]->packets;
 428                 data[index++] = priv->rx_ring[i]->bytes;
 429                 data[index++] = priv->rx_ring[i]->dropped;
 430                 data[index++] = priv->rx_ring[i]->xdp_drop;
 431                 data[index++] = priv->rx_ring[i]->xdp_tx;
 432                 data[index++] = priv->rx_ring[i]->xdp_tx_full;
 433         }
 434         spin_unlock_bh(&priv->stats_lock);
 435
 436 }
 437
 438 static void mlx4_en_self_test(struct net_device *dev,
 439                               struct ethtool_test *etest, u64 *buf)
 440 {
 441         mlx4_en_ex_selftest(dev, &etest->flags, buf);
 442 }
 443
 444 static void mlx4_en_get_strings(struct net_device *dev,
 445                                 uint32_t stringset, uint8_t *data)
 446 {
 447         struct mlx4_en_priv *priv = netdev_priv(dev);
 448         int index = 0;
 449         int i, strings = 0;
 450         struct bitmap_iterator it;
 451
 452         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
 453
 454         switch (stringset) {
 455         case ETH_SS_TEST:
 456                 for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
 457                         strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
 458                 if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
 459                         for (; i < MLX4_EN_NUM_SELF_TEST; i++)
 460                                 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
 461                 break;
 462
 463         case ETH_SS_STATS:
 464                 /* Add main counters */
 465                 for (i = 0; i < NUM_MAIN_STATS; i++, strings++,
 466                      bitmap_iterator_inc(&it))
 467                         if (bitmap_iterator_test(&it))
 468                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 469                                        main_strings[strings]);
 470
 471                 for (i = 0; i < NUM_PORT_STATS; i++, strings++,
 472                      bitmap_iterator_inc(&it))
 473                         if (bitmap_iterator_test(&it))
 474                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 475                                        main_strings[strings]);
 476
 477                 for (i = 0; i < NUM_PF_STATS; i++, strings++,
 478                      bitmap_iterator_inc(&it))
 479                         if (bitmap_iterator_test(&it))
 480                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 481                                        main_strings[strings]);
 482
 483                 for (i = 0; i < NUM_FLOW_STATS; i++, strings++,
 484                      bitmap_iterator_inc(&it))
 485                         if (bitmap_iterator_test(&it))
 486                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 487                                        main_strings[strings]);
 488
 489                 for (i = 0; i < NUM_PKT_STATS; i++, strings++,
 490                      bitmap_iterator_inc(&it))
 491                         if (bitmap_iterator_test(&it))
 492                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 493                                        main_strings[strings]);
 494
 495                 for (i = 0; i < NUM_XDP_STATS; i++, strings++,
 496                      bitmap_iterator_inc(&it))
 497                         if (bitmap_iterator_test(&it))
 498                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 499                                        main_strings[strings]);
 500
 501                 for (i = 0; i < NUM_PHY_STATS; i++, strings++,
 502                      bitmap_iterator_inc(&it))
 503                         if (bitmap_iterator_test(&it))
 504                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
 505                                        main_strings[strings]);
 506
 507                 for (i = 0; i < priv->tx_ring_num[TX]; i++) {
 508                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 509                                 "tx%d_packets", i);
 510                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 511                                 "tx%d_bytes", i);
 512                 }
 513                 for (i = 0; i < priv->rx_ring_num; i++) {
 514                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 515                                 "rx%d_packets", i);
 516                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 517                                 "rx%d_bytes", i);
 518                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 519                                 "rx%d_dropped", i);
 520                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 521                                 "rx%d_xdp_drop", i);
 522                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 523                                 "rx%d_xdp_tx", i);
 524                         sprintf(data + (index++) * ETH_GSTRING_LEN,
 525                                 "rx%d_xdp_tx_full", i);
 526                 }
 527                 break;
 528         case ETH_SS_PRIV_FLAGS:
 529                 for (i = 0; i < ARRAY_SIZE(mlx4_en_priv_flags); i++)
 530                         strcpy(data + i * ETH_GSTRING_LEN,
 531                                mlx4_en_priv_flags[i]);
 532                 break;
 533
 534         }
 535 }
 536
 537 static u32 mlx4_en_autoneg_get(struct net_device *dev)
 538 {
 539         struct mlx4_en_priv *priv = netdev_priv(dev);
 540         struct mlx4_en_dev *mdev = priv->mdev;
 541         u32 autoneg = AUTONEG_DISABLE;
 542
 543         if ((mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP) &&
 544             (priv->port_state.flags & MLX4_EN_PORT_ANE))
 545                 autoneg = AUTONEG_ENABLE;
 546
 547         return autoneg;
 548 }
 549
 550 static void ptys2ethtool_update_supported_port(unsigned long *mask,
 551                                                struct mlx4_ptys_reg *ptys_reg)
 552 {
 553         u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
 554
 555         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
 556                          | MLX4_PROT_MASK(MLX4_1000BASE_T)
 557                          | MLX4_PROT_MASK(MLX4_100BASE_TX))) {
 558                 __set_bit(ETHTOOL_LINK_MODE_TP_BIT, mask);
 559         } else if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
 560                          | MLX4_PROT_MASK(MLX4_10GBASE_SR)
 561                          | MLX4_PROT_MASK(MLX4_56GBASE_SR4)
 562                          | MLX4_PROT_MASK(MLX4_40GBASE_CR4)
 563                          | MLX4_PROT_MASK(MLX4_40GBASE_SR4)
 564                          | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
 565                 __set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, mask);
 566         } else if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
 567                          | MLX4_PROT_MASK(MLX4_40GBASE_KR4)
 568                          | MLX4_PROT_MASK(MLX4_20GBASE_KR2)
 569                          | MLX4_PROT_MASK(MLX4_10GBASE_KR)
 570                          | MLX4_PROT_MASK(MLX4_10GBASE_KX4)
 571                          | MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
 572                 __set_bit(ETHTOOL_LINK_MODE_Backplane_BIT, mask);
 573         }
 574 }
 575
 576 static u32 ptys_get_active_port(struct mlx4_ptys_reg *ptys_reg)
 577 {
 578         u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_oper);
 579
 580         if (!eth_proto) /* link down */
 581                 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
 582
 583         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
 584                          | MLX4_PROT_MASK(MLX4_1000BASE_T)
 585                          | MLX4_PROT_MASK(MLX4_100BASE_TX))) {
 586                         return PORT_TP;
 587         }
 588
 589         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_SR)
 590                          | MLX4_PROT_MASK(MLX4_56GBASE_SR4)
 591                          | MLX4_PROT_MASK(MLX4_40GBASE_SR4)
 592                          | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
 593                         return PORT_FIBRE;
 594         }
 595
 596         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
 597                          | MLX4_PROT_MASK(MLX4_56GBASE_CR4)
 598                          | MLX4_PROT_MASK(MLX4_40GBASE_CR4))) {
 599                         return PORT_DA;
 600         }
 601
 602         if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
 603                          | MLX4_PROT_MASK(MLX4_40GBASE_KR4)
 604                          | MLX4_PROT_MASK(MLX4_20GBASE_KR2)
 605                          | MLX4_PROT_MASK(MLX4_10GBASE_KR)
 606                          | MLX4_PROT_MASK(MLX4_10GBASE_KX4)
 607                          | MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
 608                         return PORT_NONE;
 609         }
 610         return PORT_OTHER;
 611 }
 612
 613 #define MLX4_LINK_MODES_SZ \
 614         (FIELD_SIZEOF(struct mlx4_ptys_reg, eth_proto_cap) * 8)
 615
 616 enum ethtool_report {
 617         SUPPORTED = 0,
 618         ADVERTISED = 1,
 619 };
 620
 621 struct ptys2ethtool_config {
 622         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
 623         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
 624         u32 speed;
 625 };
 626
 627 static unsigned long *ptys2ethtool_link_mode(struct ptys2ethtool_config *cfg,
 628                                              enum ethtool_report report)
 629 {
 630         switch (report) {
 631         case SUPPORTED:
 632                 return cfg->supported;
 633         case ADVERTISED:
 634                 return cfg->advertised;
 635         }
 636         return NULL;
 637 }
 638
 639 #define MLX4_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)               \
 640         ({                                                              \
 641                 struct ptys2ethtool_config *cfg;                        \
 642                 const unsigned int modes[] = { __VA_ARGS__ };           \
 643                 unsigned int i;                                         \
 644                 cfg = &ptys2ethtool_map[reg_];                          \
 645                 cfg->speed = speed_;                                    \
 646                 bitmap_zero(cfg->supported,                             \
 647                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
 648                 bitmap_zero(cfg->advertised,                            \
 649                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
 650                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
 651                         __set_bit(modes[i], cfg->supported);            \
 652                         __set_bit(modes[i], cfg->advertised);           \
 653                 }                                                       \
 654         })
 655
 656 /* Translates mlx4 link mode to equivalent ethtool Link modes/speed */
 657 static struct ptys2ethtool_config ptys2ethtool_map[MLX4_LINK_MODES_SZ];
 658
 659 void __init mlx4_en_init_ptys2ethtool_map(void)
 660 {
 661         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_100BASE_TX, SPEED_100,
 662                                        ETHTOOL_LINK_MODE_100baseT_Full_BIT);
 663         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_T, SPEED_1000,
 664                                        ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
 665         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_CX_SGMII, SPEED_1000,
 666                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
 667         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_KX, SPEED_1000,
 668                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
 669         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_T, SPEED_10000,
 670                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
 671         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_CX4, SPEED_10000,
 672                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 673         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_KX4, SPEED_10000,
 674                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 675         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_KR, SPEED_10000,
 676                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 677         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_CR, SPEED_10000,
 678                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 679         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_SR, SPEED_10000,
 680                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 681         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_20GBASE_KR2, SPEED_20000,
 682                                        ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT,
 683                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
 684         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_CR4, SPEED_40000,
 685                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
 686         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_KR4, SPEED_40000,
 687                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
 688         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_SR4, SPEED_40000,
 689                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
 690         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_KR4, SPEED_56000,
 691                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
 692         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_CR4, SPEED_56000,
 693                                        ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT);
 694         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_SR4, SPEED_56000,
 695                                        ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT);
 696 };
 697
 698 static void ptys2ethtool_update_link_modes(unsigned long *link_modes,
 699                                            u32 eth_proto,
 700                                            enum ethtool_report report)
 701 {
 702         int i;
 703         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
 704                 if (eth_proto & MLX4_PROT_MASK(i))
 705                         bitmap_or(link_modes, link_modes,
 706                                   ptys2ethtool_link_mode(&ptys2ethtool_map[i],
 707                                                          report),
 708                                   __ETHTOOL_LINK_MODE_MASK_NBITS);
 709         }
 710 }
 711
 712 static u32 ethtool2ptys_link_modes(const unsigned long *link_modes,
 713                                    enum ethtool_report report)
 714 {
 715         int i;
 716         u32 ptys_modes = 0;
 717
 718         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
 719                 if (bitmap_intersects(
 720                             ptys2ethtool_link_mode(&ptys2ethtool_map[i],
 721                                                    report),
 722                             link_modes,
 723                             __ETHTOOL_LINK_MODE_MASK_NBITS))
 724                         ptys_modes |= 1 << i;
 725         }
 726         return ptys_modes;
 727 }
 728
 729 /* Convert actual speed (SPEED_XXX) to ptys link modes */
 730 static u32 speed2ptys_link_modes(u32 speed)
 731 {
 732         int i;
 733         u32 ptys_modes = 0;
 734
 735         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
 736                 if (ptys2ethtool_map[i].speed == speed)
 737                         ptys_modes |= 1 << i;
 738         }
 739         return ptys_modes;
 740 }
 741
 742 static int
 743 ethtool_get_ptys_link_ksettings(struct net_device *dev,
 744                                 struct ethtool_link_ksettings *link_ksettings)
 745 {
 746         struct mlx4_en_priv *priv = netdev_priv(dev);
 747         struct mlx4_ptys_reg ptys_reg;
 748         u32 eth_proto;
 749         int ret;
 750
 751         memset(&ptys_reg, 0, sizeof(ptys_reg));
 752         ptys_reg.local_port = priv->port;
 753         ptys_reg.proto_mask = MLX4_PTYS_EN;
 754         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
 755                                    MLX4_ACCESS_REG_QUERY, &ptys_reg);
 756         if (ret) {
 757                 en_warn(priv, "Failed to run mlx4_ACCESS_PTYS_REG status(%x)",
 758                         ret);
 759                 return ret;
 760         }
 761         en_dbg(DRV, priv, "ptys_reg.proto_mask       %x\n",
 762                ptys_reg.proto_mask);
 763         en_dbg(DRV, priv, "ptys_reg.eth_proto_cap    %x\n",
 764                be32_to_cpu(ptys_reg.eth_proto_cap));
 765         en_dbg(DRV, priv, "ptys_reg.eth_proto_admin  %x\n",
 766                be32_to_cpu(ptys_reg.eth_proto_admin));
 767         en_dbg(DRV, priv, "ptys_reg.eth_proto_oper   %x\n",
 768                be32_to_cpu(ptys_reg.eth_proto_oper));
 769         en_dbg(DRV, priv, "ptys_reg.eth_proto_lp_adv %x\n",
 770                be32_to_cpu(ptys_reg.eth_proto_lp_adv));
 771
 772         /* reset supported/advertising masks */
 773         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
 774         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
 775
 776         ptys2ethtool_update_supported_port(link_ksettings->link_modes.supported,
 777                                            &ptys_reg);
 778
 779         eth_proto = be32_to_cpu(ptys_reg.eth_proto_cap);
 780         ptys2ethtool_update_link_modes(link_ksettings->link_modes.supported,
 781                                        eth_proto, SUPPORTED);
 782
 783         eth_proto = be32_to_cpu(ptys_reg.eth_proto_admin);
 784         ptys2ethtool_update_link_modes(link_ksettings->link_modes.advertising,
 785                                        eth_proto, ADVERTISED);
 786
 787         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
 788                                              Pause);
 789         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
 790                                              Asym_Pause);
 791
 792         if (priv->prof->tx_pause)
 793                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 794                                                      advertising, Pause);
 795         if (priv->prof->tx_pause ^ priv->prof->rx_pause)
 796                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 797                                                      advertising, Asym_Pause);
 798
 799         link_ksettings->base.port = ptys_get_active_port(&ptys_reg);
 800
 801         if (mlx4_en_autoneg_get(dev)) {
 802                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 803                                                      supported, Autoneg);
 804                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 805                                                      advertising, Autoneg);
 806         }
 807
 808         link_ksettings->base.autoneg
 809                 = (priv->port_state.flags & MLX4_EN_PORT_ANC) ?
 810                 AUTONEG_ENABLE : AUTONEG_DISABLE;
 811
 812         eth_proto = be32_to_cpu(ptys_reg.eth_proto_lp_adv);
 813
 814         ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising);
 815         ptys2ethtool_update_link_modes(
 816                 link_ksettings->link_modes.lp_advertising,
 817                 eth_proto, ADVERTISED);
 818         if (priv->port_state.flags & MLX4_EN_PORT_ANC)
 819                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 820                                                      lp_advertising, Autoneg);
 821
 822         link_ksettings->base.phy_address = 0;
 823         link_ksettings->base.mdio_support = 0;
 824         link_ksettings->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
 825         link_ksettings->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
 826
 827         return ret;
 828 }
 829
 830 static void
 831 ethtool_get_default_link_ksettings(
 832         struct net_device *dev, struct ethtool_link_ksettings *link_ksettings)
 833 {
 834         struct mlx4_en_priv *priv = netdev_priv(dev);
 835         int trans_type;
 836
 837         link_ksettings->base.autoneg = AUTONEG_DISABLE;
 838
 839         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
 840         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
 841                                              10000baseT_Full);
 842
 843         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
 844         ethtool_link_ksettings_add_link_mode(link_ksettings, advertising,
 845                                              10000baseT_Full);
 846
 847         trans_type = priv->port_state.transceiver;
 848         if (trans_type > 0 && trans_type <= 0xC) {
 849                 link_ksettings->base.port = PORT_FIBRE;
 850                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 851                                                      supported, FIBRE);
 852                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 853                                                      advertising, FIBRE);
 854         } else if (trans_type == 0x80 || trans_type == 0) {
 855                 link_ksettings->base.port = PORT_TP;
 856                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 857                                                      supported, TP);
 858                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 859                                                      advertising, TP);
 860         } else  {
 861                 link_ksettings->base.port = -1;
 862         }
 863 }
 864
 865 static int
 866 mlx4_en_get_link_ksettings(struct net_device *dev,
 867                            struct ethtool_link_ksettings *link_ksettings)
 868 {
 869         struct mlx4_en_priv *priv = netdev_priv(dev);
 870         int ret = -EINVAL;
 871
 872         if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
 873                 return -ENOMEM;
 874
 875         en_dbg(DRV, priv, "query port state.flags ANC(%x) ANE(%x)\n",
 876                priv->port_state.flags & MLX4_EN_PORT_ANC,
 877                priv->port_state.flags & MLX4_EN_PORT_ANE);
 878
 879         if (priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL)
 880                 ret = ethtool_get_ptys_link_ksettings(dev, link_ksettings);
 881         if (ret) /* ETH PROT CRTL is not supported or PTYS CMD failed */
 882                 ethtool_get_default_link_ksettings(dev, link_ksettings);
 883
 884         if (netif_carrier_ok(dev)) {
 885                 link_ksettings->base.speed = priv->port_state.link_speed;
 886                 link_ksettings->base.duplex = DUPLEX_FULL;
 887         } else {
 888                 link_ksettings->base.speed = SPEED_UNKNOWN;
 889                 link_ksettings->base.duplex = DUPLEX_UNKNOWN;
 890         }
 891         return 0;
 892 }
 893
 894 /* Calculate PTYS admin according ethtool speed (SPEED_XXX) */
 895 static __be32 speed_set_ptys_admin(struct mlx4_en_priv *priv, u32 speed,
 896                                    __be32 proto_cap)
 897 {
 898         __be32 proto_admin = 0;
 899
 900         if (!speed) { /* Speed = 0 ==> Reset Link modes */
 901                 proto_admin = proto_cap;
 902                 en_info(priv, "Speed was set to 0, Reset advertised Link Modes to default (%x)\n",
 903                         be32_to_cpu(proto_cap));
 904         } else {
 905                 u32 ptys_link_modes = speed2ptys_link_modes(speed);
 906
 907                 proto_admin = cpu_to_be32(ptys_link_modes) & proto_cap;
 908                 en_info(priv, "Setting Speed to %d\n", speed);
 909         }
 910         return proto_admin;
 911 }
 912
 913 static int
 914 mlx4_en_set_link_ksettings(struct net_device *dev,
 915                            const struct ethtool_link_ksettings *link_ksettings)
 916 {
 917         struct mlx4_en_priv *priv = netdev_priv(dev);
 918         struct mlx4_ptys_reg ptys_reg;
 919         __be32 proto_admin;
 920         u8 cur_autoneg;
 921         int ret;
 922
 923         u32 ptys_adv = ethtool2ptys_link_modes(
 924                 link_ksettings->link_modes.advertising, ADVERTISED);
 925         const int speed = link_ksettings->base.speed;
 926
 927         en_dbg(DRV, priv,
 928                "Set Speed=%d adv={%*pbl} autoneg=%d duplex=%d\n",
 929                speed, __ETHTOOL_LINK_MODE_MASK_NBITS,
 930                link_ksettings->link_modes.advertising,
 931                link_ksettings->base.autoneg,
 932                link_ksettings->base.duplex);
 933
 934         if (!(priv->mdev->dev->caps.flags2 &
 935               MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL) ||
 936             (link_ksettings->base.duplex == DUPLEX_HALF))
 937                 return -EINVAL;
 938
 939         memset(&ptys_reg, 0, sizeof(ptys_reg));
 940         ptys_reg.local_port = priv->port;
 941         ptys_reg.proto_mask = MLX4_PTYS_EN;
 942         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
 943                                    MLX4_ACCESS_REG_QUERY, &ptys_reg);
 944         if (ret) {
 945                 en_warn(priv, "Failed to QUERY mlx4_ACCESS_PTYS_REG status(%x)\n",
 946                         ret);
 947                 return 0;
 948         }
 949
 950         cur_autoneg = ptys_reg.flags & MLX4_PTYS_AN_DISABLE_ADMIN ?
 951                                 AUTONEG_DISABLE : AUTONEG_ENABLE;
 952
 953         if (link_ksettings->base.autoneg == AUTONEG_DISABLE) {
 954                 proto_admin = speed_set_ptys_admin(priv, speed,
 955                                                    ptys_reg.eth_proto_cap);
 956                 if ((be32_to_cpu(proto_admin) &
 957                      (MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII) |
 958                       MLX4_PROT_MASK(MLX4_1000BASE_KX))) &&
 959                     (ptys_reg.flags & MLX4_PTYS_AN_DISABLE_CAP))
 960                         ptys_reg.flags |= MLX4_PTYS_AN_DISABLE_ADMIN;
 961         } else {
 962                 proto_admin = cpu_to_be32(ptys_adv);
 963                 ptys_reg.flags &= ~MLX4_PTYS_AN_DISABLE_ADMIN;
 964         }
 965
 966         proto_admin &= ptys_reg.eth_proto_cap;
 967         if (!proto_admin) {
 968                 en_warn(priv, "Not supported link mode(s) requested, check supported link modes.\n");
 969                 return -EINVAL; /* nothing to change due to bad input */
 970         }
 971
 972         if ((proto_admin == ptys_reg.eth_proto_admin) &&
 973             ((ptys_reg.flags & MLX4_PTYS_AN_DISABLE_CAP) &&
 974              (link_ksettings->base.autoneg == cur_autoneg)))
 975                 return 0; /* Nothing to change */
 976
 977         en_dbg(DRV, priv, "mlx4_ACCESS_PTYS_REG SET: ptys_reg.eth_proto_admin = 0x%x\n",
 978                be32_to_cpu(proto_admin));
 979
 980         ptys_reg.eth_proto_admin = proto_admin;
 981         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev, MLX4_ACCESS_REG_WRITE,
 982                                    &ptys_reg);
 983         if (ret) {
 984                 en_warn(priv, "Failed to write mlx4_ACCESS_PTYS_REG eth_proto_admin(0x%x) status(0x%x)",
 985                         be32_to_cpu(ptys_reg.eth_proto_admin), ret);
 986                 return ret;
 987         }
 988
 989         mutex_lock(&priv->mdev->state_lock);
 990         if (priv->port_up) {
 991                 en_warn(priv, "Port link mode changed, restarting port...\n");
 992                 mlx4_en_stop_port(dev, 1);
 993                 if (mlx4_en_start_port(dev))
 994                         en_err(priv, "Failed restarting port %d\n", priv->port);
 995         }
 996         mutex_unlock(&priv->mdev->state_lock);
 997         return 0;
 998 }
 999
1000 static int mlx4_en_get_coalesce(struct net_device *dev,
1001                               struct ethtool_coalesce *coal)
1002 {
1003         struct mlx4_en_priv *priv = netdev_priv(dev);
1004
1005         coal->tx_coalesce_usecs = priv->tx_usecs;
1006         coal->tx_max_coalesced_frames = priv->tx_frames;
1007         coal->tx_max_coalesced_frames_irq = priv->tx_work_limit;
1008
1009         coal->rx_coalesce_usecs = priv->rx_usecs;
1010         coal->rx_max_coalesced_frames = priv->rx_frames;
1011
1012         coal->pkt_rate_low = priv->pkt_rate_low;
1013         coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
1014         coal->pkt_rate_high = priv->pkt_rate_high;
1015         coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
1016         coal->rate_sample_interval = priv->sample_interval;
1017         coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
1018
1019         return 0;
1020 }
1021
1022 static int mlx4_en_set_coalesce(struct net_device *dev,
1023                               struct ethtool_coalesce *coal)
1024 {
1025         struct mlx4_en_priv *priv = netdev_priv(dev);
1026
1027         if (!coal->tx_max_coalesced_frames_irq)
1028                 return -EINVAL;
1029
1030         if (coal->tx_coalesce_usecs > MLX4_EN_MAX_COAL_TIME ||
1031             coal->rx_coalesce_usecs > MLX4_EN_MAX_COAL_TIME ||
1032             coal->rx_coalesce_usecs_low > MLX4_EN_MAX_COAL_TIME ||
1033             coal->rx_coalesce_usecs_high > MLX4_EN_MAX_COAL_TIME) {
1034                 netdev_info(dev, "%s: maximum coalesce time supported is %d usecs\n",
1035                             __func__, MLX4_EN_MAX_COAL_TIME);
1036                 return -ERANGE;
1037         }
1038
1039         if (coal->tx_max_coalesced_frames > MLX4_EN_MAX_COAL_PKTS ||
1040             coal->rx_max_coalesced_frames > MLX4_EN_MAX_COAL_PKTS) {
1041                 netdev_info(dev, "%s: maximum coalesced frames supported is %d\n",
1042                             __func__, MLX4_EN_MAX_COAL_PKTS);
1043                 return -ERANGE;
1044         }
1045
1046         priv->rx_frames = (coal->rx_max_coalesced_frames ==
1047                            MLX4_EN_AUTO_CONF) ?
1048                                 MLX4_EN_RX_COAL_TARGET :
1049                                 coal->rx_max_coalesced_frames;
1050         priv->rx_usecs = (coal->rx_coalesce_usecs ==
1051                           MLX4_EN_AUTO_CONF) ?
1052                                 MLX4_EN_RX_COAL_TIME :
1053                                 coal->rx_coalesce_usecs;
1054
1055         /* Setting TX coalescing parameters */
1056         if (coal->tx_coalesce_usecs != priv->tx_usecs ||
1057             coal->tx_max_coalesced_frames != priv->tx_frames) {
1058                 priv->tx_usecs = coal->tx_coalesce_usecs;
1059                 priv->tx_frames = coal->tx_max_coalesced_frames;
1060         }
1061
1062         /* Set adaptive coalescing params */
1063         priv->pkt_rate_low = coal->pkt_rate_low;
1064         priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
1065         priv->pkt_rate_high = coal->pkt_rate_high;
1066         priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
1067         priv->sample_interval = coal->rate_sample_interval;
1068         priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
1069         priv->tx_work_limit = coal->tx_max_coalesced_frames_irq;
1070
1071         return mlx4_en_moderation_update(priv);
1072 }
1073
1074 static int mlx4_en_set_pauseparam(struct net_device *dev,
1075                                 struct ethtool_pauseparam *pause)
1076 {
1077         struct mlx4_en_priv *priv = netdev_priv(dev);
1078         struct mlx4_en_dev *mdev = priv->mdev;
1079         u8 tx_pause, tx_ppp, rx_pause, rx_ppp;
1080         int err;
1081
1082         if (pause->autoneg)
1083                 return -EINVAL;
1084
1085         tx_pause = !!(pause->tx_pause);
1086         rx_pause = !!(pause->rx_pause);
1087         rx_ppp = priv->prof->rx_ppp && !(tx_pause || rx_pause);
1088         tx_ppp = priv->prof->tx_ppp && !(tx_pause || rx_pause);
1089
1090         err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1091                                     priv->rx_skb_size + ETH_FCS_LEN,
1092                                     tx_pause, tx_ppp, rx_pause, rx_ppp);
1093         if (err) {
1094                 en_err(priv, "Failed setting pause params, err = %d\n", err);
1095                 return err;
1096         }
1097
1098         mlx4_en_update_pfc_stats_bitmap(mdev->dev, &priv->stats_bitmap,
1099                                         rx_ppp, rx_pause, tx_ppp, tx_pause);
1100
1101         priv->prof->tx_pause = tx_pause;
1102         priv->prof->rx_pause = rx_pause;
1103         priv->prof->tx_ppp = tx_ppp;
1104         priv->prof->rx_ppp = rx_ppp;
1105
1106         return err;
1107 }
1108
1109 static void mlx4_en_get_pauseparam(struct net_device *dev,
1110                                  struct ethtool_pauseparam *pause)
1111 {
1112         struct mlx4_en_priv *priv = netdev_priv(dev);
1113
1114         pause->tx_pause = priv->prof->tx_pause;
1115         pause->rx_pause = priv->prof->rx_pause;
1116 }
1117
1118 static int mlx4_en_set_ringparam(struct net_device *dev,
1119                                  struct ethtool_ringparam *param)
1120 {
1121         struct mlx4_en_priv *priv = netdev_priv(dev);
1122         struct mlx4_en_dev *mdev = priv->mdev;
1123         struct mlx4_en_port_profile new_prof;
1124         struct mlx4_en_priv *tmp;
1125         u32 rx_size, tx_size;
1126         int port_up = 0;
1127         int err = 0;
1128
1129         if (param->rx_jumbo_pending || param->rx_mini_pending)
1130                 return -EINVAL;
1131
1132         if (param->rx_pending < MLX4_EN_MIN_RX_SIZE) {
1133                 en_warn(priv, "%s: rx_pending (%d) < min (%d)\n",
1134                         __func__, param->rx_pending,
1135                         MLX4_EN_MIN_RX_SIZE);
1136                 return -EINVAL;
1137         }
1138         if (param->tx_pending < MLX4_EN_MIN_TX_SIZE) {
1139                 en_warn(priv, "%s: tx_pending (%d) < min (%lu)\n",
1140                         __func__, param->tx_pending,
1141                         MLX4_EN_MIN_TX_SIZE);
1142                 return -EINVAL;
1143         }
1144
1145         rx_size = roundup_pow_of_two(param->rx_pending);
1146         tx_size = roundup_pow_of_two(param->tx_pending);
1147
1148         if (rx_size == (priv->port_up ? priv->rx_ring[0]->actual_size :
1149                                         priv->rx_ring[0]->size) &&
1150             tx_size == priv->tx_ring[TX][0]->size)
1151                 return 0;
1152
1153         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
1154         if (!tmp)
1155                 return -ENOMEM;
1156
1157         mutex_lock(&mdev->state_lock);
1158         memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
1159         new_prof.tx_ring_size = tx_size;
1160         new_prof.rx_ring_size = rx_size;
1161         err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
1162         if (err)
1163                 goto out;
1164
1165         if (priv->port_up) {
1166                 port_up = 1;
1167                 mlx4_en_stop_port(dev, 1);
1168         }
1169
1170         mlx4_en_safe_replace_resources(priv, tmp);
1171
1172         if (port_up) {
1173                 err = mlx4_en_start_port(dev);
1174                 if (err)
1175                         en_err(priv, "Failed starting port\n");
1176         }
1177
1178         err = mlx4_en_moderation_update(priv);
1179 out:
1180         kfree(tmp);
1181         mutex_unlock(&mdev->state_lock);
1182         return err;
1183 }
1184
1185 static void mlx4_en_get_ringparam(struct net_device *dev,
1186                                   struct ethtool_ringparam *param)
1187 {
1188         struct mlx4_en_priv *priv = netdev_priv(dev);
1189
1190         memset(param, 0, sizeof(*param));
1191         param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
1192         param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
1193         param->rx_pending = priv->port_up ?
1194                 priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size;
1195         param->tx_pending = priv->tx_ring[TX][0]->size;
1196 }
1197
1198 static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev)
1199 {
1200         struct mlx4_en_priv *priv = netdev_priv(dev);
1201
1202         return rounddown_pow_of_two(priv->rx_ring_num);
1203 }
1204
1205 static u32 mlx4_en_get_rxfh_key_size(struct net_device *netdev)
1206 {
1207         return MLX4_EN_RSS_KEY_SIZE;
1208 }
1209
1210 static int mlx4_en_check_rxfh_func(struct net_device *dev, u8 hfunc)
1211 {
1212         struct mlx4_en_priv *priv = netdev_priv(dev);
1213
1214         /* check if requested function is supported by the device */
1215         if (hfunc == ETH_RSS_HASH_TOP) {
1216                 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP))
1217                         return -EINVAL;
1218                 if (!(dev->features & NETIF_F_RXHASH))
1219                         en_warn(priv, "Toeplitz hash function should be used in conjunction with RX hashing for optimal performance\n");
1220                 return 0;
1221         } else if (hfunc == ETH_RSS_HASH_XOR) {
1222                 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR))
1223                         return -EINVAL;
1224                 if (dev->features & NETIF_F_RXHASH)
1225                         en_warn(priv, "Enabling both XOR Hash function and RX Hashing can limit RPS functionality\n");
1226                 return 0;
1227         }
1228
1229         return -EINVAL;
1230 }
1231
1232 static int mlx4_en_get_rxfh(struct net_device *dev, u32 *ring_index, u8 *key,
1233                             u8 *hfunc)
1234 {
1235         struct mlx4_en_priv *priv = netdev_priv(dev);
1236         u32 n = mlx4_en_get_rxfh_indir_size(dev);
1237         u32 i, rss_rings;
1238         int err = 0;
1239
1240         rss_rings = priv->prof->rss_rings ?: n;
1241         rss_rings = rounddown_pow_of_two(rss_rings);
1242
1243         for (i = 0; i < n; i++) {
1244                 if (!ring_index)
1245                         break;
1246                 ring_index[i] = i % rss_rings;
1247         }
1248         if (key)
1249                 memcpy(key, priv->rss_key, MLX4_EN_RSS_KEY_SIZE);
1250         if (hfunc)
1251                 *hfunc = priv->rss_hash_fn;
1252         return err;
1253 }
1254
1255 static int mlx4_en_set_rxfh(struct net_device *dev, const u32 *ring_index,
1256                             const u8 *key, const u8 hfunc)
1257 {
1258         struct mlx4_en_priv *priv = netdev_priv(dev);
1259         u32 n = mlx4_en_get_rxfh_indir_size(dev);
1260         struct mlx4_en_dev *mdev = priv->mdev;
1261         int port_up = 0;
1262         int err = 0;
1263         int i;
1264         int rss_rings = 0;
1265
1266         /* Calculate RSS table size and make sure flows are spread evenly
1267          * between rings
1268          */
1269         for (i = 0; i < n; i++) {
1270                 if (!ring_index)
1271                         break;
1272                 if (i > 0 && !ring_index[i] && !rss_rings)
1273                         rss_rings = i;
1274
1275                 if (ring_index[i] != (i % (rss_rings ?: n)))
1276                         return -EINVAL;
1277         }
1278
1279         if (!rss_rings)
1280                 rss_rings = n;
1281
1282         /* RSS table size must be an order of 2 */
1283         if (!is_power_of_2(rss_rings))
1284                 return -EINVAL;
1285
1286         if (hfunc != ETH_RSS_HASH_NO_CHANGE) {
1287                 err = mlx4_en_check_rxfh_func(dev, hfunc);
1288                 if (err)
1289                         return err;
1290         }
1291
1292         mutex_lock(&mdev->state_lock);
1293         if (priv->port_up) {
1294                 port_up = 1;
1295                 mlx4_en_stop_port(dev, 1);
1296         }
1297
1298         if (ring_index)
1299                 priv->prof->rss_rings = rss_rings;
1300         if (key)
1301                 memcpy(priv->rss_key, key, MLX4_EN_RSS_KEY_SIZE);
1302         if (hfunc !=  ETH_RSS_HASH_NO_CHANGE)
1303                 priv->rss_hash_fn = hfunc;
1304
1305         if (port_up) {
1306                 err = mlx4_en_start_port(dev);
1307                 if (err)
1308                         en_err(priv, "Failed starting port\n");
1309         }
1310
1311         mutex_unlock(&mdev->state_lock);
1312         return err;
1313 }
1314
1315 #define all_zeros_or_all_ones(field)            \
1316         ((field) == 0 || (field) == (__force typeof(field))-1)
1317
1318 static int mlx4_en_validate_flow(struct net_device *dev,
1319                                  struct ethtool_rxnfc *cmd)
1320 {
1321         struct ethtool_usrip4_spec *l3_mask;
1322         struct ethtool_tcpip4_spec *l4_mask;
1323         struct ethhdr *eth_mask;
1324
1325         if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1326                 return -EINVAL;
1327
1328         if (cmd->fs.flow_type & FLOW_MAC_EXT) {
1329                 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
1330                 if (!is_broadcast_ether_addr(cmd->fs.m_ext.h_dest))
1331                         return -EINVAL;
1332         }
1333
1334         switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
1335         case TCP_V4_FLOW:
1336         case UDP_V4_FLOW:
1337                 if (cmd->fs.m_u.tcp_ip4_spec.tos)
1338                         return -EINVAL;
1339                 l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
1340                 /* don't allow mask which isn't all 0 or 1 */
1341                 if (!all_zeros_or_all_ones(l4_mask->ip4src) ||
1342                     !all_zeros_or_all_ones(l4_mask->ip4dst) ||
1343                     !all_zeros_or_all_ones(l4_mask->psrc) ||
1344                     !all_zeros_or_all_ones(l4_mask->pdst))
1345                         return -EINVAL;
1346                 break;
1347         case IP_USER_FLOW:
1348                 l3_mask = &cmd->fs.m_u.usr_ip4_spec;
1349                 if (l3_mask->l4_4_bytes || l3_mask->tos || l3_mask->proto ||
1350                     cmd->fs.h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4 ||
1351                     (!l3_mask->ip4src && !l3_mask->ip4dst) ||
1352                     !all_zeros_or_all_ones(l3_mask->ip4src) ||
1353                     !all_zeros_or_all_ones(l3_mask->ip4dst))
1354                         return -EINVAL;
1355                 break;
1356         case ETHER_FLOW:
1357                 eth_mask = &cmd->fs.m_u.ether_spec;
1358                 /* source mac mask must not be set */
1359                 if (!is_zero_ether_addr(eth_mask->h_source))
1360                         return -EINVAL;
1361
1362                 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
1363                 if (!is_broadcast_ether_addr(eth_mask->h_dest))
1364                         return -EINVAL;
1365
1366                 if (!all_zeros_or_all_ones(eth_mask->h_proto))
1367                         return -EINVAL;
1368                 break;
1369         default:
1370                 return -EINVAL;
1371         }
1372
1373         if ((cmd->fs.flow_type & FLOW_EXT)) {
1374                 if (cmd->fs.m_ext.vlan_etype ||
1375                     !((cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
1376                       0 ||
1377                       (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
1378                       cpu_to_be16(VLAN_VID_MASK)))
1379                         return -EINVAL;
1380
1381                 if (cmd->fs.m_ext.vlan_tci) {
1382                         if (be16_to_cpu(cmd->fs.h_ext.vlan_tci) >= VLAN_N_VID)
1383                                 return -EINVAL;
1384
1385                 }
1386         }
1387
1388         return 0;
1389 }
1390
1391 static int mlx4_en_ethtool_add_mac_rule(struct ethtool_rxnfc *cmd,
1392                                         struct list_head *rule_list_h,
1393                                         struct mlx4_spec_list *spec_l2,
1394                                         unsigned char *mac)
1395 {
1396         int err = 0;
1397         __be64 mac_msk = cpu_to_be64(MLX4_MAC_MASK << 16);
1398
1399         spec_l2->id = MLX4_NET_TRANS_RULE_ID_ETH;
1400         memcpy(spec_l2->eth.dst_mac_msk, &mac_msk, ETH_ALEN);
1401         memcpy(spec_l2->eth.dst_mac, mac, ETH_ALEN);
1402
1403         if ((cmd->fs.flow_type & FLOW_EXT) &&
1404             (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK))) {
1405                 spec_l2->eth.vlan_id = cmd->fs.h_ext.vlan_tci;
1406                 spec_l2->eth.vlan_id_msk = cpu_to_be16(VLAN_VID_MASK);
1407         }
1408
1409         list_add_tail(&spec_l2->list, rule_list_h);
1410
1411         return err;
1412 }
1413
1414 static int mlx4_en_ethtool_add_mac_rule_by_ipv4(struct mlx4_en_priv *priv,
1415                                                 struct ethtool_rxnfc *cmd,
1416                                                 struct list_head *rule_list_h,
1417                                                 struct mlx4_spec_list *spec_l2,
1418                                                 __be32 ipv4_dst)
1419 {
1420 #ifdef CONFIG_INET
1421         unsigned char mac[ETH_ALEN];
1422
1423         if (!ipv4_is_multicast(ipv4_dst)) {
1424                 if (cmd->fs.flow_type & FLOW_MAC_EXT)
1425                         memcpy(&mac, cmd->fs.h_ext.h_dest, ETH_ALEN);
1426                 else
1427                         memcpy(&mac, priv->dev->dev_addr, ETH_ALEN);
1428         } else {
1429                 ip_eth_mc_map(ipv4_dst, mac);
1430         }
1431
1432         return mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2, &mac[0]);
1433 #else
1434         return -EINVAL;
1435 #endif
1436 }
1437
1438 static int add_ip_rule(struct mlx4_en_priv *priv,
1439                        struct ethtool_rxnfc *cmd,
1440                        struct list_head *list_h)
1441 {
1442         int err;
1443         struct mlx4_spec_list *spec_l2 = NULL;
1444         struct mlx4_spec_list *spec_l3 = NULL;
1445         struct ethtool_usrip4_spec *l3_mask = &cmd->fs.m_u.usr_ip4_spec;
1446
1447         spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
1448         spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1449         if (!spec_l2 || !spec_l3) {
1450                 err = -ENOMEM;
1451                 goto free_spec;
1452         }
1453
1454         err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, spec_l2,
1455                                                    cmd->fs.h_u.
1456                                                    usr_ip4_spec.ip4dst);
1457         if (err)
1458                 goto free_spec;
1459         spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
1460         spec_l3->ipv4.src_ip = cmd->fs.h_u.usr_ip4_spec.ip4src;
1461         if (l3_mask->ip4src)
1462                 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
1463         spec_l3->ipv4.dst_ip = cmd->fs.h_u.usr_ip4_spec.ip4dst;
1464         if (l3_mask->ip4dst)
1465                 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
1466         list_add_tail(&spec_l3->list, list_h);
1467
1468         return 0;
1469
1470 free_spec:
1471         kfree(spec_l2);
1472         kfree(spec_l3);
1473         return err;
1474 }
1475
1476 static int add_tcp_udp_rule(struct mlx4_en_priv *priv,
1477                              struct ethtool_rxnfc *cmd,
1478                              struct list_head *list_h, int proto)
1479 {
1480         int err;
1481         struct mlx4_spec_list *spec_l2 = NULL;
1482         struct mlx4_spec_list *spec_l3 = NULL;
1483         struct mlx4_spec_list *spec_l4 = NULL;
1484         struct ethtool_tcpip4_spec *l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
1485
1486         spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1487         spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
1488         spec_l4 = kzalloc(sizeof(*spec_l4), GFP_KERNEL);
1489         if (!spec_l2 || !spec_l3 || !spec_l4) {
1490                 err = -ENOMEM;
1491                 goto free_spec;
1492         }
1493
1494         spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
1495
1496         if (proto == TCP_V4_FLOW) {
1497                 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
1498                                                            spec_l2,
1499                                                            cmd->fs.h_u.
1500                                                            tcp_ip4_spec.ip4dst);
1501                 if (err)
1502                         goto free_spec;
1503                 spec_l4->id = MLX4_NET_TRANS_RULE_ID_TCP;
1504                 spec_l3->ipv4.src_ip = cmd->fs.h_u.tcp_ip4_spec.ip4src;
1505                 spec_l3->ipv4.dst_ip = cmd->fs.h_u.tcp_ip4_spec.ip4dst;
1506                 spec_l4->tcp_udp.src_port = cmd->fs.h_u.tcp_ip4_spec.psrc;
1507                 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.tcp_ip4_spec.pdst;
1508         } else {
1509                 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
1510                                                            spec_l2,
1511                                                            cmd->fs.h_u.
1512                                                            udp_ip4_spec.ip4dst);
1513                 if (err)
1514                         goto free_spec;
1515                 spec_l4->id = MLX4_NET_TRANS_RULE_ID_UDP;
1516                 spec_l3->ipv4.src_ip = cmd->fs.h_u.udp_ip4_spec.ip4src;
1517                 spec_l3->ipv4.dst_ip = cmd->fs.h_u.udp_ip4_spec.ip4dst;
1518                 spec_l4->tcp_udp.src_port = cmd->fs.h_u.udp_ip4_spec.psrc;
1519                 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.udp_ip4_spec.pdst;
1520         }
1521
1522         if (l4_mask->ip4src)
1523                 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
1524         if (l4_mask->ip4dst)
1525                 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
1526
1527         if (l4_mask->psrc)
1528                 spec_l4->tcp_udp.src_port_msk = EN_ETHTOOL_SHORT_MASK;
1529         if (l4_mask->pdst)
1530                 spec_l4->tcp_udp.dst_port_msk = EN_ETHTOOL_SHORT_MASK;
1531
1532         list_add_tail(&spec_l3->list, list_h);
1533         list_add_tail(&spec_l4->list, list_h);
1534
1535         return 0;
1536
1537 free_spec:
1538         kfree(spec_l2);
1539         kfree(spec_l3);
1540         kfree(spec_l4);
1541         return err;
1542 }
1543
1544 static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev,
1545                                              struct ethtool_rxnfc *cmd,
1546                                              struct list_head *rule_list_h)
1547 {
1548         int err;
1549         struct ethhdr *eth_spec;
1550         struct mlx4_spec_list *spec_l2;
1551         struct mlx4_en_priv *priv = netdev_priv(dev);
1552
1553         err = mlx4_en_validate_flow(dev, cmd);
1554         if (err)
1555                 return err;
1556
1557         switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
1558         case ETHER_FLOW:
1559                 spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1560                 if (!spec_l2)
1561                         return -ENOMEM;
1562
1563                 eth_spec = &cmd->fs.h_u.ether_spec;
1564                 mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2,
1565                                              &eth_spec->h_dest[0]);
1566                 spec_l2->eth.ether_type = eth_spec->h_proto;
1567                 if (eth_spec->h_proto)
1568                         spec_l2->eth.ether_type_enable = 1;
1569                 break;
1570         case IP_USER_FLOW:
1571                 err = add_ip_rule(priv, cmd, rule_list_h);
1572                 break;
1573         case TCP_V4_FLOW:
1574                 err = add_tcp_udp_rule(priv, cmd, rule_list_h, TCP_V4_FLOW);
1575                 break;
1576         case UDP_V4_FLOW:
1577                 err = add_tcp_udp_rule(priv, cmd, rule_list_h, UDP_V4_FLOW);
1578                 break;
1579         }
1580
1581         return err;
1582 }
1583
1584 static int mlx4_en_flow_replace(struct net_device *dev,
1585                                 struct ethtool_rxnfc *cmd)
1586 {
1587         int err;
1588         struct mlx4_en_priv *priv = netdev_priv(dev);
1589         struct ethtool_flow_id *loc_rule;
1590         struct mlx4_spec_list *spec, *tmp_spec;
1591         u32 qpn;
1592         u64 reg_id;
1593
1594         struct mlx4_net_trans_rule rule = {
1595                 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
1596                 .exclusive = 0,
1597                 .allow_loopback = 1,
1598                 .promisc_mode = MLX4_FS_REGULAR,
1599         };
1600
1601         rule.port = priv->port;
1602         rule.priority = MLX4_DOMAIN_ETHTOOL | cmd->fs.location;
1603         INIT_LIST_HEAD(&rule.list);
1604
1605         /* Allow direct QP attaches if the EN_ETHTOOL_QP_ATTACH flag is set */
1606         if (cmd->fs.ring_cookie == RX_CLS_FLOW_DISC)
1607                 qpn = priv->drop_qp.qpn;
1608         else if (cmd->fs.ring_cookie & EN_ETHTOOL_QP_ATTACH) {
1609                 qpn = cmd->fs.ring_cookie & (EN_ETHTOOL_QP_ATTACH - 1);
1610         } else {
1611                 if (cmd->fs.ring_cookie >= priv->rx_ring_num) {
1612                         en_warn(priv, "rxnfc: RX ring (%llu) doesn't exist\n",
1613                                 cmd->fs.ring_cookie);
1614                         return -EINVAL;
1615                 }
1616                 qpn = priv->rss_map.qps[cmd->fs.ring_cookie].qpn;
1617                 if (!qpn) {
1618                         en_warn(priv, "rxnfc: RX ring (%llu) is inactive\n",
1619                                 cmd->fs.ring_cookie);
1620                         return -EINVAL;
1621                 }
1622         }
1623         rule.qpn = qpn;
1624         err = mlx4_en_ethtool_to_net_trans_rule(dev, cmd, &rule.list);
1625         if (err)
1626                 goto out_free_list;
1627
1628         loc_rule = &priv->ethtool_rules[cmd->fs.location];
1629         if (loc_rule->id) {
1630                 err = mlx4_flow_detach(priv->mdev->dev, loc_rule->id);
1631                 if (err) {
1632                         en_err(priv, "Fail to detach network rule at location %d. registration id = %llx\n",
1633                                cmd->fs.location, loc_rule->id);
1634                         goto out_free_list;
1635                 }
1636                 loc_rule->id = 0;
1637                 memset(&loc_rule->flow_spec, 0,
1638                        sizeof(struct ethtool_rx_flow_spec));
1639                 list_del(&loc_rule->list);
1640         }
1641         err = mlx4_flow_attach(priv->mdev->dev, &rule, &reg_id);
1642         if (err) {
1643                 en_err(priv, "Fail to attach network rule at location %d\n",
1644                        cmd->fs.location);
1645                 goto out_free_list;
1646         }
1647         loc_rule->id = reg_id;
1648         memcpy(&loc_rule->flow_spec, &cmd->fs,
1649                sizeof(struct ethtool_rx_flow_spec));
1650         list_add_tail(&loc_rule->list, &priv->ethtool_list);
1651
1652 out_free_list:
1653         list_for_each_entry_safe(spec, tmp_spec, &rule.list, list) {
1654                 list_del(&spec->list);
1655                 kfree(spec);
1656         }
1657         return err;
1658 }
1659
1660 static int mlx4_en_flow_detach(struct net_device *dev,
1661                                struct ethtool_rxnfc *cmd)
1662 {
1663         int err = 0;
1664         struct ethtool_flow_id *rule;
1665         struct mlx4_en_priv *priv = netdev_priv(dev);
1666
1667         if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1668                 return -EINVAL;
1669
1670         rule = &priv->ethtool_rules[cmd->fs.location];
1671         if (!rule->id) {
1672                 err =  -ENOENT;
1673                 goto out;
1674         }
1675
1676         err = mlx4_flow_detach(priv->mdev->dev, rule->id);
1677         if (err) {
1678                 en_err(priv, "Fail to detach network rule at location %d. registration id = 0x%llx\n",
1679                        cmd->fs.location, rule->id);
1680                 goto out;
1681         }
1682         rule->id = 0;
1683         memset(&rule->flow_spec, 0, sizeof(struct ethtool_rx_flow_spec));
1684         list_del(&rule->list);
1685 out:
1686         return err;
1687
1688 }
1689
1690 static int mlx4_en_get_flow(struct net_device *dev, struct ethtool_rxnfc *cmd,
1691                             int loc)
1692 {
1693         int err = 0;
1694         struct ethtool_flow_id *rule;
1695         struct mlx4_en_priv *priv = netdev_priv(dev);
1696
1697         if (loc < 0 || loc >= MAX_NUM_OF_FS_RULES)
1698                 return -EINVAL;
1699
1700         rule = &priv->ethtool_rules[loc];
1701         if (rule->id)
1702                 memcpy(&cmd->fs, &rule->flow_spec,
1703                        sizeof(struct ethtool_rx_flow_spec));
1704         else
1705                 err = -ENOENT;
1706
1707         return err;
1708 }
1709
1710 static int mlx4_en_get_num_flows(struct mlx4_en_priv *priv)
1711 {
1712
1713         int i, res = 0;
1714         for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {
1715                 if (priv->ethtool_rules[i].id)
1716                         res++;
1717         }
1718         return res;
1719
1720 }
1721
1722 static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1723                              u32 *rule_locs)
1724 {
1725         struct mlx4_en_priv *priv = netdev_priv(dev);
1726         struct mlx4_en_dev *mdev = priv->mdev;
1727         int err = 0;
1728         int i = 0, priority = 0;
1729
1730         if ((cmd->cmd == ETHTOOL_GRXCLSRLCNT ||
1731              cmd->cmd == ETHTOOL_GRXCLSRULE ||
1732              cmd->cmd == ETHTOOL_GRXCLSRLALL) &&
1733             (mdev->dev->caps.steering_mode !=
1734              MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up))
1735                 return -EINVAL;
1736
1737         switch (cmd->cmd) {
1738         case ETHTOOL_GRXRINGS:
1739                 cmd->data = priv->rx_ring_num;
1740                 break;
1741         case ETHTOOL_GRXCLSRLCNT:
1742                 cmd->rule_cnt = mlx4_en_get_num_flows(priv);
1743                 break;
1744         case ETHTOOL_GRXCLSRULE:
1745                 err = mlx4_en_get_flow(dev, cmd, cmd->fs.location);
1746                 break;
1747         case ETHTOOL_GRXCLSRLALL:
1748                 while ((!err || err == -ENOENT) && priority < cmd->rule_cnt) {
1749                         err = mlx4_en_get_flow(dev, cmd, i);
1750                         if (!err)
1751                                 rule_locs[priority++] = i;
1752                         i++;
1753                 }
1754                 err = 0;
1755                 break;
1756         default:
1757                 err = -EOPNOTSUPP;
1758                 break;
1759         }
1760
1761         return err;
1762 }
1763
1764 static int mlx4_en_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1765 {
1766         int err = 0;
1767         struct mlx4_en_priv *priv = netdev_priv(dev);
1768         struct mlx4_en_dev *mdev = priv->mdev;
1769
1770         if (mdev->dev->caps.steering_mode !=
1771             MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up)
1772                 return -EINVAL;
1773
1774         switch (cmd->cmd) {
1775         case ETHTOOL_SRXCLSRLINS:
1776                 err = mlx4_en_flow_replace(dev, cmd);
1777                 break;
1778         case ETHTOOL_SRXCLSRLDEL:
1779                 err = mlx4_en_flow_detach(dev, cmd);
1780                 break;
1781         default:
1782                 en_warn(priv, "Unsupported ethtool command. (%d)\n", cmd->cmd);
1783                 return -EINVAL;
1784         }
1785
1786         return err;
1787 }
1788
1789 static int mlx4_en_get_max_num_rx_rings(struct net_device *dev)
1790 {
1791         return min_t(int, num_online_cpus(), MAX_RX_RINGS);
1792 }
1793
1794 static void mlx4_en_get_channels(struct net_device *dev,
1795                                  struct ethtool_channels *channel)
1796 {
1797         struct mlx4_en_priv *priv = netdev_priv(dev);
1798
1799         channel->max_rx = mlx4_en_get_max_num_rx_rings(dev);
1800         channel->max_tx = priv->mdev->profile.max_num_tx_rings_p_up;
1801
1802         channel->rx_count = priv->rx_ring_num;
1803         channel->tx_count = priv->tx_ring_num[TX] /
1804                             priv->prof->num_up;
1805 }
1806
1807 static int mlx4_en_set_channels(struct net_device *dev,
1808                                 struct ethtool_channels *channel)
1809 {
1810         struct mlx4_en_priv *priv = netdev_priv(dev);
1811         struct mlx4_en_dev *mdev = priv->mdev;
1812         struct mlx4_en_port_profile new_prof;
1813         struct mlx4_en_priv *tmp;
1814         int port_up = 0;
1815         int xdp_count;
1816         int err = 0;
1817         u8 up;
1818
1819         if (!channel->tx_count || !channel->rx_count)
1820                 return -EINVAL;
1821
1822         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
1823         if (!tmp)
1824                 return -ENOMEM;
1825
1826         mutex_lock(&mdev->state_lock);
1827         xdp_count = priv->tx_ring_num[TX_XDP] ? channel->rx_count : 0;
1828         if (channel->tx_count * priv->prof->num_up + xdp_count >
1829             priv->mdev->profile.max_num_tx_rings_p_up * priv->prof->num_up) {
1830                 err = -EINVAL;
1831                 en_err(priv,
1832                        "Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",
1833                        channel->tx_count * priv->prof->num_up  + xdp_count,
1834                        MAX_TX_RINGS);
1835                 goto out;
1836         }
1837
1838         memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
1839         new_prof.num_tx_rings_p_up = channel->tx_count;
1840         new_prof.tx_ring_num[TX] = channel->tx_count * priv->prof->num_up;
1841         new_prof.tx_ring_num[TX_XDP] = xdp_count;
1842         new_prof.rx_ring_num = channel->rx_count;
1843
1844         err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
1845         if (err)
1846                 goto out;
1847
1848         if (priv->port_up) {
1849                 port_up = 1;
1850                 mlx4_en_stop_port(dev, 1);
1851         }
1852
1853         mlx4_en_safe_replace_resources(priv, tmp);
1854
1855         netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
1856
1857         up = (priv->prof->num_up == MLX4_EN_NUM_UP_LOW) ?
1858                                     0 : priv->prof->num_up;
1859         mlx4_en_setup_tc(dev, up);
1860
1861         en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num[TX]);
1862         en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
1863
1864         if (port_up) {
1865                 err = mlx4_en_start_port(dev);
1866                 if (err)
1867                         en_err(priv, "Failed starting port\n");
1868         }
1869
1870         err = mlx4_en_moderation_update(priv);
1871 out:
1872         mutex_unlock(&mdev->state_lock);
1873         kfree(tmp);
1874         return err;
1875 }
1876
1877 static int mlx4_en_get_ts_info(struct net_device *dev,
1878                                struct ethtool_ts_info *info)
1879 {
1880         struct mlx4_en_priv *priv = netdev_priv(dev);
1881         struct mlx4_en_dev *mdev = priv->mdev;
1882         int ret;
1883
1884         ret = ethtool_op_get_ts_info(dev, info);
1885         if (ret)
1886                 return ret;
1887
1888         if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
1889                 info->so_timestamping |=
1890                         SOF_TIMESTAMPING_TX_HARDWARE |
1891                         SOF_TIMESTAMPING_RX_HARDWARE |
1892                         SOF_TIMESTAMPING_RAW_HARDWARE;
1893
1894                 info->tx_types =
1895                         (1 << HWTSTAMP_TX_OFF) |
1896                         (1 << HWTSTAMP_TX_ON);
1897
1898                 info->rx_filters =
1899                         (1 << HWTSTAMP_FILTER_NONE) |
1900                         (1 << HWTSTAMP_FILTER_ALL);
1901
1902                 if (mdev->ptp_clock)
1903                         info->phc_index = ptp_clock_index(mdev->ptp_clock);
1904         }
1905
1906         return ret;
1907 }
1908
1909 static int mlx4_en_set_priv_flags(struct net_device *dev, u32 flags)
1910 {
1911         struct mlx4_en_priv *priv = netdev_priv(dev);
1912         struct mlx4_en_dev *mdev = priv->mdev;
1913         bool bf_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1914         bool bf_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1915         bool phv_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_PHV);
1916         bool phv_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_PHV);
1917         int i;
1918         int ret = 0;
1919
1920         if (bf_enabled_new != bf_enabled_old) {
1921                 int t;
1922
1923                 if (bf_enabled_new) {
1924                         bool bf_supported = true;
1925
1926                         for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1927                                 for (i = 0; i < priv->tx_ring_num[t]; i++)
1928                                         bf_supported &=
1929                                                 priv->tx_ring[t][i]->bf_alloced;
1930
1931                         if (!bf_supported) {
1932                                 en_err(priv, "BlueFlame is not supported\n");
1933                                 return -EINVAL;
1934                         }
1935
1936                         priv->pflags |= MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1937                 } else {
1938                         priv->pflags &= ~MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1939                 }
1940
1941                 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1942                         for (i = 0; i < priv->tx_ring_num[t]; i++)
1943                                 priv->tx_ring[t][i]->bf_enabled =
1944                                         bf_enabled_new;
1945
1946                 en_info(priv, "BlueFlame %s\n",
1947                         bf_enabled_new ?  "Enabled" : "Disabled");
1948         }
1949
1950         if (phv_enabled_new != phv_enabled_old) {
1951                 ret = set_phv_bit(mdev->dev, priv->port, (int)phv_enabled_new);
1952                 if (ret)
1953                         return ret;
1954                 else if (phv_enabled_new)
1955                         priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
1956                 else
1957                         priv->pflags &= ~MLX4_EN_PRIV_FLAGS_PHV;
1958                 en_info(priv, "PHV bit %s\n",
1959                         phv_enabled_new ?  "Enabled" : "Disabled");
1960         }
1961         return 0;
1962 }
1963
1964 static u32 mlx4_en_get_priv_flags(struct net_device *dev)
1965 {
1966         struct mlx4_en_priv *priv = netdev_priv(dev);
1967
1968         return priv->pflags;
1969 }
1970
1971 static int mlx4_en_get_tunable(struct net_device *dev,
1972                                const struct ethtool_tunable *tuna,
1973                                void *data)
1974 {
1975         const struct mlx4_en_priv *priv = netdev_priv(dev);
1976         int ret = 0;
1977
1978         switch (tuna->id) {
1979         case ETHTOOL_TX_COPYBREAK:
1980                 *(u32 *)data = priv->prof->inline_thold;
1981                 break;
1982         default:
1983                 ret = -EINVAL;
1984                 break;
1985         }
1986
1987         return ret;
1988 }
1989
1990 static int mlx4_en_set_tunable(struct net_device *dev,
1991                                const struct ethtool_tunable *tuna,
1992                                const void *data)
1993 {
1994         struct mlx4_en_priv *priv = netdev_priv(dev);
1995         int val, ret = 0;
1996
1997         switch (tuna->id) {
1998         case ETHTOOL_TX_COPYBREAK:
1999                 val = *(u32 *)data;
2000                 if (val < MIN_PKT_LEN || val > MAX_INLINE)
2001                         ret = -EINVAL;
2002                 else
2003                         priv->prof->inline_thold = val;
2004                 break;
2005         default:
2006                 ret = -EINVAL;
2007                 break;
2008         }
2009
2010         return ret;
2011 }
2012
2013 static int mlx4_en_get_module_info(struct net_device *dev,
2014                                    struct ethtool_modinfo *modinfo)
2015 {
2016         struct mlx4_en_priv *priv = netdev_priv(dev);
2017         struct mlx4_en_dev *mdev = priv->mdev;
2018         int ret;
2019         u8 data[4];
2020
2021         /* Read first 2 bytes to get Module & REV ID */
2022         ret = mlx4_get_module_info(mdev->dev, priv->port,
2023                                    0/*offset*/, 2/*size*/, data);
2024         if (ret < 2)
2025                 return -EIO;
2026
2027         switch (data[0] /* identifier */) {
2028         case MLX4_MODULE_ID_QSFP:
2029                 modinfo->type = ETH_MODULE_SFF_8436;
2030                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2031                 break;
2032         case MLX4_MODULE_ID_QSFP_PLUS:
2033                 if (data[1] >= 0x3) { /* revision id */
2034                         modinfo->type = ETH_MODULE_SFF_8636;
2035                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2036                 } else {
2037                         modinfo->type = ETH_MODULE_SFF_8436;
2038                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2039                 }
2040                 break;
2041         case MLX4_MODULE_ID_QSFP28:
2042                 modinfo->type = ETH_MODULE_SFF_8636;
2043                 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2044                 break;
2045         case MLX4_MODULE_ID_SFP:
2046                 modinfo->type = ETH_MODULE_SFF_8472;
2047                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2048                 break;
2049         default:
2050                 return -EINVAL;
2051         }
2052
2053         return 0;
2054 }
2055
2056 static int mlx4_en_get_module_eeprom(struct net_device *dev,
2057                                      struct ethtool_eeprom *ee,
2058                                      u8 *data)
2059 {
2060         struct mlx4_en_priv *priv = netdev_priv(dev);
2061         struct mlx4_en_dev *mdev = priv->mdev;
2062         int offset = ee->offset;
2063         int i = 0, ret;
2064
2065         if (ee->len == 0)
2066                 return -EINVAL;
2067
2068         memset(data, 0, ee->len);
2069
2070         while (i < ee->len) {
2071                 en_dbg(DRV, priv,
2072                        "mlx4_get_module_info i(%d) offset(%d) len(%d)\n",
2073                        i, offset, ee->len - i);
2074
2075                 ret = mlx4_get_module_info(mdev->dev, priv->port,
2076                                            offset, ee->len - i, data + i);
2077
2078                 if (!ret) /* Done reading */
2079                         return 0;
2080
2081                 if (ret < 0) {
2082                         en_err(priv,
2083                                "mlx4_get_module_info i(%d) offset(%d) bytes_to_read(%d) - FAILED (0x%x)\n",
2084                                i, offset, ee->len - i, ret);
2085                         return 0;
2086                 }
2087
2088                 i += ret;
2089                 offset += ret;
2090         }
2091         return 0;
2092 }
2093
2094 static int mlx4_en_set_phys_id(struct net_device *dev,
2095                                enum ethtool_phys_id_state state)
2096 {
2097         int err;
2098         u16 beacon_duration;
2099         struct mlx4_en_priv *priv = netdev_priv(dev);
2100         struct mlx4_en_dev *mdev = priv->mdev;
2101
2102         if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_BEACON))
2103                 return -EOPNOTSUPP;
2104
2105         switch (state) {
2106         case ETHTOOL_ID_ACTIVE:
2107                 beacon_duration = PORT_BEACON_MAX_LIMIT;
2108                 break;
2109         case ETHTOOL_ID_INACTIVE:
2110                 beacon_duration = 0;
2111                 break;
2112         default:
2113                 return -EOPNOTSUPP;
2114         }
2115
2116         err = mlx4_SET_PORT_BEACON(mdev->dev, priv->port, beacon_duration);
2117         return err;
2118 }
2119
2120 const struct ethtool_ops mlx4_en_ethtool_ops = {
2121         .get_drvinfo = mlx4_en_get_drvinfo,
2122         .get_link_ksettings = mlx4_en_get_link_ksettings,
2123         .set_link_ksettings = mlx4_en_set_link_ksettings,
2124         .get_link = ethtool_op_get_link,
2125         .get_strings = mlx4_en_get_strings,
2126         .get_sset_count = mlx4_en_get_sset_count,
2127         .get_ethtool_stats = mlx4_en_get_ethtool_stats,
2128         .self_test = mlx4_en_self_test,
2129         .set_phys_id = mlx4_en_set_phys_id,
2130         .get_wol = mlx4_en_get_wol,
2131         .set_wol = mlx4_en_set_wol,
2132         .get_msglevel = mlx4_en_get_msglevel,
2133         .set_msglevel = mlx4_en_set_msglevel,
2134         .get_coalesce = mlx4_en_get_coalesce,
2135         .set_coalesce = mlx4_en_set_coalesce,
2136         .get_pauseparam = mlx4_en_get_pauseparam,
2137         .set_pauseparam = mlx4_en_set_pauseparam,
2138         .get_ringparam = mlx4_en_get_ringparam,
2139         .set_ringparam = mlx4_en_set_ringparam,
2140         .get_rxnfc = mlx4_en_get_rxnfc,
2141         .set_rxnfc = mlx4_en_set_rxnfc,
2142         .get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
2143         .get_rxfh_key_size = mlx4_en_get_rxfh_key_size,
2144         .get_rxfh = mlx4_en_get_rxfh,
2145         .set_rxfh = mlx4_en_set_rxfh,
2146         .get_channels = mlx4_en_get_channels,
2147         .set_channels = mlx4_en_set_channels,
2148         .get_ts_info = mlx4_en_get_ts_info,
2149         .set_priv_flags = mlx4_en_set_priv_flags,
2150         .get_priv_flags = mlx4_en_get_priv_flags,
2151         .get_tunable            = mlx4_en_get_tunable,
2152         .set_tunable            = mlx4_en_set_tunable,
2153         .get_module_info = mlx4_en_get_module_info,
2154         .get_module_eeprom = mlx4_en_get_module_eeprom
2155 };
2156
2157
2158
2159
2160