1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
32 #include <asm/idprom.h>
38 #include "i40e_diag.h"
39 #if IS_ENABLED(CONFIG_VXLAN)
40 #include <net/vxlan.h>
42 #if IS_ENABLED(CONFIG_GENEVE)
43 #include <net/geneve.h>
46 const char i40e_driver_name[] = "i40e";
47 static const char i40e_driver_string[] =
48 "Intel(R) Ethernet Connection XL710 Network Driver";
52 #define DRV_VERSION_MAJOR 1
53 #define DRV_VERSION_MINOR 4
54 #define DRV_VERSION_BUILD 12
55 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
56 __stringify(DRV_VERSION_MINOR) "." \
57 __stringify(DRV_VERSION_BUILD) DRV_KERN
58 const char i40e_driver_version_str[] = DRV_VERSION;
59 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
61 /* a bit of forward declarations */
62 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
63 static void i40e_handle_reset_warning(struct i40e_pf *pf);
64 static int i40e_add_vsi(struct i40e_vsi *vsi);
65 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
66 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
67 static int i40e_setup_misc_vector(struct i40e_pf *pf);
68 static void i40e_determine_queue_usage(struct i40e_pf *pf);
69 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
70 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
71 u16 rss_table_size, u16 rss_size);
72 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
73 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
75 /* i40e_pci_tbl - PCI Device ID Table
77 * Last entry must be all 0s
79 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
80 * Class, Class Mask, private data (not used) }
82 static const struct pci_device_id i40e_pci_tbl[] = {
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
97 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
98 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
99 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
100 /* required last entry */
103 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
105 #define I40E_MAX_VF_COUNT 128
106 static int debug = -1;
107 module_param(debug, int, 0);
108 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
110 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
111 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
112 MODULE_LICENSE("GPL");
113 MODULE_VERSION(DRV_VERSION);
115 static struct workqueue_struct *i40e_wq;
118 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
119 * @hw: pointer to the HW structure
120 * @mem: ptr to mem struct to fill out
121 * @size: size of memory requested
122 * @alignment: what to align the allocation to
124 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
125 u64 size, u32 alignment)
127 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
129 mem->size = ALIGN(size, alignment);
130 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
131 &mem->pa, GFP_KERNEL);
139 * i40e_free_dma_mem_d - OS specific memory free for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to free
143 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
145 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
147 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
156 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
157 * @hw: pointer to the HW structure
158 * @mem: ptr to mem struct to fill out
159 * @size: size of memory requested
161 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
165 mem->va = kzalloc(size, GFP_KERNEL);
174 * i40e_free_virt_mem_d - OS specific memory free for shared code
175 * @hw: pointer to the HW structure
176 * @mem: ptr to mem struct to free
178 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
180 /* it's ok to kfree a NULL pointer */
189 * i40e_get_lump - find a lump of free generic resource
190 * @pf: board private structure
191 * @pile: the pile of resource to search
192 * @needed: the number of items needed
193 * @id: an owner id to stick on the items assigned
195 * Returns the base item index of the lump, or negative for error
197 * The search_hint trick and lack of advanced fit-finding only work
198 * because we're highly likely to have all the same size lump requests.
199 * Linear search time and any fragmentation should be minimal.
201 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
207 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
208 dev_info(&pf->pdev->dev,
209 "param err: pile=%p needed=%d id=0x%04x\n",
214 /* start the linear search with an imperfect hint */
215 i = pile->search_hint;
216 while (i < pile->num_entries) {
217 /* skip already allocated entries */
218 if (pile->list[i] & I40E_PILE_VALID_BIT) {
223 /* do we have enough in this lump? */
224 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
225 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
230 /* there was enough, so assign it to the requestor */
231 for (j = 0; j < needed; j++)
232 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
234 pile->search_hint = i + j;
238 /* not enough, so skip over it and continue looking */
246 * i40e_put_lump - return a lump of generic resource
247 * @pile: the pile of resource to search
248 * @index: the base item index
249 * @id: the owner id of the items assigned
251 * Returns the count of items in the lump
253 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
255 int valid_id = (id | I40E_PILE_VALID_BIT);
259 if (!pile || index >= pile->num_entries)
263 i < pile->num_entries && pile->list[i] == valid_id;
269 if (count && index < pile->search_hint)
270 pile->search_hint = index;
276 * i40e_find_vsi_from_id - searches for the vsi with the given id
277 * @pf - the pf structure to search for the vsi
278 * @id - id of the vsi it is searching for
280 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
284 for (i = 0; i < pf->num_alloc_vsi; i++)
285 if (pf->vsi[i] && (pf->vsi[i]->id == id))
292 * i40e_service_event_schedule - Schedule the service task to wake up
293 * @pf: board private structure
295 * If not already scheduled, this puts the task into the work queue
297 static void i40e_service_event_schedule(struct i40e_pf *pf)
299 if (!test_bit(__I40E_DOWN, &pf->state) &&
300 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
301 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
302 queue_work(i40e_wq, &pf->service_task);
306 * i40e_tx_timeout - Respond to a Tx Hang
307 * @netdev: network interface device structure
309 * If any port has noticed a Tx timeout, it is likely that the whole
310 * device is munged, not just the one netdev port, so go for the full
314 void i40e_tx_timeout(struct net_device *netdev)
316 static void i40e_tx_timeout(struct net_device *netdev)
319 struct i40e_netdev_priv *np = netdev_priv(netdev);
320 struct i40e_vsi *vsi = np->vsi;
321 struct i40e_pf *pf = vsi->back;
322 struct i40e_ring *tx_ring = NULL;
323 unsigned int i, hung_queue = 0;
326 pf->tx_timeout_count++;
328 /* find the stopped queue the same way the stack does */
329 for (i = 0; i < netdev->num_tx_queues; i++) {
330 struct netdev_queue *q;
331 unsigned long trans_start;
333 q = netdev_get_tx_queue(netdev, i);
334 trans_start = q->trans_start ? : netdev->trans_start;
335 if (netif_xmit_stopped(q) &&
337 (trans_start + netdev->watchdog_timeo))) {
343 if (i == netdev->num_tx_queues) {
344 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
346 /* now that we have an index, find the tx_ring struct */
347 for (i = 0; i < vsi->num_queue_pairs; i++) {
348 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
350 vsi->tx_rings[i]->queue_index) {
351 tx_ring = vsi->tx_rings[i];
358 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
359 pf->tx_timeout_recovery_level = 1; /* reset after some time */
360 else if (time_before(jiffies,
361 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
362 return; /* don't do any new action before the next timeout */
365 head = i40e_get_head(tx_ring);
366 /* Read interrupt register */
367 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
369 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
370 tx_ring->vsi->base_vector - 1));
372 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
374 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
375 vsi->seid, hung_queue, tx_ring->next_to_clean,
376 head, tx_ring->next_to_use,
377 readl(tx_ring->tail), val);
380 pf->tx_timeout_last_recovery = jiffies;
381 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
382 pf->tx_timeout_recovery_level, hung_queue);
384 switch (pf->tx_timeout_recovery_level) {
386 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
389 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
392 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
395 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
399 i40e_service_event_schedule(pf);
400 pf->tx_timeout_recovery_level++;
404 * i40e_release_rx_desc - Store the new tail and head values
405 * @rx_ring: ring to bump
406 * @val: new head index
408 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
410 rx_ring->next_to_use = val;
412 /* Force memory writes to complete before letting h/w
413 * know there are new descriptors to fetch. (Only
414 * applicable for weak-ordered memory model archs,
418 writel(val, rx_ring->tail);
422 * i40e_get_vsi_stats_struct - Get System Network Statistics
423 * @vsi: the VSI we care about
425 * Returns the address of the device statistics structure.
426 * The statistics are actually updated from the service task.
428 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
430 return &vsi->net_stats;
434 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
435 * @netdev: network interface device structure
437 * Returns the address of the device statistics structure.
438 * The statistics are actually updated from the service task.
441 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
442 struct net_device *netdev,
443 struct rtnl_link_stats64 *stats)
445 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
446 struct net_device *netdev,
447 struct rtnl_link_stats64 *stats)
450 struct i40e_netdev_priv *np = netdev_priv(netdev);
451 struct i40e_ring *tx_ring, *rx_ring;
452 struct i40e_vsi *vsi = np->vsi;
453 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
456 if (test_bit(__I40E_DOWN, &vsi->state))
463 for (i = 0; i < vsi->num_queue_pairs; i++) {
467 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
472 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
473 packets = tx_ring->stats.packets;
474 bytes = tx_ring->stats.bytes;
475 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
477 stats->tx_packets += packets;
478 stats->tx_bytes += bytes;
479 rx_ring = &tx_ring[1];
482 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
483 packets = rx_ring->stats.packets;
484 bytes = rx_ring->stats.bytes;
485 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
487 stats->rx_packets += packets;
488 stats->rx_bytes += bytes;
492 /* following stats updated by i40e_watchdog_subtask() */
493 stats->multicast = vsi_stats->multicast;
494 stats->tx_errors = vsi_stats->tx_errors;
495 stats->tx_dropped = vsi_stats->tx_dropped;
496 stats->rx_errors = vsi_stats->rx_errors;
497 stats->rx_dropped = vsi_stats->rx_dropped;
498 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
499 stats->rx_length_errors = vsi_stats->rx_length_errors;
505 * i40e_vsi_reset_stats - Resets all stats of the given vsi
506 * @vsi: the VSI to have its stats reset
508 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
510 struct rtnl_link_stats64 *ns;
516 ns = i40e_get_vsi_stats_struct(vsi);
517 memset(ns, 0, sizeof(*ns));
518 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
519 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
520 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
521 if (vsi->rx_rings && vsi->rx_rings[0]) {
522 for (i = 0; i < vsi->num_queue_pairs; i++) {
523 memset(&vsi->rx_rings[i]->stats, 0,
524 sizeof(vsi->rx_rings[i]->stats));
525 memset(&vsi->rx_rings[i]->rx_stats, 0,
526 sizeof(vsi->rx_rings[i]->rx_stats));
527 memset(&vsi->tx_rings[i]->stats, 0,
528 sizeof(vsi->tx_rings[i]->stats));
529 memset(&vsi->tx_rings[i]->tx_stats, 0,
530 sizeof(vsi->tx_rings[i]->tx_stats));
533 vsi->stat_offsets_loaded = false;
537 * i40e_pf_reset_stats - Reset all of the stats for the given PF
538 * @pf: the PF to be reset
540 void i40e_pf_reset_stats(struct i40e_pf *pf)
544 memset(&pf->stats, 0, sizeof(pf->stats));
545 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
546 pf->stat_offsets_loaded = false;
548 for (i = 0; i < I40E_MAX_VEB; i++) {
550 memset(&pf->veb[i]->stats, 0,
551 sizeof(pf->veb[i]->stats));
552 memset(&pf->veb[i]->stats_offsets, 0,
553 sizeof(pf->veb[i]->stats_offsets));
554 pf->veb[i]->stat_offsets_loaded = false;
560 * i40e_stat_update48 - read and update a 48 bit stat from the chip
561 * @hw: ptr to the hardware info
562 * @hireg: the high 32 bit reg to read
563 * @loreg: the low 32 bit reg to read
564 * @offset_loaded: has the initial offset been loaded yet
565 * @offset: ptr to current offset value
566 * @stat: ptr to the stat
568 * Since the device stats are not reset at PFReset, they likely will not
569 * be zeroed when the driver starts. We'll save the first values read
570 * and use them as offsets to be subtracted from the raw values in order
571 * to report stats that count from zero. In the process, we also manage
572 * the potential roll-over.
574 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
575 bool offset_loaded, u64 *offset, u64 *stat)
579 if (hw->device_id == I40E_DEV_ID_QEMU) {
580 new_data = rd32(hw, loreg);
581 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
583 new_data = rd64(hw, loreg);
587 if (likely(new_data >= *offset))
588 *stat = new_data - *offset;
590 *stat = (new_data + BIT_ULL(48)) - *offset;
591 *stat &= 0xFFFFFFFFFFFFULL;
595 * i40e_stat_update32 - read and update a 32 bit stat from the chip
596 * @hw: ptr to the hardware info
597 * @reg: the hw reg to read
598 * @offset_loaded: has the initial offset been loaded yet
599 * @offset: ptr to current offset value
600 * @stat: ptr to the stat
602 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
603 bool offset_loaded, u64 *offset, u64 *stat)
607 new_data = rd32(hw, reg);
610 if (likely(new_data >= *offset))
611 *stat = (u32)(new_data - *offset);
613 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
617 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
618 * @vsi: the VSI to be updated
620 void i40e_update_eth_stats(struct i40e_vsi *vsi)
622 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
623 struct i40e_pf *pf = vsi->back;
624 struct i40e_hw *hw = &pf->hw;
625 struct i40e_eth_stats *oes;
626 struct i40e_eth_stats *es; /* device's eth stats */
628 es = &vsi->eth_stats;
629 oes = &vsi->eth_stats_offsets;
631 /* Gather up the stats that the hw collects */
632 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
633 vsi->stat_offsets_loaded,
634 &oes->tx_errors, &es->tx_errors);
635 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->rx_discards, &es->rx_discards);
638 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
639 vsi->stat_offsets_loaded,
640 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
641 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->tx_errors, &es->tx_errors);
645 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
646 I40E_GLV_GORCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->rx_bytes, &es->rx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
650 I40E_GLV_UPRCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->rx_unicast, &es->rx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
654 I40E_GLV_MPRCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->rx_multicast, &es->rx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
658 I40E_GLV_BPRCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->rx_broadcast, &es->rx_broadcast);
662 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
663 I40E_GLV_GOTCL(stat_idx),
664 vsi->stat_offsets_loaded,
665 &oes->tx_bytes, &es->tx_bytes);
666 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
667 I40E_GLV_UPTCL(stat_idx),
668 vsi->stat_offsets_loaded,
669 &oes->tx_unicast, &es->tx_unicast);
670 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
671 I40E_GLV_MPTCL(stat_idx),
672 vsi->stat_offsets_loaded,
673 &oes->tx_multicast, &es->tx_multicast);
674 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
675 I40E_GLV_BPTCL(stat_idx),
676 vsi->stat_offsets_loaded,
677 &oes->tx_broadcast, &es->tx_broadcast);
678 vsi->stat_offsets_loaded = true;
682 * i40e_update_veb_stats - Update Switch component statistics
683 * @veb: the VEB being updated
685 static void i40e_update_veb_stats(struct i40e_veb *veb)
687 struct i40e_pf *pf = veb->pf;
688 struct i40e_hw *hw = &pf->hw;
689 struct i40e_eth_stats *oes;
690 struct i40e_eth_stats *es; /* device's eth stats */
691 struct i40e_veb_tc_stats *veb_oes;
692 struct i40e_veb_tc_stats *veb_es;
695 idx = veb->stats_idx;
697 oes = &veb->stats_offsets;
698 veb_es = &veb->tc_stats;
699 veb_oes = &veb->tc_stats_offsets;
701 /* Gather up the stats that the hw collects */
702 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
703 veb->stat_offsets_loaded,
704 &oes->tx_discards, &es->tx_discards);
705 if (hw->revision_id > 0)
706 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
707 veb->stat_offsets_loaded,
708 &oes->rx_unknown_protocol,
709 &es->rx_unknown_protocol);
710 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
711 veb->stat_offsets_loaded,
712 &oes->rx_bytes, &es->rx_bytes);
713 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
714 veb->stat_offsets_loaded,
715 &oes->rx_unicast, &es->rx_unicast);
716 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
717 veb->stat_offsets_loaded,
718 &oes->rx_multicast, &es->rx_multicast);
719 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
720 veb->stat_offsets_loaded,
721 &oes->rx_broadcast, &es->rx_broadcast);
723 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
724 veb->stat_offsets_loaded,
725 &oes->tx_bytes, &es->tx_bytes);
726 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
727 veb->stat_offsets_loaded,
728 &oes->tx_unicast, &es->tx_unicast);
729 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
730 veb->stat_offsets_loaded,
731 &oes->tx_multicast, &es->tx_multicast);
732 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
733 veb->stat_offsets_loaded,
734 &oes->tx_broadcast, &es->tx_broadcast);
735 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
736 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
737 I40E_GLVEBTC_RPCL(i, idx),
738 veb->stat_offsets_loaded,
739 &veb_oes->tc_rx_packets[i],
740 &veb_es->tc_rx_packets[i]);
741 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
742 I40E_GLVEBTC_RBCL(i, idx),
743 veb->stat_offsets_loaded,
744 &veb_oes->tc_rx_bytes[i],
745 &veb_es->tc_rx_bytes[i]);
746 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
747 I40E_GLVEBTC_TPCL(i, idx),
748 veb->stat_offsets_loaded,
749 &veb_oes->tc_tx_packets[i],
750 &veb_es->tc_tx_packets[i]);
751 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
752 I40E_GLVEBTC_TBCL(i, idx),
753 veb->stat_offsets_loaded,
754 &veb_oes->tc_tx_bytes[i],
755 &veb_es->tc_tx_bytes[i]);
757 veb->stat_offsets_loaded = true;
762 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
763 * @vsi: the VSI that is capable of doing FCoE
765 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
767 struct i40e_pf *pf = vsi->back;
768 struct i40e_hw *hw = &pf->hw;
769 struct i40e_fcoe_stats *ofs;
770 struct i40e_fcoe_stats *fs; /* device's eth stats */
773 if (vsi->type != I40E_VSI_FCOE)
776 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
777 fs = &vsi->fcoe_stats;
778 ofs = &vsi->fcoe_stats_offsets;
780 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
783 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
784 vsi->fcoe_stat_offsets_loaded,
785 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
786 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
787 vsi->fcoe_stat_offsets_loaded,
788 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
789 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
790 vsi->fcoe_stat_offsets_loaded,
791 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
792 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
793 vsi->fcoe_stat_offsets_loaded,
794 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
795 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
796 vsi->fcoe_stat_offsets_loaded,
797 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
798 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
799 vsi->fcoe_stat_offsets_loaded,
800 &ofs->fcoe_last_error, &fs->fcoe_last_error);
801 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
802 vsi->fcoe_stat_offsets_loaded,
803 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
805 vsi->fcoe_stat_offsets_loaded = true;
810 * i40e_update_vsi_stats - Update the vsi statistics counters.
811 * @vsi: the VSI to be updated
813 * There are a few instances where we store the same stat in a
814 * couple of different structs. This is partly because we have
815 * the netdev stats that need to be filled out, which is slightly
816 * different from the "eth_stats" defined by the chip and used in
817 * VF communications. We sort it out here.
819 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
821 struct i40e_pf *pf = vsi->back;
822 struct rtnl_link_stats64 *ons;
823 struct rtnl_link_stats64 *ns; /* netdev stats */
824 struct i40e_eth_stats *oes;
825 struct i40e_eth_stats *es; /* device's eth stats */
826 u32 tx_restart, tx_busy;
837 if (test_bit(__I40E_DOWN, &vsi->state) ||
838 test_bit(__I40E_CONFIG_BUSY, &pf->state))
841 ns = i40e_get_vsi_stats_struct(vsi);
842 ons = &vsi->net_stats_offsets;
843 es = &vsi->eth_stats;
844 oes = &vsi->eth_stats_offsets;
846 /* Gather up the netdev and vsi stats that the driver collects
847 * on the fly during packet processing
851 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
855 for (q = 0; q < vsi->num_queue_pairs; q++) {
857 p = ACCESS_ONCE(vsi->tx_rings[q]);
860 start = u64_stats_fetch_begin_irq(&p->syncp);
861 packets = p->stats.packets;
862 bytes = p->stats.bytes;
863 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
866 tx_restart += p->tx_stats.restart_queue;
867 tx_busy += p->tx_stats.tx_busy;
868 tx_linearize += p->tx_stats.tx_linearize;
869 tx_force_wb += p->tx_stats.tx_force_wb;
871 /* Rx queue is part of the same block as Tx queue */
874 start = u64_stats_fetch_begin_irq(&p->syncp);
875 packets = p->stats.packets;
876 bytes = p->stats.bytes;
877 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
880 rx_buf += p->rx_stats.alloc_buff_failed;
881 rx_page += p->rx_stats.alloc_page_failed;
884 vsi->tx_restart = tx_restart;
885 vsi->tx_busy = tx_busy;
886 vsi->tx_linearize = tx_linearize;
887 vsi->tx_force_wb = tx_force_wb;
888 vsi->rx_page_failed = rx_page;
889 vsi->rx_buf_failed = rx_buf;
891 ns->rx_packets = rx_p;
893 ns->tx_packets = tx_p;
896 /* update netdev stats from eth stats */
897 i40e_update_eth_stats(vsi);
898 ons->tx_errors = oes->tx_errors;
899 ns->tx_errors = es->tx_errors;
900 ons->multicast = oes->rx_multicast;
901 ns->multicast = es->rx_multicast;
902 ons->rx_dropped = oes->rx_discards;
903 ns->rx_dropped = es->rx_discards;
904 ons->tx_dropped = oes->tx_discards;
905 ns->tx_dropped = es->tx_discards;
907 /* pull in a couple PF stats if this is the main vsi */
908 if (vsi == pf->vsi[pf->lan_vsi]) {
909 ns->rx_crc_errors = pf->stats.crc_errors;
910 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
911 ns->rx_length_errors = pf->stats.rx_length_errors;
916 * i40e_update_pf_stats - Update the PF statistics counters.
917 * @pf: the PF to be updated
919 static void i40e_update_pf_stats(struct i40e_pf *pf)
921 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
922 struct i40e_hw_port_stats *nsd = &pf->stats;
923 struct i40e_hw *hw = &pf->hw;
927 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
928 I40E_GLPRT_GORCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
931 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
932 I40E_GLPRT_GOTCL(hw->port),
933 pf->stat_offsets_loaded,
934 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
935 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->eth.rx_discards,
938 &nsd->eth.rx_discards);
939 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
940 I40E_GLPRT_UPRCL(hw->port),
941 pf->stat_offsets_loaded,
942 &osd->eth.rx_unicast,
943 &nsd->eth.rx_unicast);
944 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
945 I40E_GLPRT_MPRCL(hw->port),
946 pf->stat_offsets_loaded,
947 &osd->eth.rx_multicast,
948 &nsd->eth.rx_multicast);
949 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
950 I40E_GLPRT_BPRCL(hw->port),
951 pf->stat_offsets_loaded,
952 &osd->eth.rx_broadcast,
953 &nsd->eth.rx_broadcast);
954 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
955 I40E_GLPRT_UPTCL(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->eth.tx_unicast,
958 &nsd->eth.tx_unicast);
959 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
960 I40E_GLPRT_MPTCL(hw->port),
961 pf->stat_offsets_loaded,
962 &osd->eth.tx_multicast,
963 &nsd->eth.tx_multicast);
964 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
965 I40E_GLPRT_BPTCL(hw->port),
966 pf->stat_offsets_loaded,
967 &osd->eth.tx_broadcast,
968 &nsd->eth.tx_broadcast);
970 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->tx_dropped_link_down,
973 &nsd->tx_dropped_link_down);
975 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->crc_errors, &nsd->crc_errors);
979 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->illegal_bytes, &nsd->illegal_bytes);
983 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->mac_local_faults,
986 &nsd->mac_local_faults);
987 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->mac_remote_faults,
990 &nsd->mac_remote_faults);
992 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
993 pf->stat_offsets_loaded,
994 &osd->rx_length_errors,
995 &nsd->rx_length_errors);
997 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
998 pf->stat_offsets_loaded,
999 &osd->link_xon_rx, &nsd->link_xon_rx);
1000 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1001 pf->stat_offsets_loaded,
1002 &osd->link_xon_tx, &nsd->link_xon_tx);
1003 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->link_xoff_rx, &nsd->link_xoff_rx);
1006 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1007 pf->stat_offsets_loaded,
1008 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1010 for (i = 0; i < 8; i++) {
1011 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1012 pf->stat_offsets_loaded,
1013 &osd->priority_xoff_rx[i],
1014 &nsd->priority_xoff_rx[i]);
1015 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1016 pf->stat_offsets_loaded,
1017 &osd->priority_xon_rx[i],
1018 &nsd->priority_xon_rx[i]);
1019 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1020 pf->stat_offsets_loaded,
1021 &osd->priority_xon_tx[i],
1022 &nsd->priority_xon_tx[i]);
1023 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1024 pf->stat_offsets_loaded,
1025 &osd->priority_xoff_tx[i],
1026 &nsd->priority_xoff_tx[i]);
1027 i40e_stat_update32(hw,
1028 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1029 pf->stat_offsets_loaded,
1030 &osd->priority_xon_2_xoff[i],
1031 &nsd->priority_xon_2_xoff[i]);
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1035 I40E_GLPRT_PRC64L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_64, &nsd->rx_size_64);
1038 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1039 I40E_GLPRT_PRC127L(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->rx_size_127, &nsd->rx_size_127);
1042 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1043 I40E_GLPRT_PRC255L(hw->port),
1044 pf->stat_offsets_loaded,
1045 &osd->rx_size_255, &nsd->rx_size_255);
1046 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1047 I40E_GLPRT_PRC511L(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->rx_size_511, &nsd->rx_size_511);
1050 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1051 I40E_GLPRT_PRC1023L(hw->port),
1052 pf->stat_offsets_loaded,
1053 &osd->rx_size_1023, &nsd->rx_size_1023);
1054 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1055 I40E_GLPRT_PRC1522L(hw->port),
1056 pf->stat_offsets_loaded,
1057 &osd->rx_size_1522, &nsd->rx_size_1522);
1058 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1059 I40E_GLPRT_PRC9522L(hw->port),
1060 pf->stat_offsets_loaded,
1061 &osd->rx_size_big, &nsd->rx_size_big);
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1064 I40E_GLPRT_PTC64L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_64, &nsd->tx_size_64);
1067 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1068 I40E_GLPRT_PTC127L(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->tx_size_127, &nsd->tx_size_127);
1071 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1072 I40E_GLPRT_PTC255L(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->tx_size_255, &nsd->tx_size_255);
1075 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1076 I40E_GLPRT_PTC511L(hw->port),
1077 pf->stat_offsets_loaded,
1078 &osd->tx_size_511, &nsd->tx_size_511);
1079 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1080 I40E_GLPRT_PTC1023L(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->tx_size_1023, &nsd->tx_size_1023);
1083 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1084 I40E_GLPRT_PTC1522L(hw->port),
1085 pf->stat_offsets_loaded,
1086 &osd->tx_size_1522, &nsd->tx_size_1522);
1087 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1088 I40E_GLPRT_PTC9522L(hw->port),
1089 pf->stat_offsets_loaded,
1090 &osd->tx_size_big, &nsd->tx_size_big);
1092 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1093 pf->stat_offsets_loaded,
1094 &osd->rx_undersize, &nsd->rx_undersize);
1095 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1096 pf->stat_offsets_loaded,
1097 &osd->rx_fragments, &nsd->rx_fragments);
1098 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->rx_oversize, &nsd->rx_oversize);
1101 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1102 pf->stat_offsets_loaded,
1103 &osd->rx_jabber, &nsd->rx_jabber);
1106 i40e_stat_update32(hw,
1107 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1108 pf->stat_offsets_loaded,
1109 &osd->fd_atr_match, &nsd->fd_atr_match);
1110 i40e_stat_update32(hw,
1111 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1112 pf->stat_offsets_loaded,
1113 &osd->fd_sb_match, &nsd->fd_sb_match);
1114 i40e_stat_update32(hw,
1115 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1116 pf->stat_offsets_loaded,
1117 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1119 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1120 nsd->tx_lpi_status =
1121 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1122 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1123 nsd->rx_lpi_status =
1124 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1125 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1126 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1127 pf->stat_offsets_loaded,
1128 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1129 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1130 pf->stat_offsets_loaded,
1131 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1133 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1134 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1135 nsd->fd_sb_status = true;
1137 nsd->fd_sb_status = false;
1139 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1140 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1141 nsd->fd_atr_status = true;
1143 nsd->fd_atr_status = false;
1145 pf->stat_offsets_loaded = true;
1149 * i40e_update_stats - Update the various statistics counters.
1150 * @vsi: the VSI to be updated
1152 * Update the various stats for this VSI and its related entities.
1154 void i40e_update_stats(struct i40e_vsi *vsi)
1156 struct i40e_pf *pf = vsi->back;
1158 if (vsi == pf->vsi[pf->lan_vsi])
1159 i40e_update_pf_stats(pf);
1161 i40e_update_vsi_stats(vsi);
1163 i40e_update_fcoe_stats(vsi);
1168 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1169 * @vsi: the VSI to be searched
1170 * @macaddr: the MAC address
1172 * @is_vf: make sure its a VF filter, else doesn't matter
1173 * @is_netdev: make sure its a netdev filter, else doesn't matter
1175 * Returns ptr to the filter object or NULL
1177 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1178 u8 *macaddr, s16 vlan,
1179 bool is_vf, bool is_netdev)
1181 struct i40e_mac_filter *f;
1183 if (!vsi || !macaddr)
1186 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1187 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1188 (vlan == f->vlan) &&
1189 (!is_vf || f->is_vf) &&
1190 (!is_netdev || f->is_netdev))
1197 * i40e_find_mac - Find a mac addr in the macvlan filters list
1198 * @vsi: the VSI to be searched
1199 * @macaddr: the MAC address we are searching for
1200 * @is_vf: make sure its a VF filter, else doesn't matter
1201 * @is_netdev: make sure its a netdev filter, else doesn't matter
1203 * Returns the first filter with the provided MAC address or NULL if
1204 * MAC address was not found
1206 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1207 bool is_vf, bool is_netdev)
1209 struct i40e_mac_filter *f;
1211 if (!vsi || !macaddr)
1214 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1215 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1216 (!is_vf || f->is_vf) &&
1217 (!is_netdev || f->is_netdev))
1224 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1225 * @vsi: the VSI to be searched
1227 * Returns true if VSI is in vlan mode or false otherwise
1229 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1231 struct i40e_mac_filter *f;
1233 /* Only -1 for all the filters denotes not in vlan mode
1234 * so we have to go through all the list in order to make sure
1236 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1237 if (f->vlan >= 0 || vsi->info.pvid)
1245 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1246 * @vsi: the VSI to be searched
1247 * @macaddr: the mac address to be filtered
1248 * @is_vf: true if it is a VF
1249 * @is_netdev: true if it is a netdev
1251 * Goes through all the macvlan filters and adds a
1252 * macvlan filter for each unique vlan that already exists
1254 * Returns first filter found on success, else NULL
1256 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1257 bool is_vf, bool is_netdev)
1259 struct i40e_mac_filter *f;
1261 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1263 f->vlan = le16_to_cpu(vsi->info.pvid);
1264 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1265 is_vf, is_netdev)) {
1266 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1272 return list_first_entry_or_null(&vsi->mac_filter_list,
1273 struct i40e_mac_filter, list);
1277 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1278 * @vsi: the VSI to be searched
1279 * @macaddr: the mac address to be removed
1280 * @is_vf: true if it is a VF
1281 * @is_netdev: true if it is a netdev
1283 * Removes a given MAC address from a VSI, regardless of VLAN
1285 * Returns 0 for success, or error
1287 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1288 bool is_vf, bool is_netdev)
1290 struct i40e_mac_filter *f = NULL;
1293 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1294 "Missing mac_filter_list_lock\n");
1295 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1296 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1297 (is_vf == f->is_vf) &&
1298 (is_netdev == f->is_netdev)) {
1305 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1306 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1313 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1314 * @vsi: the PF Main VSI - inappropriate for any other VSI
1315 * @macaddr: the MAC address
1317 * Some older firmware configurations set up a default promiscuous VLAN
1318 * filter that needs to be removed.
1320 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1322 struct i40e_aqc_remove_macvlan_element_data element;
1323 struct i40e_pf *pf = vsi->back;
1326 /* Only appropriate for the PF main VSI */
1327 if (vsi->type != I40E_VSI_MAIN)
1330 memset(&element, 0, sizeof(element));
1331 ether_addr_copy(element.mac_addr, macaddr);
1332 element.vlan_tag = 0;
1333 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1334 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1335 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1343 * i40e_add_filter - Add a mac/vlan filter to the VSI
1344 * @vsi: the VSI to be searched
1345 * @macaddr: the MAC address
1347 * @is_vf: make sure its a VF filter, else doesn't matter
1348 * @is_netdev: make sure its a netdev filter, else doesn't matter
1350 * Returns ptr to the filter object or NULL when no memory available.
1352 * NOTE: This function is expected to be called with mac_filter_list_lock
1355 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1356 u8 *macaddr, s16 vlan,
1357 bool is_vf, bool is_netdev)
1359 struct i40e_mac_filter *f;
1361 if (!vsi || !macaddr)
1364 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1366 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1368 goto add_filter_out;
1370 ether_addr_copy(f->macaddr, macaddr);
1374 INIT_LIST_HEAD(&f->list);
1375 list_add_tail(&f->list, &vsi->mac_filter_list);
1378 /* increment counter and add a new flag if needed */
1384 } else if (is_netdev) {
1385 if (!f->is_netdev) {
1386 f->is_netdev = true;
1393 /* changed tells sync_filters_subtask to
1394 * push the filter down to the firmware
1397 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1398 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1406 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1407 * @vsi: the VSI to be searched
1408 * @macaddr: the MAC address
1410 * @is_vf: make sure it's a VF filter, else doesn't matter
1411 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1413 * NOTE: This function is expected to be called with mac_filter_list_lock
1416 void i40e_del_filter(struct i40e_vsi *vsi,
1417 u8 *macaddr, s16 vlan,
1418 bool is_vf, bool is_netdev)
1420 struct i40e_mac_filter *f;
1422 if (!vsi || !macaddr)
1425 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1426 if (!f || f->counter == 0)
1434 } else if (is_netdev) {
1436 f->is_netdev = false;
1440 /* make sure we don't remove a filter in use by VF or netdev */
1443 min_f += (f->is_vf ? 1 : 0);
1444 min_f += (f->is_netdev ? 1 : 0);
1446 if (f->counter > min_f)
1450 /* counter == 0 tells sync_filters_subtask to
1451 * remove the filter from the firmware's list
1453 if (f->counter == 0) {
1455 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1456 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1461 * i40e_set_mac - NDO callback to set mac address
1462 * @netdev: network interface device structure
1463 * @p: pointer to an address structure
1465 * Returns 0 on success, negative on failure
1468 int i40e_set_mac(struct net_device *netdev, void *p)
1470 static int i40e_set_mac(struct net_device *netdev, void *p)
1473 struct i40e_netdev_priv *np = netdev_priv(netdev);
1474 struct i40e_vsi *vsi = np->vsi;
1475 struct i40e_pf *pf = vsi->back;
1476 struct i40e_hw *hw = &pf->hw;
1477 struct sockaddr *addr = p;
1478 struct i40e_mac_filter *f;
1480 if (!is_valid_ether_addr(addr->sa_data))
1481 return -EADDRNOTAVAIL;
1483 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1484 netdev_info(netdev, "already using mac address %pM\n",
1489 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1490 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1491 return -EADDRNOTAVAIL;
1493 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1494 netdev_info(netdev, "returning to hw mac address %pM\n",
1497 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1499 if (vsi->type == I40E_VSI_MAIN) {
1502 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1503 I40E_AQC_WRITE_TYPE_LAA_WOL,
1504 addr->sa_data, NULL);
1507 "Addr change for Main VSI failed: %d\n",
1509 return -EADDRNOTAVAIL;
1513 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1514 struct i40e_aqc_remove_macvlan_element_data element;
1516 memset(&element, 0, sizeof(element));
1517 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1518 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1519 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1521 spin_lock_bh(&vsi->mac_filter_list_lock);
1522 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1524 spin_unlock_bh(&vsi->mac_filter_list_lock);
1527 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1528 struct i40e_aqc_add_macvlan_element_data element;
1530 memset(&element, 0, sizeof(element));
1531 ether_addr_copy(element.mac_addr, hw->mac.addr);
1532 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1533 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1535 spin_lock_bh(&vsi->mac_filter_list_lock);
1536 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1540 spin_unlock_bh(&vsi->mac_filter_list_lock);
1543 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1545 /* schedule our worker thread which will take care of
1546 * applying the new filter changes
1548 i40e_service_event_schedule(vsi->back);
1553 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1554 * @vsi: the VSI being setup
1555 * @ctxt: VSI context structure
1556 * @enabled_tc: Enabled TCs bitmap
1557 * @is_add: True if called before Add VSI
1559 * Setup VSI queue mapping for enabled traffic classes.
1562 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1563 struct i40e_vsi_context *ctxt,
1567 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1568 struct i40e_vsi_context *ctxt,
1573 struct i40e_pf *pf = vsi->back;
1583 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1586 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1587 /* Find numtc from enabled TC bitmap */
1588 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1589 if (enabled_tc & BIT(i)) /* TC is enabled */
1593 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1597 /* At least TC0 is enabled in case of non-DCB case */
1601 vsi->tc_config.numtc = numtc;
1602 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1603 /* Number of queues per enabled TC */
1604 /* In MFP case we can have a much lower count of MSIx
1605 * vectors available and so we need to lower the used
1608 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1609 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1611 qcount = vsi->alloc_queue_pairs;
1612 num_tc_qps = qcount / numtc;
1613 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1615 /* Setup queue offset/count for all TCs for given VSI */
1616 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1617 /* See if the given TC is enabled for the given VSI */
1618 if (vsi->tc_config.enabled_tc & BIT(i)) {
1622 switch (vsi->type) {
1624 qcount = min_t(int, pf->alloc_rss_size,
1629 qcount = num_tc_qps;
1633 case I40E_VSI_SRIOV:
1634 case I40E_VSI_VMDQ2:
1636 qcount = num_tc_qps;
1640 vsi->tc_config.tc_info[i].qoffset = offset;
1641 vsi->tc_config.tc_info[i].qcount = qcount;
1643 /* find the next higher power-of-2 of num queue pairs */
1646 while (num_qps && (BIT_ULL(pow) < qcount)) {
1651 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1653 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1654 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1658 /* TC is not enabled so set the offset to
1659 * default queue and allocate one queue
1662 vsi->tc_config.tc_info[i].qoffset = 0;
1663 vsi->tc_config.tc_info[i].qcount = 1;
1664 vsi->tc_config.tc_info[i].netdev_tc = 0;
1668 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1671 /* Set actual Tx/Rx queue pairs */
1672 vsi->num_queue_pairs = offset;
1673 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1674 if (vsi->req_queue_pairs > 0)
1675 vsi->num_queue_pairs = vsi->req_queue_pairs;
1676 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1677 vsi->num_queue_pairs = pf->num_lan_msix;
1680 /* Scheduler section valid can only be set for ADD VSI */
1682 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1684 ctxt->info.up_enable_bits = enabled_tc;
1686 if (vsi->type == I40E_VSI_SRIOV) {
1687 ctxt->info.mapping_flags |=
1688 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1689 for (i = 0; i < vsi->num_queue_pairs; i++)
1690 ctxt->info.queue_mapping[i] =
1691 cpu_to_le16(vsi->base_queue + i);
1693 ctxt->info.mapping_flags |=
1694 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1695 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1697 ctxt->info.valid_sections |= cpu_to_le16(sections);
1701 * i40e_set_rx_mode - NDO callback to set the netdev filters
1702 * @netdev: network interface device structure
1705 void i40e_set_rx_mode(struct net_device *netdev)
1707 static void i40e_set_rx_mode(struct net_device *netdev)
1710 struct i40e_netdev_priv *np = netdev_priv(netdev);
1711 struct i40e_mac_filter *f, *ftmp;
1712 struct i40e_vsi *vsi = np->vsi;
1713 struct netdev_hw_addr *uca;
1714 struct netdev_hw_addr *mca;
1715 struct netdev_hw_addr *ha;
1717 spin_lock_bh(&vsi->mac_filter_list_lock);
1719 /* add addr if not already in the filter list */
1720 netdev_for_each_uc_addr(uca, netdev) {
1721 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1722 if (i40e_is_vsi_in_vlan(vsi))
1723 i40e_put_mac_in_vlan(vsi, uca->addr,
1726 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1731 netdev_for_each_mc_addr(mca, netdev) {
1732 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1733 if (i40e_is_vsi_in_vlan(vsi))
1734 i40e_put_mac_in_vlan(vsi, mca->addr,
1737 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1742 /* remove filter if not in netdev list */
1743 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1748 netdev_for_each_mc_addr(mca, netdev)
1749 if (ether_addr_equal(mca->addr, f->macaddr))
1750 goto bottom_of_search_loop;
1752 netdev_for_each_uc_addr(uca, netdev)
1753 if (ether_addr_equal(uca->addr, f->macaddr))
1754 goto bottom_of_search_loop;
1756 for_each_dev_addr(netdev, ha)
1757 if (ether_addr_equal(ha->addr, f->macaddr))
1758 goto bottom_of_search_loop;
1760 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1761 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1763 bottom_of_search_loop:
1766 spin_unlock_bh(&vsi->mac_filter_list_lock);
1768 /* check for other flag changes */
1769 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1770 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1771 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1774 /* schedule our worker thread which will take care of
1775 * applying the new filter changes
1777 i40e_service_event_schedule(vsi->back);
1781 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1782 * @src: source MAC filter entry to be clones
1784 * Returns the pointer to newly cloned MAC filter entry or NULL
1787 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1788 struct i40e_mac_filter *src)
1790 struct i40e_mac_filter *f;
1792 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1797 INIT_LIST_HEAD(&f->list);
1803 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1804 * @vsi: pointer to vsi struct
1805 * @from: Pointer to list which contains MAC filter entries - changes to
1806 * those entries needs to be undone.
1808 * MAC filter entries from list were slated to be removed from device.
1810 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1811 struct list_head *from)
1813 struct i40e_mac_filter *f, *ftmp;
1815 list_for_each_entry_safe(f, ftmp, from, list) {
1817 /* Move the element back into MAC filter list*/
1818 list_move_tail(&f->list, &vsi->mac_filter_list);
1823 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1824 * @vsi: pointer to vsi struct
1826 * MAC filter entries from list were slated to be added from device.
1828 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1830 struct i40e_mac_filter *f, *ftmp;
1832 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1833 if (!f->changed && f->counter)
1839 * i40e_cleanup_add_list - Deletes the element from add list and release
1841 * @add_list: Pointer to list which contains MAC filter entries
1843 static void i40e_cleanup_add_list(struct list_head *add_list)
1845 struct i40e_mac_filter *f, *ftmp;
1847 list_for_each_entry_safe(f, ftmp, add_list, list) {
1854 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1855 * @vsi: ptr to the VSI
1857 * Push any outstanding VSI filter changes through the AdminQ.
1859 * Returns 0 or error value
1861 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1863 struct list_head tmp_del_list, tmp_add_list;
1864 struct i40e_mac_filter *f, *ftmp, *fclone;
1865 bool promisc_forced_on = false;
1866 bool add_happened = false;
1867 int filter_list_len = 0;
1868 u32 changed_flags = 0;
1869 i40e_status aq_ret = 0;
1870 bool err_cond = false;
1878 /* empty array typed pointers, kcalloc later */
1879 struct i40e_aqc_add_macvlan_element_data *add_list;
1880 struct i40e_aqc_remove_macvlan_element_data *del_list;
1882 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1883 usleep_range(1000, 2000);
1887 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1888 vsi->current_netdev_flags = vsi->netdev->flags;
1891 INIT_LIST_HEAD(&tmp_del_list);
1892 INIT_LIST_HEAD(&tmp_add_list);
1894 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1895 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1897 spin_lock_bh(&vsi->mac_filter_list_lock);
1898 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1902 if (f->counter != 0)
1906 /* Move the element into temporary del_list */
1907 list_move_tail(&f->list, &tmp_del_list);
1910 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1914 if (f->counter == 0)
1918 /* Clone MAC filter entry and add into temporary list */
1919 fclone = i40e_mac_filter_entry_clone(f);
1924 list_add_tail(&fclone->list, &tmp_add_list);
1927 /* if failed to clone MAC filter entry - undo */
1929 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1930 i40e_undo_add_filter_entries(vsi);
1932 spin_unlock_bh(&vsi->mac_filter_list_lock);
1935 i40e_cleanup_add_list(&tmp_add_list);
1941 /* Now process 'del_list' outside the lock */
1942 if (!list_empty(&tmp_del_list)) {
1945 filter_list_len = pf->hw.aq.asq_buf_size /
1946 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1947 del_list_size = filter_list_len *
1948 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1949 del_list = kzalloc(del_list_size, GFP_ATOMIC);
1951 i40e_cleanup_add_list(&tmp_add_list);
1953 /* Undo VSI's MAC filter entry element updates */
1954 spin_lock_bh(&vsi->mac_filter_list_lock);
1955 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1956 i40e_undo_add_filter_entries(vsi);
1957 spin_unlock_bh(&vsi->mac_filter_list_lock);
1962 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1965 /* add to delete list */
1966 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1967 del_list[num_del].vlan_tag =
1968 cpu_to_le16((u16)(f->vlan ==
1969 I40E_VLAN_ANY ? 0 : f->vlan));
1971 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1972 del_list[num_del].flags = cmd_flags;
1975 /* flush a full buffer */
1976 if (num_del == filter_list_len) {
1977 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1982 aq_err = pf->hw.aq.asq_last_status;
1984 memset(del_list, 0, del_list_size);
1986 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1988 dev_err(&pf->pdev->dev,
1989 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1990 i40e_stat_str(&pf->hw, aq_ret),
1991 i40e_aq_str(&pf->hw, aq_err));
1994 /* Release memory for MAC filter entries which were
1995 * synced up with HW.
2002 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
2005 aq_err = pf->hw.aq.asq_last_status;
2008 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
2009 dev_info(&pf->pdev->dev,
2010 "ignoring delete macvlan error, err %s aq_err %s\n",
2011 i40e_stat_str(&pf->hw, aq_ret),
2012 i40e_aq_str(&pf->hw, aq_err));
2019 if (!list_empty(&tmp_add_list)) {
2022 /* do all the adds now */
2023 filter_list_len = pf->hw.aq.asq_buf_size /
2024 sizeof(struct i40e_aqc_add_macvlan_element_data),
2025 add_list_size = filter_list_len *
2026 sizeof(struct i40e_aqc_add_macvlan_element_data);
2027 add_list = kzalloc(add_list_size, GFP_ATOMIC);
2029 /* Purge element from temporary lists */
2030 i40e_cleanup_add_list(&tmp_add_list);
2032 /* Undo add filter entries from VSI MAC filter list */
2033 spin_lock_bh(&vsi->mac_filter_list_lock);
2034 i40e_undo_add_filter_entries(vsi);
2035 spin_unlock_bh(&vsi->mac_filter_list_lock);
2040 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2042 add_happened = true;
2045 /* add to add array */
2046 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2047 add_list[num_add].vlan_tag =
2049 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2050 add_list[num_add].queue_number = 0;
2052 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2053 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2056 /* flush a full buffer */
2057 if (num_add == filter_list_len) {
2058 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2061 aq_err = pf->hw.aq.asq_last_status;
2066 memset(add_list, 0, add_list_size);
2068 /* Entries from tmp_add_list were cloned from MAC
2069 * filter list, hence clean those cloned entries
2076 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2077 add_list, num_add, NULL);
2078 aq_err = pf->hw.aq.asq_last_status;
2084 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2085 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2086 dev_info(&pf->pdev->dev,
2087 "add filter failed, err %s aq_err %s\n",
2088 i40e_stat_str(&pf->hw, aq_ret),
2089 i40e_aq_str(&pf->hw, aq_err));
2090 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2091 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2093 promisc_forced_on = true;
2094 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2096 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2101 /* check for changes in promiscuous modes */
2102 if (changed_flags & IFF_ALLMULTI) {
2103 bool cur_multipromisc;
2105 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2106 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2111 retval = i40e_aq_rc_to_posix(aq_ret,
2112 pf->hw.aq.asq_last_status);
2113 dev_info(&pf->pdev->dev,
2114 "set multi promisc failed, err %s aq_err %s\n",
2115 i40e_stat_str(&pf->hw, aq_ret),
2116 i40e_aq_str(&pf->hw,
2117 pf->hw.aq.asq_last_status));
2120 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2123 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2124 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2126 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2127 /* set defport ON for Main VSI instead of true promisc
2128 * this way we will get all unicast/multicast and VLAN
2129 * promisc behavior but will not get VF or VMDq traffic
2130 * replicated on the Main VSI.
2132 if (pf->cur_promisc != cur_promisc) {
2133 pf->cur_promisc = cur_promisc;
2134 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2137 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2143 i40e_aq_rc_to_posix(aq_ret,
2144 pf->hw.aq.asq_last_status);
2145 dev_info(&pf->pdev->dev,
2146 "set unicast promisc failed, err %d, aq_err %d\n",
2147 aq_ret, pf->hw.aq.asq_last_status);
2149 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2155 i40e_aq_rc_to_posix(aq_ret,
2156 pf->hw.aq.asq_last_status);
2157 dev_info(&pf->pdev->dev,
2158 "set multicast promisc failed, err %d, aq_err %d\n",
2159 aq_ret, pf->hw.aq.asq_last_status);
2162 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2166 retval = i40e_aq_rc_to_posix(aq_ret,
2167 pf->hw.aq.asq_last_status);
2168 dev_info(&pf->pdev->dev,
2169 "set brdcast promisc failed, err %s, aq_err %s\n",
2170 i40e_stat_str(&pf->hw, aq_ret),
2171 i40e_aq_str(&pf->hw,
2172 pf->hw.aq.asq_last_status));
2176 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2181 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2182 * @pf: board private structure
2184 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2188 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2190 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2192 for (v = 0; v < pf->num_alloc_vsi; v++) {
2194 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2195 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2198 /* come back and try again later */
2199 pf->flags |= I40E_FLAG_FILTER_SYNC;
2207 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2208 * @netdev: network interface device structure
2209 * @new_mtu: new value for maximum frame size
2211 * Returns 0 on success, negative on failure
2213 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2215 struct i40e_netdev_priv *np = netdev_priv(netdev);
2216 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2217 struct i40e_vsi *vsi = np->vsi;
2219 /* MTU < 68 is an error and causes problems on some kernels */
2220 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2223 netdev_info(netdev, "changing MTU from %d to %d\n",
2224 netdev->mtu, new_mtu);
2225 netdev->mtu = new_mtu;
2226 if (netif_running(netdev))
2227 i40e_vsi_reinit_locked(vsi);
2233 * i40e_ioctl - Access the hwtstamp interface
2234 * @netdev: network interface device structure
2235 * @ifr: interface request data
2236 * @cmd: ioctl command
2238 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2240 struct i40e_netdev_priv *np = netdev_priv(netdev);
2241 struct i40e_pf *pf = np->vsi->back;
2245 return i40e_ptp_get_ts_config(pf, ifr);
2247 return i40e_ptp_set_ts_config(pf, ifr);
2254 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2255 * @vsi: the vsi being adjusted
2257 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2259 struct i40e_vsi_context ctxt;
2262 if ((vsi->info.valid_sections &
2263 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2264 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2265 return; /* already enabled */
2267 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2268 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2269 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2271 ctxt.seid = vsi->seid;
2272 ctxt.info = vsi->info;
2273 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2275 dev_info(&vsi->back->pdev->dev,
2276 "update vlan stripping failed, err %s aq_err %s\n",
2277 i40e_stat_str(&vsi->back->hw, ret),
2278 i40e_aq_str(&vsi->back->hw,
2279 vsi->back->hw.aq.asq_last_status));
2284 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2285 * @vsi: the vsi being adjusted
2287 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2289 struct i40e_vsi_context ctxt;
2292 if ((vsi->info.valid_sections &
2293 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2294 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2295 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2296 return; /* already disabled */
2298 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2299 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2300 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2302 ctxt.seid = vsi->seid;
2303 ctxt.info = vsi->info;
2304 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2306 dev_info(&vsi->back->pdev->dev,
2307 "update vlan stripping failed, err %s aq_err %s\n",
2308 i40e_stat_str(&vsi->back->hw, ret),
2309 i40e_aq_str(&vsi->back->hw,
2310 vsi->back->hw.aq.asq_last_status));
2315 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2316 * @netdev: network interface to be adjusted
2317 * @features: netdev features to test if VLAN offload is enabled or not
2319 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2321 struct i40e_netdev_priv *np = netdev_priv(netdev);
2322 struct i40e_vsi *vsi = np->vsi;
2324 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2325 i40e_vlan_stripping_enable(vsi);
2327 i40e_vlan_stripping_disable(vsi);
2331 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2332 * @vsi: the vsi being configured
2333 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2335 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2337 struct i40e_mac_filter *f, *add_f;
2338 bool is_netdev, is_vf;
2340 is_vf = (vsi->type == I40E_VSI_SRIOV);
2341 is_netdev = !!(vsi->netdev);
2343 /* Locked once because all functions invoked below iterates list*/
2344 spin_lock_bh(&vsi->mac_filter_list_lock);
2347 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2350 dev_info(&vsi->back->pdev->dev,
2351 "Could not add vlan filter %d for %pM\n",
2352 vid, vsi->netdev->dev_addr);
2353 spin_unlock_bh(&vsi->mac_filter_list_lock);
2358 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2359 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2361 dev_info(&vsi->back->pdev->dev,
2362 "Could not add vlan filter %d for %pM\n",
2364 spin_unlock_bh(&vsi->mac_filter_list_lock);
2369 /* Now if we add a vlan tag, make sure to check if it is the first
2370 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2371 * with 0, so we now accept untagged and specified tagged traffic
2372 * (and not any taged and untagged)
2375 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2377 is_vf, is_netdev)) {
2378 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2379 I40E_VLAN_ANY, is_vf, is_netdev);
2380 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2383 dev_info(&vsi->back->pdev->dev,
2384 "Could not add filter 0 for %pM\n",
2385 vsi->netdev->dev_addr);
2386 spin_unlock_bh(&vsi->mac_filter_list_lock);
2392 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2393 if (vid > 0 && !vsi->info.pvid) {
2394 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2395 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2398 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2400 add_f = i40e_add_filter(vsi, f->macaddr,
2401 0, is_vf, is_netdev);
2403 dev_info(&vsi->back->pdev->dev,
2404 "Could not add filter 0 for %pM\n",
2406 spin_unlock_bh(&vsi->mac_filter_list_lock);
2412 spin_unlock_bh(&vsi->mac_filter_list_lock);
2414 /* schedule our worker thread which will take care of
2415 * applying the new filter changes
2417 i40e_service_event_schedule(vsi->back);
2422 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2423 * @vsi: the vsi being configured
2424 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2426 * Return: 0 on success or negative otherwise
2428 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2430 struct net_device *netdev = vsi->netdev;
2431 struct i40e_mac_filter *f, *add_f;
2432 bool is_vf, is_netdev;
2433 int filter_count = 0;
2435 is_vf = (vsi->type == I40E_VSI_SRIOV);
2436 is_netdev = !!(netdev);
2438 /* Locked once because all functions invoked below iterates list */
2439 spin_lock_bh(&vsi->mac_filter_list_lock);
2442 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2444 list_for_each_entry(f, &vsi->mac_filter_list, list)
2445 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2447 /* go through all the filters for this VSI and if there is only
2448 * vid == 0 it means there are no other filters, so vid 0 must
2449 * be replaced with -1. This signifies that we should from now
2450 * on accept any traffic (with any tag present, or untagged)
2452 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2455 ether_addr_equal(netdev->dev_addr, f->macaddr))
2463 if (!filter_count && is_netdev) {
2464 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2465 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2468 dev_info(&vsi->back->pdev->dev,
2469 "Could not add filter %d for %pM\n",
2470 I40E_VLAN_ANY, netdev->dev_addr);
2471 spin_unlock_bh(&vsi->mac_filter_list_lock);
2476 if (!filter_count) {
2477 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2478 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2479 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2482 dev_info(&vsi->back->pdev->dev,
2483 "Could not add filter %d for %pM\n",
2484 I40E_VLAN_ANY, f->macaddr);
2485 spin_unlock_bh(&vsi->mac_filter_list_lock);
2491 spin_unlock_bh(&vsi->mac_filter_list_lock);
2493 /* schedule our worker thread which will take care of
2494 * applying the new filter changes
2496 i40e_service_event_schedule(vsi->back);
2501 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2502 * @netdev: network interface to be adjusted
2503 * @vid: vlan id to be added
2505 * net_device_ops implementation for adding vlan ids
2508 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2509 __always_unused __be16 proto, u16 vid)
2511 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2512 __always_unused __be16 proto, u16 vid)
2515 struct i40e_netdev_priv *np = netdev_priv(netdev);
2516 struct i40e_vsi *vsi = np->vsi;
2522 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2524 /* If the network stack called us with vid = 0 then
2525 * it is asking to receive priority tagged packets with
2526 * vlan id 0. Our HW receives them by default when configured
2527 * to receive untagged packets so there is no need to add an
2528 * extra filter for vlan 0 tagged packets.
2531 ret = i40e_vsi_add_vlan(vsi, vid);
2533 if (!ret && (vid < VLAN_N_VID))
2534 set_bit(vid, vsi->active_vlans);
2540 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2541 * @netdev: network interface to be adjusted
2542 * @vid: vlan id to be removed
2544 * net_device_ops implementation for removing vlan ids
2547 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2548 __always_unused __be16 proto, u16 vid)
2550 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2551 __always_unused __be16 proto, u16 vid)
2554 struct i40e_netdev_priv *np = netdev_priv(netdev);
2555 struct i40e_vsi *vsi = np->vsi;
2557 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2559 /* return code is ignored as there is nothing a user
2560 * can do about failure to remove and a log message was
2561 * already printed from the other function
2563 i40e_vsi_kill_vlan(vsi, vid);
2565 clear_bit(vid, vsi->active_vlans);
2571 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2572 * @vsi: the vsi being brought back up
2574 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2581 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2583 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2584 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2589 * i40e_vsi_add_pvid - Add pvid for the VSI
2590 * @vsi: the vsi being adjusted
2591 * @vid: the vlan id to set as a PVID
2593 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2595 struct i40e_vsi_context ctxt;
2598 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2599 vsi->info.pvid = cpu_to_le16(vid);
2600 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2601 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2602 I40E_AQ_VSI_PVLAN_EMOD_STR;
2604 ctxt.seid = vsi->seid;
2605 ctxt.info = vsi->info;
2606 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2608 dev_info(&vsi->back->pdev->dev,
2609 "add pvid failed, err %s aq_err %s\n",
2610 i40e_stat_str(&vsi->back->hw, ret),
2611 i40e_aq_str(&vsi->back->hw,
2612 vsi->back->hw.aq.asq_last_status));
2620 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2621 * @vsi: the vsi being adjusted
2623 * Just use the vlan_rx_register() service to put it back to normal
2625 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2627 i40e_vlan_stripping_disable(vsi);
2633 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2634 * @vsi: ptr to the VSI
2636 * If this function returns with an error, then it's possible one or
2637 * more of the rings is populated (while the rest are not). It is the
2638 * callers duty to clean those orphaned rings.
2640 * Return 0 on success, negative on failure
2642 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2646 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2647 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2653 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2654 * @vsi: ptr to the VSI
2656 * Free VSI's transmit software resources
2658 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2665 for (i = 0; i < vsi->num_queue_pairs; i++)
2666 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2667 i40e_free_tx_resources(vsi->tx_rings[i]);
2671 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2672 * @vsi: ptr to the VSI
2674 * If this function returns with an error, then it's possible one or
2675 * more of the rings is populated (while the rest are not). It is the
2676 * callers duty to clean those orphaned rings.
2678 * Return 0 on success, negative on failure
2680 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2684 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2685 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2687 i40e_fcoe_setup_ddp_resources(vsi);
2693 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2694 * @vsi: ptr to the VSI
2696 * Free all receive software resources
2698 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2705 for (i = 0; i < vsi->num_queue_pairs; i++)
2706 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2707 i40e_free_rx_resources(vsi->rx_rings[i]);
2709 i40e_fcoe_free_ddp_resources(vsi);
2714 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2715 * @ring: The Tx ring to configure
2717 * This enables/disables XPS for a given Tx descriptor ring
2718 * based on the TCs enabled for the VSI that ring belongs to.
2720 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2722 struct i40e_vsi *vsi = ring->vsi;
2725 if (!ring->q_vector || !ring->netdev)
2728 /* Single TC mode enable XPS */
2729 if (vsi->tc_config.numtc <= 1) {
2730 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2731 netif_set_xps_queue(ring->netdev,
2732 &ring->q_vector->affinity_mask,
2734 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2735 /* Disable XPS to allow selection based on TC */
2736 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2737 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2738 free_cpumask_var(mask);
2741 /* schedule our worker thread which will take care of
2742 * applying the new filter changes
2744 i40e_service_event_schedule(vsi->back);
2748 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2749 * @ring: The Tx ring to configure
2751 * Configure the Tx descriptor ring in the HMC context.
2753 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2755 struct i40e_vsi *vsi = ring->vsi;
2756 u16 pf_q = vsi->base_queue + ring->queue_index;
2757 struct i40e_hw *hw = &vsi->back->hw;
2758 struct i40e_hmc_obj_txq tx_ctx;
2759 i40e_status err = 0;
2762 /* some ATR related tx ring init */
2763 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2764 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2765 ring->atr_count = 0;
2767 ring->atr_sample_rate = 0;
2771 i40e_config_xps_tx_ring(ring);
2773 /* clear the context structure first */
2774 memset(&tx_ctx, 0, sizeof(tx_ctx));
2776 tx_ctx.new_context = 1;
2777 tx_ctx.base = (ring->dma / 128);
2778 tx_ctx.qlen = ring->count;
2779 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2780 I40E_FLAG_FD_ATR_ENABLED));
2782 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2784 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2785 /* FDIR VSI tx ring can still use RS bit and writebacks */
2786 if (vsi->type != I40E_VSI_FDIR)
2787 tx_ctx.head_wb_ena = 1;
2788 tx_ctx.head_wb_addr = ring->dma +
2789 (ring->count * sizeof(struct i40e_tx_desc));
2791 /* As part of VSI creation/update, FW allocates certain
2792 * Tx arbitration queue sets for each TC enabled for
2793 * the VSI. The FW returns the handles to these queue
2794 * sets as part of the response buffer to Add VSI,
2795 * Update VSI, etc. AQ commands. It is expected that
2796 * these queue set handles be associated with the Tx
2797 * queues by the driver as part of the TX queue context
2798 * initialization. This has to be done regardless of
2799 * DCB as by default everything is mapped to TC0.
2801 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2802 tx_ctx.rdylist_act = 0;
2804 /* clear the context in the HMC */
2805 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2807 dev_info(&vsi->back->pdev->dev,
2808 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2809 ring->queue_index, pf_q, err);
2813 /* set the context in the HMC */
2814 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2816 dev_info(&vsi->back->pdev->dev,
2817 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2818 ring->queue_index, pf_q, err);
2822 /* Now associate this queue with this PCI function */
2823 if (vsi->type == I40E_VSI_VMDQ2) {
2824 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2825 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2826 I40E_QTX_CTL_VFVM_INDX_MASK;
2828 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2831 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2832 I40E_QTX_CTL_PF_INDX_MASK);
2833 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2836 /* cache tail off for easier writes later */
2837 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2843 * i40e_configure_rx_ring - Configure a receive ring context
2844 * @ring: The Rx ring to configure
2846 * Configure the Rx descriptor ring in the HMC context.
2848 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2850 struct i40e_vsi *vsi = ring->vsi;
2851 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2852 u16 pf_q = vsi->base_queue + ring->queue_index;
2853 struct i40e_hw *hw = &vsi->back->hw;
2854 struct i40e_hmc_obj_rxq rx_ctx;
2855 i40e_status err = 0;
2859 /* clear the context structure first */
2860 memset(&rx_ctx, 0, sizeof(rx_ctx));
2862 ring->rx_buf_len = vsi->rx_buf_len;
2863 ring->rx_hdr_len = vsi->rx_hdr_len;
2865 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2866 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2868 rx_ctx.base = (ring->dma / 128);
2869 rx_ctx.qlen = ring->count;
2871 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2872 set_ring_16byte_desc_enabled(ring);
2878 rx_ctx.dtype = vsi->dtype;
2880 set_ring_ps_enabled(ring);
2881 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2883 I40E_RX_SPLIT_TCP_UDP |
2886 rx_ctx.hsplit_0 = 0;
2889 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2890 (chain_len * ring->rx_buf_len));
2891 if (hw->revision_id == 0)
2892 rx_ctx.lrxqthresh = 0;
2894 rx_ctx.lrxqthresh = 2;
2895 rx_ctx.crcstrip = 1;
2897 /* this controls whether VLAN is stripped from inner headers */
2900 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2902 /* set the prefena field to 1 because the manual says to */
2905 /* clear the context in the HMC */
2906 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2908 dev_info(&vsi->back->pdev->dev,
2909 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2910 ring->queue_index, pf_q, err);
2914 /* set the context in the HMC */
2915 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2917 dev_info(&vsi->back->pdev->dev,
2918 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2919 ring->queue_index, pf_q, err);
2923 /* cache tail for quicker writes, and clear the reg before use */
2924 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2925 writel(0, ring->tail);
2927 if (ring_is_ps_enabled(ring)) {
2928 i40e_alloc_rx_headers(ring);
2929 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2931 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2938 * i40e_vsi_configure_tx - Configure the VSI for Tx
2939 * @vsi: VSI structure describing this set of rings and resources
2941 * Configure the Tx VSI for operation.
2943 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2948 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2949 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2955 * i40e_vsi_configure_rx - Configure the VSI for Rx
2956 * @vsi: the VSI being configured
2958 * Configure the Rx VSI for operation.
2960 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2965 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2966 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2967 + ETH_FCS_LEN + VLAN_HLEN;
2969 vsi->max_frame = I40E_RXBUFFER_2048;
2971 /* figure out correct receive buffer length */
2972 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2973 I40E_FLAG_RX_PS_ENABLED)) {
2974 case I40E_FLAG_RX_1BUF_ENABLED:
2975 vsi->rx_hdr_len = 0;
2976 vsi->rx_buf_len = vsi->max_frame;
2977 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2979 case I40E_FLAG_RX_PS_ENABLED:
2980 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2981 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2982 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2985 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2986 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2987 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2992 /* setup rx buffer for FCoE */
2993 if ((vsi->type == I40E_VSI_FCOE) &&
2994 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2995 vsi->rx_hdr_len = 0;
2996 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2997 vsi->max_frame = I40E_RXBUFFER_3072;
2998 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
3001 #endif /* I40E_FCOE */
3002 /* round up for the chip's needs */
3003 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
3004 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
3005 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3006 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3008 /* set up individual rings */
3009 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3010 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3016 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3017 * @vsi: ptr to the VSI
3019 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3021 struct i40e_ring *tx_ring, *rx_ring;
3022 u16 qoffset, qcount;
3025 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3026 /* Reset the TC information */
3027 for (i = 0; i < vsi->num_queue_pairs; i++) {
3028 rx_ring = vsi->rx_rings[i];
3029 tx_ring = vsi->tx_rings[i];
3030 rx_ring->dcb_tc = 0;
3031 tx_ring->dcb_tc = 0;
3035 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3036 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3039 qoffset = vsi->tc_config.tc_info[n].qoffset;
3040 qcount = vsi->tc_config.tc_info[n].qcount;
3041 for (i = qoffset; i < (qoffset + qcount); i++) {
3042 rx_ring = vsi->rx_rings[i];
3043 tx_ring = vsi->tx_rings[i];
3044 rx_ring->dcb_tc = n;
3045 tx_ring->dcb_tc = n;
3051 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3052 * @vsi: ptr to the VSI
3054 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3057 i40e_set_rx_mode(vsi->netdev);
3061 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3062 * @vsi: Pointer to the targeted VSI
3064 * This function replays the hlist on the hw where all the SB Flow Director
3065 * filters were saved.
3067 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3069 struct i40e_fdir_filter *filter;
3070 struct i40e_pf *pf = vsi->back;
3071 struct hlist_node *node;
3073 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3076 hlist_for_each_entry_safe(filter, node,
3077 &pf->fdir_filter_list, fdir_node) {
3078 i40e_add_del_fdir(vsi, filter, true);
3083 * i40e_vsi_configure - Set up the VSI for action
3084 * @vsi: the VSI being configured
3086 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3090 i40e_set_vsi_rx_mode(vsi);
3091 i40e_restore_vlan(vsi);
3092 i40e_vsi_config_dcb_rings(vsi);
3093 err = i40e_vsi_configure_tx(vsi);
3095 err = i40e_vsi_configure_rx(vsi);
3101 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3102 * @vsi: the VSI being configured
3104 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3106 struct i40e_pf *pf = vsi->back;
3107 struct i40e_hw *hw = &pf->hw;
3112 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3113 * and PFINT_LNKLSTn registers, e.g.:
3114 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3116 qp = vsi->base_queue;
3117 vector = vsi->base_vector;
3118 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3119 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3121 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3122 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3123 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3124 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3126 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3127 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3128 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3130 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3131 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3133 /* Linked list for the queuepairs assigned to this vector */
3134 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3135 for (q = 0; q < q_vector->num_ringpairs; q++) {
3138 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3139 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3140 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3141 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3143 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3145 wr32(hw, I40E_QINT_RQCTL(qp), val);
3147 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3148 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3149 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3150 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3152 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3154 /* Terminate the linked list */
3155 if (q == (q_vector->num_ringpairs - 1))
3156 val |= (I40E_QUEUE_END_OF_LIST
3157 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3159 wr32(hw, I40E_QINT_TQCTL(qp), val);
3168 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3169 * @hw: ptr to the hardware info
3171 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3173 struct i40e_hw *hw = &pf->hw;
3176 /* clear things first */
3177 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3178 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3180 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3181 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3182 I40E_PFINT_ICR0_ENA_GRST_MASK |
3183 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3184 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3185 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3186 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3187 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3189 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3190 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3192 if (pf->flags & I40E_FLAG_PTP)
3193 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3195 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3197 /* SW_ITR_IDX = 0, but don't change INTENA */
3198 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3199 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3201 /* OTHER_ITR_IDX = 0 */
3202 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3206 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3207 * @vsi: the VSI being configured
3209 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3211 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3212 struct i40e_pf *pf = vsi->back;
3213 struct i40e_hw *hw = &pf->hw;
3216 /* set the ITR configuration */
3217 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3218 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3219 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3220 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3221 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3222 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3223 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3225 i40e_enable_misc_int_causes(pf);
3227 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3228 wr32(hw, I40E_PFINT_LNKLST0, 0);
3230 /* Associate the queue pair to the vector and enable the queue int */
3231 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3232 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3233 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3235 wr32(hw, I40E_QINT_RQCTL(0), val);
3237 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3238 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3239 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3241 wr32(hw, I40E_QINT_TQCTL(0), val);
3246 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3247 * @pf: board private structure
3249 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3251 struct i40e_hw *hw = &pf->hw;
3253 wr32(hw, I40E_PFINT_DYN_CTL0,
3254 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3259 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3260 * @pf: board private structure
3262 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3264 struct i40e_hw *hw = &pf->hw;
3267 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3268 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3269 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3271 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3276 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3277 * @irq: interrupt number
3278 * @data: pointer to a q_vector
3280 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3282 struct i40e_q_vector *q_vector = data;
3284 if (!q_vector->tx.ring && !q_vector->rx.ring)
3287 napi_schedule_irqoff(&q_vector->napi);
3293 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3294 * @vsi: the VSI being configured
3295 * @basename: name for the vector
3297 * Allocates MSI-X vectors and requests interrupts from the kernel.
3299 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3301 int q_vectors = vsi->num_q_vectors;
3302 struct i40e_pf *pf = vsi->back;
3303 int base = vsi->base_vector;
3308 for (vector = 0; vector < q_vectors; vector++) {
3309 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3311 if (q_vector->tx.ring && q_vector->rx.ring) {
3312 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3313 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3315 } else if (q_vector->rx.ring) {
3316 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3317 "%s-%s-%d", basename, "rx", rx_int_idx++);
3318 } else if (q_vector->tx.ring) {
3319 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3320 "%s-%s-%d", basename, "tx", tx_int_idx++);
3322 /* skip this unused q_vector */
3325 err = request_irq(pf->msix_entries[base + vector].vector,
3331 dev_info(&pf->pdev->dev,
3332 "MSIX request_irq failed, error: %d\n", err);
3333 goto free_queue_irqs;
3335 /* assign the mask for this irq */
3336 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3337 &q_vector->affinity_mask);
3340 vsi->irqs_ready = true;
3346 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3348 free_irq(pf->msix_entries[base + vector].vector,
3349 &(vsi->q_vectors[vector]));
3355 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3356 * @vsi: the VSI being un-configured
3358 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3360 struct i40e_pf *pf = vsi->back;
3361 struct i40e_hw *hw = &pf->hw;
3362 int base = vsi->base_vector;
3365 for (i = 0; i < vsi->num_queue_pairs; i++) {
3366 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3367 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3370 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3371 for (i = vsi->base_vector;
3372 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3373 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3376 for (i = 0; i < vsi->num_q_vectors; i++)
3377 synchronize_irq(pf->msix_entries[i + base].vector);
3379 /* Legacy and MSI mode - this stops all interrupt handling */
3380 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3381 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3383 synchronize_irq(pf->pdev->irq);
3388 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3389 * @vsi: the VSI being configured
3391 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3393 struct i40e_pf *pf = vsi->back;
3396 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3397 for (i = 0; i < vsi->num_q_vectors; i++)
3398 i40e_irq_dynamic_enable(vsi, i);
3400 i40e_irq_dynamic_enable_icr0(pf);
3403 i40e_flush(&pf->hw);
3408 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3409 * @pf: board private structure
3411 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3414 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3415 i40e_flush(&pf->hw);
3419 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3420 * @irq: interrupt number
3421 * @data: pointer to a q_vector
3423 * This is the handler used for all MSI/Legacy interrupts, and deals
3424 * with both queue and non-queue interrupts. This is also used in
3425 * MSIX mode to handle the non-queue interrupts.
3427 static irqreturn_t i40e_intr(int irq, void *data)
3429 struct i40e_pf *pf = (struct i40e_pf *)data;
3430 struct i40e_hw *hw = &pf->hw;
3431 irqreturn_t ret = IRQ_NONE;
3432 u32 icr0, icr0_remaining;
3435 icr0 = rd32(hw, I40E_PFINT_ICR0);
3436 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3438 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3439 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3442 /* if interrupt but no bits showing, must be SWINT */
3443 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3444 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3447 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3448 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3449 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3450 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3451 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3454 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3455 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3456 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3457 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3459 /* temporarily disable queue cause for NAPI processing */
3460 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3462 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3463 wr32(hw, I40E_QINT_RQCTL(0), qval);
3465 qval = rd32(hw, I40E_QINT_TQCTL(0));
3466 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3467 wr32(hw, I40E_QINT_TQCTL(0), qval);
3469 if (!test_bit(__I40E_DOWN, &pf->state))
3470 napi_schedule_irqoff(&q_vector->napi);
3473 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3474 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3475 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3478 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3479 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3480 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3483 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3484 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3485 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3488 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3489 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3490 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3491 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3492 val = rd32(hw, I40E_GLGEN_RSTAT);
3493 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3494 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3495 if (val == I40E_RESET_CORER) {
3497 } else if (val == I40E_RESET_GLOBR) {
3499 } else if (val == I40E_RESET_EMPR) {
3501 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3505 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3506 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3507 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3508 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3509 rd32(hw, I40E_PFHMC_ERRORINFO),
3510 rd32(hw, I40E_PFHMC_ERRORDATA));
3513 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3514 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3516 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3517 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3518 i40e_ptp_tx_hwtstamp(pf);
3522 /* If a critical error is pending we have no choice but to reset the
3524 * Report and mask out any remaining unexpected interrupts.
3526 icr0_remaining = icr0 & ena_mask;
3527 if (icr0_remaining) {
3528 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3530 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3531 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3532 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3533 dev_info(&pf->pdev->dev, "device will be reset\n");
3534 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3535 i40e_service_event_schedule(pf);
3537 ena_mask &= ~icr0_remaining;
3542 /* re-enable interrupt causes */
3543 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3544 if (!test_bit(__I40E_DOWN, &pf->state)) {
3545 i40e_service_event_schedule(pf);
3546 i40e_irq_dynamic_enable_icr0(pf);
3553 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3554 * @tx_ring: tx ring to clean
3555 * @budget: how many cleans we're allowed
3557 * Returns true if there's any budget left (e.g. the clean is finished)
3559 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3561 struct i40e_vsi *vsi = tx_ring->vsi;
3562 u16 i = tx_ring->next_to_clean;
3563 struct i40e_tx_buffer *tx_buf;
3564 struct i40e_tx_desc *tx_desc;
3566 tx_buf = &tx_ring->tx_bi[i];
3567 tx_desc = I40E_TX_DESC(tx_ring, i);
3568 i -= tx_ring->count;
3571 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3573 /* if next_to_watch is not set then there is no work pending */
3577 /* prevent any other reads prior to eop_desc */
3578 read_barrier_depends();
3580 /* if the descriptor isn't done, no work yet to do */
3581 if (!(eop_desc->cmd_type_offset_bsz &
3582 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3585 /* clear next_to_watch to prevent false hangs */
3586 tx_buf->next_to_watch = NULL;
3588 tx_desc->buffer_addr = 0;
3589 tx_desc->cmd_type_offset_bsz = 0;
3590 /* move past filter desc */
3595 i -= tx_ring->count;
3596 tx_buf = tx_ring->tx_bi;
3597 tx_desc = I40E_TX_DESC(tx_ring, 0);
3599 /* unmap skb header data */
3600 dma_unmap_single(tx_ring->dev,
3601 dma_unmap_addr(tx_buf, dma),
3602 dma_unmap_len(tx_buf, len),
3604 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3605 kfree(tx_buf->raw_buf);
3607 tx_buf->raw_buf = NULL;
3608 tx_buf->tx_flags = 0;
3609 tx_buf->next_to_watch = NULL;
3610 dma_unmap_len_set(tx_buf, len, 0);
3611 tx_desc->buffer_addr = 0;
3612 tx_desc->cmd_type_offset_bsz = 0;
3614 /* move us past the eop_desc for start of next FD desc */
3619 i -= tx_ring->count;
3620 tx_buf = tx_ring->tx_bi;
3621 tx_desc = I40E_TX_DESC(tx_ring, 0);
3624 /* update budget accounting */
3626 } while (likely(budget));
3628 i += tx_ring->count;
3629 tx_ring->next_to_clean = i;
3631 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3632 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3638 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3639 * @irq: interrupt number
3640 * @data: pointer to a q_vector
3642 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3644 struct i40e_q_vector *q_vector = data;
3645 struct i40e_vsi *vsi;
3647 if (!q_vector->tx.ring)
3650 vsi = q_vector->tx.ring->vsi;
3651 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3657 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3658 * @vsi: the VSI being configured
3659 * @v_idx: vector index
3660 * @qp_idx: queue pair index
3662 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3664 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3665 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3666 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3668 tx_ring->q_vector = q_vector;
3669 tx_ring->next = q_vector->tx.ring;
3670 q_vector->tx.ring = tx_ring;
3671 q_vector->tx.count++;
3673 rx_ring->q_vector = q_vector;
3674 rx_ring->next = q_vector->rx.ring;
3675 q_vector->rx.ring = rx_ring;
3676 q_vector->rx.count++;
3680 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3681 * @vsi: the VSI being configured
3683 * This function maps descriptor rings to the queue-specific vectors
3684 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3685 * one vector per queue pair, but on a constrained vector budget, we
3686 * group the queue pairs as "efficiently" as possible.
3688 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3690 int qp_remaining = vsi->num_queue_pairs;
3691 int q_vectors = vsi->num_q_vectors;
3696 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3697 * group them so there are multiple queues per vector.
3698 * It is also important to go through all the vectors available to be
3699 * sure that if we don't use all the vectors, that the remaining vectors
3700 * are cleared. This is especially important when decreasing the
3701 * number of queues in use.
3703 for (; v_start < q_vectors; v_start++) {
3704 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3706 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3708 q_vector->num_ringpairs = num_ringpairs;
3710 q_vector->rx.count = 0;
3711 q_vector->tx.count = 0;
3712 q_vector->rx.ring = NULL;
3713 q_vector->tx.ring = NULL;
3715 while (num_ringpairs--) {
3716 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3724 * i40e_vsi_request_irq - Request IRQ from the OS
3725 * @vsi: the VSI being configured
3726 * @basename: name for the vector
3728 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3730 struct i40e_pf *pf = vsi->back;
3733 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3734 err = i40e_vsi_request_irq_msix(vsi, basename);
3735 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3736 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3739 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3743 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3748 #ifdef CONFIG_NET_POLL_CONTROLLER
3750 * i40e_netpoll - A Polling 'interrupt' handler
3751 * @netdev: network interface device structure
3753 * This is used by netconsole to send skbs without having to re-enable
3754 * interrupts. It's not called while the normal interrupt routine is executing.
3757 void i40e_netpoll(struct net_device *netdev)
3759 static void i40e_netpoll(struct net_device *netdev)
3762 struct i40e_netdev_priv *np = netdev_priv(netdev);
3763 struct i40e_vsi *vsi = np->vsi;
3764 struct i40e_pf *pf = vsi->back;
3767 /* if interface is down do nothing */
3768 if (test_bit(__I40E_DOWN, &vsi->state))
3771 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3772 for (i = 0; i < vsi->num_q_vectors; i++)
3773 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3775 i40e_intr(pf->pdev->irq, netdev);
3781 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3782 * @pf: the PF being configured
3783 * @pf_q: the PF queue
3784 * @enable: enable or disable state of the queue
3786 * This routine will wait for the given Tx queue of the PF to reach the
3787 * enabled or disabled state.
3788 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3789 * multiple retries; else will return 0 in case of success.
3791 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3796 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3797 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3798 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3801 usleep_range(10, 20);
3803 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3810 * i40e_vsi_control_tx - Start or stop a VSI's rings
3811 * @vsi: the VSI being configured
3812 * @enable: start or stop the rings
3814 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3816 struct i40e_pf *pf = vsi->back;
3817 struct i40e_hw *hw = &pf->hw;
3818 int i, j, pf_q, ret = 0;
3821 pf_q = vsi->base_queue;
3822 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3824 /* warn the TX unit of coming changes */
3825 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3827 usleep_range(10, 20);
3829 for (j = 0; j < 50; j++) {
3830 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3831 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3832 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3834 usleep_range(1000, 2000);
3836 /* Skip if the queue is already in the requested state */
3837 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3840 /* turn on/off the queue */
3842 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3843 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3845 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3848 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3849 /* No waiting for the Tx queue to disable */
3850 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3853 /* wait for the change to finish */
3854 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3856 dev_info(&pf->pdev->dev,
3857 "VSI seid %d Tx ring %d %sable timeout\n",
3858 vsi->seid, pf_q, (enable ? "en" : "dis"));
3863 if (hw->revision_id == 0)
3869 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3870 * @pf: the PF being configured
3871 * @pf_q: the PF queue
3872 * @enable: enable or disable state of the queue
3874 * This routine will wait for the given Rx queue of the PF to reach the
3875 * enabled or disabled state.
3876 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3877 * multiple retries; else will return 0 in case of success.
3879 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3884 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3885 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3886 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3889 usleep_range(10, 20);
3891 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3898 * i40e_vsi_control_rx - Start or stop a VSI's rings
3899 * @vsi: the VSI being configured
3900 * @enable: start or stop the rings
3902 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3904 struct i40e_pf *pf = vsi->back;
3905 struct i40e_hw *hw = &pf->hw;
3906 int i, j, pf_q, ret = 0;
3909 pf_q = vsi->base_queue;
3910 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3911 for (j = 0; j < 50; j++) {
3912 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3913 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3914 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3916 usleep_range(1000, 2000);
3919 /* Skip if the queue is already in the requested state */
3920 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3923 /* turn on/off the queue */
3925 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3927 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3928 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3930 /* wait for the change to finish */
3931 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3933 dev_info(&pf->pdev->dev,
3934 "VSI seid %d Rx ring %d %sable timeout\n",
3935 vsi->seid, pf_q, (enable ? "en" : "dis"));
3944 * i40e_vsi_control_rings - Start or stop a VSI's rings
3945 * @vsi: the VSI being configured
3946 * @enable: start or stop the rings
3948 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3952 /* do rx first for enable and last for disable */
3954 ret = i40e_vsi_control_rx(vsi, request);
3957 ret = i40e_vsi_control_tx(vsi, request);
3959 /* Ignore return value, we need to shutdown whatever we can */
3960 i40e_vsi_control_tx(vsi, request);
3961 i40e_vsi_control_rx(vsi, request);
3968 * i40e_vsi_free_irq - Free the irq association with the OS
3969 * @vsi: the VSI being configured
3971 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3973 struct i40e_pf *pf = vsi->back;
3974 struct i40e_hw *hw = &pf->hw;
3975 int base = vsi->base_vector;
3979 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3980 if (!vsi->q_vectors)
3983 if (!vsi->irqs_ready)
3986 vsi->irqs_ready = false;
3987 for (i = 0; i < vsi->num_q_vectors; i++) {
3988 u16 vector = i + base;
3990 /* free only the irqs that were actually requested */
3991 if (!vsi->q_vectors[i] ||
3992 !vsi->q_vectors[i]->num_ringpairs)
3995 /* clear the affinity_mask in the IRQ descriptor */
3996 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3998 free_irq(pf->msix_entries[vector].vector,
4001 /* Tear down the interrupt queue link list
4003 * We know that they come in pairs and always
4004 * the Rx first, then the Tx. To clear the
4005 * link list, stick the EOL value into the
4006 * next_q field of the registers.
4008 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4009 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4010 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4011 val |= I40E_QUEUE_END_OF_LIST
4012 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4013 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4015 while (qp != I40E_QUEUE_END_OF_LIST) {
4018 val = rd32(hw, I40E_QINT_RQCTL(qp));
4020 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4021 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4022 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4023 I40E_QINT_RQCTL_INTEVENT_MASK);
4025 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4026 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4028 wr32(hw, I40E_QINT_RQCTL(qp), val);
4030 val = rd32(hw, I40E_QINT_TQCTL(qp));
4032 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4033 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4035 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4036 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4037 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4038 I40E_QINT_TQCTL_INTEVENT_MASK);
4040 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4041 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4043 wr32(hw, I40E_QINT_TQCTL(qp), val);
4048 free_irq(pf->pdev->irq, pf);
4050 val = rd32(hw, I40E_PFINT_LNKLST0);
4051 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4052 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4053 val |= I40E_QUEUE_END_OF_LIST
4054 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4055 wr32(hw, I40E_PFINT_LNKLST0, val);
4057 val = rd32(hw, I40E_QINT_RQCTL(qp));
4058 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4059 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4060 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4061 I40E_QINT_RQCTL_INTEVENT_MASK);
4063 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4064 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4066 wr32(hw, I40E_QINT_RQCTL(qp), val);
4068 val = rd32(hw, I40E_QINT_TQCTL(qp));
4070 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4071 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4072 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4073 I40E_QINT_TQCTL_INTEVENT_MASK);
4075 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4076 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4078 wr32(hw, I40E_QINT_TQCTL(qp), val);
4083 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4084 * @vsi: the VSI being configured
4085 * @v_idx: Index of vector to be freed
4087 * This function frees the memory allocated to the q_vector. In addition if
4088 * NAPI is enabled it will delete any references to the NAPI struct prior
4089 * to freeing the q_vector.
4091 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4093 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4094 struct i40e_ring *ring;
4099 /* disassociate q_vector from rings */
4100 i40e_for_each_ring(ring, q_vector->tx)
4101 ring->q_vector = NULL;
4103 i40e_for_each_ring(ring, q_vector->rx)
4104 ring->q_vector = NULL;
4106 /* only VSI w/ an associated netdev is set up w/ NAPI */
4108 netif_napi_del(&q_vector->napi);
4110 vsi->q_vectors[v_idx] = NULL;
4112 kfree_rcu(q_vector, rcu);
4116 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4117 * @vsi: the VSI being un-configured
4119 * This frees the memory allocated to the q_vectors and
4120 * deletes references to the NAPI struct.
4122 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4126 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4127 i40e_free_q_vector(vsi, v_idx);
4131 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4132 * @pf: board private structure
4134 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4136 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4137 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4138 pci_disable_msix(pf->pdev);
4139 kfree(pf->msix_entries);
4140 pf->msix_entries = NULL;
4141 kfree(pf->irq_pile);
4142 pf->irq_pile = NULL;
4143 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4144 pci_disable_msi(pf->pdev);
4146 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4150 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4151 * @pf: board private structure
4153 * We go through and clear interrupt specific resources and reset the structure
4154 * to pre-load conditions
4156 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4160 i40e_stop_misc_vector(pf);
4161 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4162 synchronize_irq(pf->msix_entries[0].vector);
4163 free_irq(pf->msix_entries[0].vector, pf);
4166 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4167 for (i = 0; i < pf->num_alloc_vsi; i++)
4169 i40e_vsi_free_q_vectors(pf->vsi[i]);
4170 i40e_reset_interrupt_capability(pf);
4174 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4175 * @vsi: the VSI being configured
4177 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4184 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4185 napi_enable(&vsi->q_vectors[q_idx]->napi);
4189 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4190 * @vsi: the VSI being configured
4192 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4199 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4200 napi_disable(&vsi->q_vectors[q_idx]->napi);
4204 * i40e_vsi_close - Shut down a VSI
4205 * @vsi: the vsi to be quelled
4207 static void i40e_vsi_close(struct i40e_vsi *vsi)
4209 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4211 i40e_vsi_free_irq(vsi);
4212 i40e_vsi_free_tx_resources(vsi);
4213 i40e_vsi_free_rx_resources(vsi);
4214 vsi->current_netdev_flags = 0;
4218 * i40e_quiesce_vsi - Pause a given VSI
4219 * @vsi: the VSI being paused
4221 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4223 if (test_bit(__I40E_DOWN, &vsi->state))
4226 /* No need to disable FCoE VSI when Tx suspended */
4227 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4228 vsi->type == I40E_VSI_FCOE) {
4229 dev_dbg(&vsi->back->pdev->dev,
4230 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4234 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4235 if (vsi->netdev && netif_running(vsi->netdev))
4236 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4238 i40e_vsi_close(vsi);
4242 * i40e_unquiesce_vsi - Resume a given VSI
4243 * @vsi: the VSI being resumed
4245 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4247 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4250 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4251 if (vsi->netdev && netif_running(vsi->netdev))
4252 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4254 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4258 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4261 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4265 for (v = 0; v < pf->num_alloc_vsi; v++) {
4267 i40e_quiesce_vsi(pf->vsi[v]);
4272 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4275 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4279 for (v = 0; v < pf->num_alloc_vsi; v++) {
4281 i40e_unquiesce_vsi(pf->vsi[v]);
4285 #ifdef CONFIG_I40E_DCB
4287 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4288 * @vsi: the VSI being configured
4290 * This function waits for the given VSI's Tx queues to be disabled.
4292 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4294 struct i40e_pf *pf = vsi->back;
4297 pf_q = vsi->base_queue;
4298 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4299 /* Check and wait for the disable status of the queue */
4300 ret = i40e_pf_txq_wait(pf, pf_q, false);
4302 dev_info(&pf->pdev->dev,
4303 "VSI seid %d Tx ring %d disable timeout\n",
4313 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4316 * This function waits for the Tx queues to be in disabled state for all the
4317 * VSIs that are managed by this PF.
4319 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4323 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4324 /* No need to wait for FCoE VSI queues */
4325 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4326 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4338 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4339 * @q_idx: TX queue number
4340 * @vsi: Pointer to VSI struct
4342 * This function checks specified queue for given VSI. Detects hung condition.
4343 * Sets hung bit since it is two step process. Before next run of service task
4344 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4345 * hung condition remain unchanged and during subsequent run, this function
4346 * issues SW interrupt to recover from hung condition.
4348 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4350 struct i40e_ring *tx_ring = NULL;
4352 u32 head, val, tx_pending;
4357 /* now that we have an index, find the tx_ring struct */
4358 for (i = 0; i < vsi->num_queue_pairs; i++) {
4359 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4360 if (q_idx == vsi->tx_rings[i]->queue_index) {
4361 tx_ring = vsi->tx_rings[i];
4370 /* Read interrupt register */
4371 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4373 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4374 tx_ring->vsi->base_vector - 1));
4376 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4378 /* Bail out if interrupts are disabled because napi_poll
4379 * execution in-progress or will get scheduled soon.
4380 * napi_poll cleans TX and RX queues and updates 'next_to_clean'.
4382 if (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))
4385 head = i40e_get_head(tx_ring);
4387 tx_pending = i40e_get_tx_pending(tx_ring);
4389 /* HW is done executing descriptors, updated HEAD write back,
4390 * but SW hasn't processed those descriptors. If interrupt is
4391 * not generated from this point ON, it could result into
4392 * dev_watchdog detecting timeout on those netdev_queue,
4393 * hence proactively trigger SW interrupt.
4396 /* NAPI Poll didn't run and clear since it was set */
4397 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4398 &tx_ring->q_vector->hung_detected)) {
4399 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4400 vsi->seid, q_idx, tx_pending,
4401 tx_ring->next_to_clean, head,
4402 tx_ring->next_to_use,
4403 readl(tx_ring->tail));
4404 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4405 vsi->seid, q_idx, val);
4406 i40e_force_wb(vsi, tx_ring->q_vector);
4408 /* First Chance - detected possible hung */
4409 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4410 &tx_ring->q_vector->hung_detected);
4416 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4417 * @pf: pointer to PF struct
4419 * LAN VSI has netdev and netdev has TX queues. This function is to check
4420 * each of those TX queues if they are hung, trigger recovery by issuing
4423 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4425 struct net_device *netdev;
4426 struct i40e_vsi *vsi;
4429 /* Only for LAN VSI */
4430 vsi = pf->vsi[pf->lan_vsi];
4435 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4436 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4437 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4440 /* Make sure type is MAIN VSI */
4441 if (vsi->type != I40E_VSI_MAIN)
4444 netdev = vsi->netdev;
4448 /* Bail out if netif_carrier is not OK */
4449 if (!netif_carrier_ok(netdev))
4452 /* Go thru' TX queues for netdev */
4453 for (i = 0; i < netdev->num_tx_queues; i++) {
4454 struct netdev_queue *q;
4456 q = netdev_get_tx_queue(netdev, i);
4458 i40e_detect_recover_hung_queue(i, vsi);
4463 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4464 * @pf: pointer to PF
4466 * Get TC map for ISCSI PF type that will include iSCSI TC
4469 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4471 struct i40e_dcb_app_priority_table app;
4472 struct i40e_hw *hw = &pf->hw;
4473 u8 enabled_tc = 1; /* TC0 is always enabled */
4475 /* Get the iSCSI APP TLV */
4476 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4478 for (i = 0; i < dcbcfg->numapps; i++) {
4479 app = dcbcfg->app[i];
4480 if (app.selector == I40E_APP_SEL_TCPIP &&
4481 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4482 tc = dcbcfg->etscfg.prioritytable[app.priority];
4483 enabled_tc |= BIT(tc);
4492 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4493 * @dcbcfg: the corresponding DCBx configuration structure
4495 * Return the number of TCs from given DCBx configuration
4497 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4502 /* Scan the ETS Config Priority Table to find
4503 * traffic class enabled for a given priority
4504 * and use the traffic class index to get the
4505 * number of traffic classes enabled
4507 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4508 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4509 num_tc = dcbcfg->etscfg.prioritytable[i];
4512 /* Traffic class index starts from zero so
4513 * increment to return the actual count
4519 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4520 * @dcbcfg: the corresponding DCBx configuration structure
4522 * Query the current DCB configuration and return the number of
4523 * traffic classes enabled from the given DCBX config
4525 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4527 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4531 for (i = 0; i < num_tc; i++)
4532 enabled_tc |= BIT(i);
4538 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4539 * @pf: PF being queried
4541 * Return number of traffic classes enabled for the given PF
4543 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4545 struct i40e_hw *hw = &pf->hw;
4548 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4550 /* If DCB is not enabled then always in single TC */
4551 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4554 /* SFP mode will be enabled for all TCs on port */
4555 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4556 return i40e_dcb_get_num_tc(dcbcfg);
4558 /* MFP mode return count of enabled TCs for this PF */
4559 if (pf->hw.func_caps.iscsi)
4560 enabled_tc = i40e_get_iscsi_tc_map(pf);
4562 return 1; /* Only TC0 */
4564 /* At least have TC0 */
4565 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4566 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4567 if (enabled_tc & BIT(i))
4574 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4575 * @pf: PF being queried
4577 * Return a bitmap for first enabled traffic class for this PF.
4579 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4581 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4585 return 0x1; /* TC0 */
4587 /* Find the first enabled TC */
4588 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4589 if (enabled_tc & BIT(i))
4597 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4598 * @pf: PF being queried
4600 * Return a bitmap for enabled traffic classes for this PF.
4602 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4604 /* If DCB is not enabled for this PF then just return default TC */
4605 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4606 return i40e_pf_get_default_tc(pf);
4608 /* SFP mode we want PF to be enabled for all TCs */
4609 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4610 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4612 /* MFP enabled and iSCSI PF type */
4613 if (pf->hw.func_caps.iscsi)
4614 return i40e_get_iscsi_tc_map(pf);
4616 return i40e_pf_get_default_tc(pf);
4620 * i40e_vsi_get_bw_info - Query VSI BW Information
4621 * @vsi: the VSI being queried
4623 * Returns 0 on success, negative value on failure
4625 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4627 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4628 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4629 struct i40e_pf *pf = vsi->back;
4630 struct i40e_hw *hw = &pf->hw;
4635 /* Get the VSI level BW configuration */
4636 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4638 dev_info(&pf->pdev->dev,
4639 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4640 i40e_stat_str(&pf->hw, ret),
4641 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4645 /* Get the VSI level BW configuration per TC */
4646 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4649 dev_info(&pf->pdev->dev,
4650 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4651 i40e_stat_str(&pf->hw, ret),
4652 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4656 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4657 dev_info(&pf->pdev->dev,
4658 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4659 bw_config.tc_valid_bits,
4660 bw_ets_config.tc_valid_bits);
4661 /* Still continuing */
4664 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4665 vsi->bw_max_quanta = bw_config.max_bw;
4666 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4667 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4668 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4669 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4670 vsi->bw_ets_limit_credits[i] =
4671 le16_to_cpu(bw_ets_config.credits[i]);
4672 /* 3 bits out of 4 for each TC */
4673 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4680 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4681 * @vsi: the VSI being configured
4682 * @enabled_tc: TC bitmap
4683 * @bw_credits: BW shared credits per TC
4685 * Returns 0 on success, negative value on failure
4687 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4690 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4694 bw_data.tc_valid_bits = enabled_tc;
4695 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4696 bw_data.tc_bw_credits[i] = bw_share[i];
4698 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4701 dev_info(&vsi->back->pdev->dev,
4702 "AQ command Config VSI BW allocation per TC failed = %d\n",
4703 vsi->back->hw.aq.asq_last_status);
4707 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4708 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4714 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4715 * @vsi: the VSI being configured
4716 * @enabled_tc: TC map to be enabled
4719 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4721 struct net_device *netdev = vsi->netdev;
4722 struct i40e_pf *pf = vsi->back;
4723 struct i40e_hw *hw = &pf->hw;
4726 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4732 netdev_reset_tc(netdev);
4736 /* Set up actual enabled TCs on the VSI */
4737 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4740 /* set per TC queues for the VSI */
4741 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4742 /* Only set TC queues for enabled tcs
4744 * e.g. For a VSI that has TC0 and TC3 enabled the
4745 * enabled_tc bitmap would be 0x00001001; the driver
4746 * will set the numtc for netdev as 2 that will be
4747 * referenced by the netdev layer as TC 0 and 1.
4749 if (vsi->tc_config.enabled_tc & BIT(i))
4750 netdev_set_tc_queue(netdev,
4751 vsi->tc_config.tc_info[i].netdev_tc,
4752 vsi->tc_config.tc_info[i].qcount,
4753 vsi->tc_config.tc_info[i].qoffset);
4756 /* Assign UP2TC map for the VSI */
4757 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4758 /* Get the actual TC# for the UP */
4759 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4760 /* Get the mapped netdev TC# for the UP */
4761 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4762 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4767 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4768 * @vsi: the VSI being configured
4769 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4771 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4772 struct i40e_vsi_context *ctxt)
4774 /* copy just the sections touched not the entire info
4775 * since not all sections are valid as returned by
4778 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4779 memcpy(&vsi->info.queue_mapping,
4780 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4781 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4782 sizeof(vsi->info.tc_mapping));
4786 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4787 * @vsi: VSI to be configured
4788 * @enabled_tc: TC bitmap
4790 * This configures a particular VSI for TCs that are mapped to the
4791 * given TC bitmap. It uses default bandwidth share for TCs across
4792 * VSIs to configure TC for a particular VSI.
4795 * It is expected that the VSI queues have been quisced before calling
4798 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4800 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4801 struct i40e_vsi_context ctxt;
4805 /* Check if enabled_tc is same as existing or new TCs */
4806 if (vsi->tc_config.enabled_tc == enabled_tc)
4809 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4810 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4811 if (enabled_tc & BIT(i))
4815 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4817 dev_info(&vsi->back->pdev->dev,
4818 "Failed configuring TC map %d for VSI %d\n",
4819 enabled_tc, vsi->seid);
4823 /* Update Queue Pairs Mapping for currently enabled UPs */
4824 ctxt.seid = vsi->seid;
4825 ctxt.pf_num = vsi->back->hw.pf_id;
4827 ctxt.uplink_seid = vsi->uplink_seid;
4828 ctxt.info = vsi->info;
4829 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4831 /* Update the VSI after updating the VSI queue-mapping information */
4832 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4834 dev_info(&vsi->back->pdev->dev,
4835 "Update vsi tc config failed, err %s aq_err %s\n",
4836 i40e_stat_str(&vsi->back->hw, ret),
4837 i40e_aq_str(&vsi->back->hw,
4838 vsi->back->hw.aq.asq_last_status));
4841 /* update the local VSI info with updated queue map */
4842 i40e_vsi_update_queue_map(vsi, &ctxt);
4843 vsi->info.valid_sections = 0;
4845 /* Update current VSI BW information */
4846 ret = i40e_vsi_get_bw_info(vsi);
4848 dev_info(&vsi->back->pdev->dev,
4849 "Failed updating vsi bw info, err %s aq_err %s\n",
4850 i40e_stat_str(&vsi->back->hw, ret),
4851 i40e_aq_str(&vsi->back->hw,
4852 vsi->back->hw.aq.asq_last_status));
4856 /* Update the netdev TC setup */
4857 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4863 * i40e_veb_config_tc - Configure TCs for given VEB
4865 * @enabled_tc: TC bitmap
4867 * Configures given TC bitmap for VEB (switching) element
4869 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4871 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4872 struct i40e_pf *pf = veb->pf;
4876 /* No TCs or already enabled TCs just return */
4877 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4880 bw_data.tc_valid_bits = enabled_tc;
4881 /* bw_data.absolute_credits is not set (relative) */
4883 /* Enable ETS TCs with equal BW Share for now */
4884 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4885 if (enabled_tc & BIT(i))
4886 bw_data.tc_bw_share_credits[i] = 1;
4889 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4892 dev_info(&pf->pdev->dev,
4893 "VEB bw config failed, err %s aq_err %s\n",
4894 i40e_stat_str(&pf->hw, ret),
4895 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4899 /* Update the BW information */
4900 ret = i40e_veb_get_bw_info(veb);
4902 dev_info(&pf->pdev->dev,
4903 "Failed getting veb bw config, err %s aq_err %s\n",
4904 i40e_stat_str(&pf->hw, ret),
4905 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4912 #ifdef CONFIG_I40E_DCB
4914 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4917 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4918 * the caller would've quiesce all the VSIs before calling
4921 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4927 /* Enable the TCs available on PF to all VEBs */
4928 tc_map = i40e_pf_get_tc_map(pf);
4929 for (v = 0; v < I40E_MAX_VEB; v++) {
4932 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4934 dev_info(&pf->pdev->dev,
4935 "Failed configuring TC for VEB seid=%d\n",
4937 /* Will try to configure as many components */
4941 /* Update each VSI */
4942 for (v = 0; v < pf->num_alloc_vsi; v++) {
4946 /* - Enable all TCs for the LAN VSI
4948 * - For FCoE VSI only enable the TC configured
4949 * as per the APP TLV
4951 * - For all others keep them at TC0 for now
4953 if (v == pf->lan_vsi)
4954 tc_map = i40e_pf_get_tc_map(pf);
4956 tc_map = i40e_pf_get_default_tc(pf);
4958 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4959 tc_map = i40e_get_fcoe_tc_map(pf);
4960 #endif /* #ifdef I40E_FCOE */
4962 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4964 dev_info(&pf->pdev->dev,
4965 "Failed configuring TC for VSI seid=%d\n",
4967 /* Will try to configure as many components */
4969 /* Re-configure VSI vectors based on updated TC map */
4970 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4971 if (pf->vsi[v]->netdev)
4972 i40e_dcbnl_set_all(pf->vsi[v]);
4978 * i40e_resume_port_tx - Resume port Tx
4981 * Resume a port's Tx and issue a PF reset in case of failure to
4984 static int i40e_resume_port_tx(struct i40e_pf *pf)
4986 struct i40e_hw *hw = &pf->hw;
4989 ret = i40e_aq_resume_port_tx(hw, NULL);
4991 dev_info(&pf->pdev->dev,
4992 "Resume Port Tx failed, err %s aq_err %s\n",
4993 i40e_stat_str(&pf->hw, ret),
4994 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4995 /* Schedule PF reset to recover */
4996 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4997 i40e_service_event_schedule(pf);
5004 * i40e_init_pf_dcb - Initialize DCB configuration
5005 * @pf: PF being configured
5007 * Query the current DCB configuration and cache it
5008 * in the hardware structure
5010 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5012 struct i40e_hw *hw = &pf->hw;
5015 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5016 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
5017 (pf->hw.aq.fw_maj_ver < 4))
5020 /* Get the initial DCB configuration */
5021 err = i40e_init_dcb(hw);
5023 /* Device/Function is not DCBX capable */
5024 if ((!hw->func_caps.dcb) ||
5025 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5026 dev_info(&pf->pdev->dev,
5027 "DCBX offload is not supported or is disabled for this PF.\n");
5029 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5033 /* When status is not DISABLED then DCBX in FW */
5034 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5035 DCB_CAP_DCBX_VER_IEEE;
5037 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5038 /* Enable DCB tagging only when more than one TC */
5039 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5040 pf->flags |= I40E_FLAG_DCB_ENABLED;
5041 dev_dbg(&pf->pdev->dev,
5042 "DCBX offload is supported for this PF.\n");
5045 dev_info(&pf->pdev->dev,
5046 "Query for DCB configuration failed, err %s aq_err %s\n",
5047 i40e_stat_str(&pf->hw, err),
5048 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5054 #endif /* CONFIG_I40E_DCB */
5055 #define SPEED_SIZE 14
5058 * i40e_print_link_message - print link up or down
5059 * @vsi: the VSI for which link needs a message
5061 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5063 char *speed = "Unknown";
5064 char *fc = "Unknown";
5066 if (vsi->current_isup == isup)
5068 vsi->current_isup = isup;
5070 netdev_info(vsi->netdev, "NIC Link is Down\n");
5074 /* Warn user if link speed on NPAR enabled partition is not at
5077 if (vsi->back->hw.func_caps.npar_enable &&
5078 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5079 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5080 netdev_warn(vsi->netdev,
5081 "The partition detected link speed that is less than 10Gbps\n");
5083 switch (vsi->back->hw.phy.link_info.link_speed) {
5084 case I40E_LINK_SPEED_40GB:
5087 case I40E_LINK_SPEED_20GB:
5090 case I40E_LINK_SPEED_10GB:
5093 case I40E_LINK_SPEED_1GB:
5096 case I40E_LINK_SPEED_100MB:
5103 switch (vsi->back->hw.fc.current_mode) {
5107 case I40E_FC_TX_PAUSE:
5110 case I40E_FC_RX_PAUSE:
5118 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5123 * i40e_up_complete - Finish the last steps of bringing up a connection
5124 * @vsi: the VSI being configured
5126 static int i40e_up_complete(struct i40e_vsi *vsi)
5128 struct i40e_pf *pf = vsi->back;
5131 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5132 i40e_vsi_configure_msix(vsi);
5134 i40e_configure_msi_and_legacy(vsi);
5137 err = i40e_vsi_control_rings(vsi, true);
5141 clear_bit(__I40E_DOWN, &vsi->state);
5142 i40e_napi_enable_all(vsi);
5143 i40e_vsi_enable_irq(vsi);
5145 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5147 i40e_print_link_message(vsi, true);
5148 netif_tx_start_all_queues(vsi->netdev);
5149 netif_carrier_on(vsi->netdev);
5150 } else if (vsi->netdev) {
5151 i40e_print_link_message(vsi, false);
5152 /* need to check for qualified module here*/
5153 if ((pf->hw.phy.link_info.link_info &
5154 I40E_AQ_MEDIA_AVAILABLE) &&
5155 (!(pf->hw.phy.link_info.an_info &
5156 I40E_AQ_QUALIFIED_MODULE)))
5157 netdev_err(vsi->netdev,
5158 "the driver failed to link because an unqualified module was detected.");
5161 /* replay FDIR SB filters */
5162 if (vsi->type == I40E_VSI_FDIR) {
5163 /* reset fd counters */
5164 pf->fd_add_err = pf->fd_atr_cnt = 0;
5165 if (pf->fd_tcp_rule > 0) {
5166 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5167 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5168 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5169 pf->fd_tcp_rule = 0;
5171 i40e_fdir_filter_restore(vsi);
5173 i40e_service_event_schedule(pf);
5179 * i40e_vsi_reinit_locked - Reset the VSI
5180 * @vsi: the VSI being configured
5182 * Rebuild the ring structs after some configuration
5183 * has changed, e.g. MTU size.
5185 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5187 struct i40e_pf *pf = vsi->back;
5189 WARN_ON(in_interrupt());
5190 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5191 usleep_range(1000, 2000);
5194 /* Give a VF some time to respond to the reset. The
5195 * two second wait is based upon the watchdog cycle in
5198 if (vsi->type == I40E_VSI_SRIOV)
5201 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5205 * i40e_up - Bring the connection back up after being down
5206 * @vsi: the VSI being configured
5208 int i40e_up(struct i40e_vsi *vsi)
5212 err = i40e_vsi_configure(vsi);
5214 err = i40e_up_complete(vsi);
5220 * i40e_down - Shutdown the connection processing
5221 * @vsi: the VSI being stopped
5223 void i40e_down(struct i40e_vsi *vsi)
5227 /* It is assumed that the caller of this function
5228 * sets the vsi->state __I40E_DOWN bit.
5231 netif_carrier_off(vsi->netdev);
5232 netif_tx_disable(vsi->netdev);
5234 i40e_vsi_disable_irq(vsi);
5235 i40e_vsi_control_rings(vsi, false);
5236 i40e_napi_disable_all(vsi);
5238 for (i = 0; i < vsi->num_queue_pairs; i++) {
5239 i40e_clean_tx_ring(vsi->tx_rings[i]);
5240 i40e_clean_rx_ring(vsi->rx_rings[i]);
5245 * i40e_setup_tc - configure multiple traffic classes
5246 * @netdev: net device to configure
5247 * @tc: number of traffic classes to enable
5249 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5251 struct i40e_netdev_priv *np = netdev_priv(netdev);
5252 struct i40e_vsi *vsi = np->vsi;
5253 struct i40e_pf *pf = vsi->back;
5258 /* Check if DCB enabled to continue */
5259 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5260 netdev_info(netdev, "DCB is not enabled for adapter\n");
5264 /* Check if MFP enabled */
5265 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5266 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5270 /* Check whether tc count is within enabled limit */
5271 if (tc > i40e_pf_get_num_tc(pf)) {
5272 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5276 /* Generate TC map for number of tc requested */
5277 for (i = 0; i < tc; i++)
5278 enabled_tc |= BIT(i);
5280 /* Requesting same TC configuration as already enabled */
5281 if (enabled_tc == vsi->tc_config.enabled_tc)
5284 /* Quiesce VSI queues */
5285 i40e_quiesce_vsi(vsi);
5287 /* Configure VSI for enabled TCs */
5288 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5290 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5296 i40e_unquiesce_vsi(vsi);
5303 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5304 struct tc_to_netdev *tc)
5306 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5307 struct tc_to_netdev *tc)
5310 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5312 return i40e_setup_tc(netdev, tc->tc);
5316 * i40e_open - Called when a network interface is made active
5317 * @netdev: network interface device structure
5319 * The open entry point is called when a network interface is made
5320 * active by the system (IFF_UP). At this point all resources needed
5321 * for transmit and receive operations are allocated, the interrupt
5322 * handler is registered with the OS, the netdev watchdog subtask is
5323 * enabled, and the stack is notified that the interface is ready.
5325 * Returns 0 on success, negative value on failure
5327 int i40e_open(struct net_device *netdev)
5329 struct i40e_netdev_priv *np = netdev_priv(netdev);
5330 struct i40e_vsi *vsi = np->vsi;
5331 struct i40e_pf *pf = vsi->back;
5334 /* disallow open during test or if eeprom is broken */
5335 if (test_bit(__I40E_TESTING, &pf->state) ||
5336 test_bit(__I40E_BAD_EEPROM, &pf->state))
5339 netif_carrier_off(netdev);
5341 err = i40e_vsi_open(vsi);
5345 /* configure global TSO hardware offload settings */
5346 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5347 TCP_FLAG_FIN) >> 16);
5348 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5350 TCP_FLAG_CWR) >> 16);
5351 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5353 #ifdef CONFIG_I40E_VXLAN
5354 vxlan_get_rx_port(netdev);
5356 #ifdef CONFIG_I40E_GENEVE
5357 if (pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE)
5358 geneve_get_rx_port(netdev);
5366 * @vsi: the VSI to open
5368 * Finish initialization of the VSI.
5370 * Returns 0 on success, negative value on failure
5372 int i40e_vsi_open(struct i40e_vsi *vsi)
5374 struct i40e_pf *pf = vsi->back;
5375 char int_name[I40E_INT_NAME_STR_LEN];
5378 /* allocate descriptors */
5379 err = i40e_vsi_setup_tx_resources(vsi);
5382 err = i40e_vsi_setup_rx_resources(vsi);
5386 err = i40e_vsi_configure(vsi);
5391 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5392 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5393 err = i40e_vsi_request_irq(vsi, int_name);
5397 /* Notify the stack of the actual queue counts. */
5398 err = netif_set_real_num_tx_queues(vsi->netdev,
5399 vsi->num_queue_pairs);
5401 goto err_set_queues;
5403 err = netif_set_real_num_rx_queues(vsi->netdev,
5404 vsi->num_queue_pairs);
5406 goto err_set_queues;
5408 } else if (vsi->type == I40E_VSI_FDIR) {
5409 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5410 dev_driver_string(&pf->pdev->dev),
5411 dev_name(&pf->pdev->dev));
5412 err = i40e_vsi_request_irq(vsi, int_name);
5419 err = i40e_up_complete(vsi);
5421 goto err_up_complete;
5428 i40e_vsi_free_irq(vsi);
5430 i40e_vsi_free_rx_resources(vsi);
5432 i40e_vsi_free_tx_resources(vsi);
5433 if (vsi == pf->vsi[pf->lan_vsi])
5434 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5440 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5441 * @pf: Pointer to PF
5443 * This function destroys the hlist where all the Flow Director
5444 * filters were saved.
5446 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5448 struct i40e_fdir_filter *filter;
5449 struct hlist_node *node2;
5451 hlist_for_each_entry_safe(filter, node2,
5452 &pf->fdir_filter_list, fdir_node) {
5453 hlist_del(&filter->fdir_node);
5456 pf->fdir_pf_active_filters = 0;
5460 * i40e_close - Disables a network interface
5461 * @netdev: network interface device structure
5463 * The close entry point is called when an interface is de-activated
5464 * by the OS. The hardware is still under the driver's control, but
5465 * this netdev interface is disabled.
5467 * Returns 0, this is not allowed to fail
5470 int i40e_close(struct net_device *netdev)
5472 static int i40e_close(struct net_device *netdev)
5475 struct i40e_netdev_priv *np = netdev_priv(netdev);
5476 struct i40e_vsi *vsi = np->vsi;
5478 i40e_vsi_close(vsi);
5484 * i40e_do_reset - Start a PF or Core Reset sequence
5485 * @pf: board private structure
5486 * @reset_flags: which reset is requested
5488 * The essential difference in resets is that the PF Reset
5489 * doesn't clear the packet buffers, doesn't reset the PE
5490 * firmware, and doesn't bother the other PFs on the chip.
5492 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5496 WARN_ON(in_interrupt());
5498 if (i40e_check_asq_alive(&pf->hw))
5499 i40e_vc_notify_reset(pf);
5501 /* do the biggest reset indicated */
5502 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5504 /* Request a Global Reset
5506 * This will start the chip's countdown to the actual full
5507 * chip reset event, and a warning interrupt to be sent
5508 * to all PFs, including the requestor. Our handler
5509 * for the warning interrupt will deal with the shutdown
5510 * and recovery of the switch setup.
5512 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5513 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5514 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5515 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5517 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5519 /* Request a Core Reset
5521 * Same as Global Reset, except does *not* include the MAC/PHY
5523 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5524 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5525 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5526 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5527 i40e_flush(&pf->hw);
5529 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5531 /* Request a PF Reset
5533 * Resets only the PF-specific registers
5535 * This goes directly to the tear-down and rebuild of
5536 * the switch, since we need to do all the recovery as
5537 * for the Core Reset.
5539 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5540 i40e_handle_reset_warning(pf);
5542 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5545 /* Find the VSI(s) that requested a re-init */
5546 dev_info(&pf->pdev->dev,
5547 "VSI reinit requested\n");
5548 for (v = 0; v < pf->num_alloc_vsi; v++) {
5549 struct i40e_vsi *vsi = pf->vsi[v];
5552 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5553 i40e_vsi_reinit_locked(pf->vsi[v]);
5554 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5557 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5560 /* Find the VSI(s) that needs to be brought down */
5561 dev_info(&pf->pdev->dev, "VSI down requested\n");
5562 for (v = 0; v < pf->num_alloc_vsi; v++) {
5563 struct i40e_vsi *vsi = pf->vsi[v];
5566 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5567 set_bit(__I40E_DOWN, &vsi->state);
5569 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5573 dev_info(&pf->pdev->dev,
5574 "bad reset request 0x%08x\n", reset_flags);
5578 #ifdef CONFIG_I40E_DCB
5580 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5581 * @pf: board private structure
5582 * @old_cfg: current DCB config
5583 * @new_cfg: new DCB config
5585 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5586 struct i40e_dcbx_config *old_cfg,
5587 struct i40e_dcbx_config *new_cfg)
5589 bool need_reconfig = false;
5591 /* Check if ETS configuration has changed */
5592 if (memcmp(&new_cfg->etscfg,
5594 sizeof(new_cfg->etscfg))) {
5595 /* If Priority Table has changed reconfig is needed */
5596 if (memcmp(&new_cfg->etscfg.prioritytable,
5597 &old_cfg->etscfg.prioritytable,
5598 sizeof(new_cfg->etscfg.prioritytable))) {
5599 need_reconfig = true;
5600 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5603 if (memcmp(&new_cfg->etscfg.tcbwtable,
5604 &old_cfg->etscfg.tcbwtable,
5605 sizeof(new_cfg->etscfg.tcbwtable)))
5606 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5608 if (memcmp(&new_cfg->etscfg.tsatable,
5609 &old_cfg->etscfg.tsatable,
5610 sizeof(new_cfg->etscfg.tsatable)))
5611 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5614 /* Check if PFC configuration has changed */
5615 if (memcmp(&new_cfg->pfc,
5617 sizeof(new_cfg->pfc))) {
5618 need_reconfig = true;
5619 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5622 /* Check if APP Table has changed */
5623 if (memcmp(&new_cfg->app,
5625 sizeof(new_cfg->app))) {
5626 need_reconfig = true;
5627 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5630 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5631 return need_reconfig;
5635 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5636 * @pf: board private structure
5637 * @e: event info posted on ARQ
5639 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5640 struct i40e_arq_event_info *e)
5642 struct i40e_aqc_lldp_get_mib *mib =
5643 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5644 struct i40e_hw *hw = &pf->hw;
5645 struct i40e_dcbx_config tmp_dcbx_cfg;
5646 bool need_reconfig = false;
5650 /* Not DCB capable or capability disabled */
5651 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5654 /* Ignore if event is not for Nearest Bridge */
5655 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5656 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5657 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5658 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5661 /* Check MIB Type and return if event for Remote MIB update */
5662 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5663 dev_dbg(&pf->pdev->dev,
5664 "LLDP event mib type %s\n", type ? "remote" : "local");
5665 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5666 /* Update the remote cached instance and return */
5667 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5668 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5669 &hw->remote_dcbx_config);
5673 /* Store the old configuration */
5674 tmp_dcbx_cfg = hw->local_dcbx_config;
5676 /* Reset the old DCBx configuration data */
5677 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5678 /* Get updated DCBX data from firmware */
5679 ret = i40e_get_dcb_config(&pf->hw);
5681 dev_info(&pf->pdev->dev,
5682 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5683 i40e_stat_str(&pf->hw, ret),
5684 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5688 /* No change detected in DCBX configs */
5689 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5690 sizeof(tmp_dcbx_cfg))) {
5691 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5695 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5696 &hw->local_dcbx_config);
5698 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5703 /* Enable DCB tagging only when more than one TC */
5704 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5705 pf->flags |= I40E_FLAG_DCB_ENABLED;
5707 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5709 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5710 /* Reconfiguration needed quiesce all VSIs */
5711 i40e_pf_quiesce_all_vsi(pf);
5713 /* Changes in configuration update VEB/VSI */
5714 i40e_dcb_reconfigure(pf);
5716 ret = i40e_resume_port_tx(pf);
5718 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5719 /* In case of error no point in resuming VSIs */
5723 /* Wait for the PF's Tx queues to be disabled */
5724 ret = i40e_pf_wait_txq_disabled(pf);
5726 /* Schedule PF reset to recover */
5727 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5728 i40e_service_event_schedule(pf);
5730 i40e_pf_unquiesce_all_vsi(pf);
5736 #endif /* CONFIG_I40E_DCB */
5739 * i40e_do_reset_safe - Protected reset path for userland calls.
5740 * @pf: board private structure
5741 * @reset_flags: which reset is requested
5744 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5747 i40e_do_reset(pf, reset_flags);
5752 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5753 * @pf: board private structure
5754 * @e: event info posted on ARQ
5756 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5759 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5760 struct i40e_arq_event_info *e)
5762 struct i40e_aqc_lan_overflow *data =
5763 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5764 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5765 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5766 struct i40e_hw *hw = &pf->hw;
5770 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5773 /* Queue belongs to VF, find the VF and issue VF reset */
5774 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5775 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5776 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5777 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5778 vf_id -= hw->func_caps.vf_base_id;
5779 vf = &pf->vf[vf_id];
5780 i40e_vc_notify_vf_reset(vf);
5781 /* Allow VF to process pending reset notification */
5783 i40e_reset_vf(vf, false);
5788 * i40e_service_event_complete - Finish up the service event
5789 * @pf: board private structure
5791 static void i40e_service_event_complete(struct i40e_pf *pf)
5793 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5795 /* flush memory to make sure state is correct before next watchog */
5796 smp_mb__before_atomic();
5797 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5801 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5802 * @pf: board private structure
5804 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5808 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5809 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5814 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5815 * @pf: board private structure
5817 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5821 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5822 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5823 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5824 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5829 * i40e_get_global_fd_count - Get total FD filters programmed on device
5830 * @pf: board private structure
5832 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5836 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5837 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5838 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5839 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5844 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5845 * @pf: board private structure
5847 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5849 struct i40e_fdir_filter *filter;
5850 u32 fcnt_prog, fcnt_avail;
5851 struct hlist_node *node;
5853 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5856 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5859 fcnt_prog = i40e_get_global_fd_count(pf);
5860 fcnt_avail = pf->fdir_pf_filter_count;
5861 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5862 (pf->fd_add_err == 0) ||
5863 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5864 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5865 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5866 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5867 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5868 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5871 /* Wait for some more space to be available to turn on ATR */
5872 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5873 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5874 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5875 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5876 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5877 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5881 /* if hw had a problem adding a filter, delete it */
5882 if (pf->fd_inv > 0) {
5883 hlist_for_each_entry_safe(filter, node,
5884 &pf->fdir_filter_list, fdir_node) {
5885 if (filter->fd_id == pf->fd_inv) {
5886 hlist_del(&filter->fdir_node);
5888 pf->fdir_pf_active_filters--;
5894 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5895 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5897 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5898 * @pf: board private structure
5900 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5902 unsigned long min_flush_time;
5903 int flush_wait_retry = 50;
5904 bool disable_atr = false;
5908 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5911 if (!time_after(jiffies, pf->fd_flush_timestamp +
5912 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5915 /* If the flush is happening too quick and we have mostly SB rules we
5916 * should not re-enable ATR for some time.
5918 min_flush_time = pf->fd_flush_timestamp +
5919 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5920 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5922 if (!(time_after(jiffies, min_flush_time)) &&
5923 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5924 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5925 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5929 pf->fd_flush_timestamp = jiffies;
5930 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5931 /* flush all filters */
5932 wr32(&pf->hw, I40E_PFQF_CTL_1,
5933 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5934 i40e_flush(&pf->hw);
5938 /* Check FD flush status every 5-6msec */
5939 usleep_range(5000, 6000);
5940 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5941 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5943 } while (flush_wait_retry--);
5944 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5945 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5947 /* replay sideband filters */
5948 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5950 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5951 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5952 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5953 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5959 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5960 * @pf: board private structure
5962 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5964 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5967 /* We can see up to 256 filter programming desc in transit if the filters are
5968 * being applied really fast; before we see the first
5969 * filter miss error on Rx queue 0. Accumulating enough error messages before
5970 * reacting will make sure we don't cause flush too often.
5972 #define I40E_MAX_FD_PROGRAM_ERROR 256
5975 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5976 * @pf: board private structure
5978 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5981 /* if interface is down do nothing */
5982 if (test_bit(__I40E_DOWN, &pf->state))
5985 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5988 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5989 i40e_fdir_flush_and_replay(pf);
5991 i40e_fdir_check_and_reenable(pf);
5996 * i40e_vsi_link_event - notify VSI of a link event
5997 * @vsi: vsi to be notified
5998 * @link_up: link up or down
6000 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6002 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6005 switch (vsi->type) {
6010 if (!vsi->netdev || !vsi->netdev_registered)
6014 netif_carrier_on(vsi->netdev);
6015 netif_tx_wake_all_queues(vsi->netdev);
6017 netif_carrier_off(vsi->netdev);
6018 netif_tx_stop_all_queues(vsi->netdev);
6022 case I40E_VSI_SRIOV:
6023 case I40E_VSI_VMDQ2:
6025 case I40E_VSI_MIRROR:
6027 /* there is no notification for other VSIs */
6033 * i40e_veb_link_event - notify elements on the veb of a link event
6034 * @veb: veb to be notified
6035 * @link_up: link up or down
6037 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6042 if (!veb || !veb->pf)
6046 /* depth first... */
6047 for (i = 0; i < I40E_MAX_VEB; i++)
6048 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6049 i40e_veb_link_event(pf->veb[i], link_up);
6051 /* ... now the local VSIs */
6052 for (i = 0; i < pf->num_alloc_vsi; i++)
6053 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6054 i40e_vsi_link_event(pf->vsi[i], link_up);
6058 * i40e_link_event - Update netif_carrier status
6059 * @pf: board private structure
6061 static void i40e_link_event(struct i40e_pf *pf)
6063 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6064 u8 new_link_speed, old_link_speed;
6066 bool new_link, old_link;
6068 /* save off old link status information */
6069 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6071 /* set this to force the get_link_status call to refresh state */
6072 pf->hw.phy.get_link_info = true;
6074 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6076 status = i40e_get_link_status(&pf->hw, &new_link);
6078 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6083 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6084 new_link_speed = pf->hw.phy.link_info.link_speed;
6086 if (new_link == old_link &&
6087 new_link_speed == old_link_speed &&
6088 (test_bit(__I40E_DOWN, &vsi->state) ||
6089 new_link == netif_carrier_ok(vsi->netdev)))
6092 if (!test_bit(__I40E_DOWN, &vsi->state))
6093 i40e_print_link_message(vsi, new_link);
6095 /* Notify the base of the switch tree connected to
6096 * the link. Floating VEBs are not notified.
6098 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6099 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6101 i40e_vsi_link_event(vsi, new_link);
6104 i40e_vc_notify_link_state(pf);
6106 if (pf->flags & I40E_FLAG_PTP)
6107 i40e_ptp_set_increment(pf);
6111 * i40e_watchdog_subtask - periodic checks not using event driven response
6112 * @pf: board private structure
6114 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6118 /* if interface is down do nothing */
6119 if (test_bit(__I40E_DOWN, &pf->state) ||
6120 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6123 /* make sure we don't do these things too often */
6124 if (time_before(jiffies, (pf->service_timer_previous +
6125 pf->service_timer_period)))
6127 pf->service_timer_previous = jiffies;
6129 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6130 i40e_link_event(pf);
6132 /* Update the stats for active netdevs so the network stack
6133 * can look at updated numbers whenever it cares to
6135 for (i = 0; i < pf->num_alloc_vsi; i++)
6136 if (pf->vsi[i] && pf->vsi[i]->netdev)
6137 i40e_update_stats(pf->vsi[i]);
6139 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6140 /* Update the stats for the active switching components */
6141 for (i = 0; i < I40E_MAX_VEB; i++)
6143 i40e_update_veb_stats(pf->veb[i]);
6146 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6150 * i40e_reset_subtask - Set up for resetting the device and driver
6151 * @pf: board private structure
6153 static void i40e_reset_subtask(struct i40e_pf *pf)
6155 u32 reset_flags = 0;
6158 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6159 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6160 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6162 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6163 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6164 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6166 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6167 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6168 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6170 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6171 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6172 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6174 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6175 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6176 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6179 /* If there's a recovery already waiting, it takes
6180 * precedence before starting a new reset sequence.
6182 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6183 i40e_handle_reset_warning(pf);
6187 /* If we're already down or resetting, just bail */
6189 !test_bit(__I40E_DOWN, &pf->state) &&
6190 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6191 i40e_do_reset(pf, reset_flags);
6198 * i40e_handle_link_event - Handle link event
6199 * @pf: board private structure
6200 * @e: event info posted on ARQ
6202 static void i40e_handle_link_event(struct i40e_pf *pf,
6203 struct i40e_arq_event_info *e)
6205 struct i40e_aqc_get_link_status *status =
6206 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6208 /* Do a new status request to re-enable LSE reporting
6209 * and load new status information into the hw struct
6210 * This completely ignores any state information
6211 * in the ARQ event info, instead choosing to always
6212 * issue the AQ update link status command.
6214 i40e_link_event(pf);
6216 /* check for unqualified module, if link is down */
6217 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6218 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6219 (!(status->link_info & I40E_AQ_LINK_UP)))
6220 dev_err(&pf->pdev->dev,
6221 "The driver failed to link because an unqualified module was detected.\n");
6225 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6226 * @pf: board private structure
6228 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6230 struct i40e_arq_event_info event;
6231 struct i40e_hw *hw = &pf->hw;
6238 /* Do not run clean AQ when PF reset fails */
6239 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6242 /* check for error indications */
6243 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6245 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6246 if (hw->debug_mask & I40E_DEBUG_AQ)
6247 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6248 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6250 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6251 if (hw->debug_mask & I40E_DEBUG_AQ)
6252 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6253 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6254 pf->arq_overflows++;
6256 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6257 if (hw->debug_mask & I40E_DEBUG_AQ)
6258 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6259 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6262 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6264 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6266 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6267 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6268 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6269 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6271 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6272 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6273 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6274 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6276 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6277 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6278 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6279 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6282 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6284 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6285 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6290 ret = i40e_clean_arq_element(hw, &event, &pending);
6291 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6294 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6298 opcode = le16_to_cpu(event.desc.opcode);
6301 case i40e_aqc_opc_get_link_status:
6302 i40e_handle_link_event(pf, &event);
6304 case i40e_aqc_opc_send_msg_to_pf:
6305 ret = i40e_vc_process_vf_msg(pf,
6306 le16_to_cpu(event.desc.retval),
6307 le32_to_cpu(event.desc.cookie_high),
6308 le32_to_cpu(event.desc.cookie_low),
6312 case i40e_aqc_opc_lldp_update_mib:
6313 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6314 #ifdef CONFIG_I40E_DCB
6316 ret = i40e_handle_lldp_event(pf, &event);
6318 #endif /* CONFIG_I40E_DCB */
6320 case i40e_aqc_opc_event_lan_overflow:
6321 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6322 i40e_handle_lan_overflow_event(pf, &event);
6324 case i40e_aqc_opc_send_msg_to_peer:
6325 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6327 case i40e_aqc_opc_nvm_erase:
6328 case i40e_aqc_opc_nvm_update:
6329 case i40e_aqc_opc_oem_post_update:
6330 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6333 dev_info(&pf->pdev->dev,
6334 "ARQ Error: Unknown event 0x%04x received\n",
6338 } while (pending && (i++ < pf->adminq_work_limit));
6340 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6341 /* re-enable Admin queue interrupt cause */
6342 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6343 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6344 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6347 kfree(event.msg_buf);
6351 * i40e_verify_eeprom - make sure eeprom is good to use
6352 * @pf: board private structure
6354 static void i40e_verify_eeprom(struct i40e_pf *pf)
6358 err = i40e_diag_eeprom_test(&pf->hw);
6360 /* retry in case of garbage read */
6361 err = i40e_diag_eeprom_test(&pf->hw);
6363 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6365 set_bit(__I40E_BAD_EEPROM, &pf->state);
6369 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6370 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6371 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6376 * i40e_enable_pf_switch_lb
6377 * @pf: pointer to the PF structure
6379 * enable switch loop back or die - no point in a return value
6381 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6383 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6384 struct i40e_vsi_context ctxt;
6387 ctxt.seid = pf->main_vsi_seid;
6388 ctxt.pf_num = pf->hw.pf_id;
6390 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6392 dev_info(&pf->pdev->dev,
6393 "couldn't get PF vsi config, err %s aq_err %s\n",
6394 i40e_stat_str(&pf->hw, ret),
6395 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6398 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6399 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6400 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6402 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6404 dev_info(&pf->pdev->dev,
6405 "update vsi switch failed, err %s aq_err %s\n",
6406 i40e_stat_str(&pf->hw, ret),
6407 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6412 * i40e_disable_pf_switch_lb
6413 * @pf: pointer to the PF structure
6415 * disable switch loop back or die - no point in a return value
6417 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6419 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6420 struct i40e_vsi_context ctxt;
6423 ctxt.seid = pf->main_vsi_seid;
6424 ctxt.pf_num = pf->hw.pf_id;
6426 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6428 dev_info(&pf->pdev->dev,
6429 "couldn't get PF vsi config, err %s aq_err %s\n",
6430 i40e_stat_str(&pf->hw, ret),
6431 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6434 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6435 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6436 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6438 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6440 dev_info(&pf->pdev->dev,
6441 "update vsi switch failed, err %s aq_err %s\n",
6442 i40e_stat_str(&pf->hw, ret),
6443 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6448 * i40e_config_bridge_mode - Configure the HW bridge mode
6449 * @veb: pointer to the bridge instance
6451 * Configure the loop back mode for the LAN VSI that is downlink to the
6452 * specified HW bridge instance. It is expected this function is called
6453 * when a new HW bridge is instantiated.
6455 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6457 struct i40e_pf *pf = veb->pf;
6459 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6460 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6461 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6462 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6463 i40e_disable_pf_switch_lb(pf);
6465 i40e_enable_pf_switch_lb(pf);
6469 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6470 * @veb: pointer to the VEB instance
6472 * This is a recursive function that first builds the attached VSIs then
6473 * recurses in to build the next layer of VEB. We track the connections
6474 * through our own index numbers because the seid's from the HW could
6475 * change across the reset.
6477 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6479 struct i40e_vsi *ctl_vsi = NULL;
6480 struct i40e_pf *pf = veb->pf;
6484 /* build VSI that owns this VEB, temporarily attached to base VEB */
6485 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6487 pf->vsi[v]->veb_idx == veb->idx &&
6488 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6489 ctl_vsi = pf->vsi[v];
6494 dev_info(&pf->pdev->dev,
6495 "missing owner VSI for veb_idx %d\n", veb->idx);
6497 goto end_reconstitute;
6499 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6500 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6501 ret = i40e_add_vsi(ctl_vsi);
6503 dev_info(&pf->pdev->dev,
6504 "rebuild of veb_idx %d owner VSI failed: %d\n",
6506 goto end_reconstitute;
6508 i40e_vsi_reset_stats(ctl_vsi);
6510 /* create the VEB in the switch and move the VSI onto the VEB */
6511 ret = i40e_add_veb(veb, ctl_vsi);
6513 goto end_reconstitute;
6515 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6516 veb->bridge_mode = BRIDGE_MODE_VEB;
6518 veb->bridge_mode = BRIDGE_MODE_VEPA;
6519 i40e_config_bridge_mode(veb);
6521 /* create the remaining VSIs attached to this VEB */
6522 for (v = 0; v < pf->num_alloc_vsi; v++) {
6523 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6526 if (pf->vsi[v]->veb_idx == veb->idx) {
6527 struct i40e_vsi *vsi = pf->vsi[v];
6529 vsi->uplink_seid = veb->seid;
6530 ret = i40e_add_vsi(vsi);
6532 dev_info(&pf->pdev->dev,
6533 "rebuild of vsi_idx %d failed: %d\n",
6535 goto end_reconstitute;
6537 i40e_vsi_reset_stats(vsi);
6541 /* create any VEBs attached to this VEB - RECURSION */
6542 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6543 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6544 pf->veb[veb_idx]->uplink_seid = veb->seid;
6545 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6556 * i40e_get_capabilities - get info about the HW
6557 * @pf: the PF struct
6559 static int i40e_get_capabilities(struct i40e_pf *pf)
6561 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6566 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6568 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6572 /* this loads the data into the hw struct for us */
6573 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6575 i40e_aqc_opc_list_func_capabilities,
6577 /* data loaded, buffer no longer needed */
6580 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6581 /* retry with a larger buffer */
6582 buf_len = data_size;
6583 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6584 dev_info(&pf->pdev->dev,
6585 "capability discovery failed, err %s aq_err %s\n",
6586 i40e_stat_str(&pf->hw, err),
6587 i40e_aq_str(&pf->hw,
6588 pf->hw.aq.asq_last_status));
6593 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6594 dev_info(&pf->pdev->dev,
6595 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6596 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6597 pf->hw.func_caps.num_msix_vectors,
6598 pf->hw.func_caps.num_msix_vectors_vf,
6599 pf->hw.func_caps.fd_filters_guaranteed,
6600 pf->hw.func_caps.fd_filters_best_effort,
6601 pf->hw.func_caps.num_tx_qp,
6602 pf->hw.func_caps.num_vsis);
6604 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6605 + pf->hw.func_caps.num_vfs)
6606 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6607 dev_info(&pf->pdev->dev,
6608 "got num_vsis %d, setting num_vsis to %d\n",
6609 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6610 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6616 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6619 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6620 * @pf: board private structure
6622 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6624 struct i40e_vsi *vsi;
6627 /* quick workaround for an NVM issue that leaves a critical register
6630 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6631 static const u32 hkey[] = {
6632 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6633 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6634 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6637 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6638 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6641 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6644 /* find existing VSI and see if it needs configuring */
6646 for (i = 0; i < pf->num_alloc_vsi; i++) {
6647 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6653 /* create a new VSI if none exists */
6655 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6656 pf->vsi[pf->lan_vsi]->seid, 0);
6658 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6659 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6664 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6668 * i40e_fdir_teardown - release the Flow Director resources
6669 * @pf: board private structure
6671 static void i40e_fdir_teardown(struct i40e_pf *pf)
6675 i40e_fdir_filter_exit(pf);
6676 for (i = 0; i < pf->num_alloc_vsi; i++) {
6677 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6678 i40e_vsi_release(pf->vsi[i]);
6685 * i40e_prep_for_reset - prep for the core to reset
6686 * @pf: board private structure
6688 * Close up the VFs and other things in prep for PF Reset.
6690 static void i40e_prep_for_reset(struct i40e_pf *pf)
6692 struct i40e_hw *hw = &pf->hw;
6693 i40e_status ret = 0;
6696 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6697 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6700 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6702 /* quiesce the VSIs and their queues that are not already DOWN */
6703 i40e_pf_quiesce_all_vsi(pf);
6705 for (v = 0; v < pf->num_alloc_vsi; v++) {
6707 pf->vsi[v]->seid = 0;
6710 i40e_shutdown_adminq(&pf->hw);
6712 /* call shutdown HMC */
6713 if (hw->hmc.hmc_obj) {
6714 ret = i40e_shutdown_lan_hmc(hw);
6716 dev_warn(&pf->pdev->dev,
6717 "shutdown_lan_hmc failed: %d\n", ret);
6722 * i40e_send_version - update firmware with driver version
6725 static void i40e_send_version(struct i40e_pf *pf)
6727 struct i40e_driver_version dv;
6729 dv.major_version = DRV_VERSION_MAJOR;
6730 dv.minor_version = DRV_VERSION_MINOR;
6731 dv.build_version = DRV_VERSION_BUILD;
6732 dv.subbuild_version = 0;
6733 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6734 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6738 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6739 * @pf: board private structure
6740 * @reinit: if the Main VSI needs to re-initialized.
6742 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6744 struct i40e_hw *hw = &pf->hw;
6745 u8 set_fc_aq_fail = 0;
6750 /* Now we wait for GRST to settle out.
6751 * We don't have to delete the VEBs or VSIs from the hw switch
6752 * because the reset will make them disappear.
6754 ret = i40e_pf_reset(hw);
6756 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6757 set_bit(__I40E_RESET_FAILED, &pf->state);
6758 goto clear_recovery;
6762 if (test_bit(__I40E_DOWN, &pf->state))
6763 goto clear_recovery;
6764 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6766 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6767 ret = i40e_init_adminq(&pf->hw);
6769 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6770 i40e_stat_str(&pf->hw, ret),
6771 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6772 goto clear_recovery;
6775 /* re-verify the eeprom if we just had an EMP reset */
6776 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6777 i40e_verify_eeprom(pf);
6779 i40e_clear_pxe_mode(hw);
6780 ret = i40e_get_capabilities(pf);
6782 goto end_core_reset;
6784 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6785 hw->func_caps.num_rx_qp,
6786 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6788 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6789 goto end_core_reset;
6791 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6793 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6794 goto end_core_reset;
6797 #ifdef CONFIG_I40E_DCB
6798 ret = i40e_init_pf_dcb(pf);
6800 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6801 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6802 /* Continue without DCB enabled */
6804 #endif /* CONFIG_I40E_DCB */
6806 i40e_init_pf_fcoe(pf);
6809 /* do basic switch setup */
6810 ret = i40e_setup_pf_switch(pf, reinit);
6812 goto end_core_reset;
6814 /* The driver only wants link up/down and module qualification
6815 * reports from firmware. Note the negative logic.
6817 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6818 ~(I40E_AQ_EVENT_LINK_UPDOWN |
6819 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
6821 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6822 i40e_stat_str(&pf->hw, ret),
6823 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6825 /* make sure our flow control settings are restored */
6826 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6828 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6829 i40e_stat_str(&pf->hw, ret),
6830 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6832 /* Rebuild the VSIs and VEBs that existed before reset.
6833 * They are still in our local switch element arrays, so only
6834 * need to rebuild the switch model in the HW.
6836 * If there were VEBs but the reconstitution failed, we'll try
6837 * try to recover minimal use by getting the basic PF VSI working.
6839 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6840 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6841 /* find the one VEB connected to the MAC, and find orphans */
6842 for (v = 0; v < I40E_MAX_VEB; v++) {
6846 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6847 pf->veb[v]->uplink_seid == 0) {
6848 ret = i40e_reconstitute_veb(pf->veb[v]);
6853 /* If Main VEB failed, we're in deep doodoo,
6854 * so give up rebuilding the switch and set up
6855 * for minimal rebuild of PF VSI.
6856 * If orphan failed, we'll report the error
6857 * but try to keep going.
6859 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6860 dev_info(&pf->pdev->dev,
6861 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6863 pf->vsi[pf->lan_vsi]->uplink_seid
6866 } else if (pf->veb[v]->uplink_seid == 0) {
6867 dev_info(&pf->pdev->dev,
6868 "rebuild of orphan VEB failed: %d\n",
6875 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6876 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6877 /* no VEB, so rebuild only the Main VSI */
6878 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6880 dev_info(&pf->pdev->dev,
6881 "rebuild of Main VSI failed: %d\n", ret);
6882 goto end_core_reset;
6886 /* Reconfigure hardware for allowing smaller MSS in the case
6887 * of TSO, so that we avoid the MDD being fired and causing
6888 * a reset in the case of small MSS+TSO.
6890 #define I40E_REG_MSS 0x000E64DC
6891 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6892 #define I40E_64BYTE_MSS 0x400000
6893 val = rd32(hw, I40E_REG_MSS);
6894 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6895 val &= ~I40E_REG_MSS_MIN_MASK;
6896 val |= I40E_64BYTE_MSS;
6897 wr32(hw, I40E_REG_MSS, val);
6900 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6902 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6904 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6905 i40e_stat_str(&pf->hw, ret),
6906 i40e_aq_str(&pf->hw,
6907 pf->hw.aq.asq_last_status));
6909 /* reinit the misc interrupt */
6910 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6911 ret = i40e_setup_misc_vector(pf);
6913 /* Add a filter to drop all Flow control frames from any VSI from being
6914 * transmitted. By doing so we stop a malicious VF from sending out
6915 * PAUSE or PFC frames and potentially controlling traffic for other
6917 * The FW can still send Flow control frames if enabled.
6919 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6922 /* restart the VSIs that were rebuilt and running before the reset */
6923 i40e_pf_unquiesce_all_vsi(pf);
6925 if (pf->num_alloc_vfs) {
6926 for (v = 0; v < pf->num_alloc_vfs; v++)
6927 i40e_reset_vf(&pf->vf[v], true);
6930 /* tell the firmware that we're starting */
6931 i40e_send_version(pf);
6934 clear_bit(__I40E_RESET_FAILED, &pf->state);
6936 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6940 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6941 * @pf: board private structure
6943 * Close up the VFs and other things in prep for a Core Reset,
6944 * then get ready to rebuild the world.
6946 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6948 i40e_prep_for_reset(pf);
6949 i40e_reset_and_rebuild(pf, false);
6953 * i40e_handle_mdd_event
6954 * @pf: pointer to the PF structure
6956 * Called from the MDD irq handler to identify possibly malicious vfs
6958 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6960 struct i40e_hw *hw = &pf->hw;
6961 bool mdd_detected = false;
6962 bool pf_mdd_detected = false;
6967 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6970 /* find what triggered the MDD event */
6971 reg = rd32(hw, I40E_GL_MDET_TX);
6972 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6973 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6974 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6975 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6976 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6977 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6978 I40E_GL_MDET_TX_EVENT_SHIFT;
6979 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6980 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6981 pf->hw.func_caps.base_queue;
6982 if (netif_msg_tx_err(pf))
6983 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6984 event, queue, pf_num, vf_num);
6985 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6986 mdd_detected = true;
6988 reg = rd32(hw, I40E_GL_MDET_RX);
6989 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6990 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6991 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6992 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6993 I40E_GL_MDET_RX_EVENT_SHIFT;
6994 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6995 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6996 pf->hw.func_caps.base_queue;
6997 if (netif_msg_rx_err(pf))
6998 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6999 event, queue, func);
7000 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7001 mdd_detected = true;
7005 reg = rd32(hw, I40E_PF_MDET_TX);
7006 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7007 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7008 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7009 pf_mdd_detected = true;
7011 reg = rd32(hw, I40E_PF_MDET_RX);
7012 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7013 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7014 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7015 pf_mdd_detected = true;
7017 /* Queue belongs to the PF, initiate a reset */
7018 if (pf_mdd_detected) {
7019 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7020 i40e_service_event_schedule(pf);
7024 /* see if one of the VFs needs its hand slapped */
7025 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7027 reg = rd32(hw, I40E_VP_MDET_TX(i));
7028 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7029 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7030 vf->num_mdd_events++;
7031 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7035 reg = rd32(hw, I40E_VP_MDET_RX(i));
7036 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7037 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7038 vf->num_mdd_events++;
7039 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7043 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7044 dev_info(&pf->pdev->dev,
7045 "Too many MDD events on VF %d, disabled\n", i);
7046 dev_info(&pf->pdev->dev,
7047 "Use PF Control I/F to re-enable the VF\n");
7048 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7052 /* re-enable mdd interrupt cause */
7053 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7054 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7055 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7056 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7061 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7062 * @pf: board private structure
7064 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7066 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
7067 struct i40e_hw *hw = &pf->hw;
7072 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7075 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7077 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7078 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7079 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7080 port = pf->udp_ports[i].index;
7082 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7083 pf->udp_ports[i].type,
7086 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7089 dev_info(&pf->pdev->dev,
7090 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7091 port ? "add" : "delete",
7093 i40e_stat_str(&pf->hw, ret),
7094 i40e_aq_str(&pf->hw,
7095 pf->hw.aq.asq_last_status));
7096 pf->udp_ports[i].index = 0;
7104 * i40e_service_task - Run the driver's async subtasks
7105 * @work: pointer to work_struct containing our data
7107 static void i40e_service_task(struct work_struct *work)
7109 struct i40e_pf *pf = container_of(work,
7112 unsigned long start_time = jiffies;
7114 /* don't bother with service tasks if a reset is in progress */
7115 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7116 i40e_service_event_complete(pf);
7120 i40e_detect_recover_hung(pf);
7121 i40e_reset_subtask(pf);
7122 i40e_handle_mdd_event(pf);
7123 i40e_vc_process_vflr_event(pf);
7124 i40e_watchdog_subtask(pf);
7125 i40e_fdir_reinit_subtask(pf);
7126 i40e_sync_filters_subtask(pf);
7127 i40e_sync_udp_filters_subtask(pf);
7128 i40e_clean_adminq_subtask(pf);
7130 i40e_service_event_complete(pf);
7132 /* If the tasks have taken longer than one timer cycle or there
7133 * is more work to be done, reschedule the service task now
7134 * rather than wait for the timer to tick again.
7136 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7137 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7138 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7139 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7140 i40e_service_event_schedule(pf);
7144 * i40e_service_timer - timer callback
7145 * @data: pointer to PF struct
7147 static void i40e_service_timer(unsigned long data)
7149 struct i40e_pf *pf = (struct i40e_pf *)data;
7151 mod_timer(&pf->service_timer,
7152 round_jiffies(jiffies + pf->service_timer_period));
7153 i40e_service_event_schedule(pf);
7157 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7158 * @vsi: the VSI being configured
7160 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7162 struct i40e_pf *pf = vsi->back;
7164 switch (vsi->type) {
7166 vsi->alloc_queue_pairs = pf->num_lan_qps;
7167 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7168 I40E_REQ_DESCRIPTOR_MULTIPLE);
7169 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7170 vsi->num_q_vectors = pf->num_lan_msix;
7172 vsi->num_q_vectors = 1;
7177 vsi->alloc_queue_pairs = 1;
7178 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7179 I40E_REQ_DESCRIPTOR_MULTIPLE);
7180 vsi->num_q_vectors = 1;
7183 case I40E_VSI_VMDQ2:
7184 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7185 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7186 I40E_REQ_DESCRIPTOR_MULTIPLE);
7187 vsi->num_q_vectors = pf->num_vmdq_msix;
7190 case I40E_VSI_SRIOV:
7191 vsi->alloc_queue_pairs = pf->num_vf_qps;
7192 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7193 I40E_REQ_DESCRIPTOR_MULTIPLE);
7198 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7199 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7200 I40E_REQ_DESCRIPTOR_MULTIPLE);
7201 vsi->num_q_vectors = pf->num_fcoe_msix;
7204 #endif /* I40E_FCOE */
7214 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7215 * @type: VSI pointer
7216 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7218 * On error: returns error code (negative)
7219 * On success: returns 0
7221 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7226 /* allocate memory for both Tx and Rx ring pointers */
7227 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7228 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7231 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7233 if (alloc_qvectors) {
7234 /* allocate memory for q_vector pointers */
7235 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7236 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7237 if (!vsi->q_vectors) {
7245 kfree(vsi->tx_rings);
7250 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7251 * @pf: board private structure
7252 * @type: type of VSI
7254 * On error: returns error code (negative)
7255 * On success: returns vsi index in PF (positive)
7257 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7260 struct i40e_vsi *vsi;
7264 /* Need to protect the allocation of the VSIs at the PF level */
7265 mutex_lock(&pf->switch_mutex);
7267 /* VSI list may be fragmented if VSI creation/destruction has
7268 * been happening. We can afford to do a quick scan to look
7269 * for any free VSIs in the list.
7271 * find next empty vsi slot, looping back around if necessary
7274 while (i < pf->num_alloc_vsi && pf->vsi[i])
7276 if (i >= pf->num_alloc_vsi) {
7278 while (i < pf->next_vsi && pf->vsi[i])
7282 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7283 vsi_idx = i; /* Found one! */
7286 goto unlock_pf; /* out of VSI slots! */
7290 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7297 set_bit(__I40E_DOWN, &vsi->state);
7300 vsi->rx_itr_setting = pf->rx_itr_default;
7301 vsi->tx_itr_setting = pf->tx_itr_default;
7302 vsi->int_rate_limit = 0;
7303 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7304 pf->rss_table_size : 64;
7305 vsi->netdev_registered = false;
7306 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7307 INIT_LIST_HEAD(&vsi->mac_filter_list);
7308 vsi->irqs_ready = false;
7310 ret = i40e_set_num_rings_in_vsi(vsi);
7314 ret = i40e_vsi_alloc_arrays(vsi, true);
7318 /* Setup default MSIX irq handler for VSI */
7319 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7321 /* Initialize VSI lock */
7322 spin_lock_init(&vsi->mac_filter_list_lock);
7323 pf->vsi[vsi_idx] = vsi;
7328 pf->next_vsi = i - 1;
7331 mutex_unlock(&pf->switch_mutex);
7336 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7337 * @type: VSI pointer
7338 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7340 * On error: returns error code (negative)
7341 * On success: returns 0
7343 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7345 /* free the ring and vector containers */
7346 if (free_qvectors) {
7347 kfree(vsi->q_vectors);
7348 vsi->q_vectors = NULL;
7350 kfree(vsi->tx_rings);
7351 vsi->tx_rings = NULL;
7352 vsi->rx_rings = NULL;
7356 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7358 * @vsi: Pointer to VSI structure
7360 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7365 kfree(vsi->rss_hkey_user);
7366 vsi->rss_hkey_user = NULL;
7368 kfree(vsi->rss_lut_user);
7369 vsi->rss_lut_user = NULL;
7373 * i40e_vsi_clear - Deallocate the VSI provided
7374 * @vsi: the VSI being un-configured
7376 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7387 mutex_lock(&pf->switch_mutex);
7388 if (!pf->vsi[vsi->idx]) {
7389 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7390 vsi->idx, vsi->idx, vsi, vsi->type);
7394 if (pf->vsi[vsi->idx] != vsi) {
7395 dev_err(&pf->pdev->dev,
7396 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7397 pf->vsi[vsi->idx]->idx,
7399 pf->vsi[vsi->idx]->type,
7400 vsi->idx, vsi, vsi->type);
7404 /* updates the PF for this cleared vsi */
7405 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7406 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7408 i40e_vsi_free_arrays(vsi, true);
7409 i40e_clear_rss_config_user(vsi);
7411 pf->vsi[vsi->idx] = NULL;
7412 if (vsi->idx < pf->next_vsi)
7413 pf->next_vsi = vsi->idx;
7416 mutex_unlock(&pf->switch_mutex);
7424 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7425 * @vsi: the VSI being cleaned
7427 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7431 if (vsi->tx_rings && vsi->tx_rings[0]) {
7432 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7433 kfree_rcu(vsi->tx_rings[i], rcu);
7434 vsi->tx_rings[i] = NULL;
7435 vsi->rx_rings[i] = NULL;
7441 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7442 * @vsi: the VSI being configured
7444 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7446 struct i40e_ring *tx_ring, *rx_ring;
7447 struct i40e_pf *pf = vsi->back;
7450 /* Set basic values in the rings to be used later during open() */
7451 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7452 /* allocate space for both Tx and Rx in one shot */
7453 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7457 tx_ring->queue_index = i;
7458 tx_ring->reg_idx = vsi->base_queue + i;
7459 tx_ring->ring_active = false;
7461 tx_ring->netdev = vsi->netdev;
7462 tx_ring->dev = &pf->pdev->dev;
7463 tx_ring->count = vsi->num_desc;
7465 tx_ring->dcb_tc = 0;
7466 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7467 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7468 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7469 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7470 vsi->tx_rings[i] = tx_ring;
7472 rx_ring = &tx_ring[1];
7473 rx_ring->queue_index = i;
7474 rx_ring->reg_idx = vsi->base_queue + i;
7475 rx_ring->ring_active = false;
7477 rx_ring->netdev = vsi->netdev;
7478 rx_ring->dev = &pf->pdev->dev;
7479 rx_ring->count = vsi->num_desc;
7481 rx_ring->dcb_tc = 0;
7482 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7483 set_ring_16byte_desc_enabled(rx_ring);
7485 clear_ring_16byte_desc_enabled(rx_ring);
7486 vsi->rx_rings[i] = rx_ring;
7492 i40e_vsi_clear_rings(vsi);
7497 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7498 * @pf: board private structure
7499 * @vectors: the number of MSI-X vectors to request
7501 * Returns the number of vectors reserved, or error
7503 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7505 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7506 I40E_MIN_MSIX, vectors);
7508 dev_info(&pf->pdev->dev,
7509 "MSI-X vector reservation failed: %d\n", vectors);
7517 * i40e_init_msix - Setup the MSIX capability
7518 * @pf: board private structure
7520 * Work with the OS to set up the MSIX vectors needed.
7522 * Returns the number of vectors reserved or negative on failure
7524 static int i40e_init_msix(struct i40e_pf *pf)
7526 struct i40e_hw *hw = &pf->hw;
7531 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7534 /* The number of vectors we'll request will be comprised of:
7535 * - Add 1 for "other" cause for Admin Queue events, etc.
7536 * - The number of LAN queue pairs
7537 * - Queues being used for RSS.
7538 * We don't need as many as max_rss_size vectors.
7539 * use rss_size instead in the calculation since that
7540 * is governed by number of cpus in the system.
7541 * - assumes symmetric Tx/Rx pairing
7542 * - The number of VMDq pairs
7544 * - The number of FCOE qps.
7546 * Once we count this up, try the request.
7548 * If we can't get what we want, we'll simplify to nearly nothing
7549 * and try again. If that still fails, we punt.
7551 vectors_left = hw->func_caps.num_msix_vectors;
7554 /* reserve one vector for miscellaneous handler */
7560 /* reserve vectors for the main PF traffic queues */
7561 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7562 vectors_left -= pf->num_lan_msix;
7563 v_budget += pf->num_lan_msix;
7565 /* reserve one vector for sideband flow director */
7566 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7571 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7576 /* can we reserve enough for FCoE? */
7577 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7579 pf->num_fcoe_msix = 0;
7580 else if (vectors_left >= pf->num_fcoe_qps)
7581 pf->num_fcoe_msix = pf->num_fcoe_qps;
7583 pf->num_fcoe_msix = 1;
7584 v_budget += pf->num_fcoe_msix;
7585 vectors_left -= pf->num_fcoe_msix;
7589 /* any vectors left over go for VMDq support */
7590 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7591 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7592 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7594 /* if we're short on vectors for what's desired, we limit
7595 * the queues per vmdq. If this is still more than are
7596 * available, the user will need to change the number of
7597 * queues/vectors used by the PF later with the ethtool
7600 if (vmdq_vecs < vmdq_vecs_wanted)
7601 pf->num_vmdq_qps = 1;
7602 pf->num_vmdq_msix = pf->num_vmdq_qps;
7604 v_budget += vmdq_vecs;
7605 vectors_left -= vmdq_vecs;
7608 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7610 if (!pf->msix_entries)
7613 for (i = 0; i < v_budget; i++)
7614 pf->msix_entries[i].entry = i;
7615 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7617 if (v_actual != v_budget) {
7618 /* If we have limited resources, we will start with no vectors
7619 * for the special features and then allocate vectors to some
7620 * of these features based on the policy and at the end disable
7621 * the features that did not get any vectors.
7624 pf->num_fcoe_qps = 0;
7625 pf->num_fcoe_msix = 0;
7627 pf->num_vmdq_msix = 0;
7630 if (v_actual < I40E_MIN_MSIX) {
7631 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7632 kfree(pf->msix_entries);
7633 pf->msix_entries = NULL;
7636 } else if (v_actual == I40E_MIN_MSIX) {
7637 /* Adjust for minimal MSIX use */
7638 pf->num_vmdq_vsis = 0;
7639 pf->num_vmdq_qps = 0;
7640 pf->num_lan_qps = 1;
7641 pf->num_lan_msix = 1;
7643 } else if (v_actual != v_budget) {
7646 /* reserve the misc vector */
7649 /* Scale vector usage down */
7650 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7651 pf->num_vmdq_vsis = 1;
7652 pf->num_vmdq_qps = 1;
7653 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7655 /* partition out the remaining vectors */
7658 pf->num_lan_msix = 1;
7662 /* give one vector to FCoE */
7663 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7664 pf->num_lan_msix = 1;
7665 pf->num_fcoe_msix = 1;
7668 pf->num_lan_msix = 2;
7673 /* give one vector to FCoE */
7674 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7675 pf->num_fcoe_msix = 1;
7679 /* give the rest to the PF */
7680 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7685 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7686 (pf->num_vmdq_msix == 0)) {
7687 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7688 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7692 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7693 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7694 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7701 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7702 * @vsi: the VSI being configured
7703 * @v_idx: index of the vector in the vsi struct
7705 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7707 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7709 struct i40e_q_vector *q_vector;
7711 /* allocate q_vector */
7712 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7716 q_vector->vsi = vsi;
7717 q_vector->v_idx = v_idx;
7718 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7720 netif_napi_add(vsi->netdev, &q_vector->napi,
7721 i40e_napi_poll, NAPI_POLL_WEIGHT);
7723 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7724 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7726 /* tie q_vector and vsi together */
7727 vsi->q_vectors[v_idx] = q_vector;
7733 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7734 * @vsi: the VSI being configured
7736 * We allocate one q_vector per queue interrupt. If allocation fails we
7739 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7741 struct i40e_pf *pf = vsi->back;
7742 int v_idx, num_q_vectors;
7745 /* if not MSIX, give the one vector only to the LAN VSI */
7746 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7747 num_q_vectors = vsi->num_q_vectors;
7748 else if (vsi == pf->vsi[pf->lan_vsi])
7753 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7754 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7763 i40e_free_q_vector(vsi, v_idx);
7769 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7770 * @pf: board private structure to initialize
7772 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7777 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7778 vectors = i40e_init_msix(pf);
7780 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7782 I40E_FLAG_FCOE_ENABLED |
7784 I40E_FLAG_RSS_ENABLED |
7785 I40E_FLAG_DCB_CAPABLE |
7786 I40E_FLAG_SRIOV_ENABLED |
7787 I40E_FLAG_FD_SB_ENABLED |
7788 I40E_FLAG_FD_ATR_ENABLED |
7789 I40E_FLAG_VMDQ_ENABLED);
7791 /* rework the queue expectations without MSIX */
7792 i40e_determine_queue_usage(pf);
7796 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7797 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7798 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7799 vectors = pci_enable_msi(pf->pdev);
7801 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7803 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7805 vectors = 1; /* one MSI or Legacy vector */
7808 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7809 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7811 /* set up vector assignment tracking */
7812 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7813 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7814 if (!pf->irq_pile) {
7815 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7818 pf->irq_pile->num_entries = vectors;
7819 pf->irq_pile->search_hint = 0;
7821 /* track first vector for misc interrupts, ignore return */
7822 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7828 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7829 * @pf: board private structure
7831 * This sets up the handler for MSIX 0, which is used to manage the
7832 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7833 * when in MSI or Legacy interrupt mode.
7835 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7837 struct i40e_hw *hw = &pf->hw;
7840 /* Only request the irq if this is the first time through, and
7841 * not when we're rebuilding after a Reset
7843 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7844 err = request_irq(pf->msix_entries[0].vector,
7845 i40e_intr, 0, pf->int_name, pf);
7847 dev_info(&pf->pdev->dev,
7848 "request_irq for %s failed: %d\n",
7854 i40e_enable_misc_int_causes(pf);
7856 /* associate no queues to the misc vector */
7857 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7858 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7862 i40e_irq_dynamic_enable_icr0(pf);
7868 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7869 * @vsi: vsi structure
7870 * @seed: RSS hash seed
7872 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7873 u8 *lut, u16 lut_size)
7875 struct i40e_aqc_get_set_rss_key_data rss_key;
7876 struct i40e_pf *pf = vsi->back;
7877 struct i40e_hw *hw = &pf->hw;
7878 bool pf_lut = false;
7882 memset(&rss_key, 0, sizeof(rss_key));
7883 memcpy(&rss_key, seed, sizeof(rss_key));
7885 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7889 /* Populate the LUT with max no. of queues in round robin fashion */
7890 for (i = 0; i < vsi->rss_table_size; i++)
7891 rss_lut[i] = i % vsi->rss_size;
7893 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7895 dev_info(&pf->pdev->dev,
7896 "Cannot set RSS key, err %s aq_err %s\n",
7897 i40e_stat_str(&pf->hw, ret),
7898 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7899 goto config_rss_aq_out;
7902 if (vsi->type == I40E_VSI_MAIN)
7905 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7906 vsi->rss_table_size);
7908 dev_info(&pf->pdev->dev,
7909 "Cannot set RSS lut, err %s aq_err %s\n",
7910 i40e_stat_str(&pf->hw, ret),
7911 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7919 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7920 * @vsi: VSI structure
7922 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7924 u8 seed[I40E_HKEY_ARRAY_SIZE];
7925 struct i40e_pf *pf = vsi->back;
7929 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7932 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7936 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7937 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7938 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7939 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7946 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
7947 * @vsi: Pointer to vsi structure
7948 * @seed: Buffter to store the hash keys
7949 * @lut: Buffer to store the lookup table entries
7950 * @lut_size: Size of buffer to store the lookup table entries
7952 * Return 0 on success, negative on failure
7954 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7955 u8 *lut, u16 lut_size)
7957 struct i40e_pf *pf = vsi->back;
7958 struct i40e_hw *hw = &pf->hw;
7962 ret = i40e_aq_get_rss_key(hw, vsi->id,
7963 (struct i40e_aqc_get_set_rss_key_data *)seed);
7965 dev_info(&pf->pdev->dev,
7966 "Cannot get RSS key, err %s aq_err %s\n",
7967 i40e_stat_str(&pf->hw, ret),
7968 i40e_aq_str(&pf->hw,
7969 pf->hw.aq.asq_last_status));
7975 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
7977 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
7979 dev_info(&pf->pdev->dev,
7980 "Cannot get RSS lut, err %s aq_err %s\n",
7981 i40e_stat_str(&pf->hw, ret),
7982 i40e_aq_str(&pf->hw,
7983 pf->hw.aq.asq_last_status));
7992 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7993 * @vsi: Pointer to vsi structure
7994 * @seed: RSS hash seed
7995 * @lut: Lookup table
7996 * @lut_size: Lookup table size
7998 * Returns 0 on success, negative on failure
8000 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8001 const u8 *lut, u16 lut_size)
8003 struct i40e_pf *pf = vsi->back;
8004 struct i40e_hw *hw = &pf->hw;
8007 /* Fill out hash function seed */
8009 u32 *seed_dw = (u32 *)seed;
8011 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8012 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
8016 u32 *lut_dw = (u32 *)lut;
8018 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8021 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8022 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8030 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8031 * @vsi: Pointer to VSI structure
8032 * @seed: Buffer to store the keys
8033 * @lut: Buffer to store the lookup table entries
8034 * @lut_size: Size of buffer to store the lookup table entries
8036 * Returns 0 on success, negative on failure
8038 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8039 u8 *lut, u16 lut_size)
8041 struct i40e_pf *pf = vsi->back;
8042 struct i40e_hw *hw = &pf->hw;
8046 u32 *seed_dw = (u32 *)seed;
8048 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8049 seed_dw[i] = rd32(hw, I40E_PFQF_HKEY(i));
8052 u32 *lut_dw = (u32 *)lut;
8054 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8056 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8057 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8064 * i40e_config_rss - Configure RSS keys and lut
8065 * @vsi: Pointer to VSI structure
8066 * @seed: RSS hash seed
8067 * @lut: Lookup table
8068 * @lut_size: Lookup table size
8070 * Returns 0 on success, negative on failure
8072 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8074 struct i40e_pf *pf = vsi->back;
8076 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8077 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8079 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8083 * i40e_get_rss - Get RSS keys and lut
8084 * @vsi: Pointer to VSI structure
8085 * @seed: Buffer to store the keys
8086 * @lut: Buffer to store the lookup table entries
8087 * lut_size: Size of buffer to store the lookup table entries
8089 * Returns 0 on success, negative on failure
8091 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8093 struct i40e_pf *pf = vsi->back;
8095 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8096 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8098 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8102 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8103 * @pf: Pointer to board private structure
8104 * @lut: Lookup table
8105 * @rss_table_size: Lookup table size
8106 * @rss_size: Range of queue number for hashing
8108 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8109 u16 rss_table_size, u16 rss_size)
8113 for (i = 0; i < rss_table_size; i++)
8114 lut[i] = i % rss_size;
8118 * i40e_pf_config_rss - Prepare for RSS if used
8119 * @pf: board private structure
8121 static int i40e_pf_config_rss(struct i40e_pf *pf)
8123 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8124 u8 seed[I40E_HKEY_ARRAY_SIZE];
8126 struct i40e_hw *hw = &pf->hw;
8131 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8132 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
8133 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
8134 hena |= i40e_pf_get_default_rss_hena(pf);
8136 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
8137 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8139 /* Determine the RSS table size based on the hardware capabilities */
8140 reg_val = rd32(hw, I40E_PFQF_CTL_0);
8141 reg_val = (pf->rss_table_size == 512) ?
8142 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8143 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8144 wr32(hw, I40E_PFQF_CTL_0, reg_val);
8146 /* Determine the RSS size of the VSI */
8148 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8149 vsi->num_queue_pairs);
8151 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8155 /* Use user configured lut if there is one, otherwise use default */
8156 if (vsi->rss_lut_user)
8157 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8159 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8161 /* Use user configured hash key if there is one, otherwise
8164 if (vsi->rss_hkey_user)
8165 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8167 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8168 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8175 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8176 * @pf: board private structure
8177 * @queue_count: the requested queue count for rss.
8179 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8180 * count which may be different from the requested queue count.
8182 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8184 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8187 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8190 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8192 if (queue_count != vsi->num_queue_pairs) {
8193 vsi->req_queue_pairs = queue_count;
8194 i40e_prep_for_reset(pf);
8196 pf->alloc_rss_size = new_rss_size;
8198 i40e_reset_and_rebuild(pf, true);
8200 /* Discard the user configured hash keys and lut, if less
8201 * queues are enabled.
8203 if (queue_count < vsi->rss_size) {
8204 i40e_clear_rss_config_user(vsi);
8205 dev_dbg(&pf->pdev->dev,
8206 "discard user configured hash keys and lut\n");
8209 /* Reset vsi->rss_size, as number of enabled queues changed */
8210 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8211 vsi->num_queue_pairs);
8213 i40e_pf_config_rss(pf);
8215 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8216 pf->alloc_rss_size, pf->rss_size_max);
8217 return pf->alloc_rss_size;
8221 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8222 * @pf: board private structure
8224 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8227 bool min_valid, max_valid;
8230 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8231 &min_valid, &max_valid);
8235 pf->npar_min_bw = min_bw;
8237 pf->npar_max_bw = max_bw;
8244 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8245 * @pf: board private structure
8247 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8249 struct i40e_aqc_configure_partition_bw_data bw_data;
8252 /* Set the valid bit for this PF */
8253 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8254 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8255 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8257 /* Set the new bandwidths */
8258 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8264 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8265 * @pf: board private structure
8267 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8269 /* Commit temporary BW setting to permanent NVM image */
8270 enum i40e_admin_queue_err last_aq_status;
8274 if (pf->hw.partition_id != 1) {
8275 dev_info(&pf->pdev->dev,
8276 "Commit BW only works on partition 1! This is partition %d",
8277 pf->hw.partition_id);
8278 ret = I40E_NOT_SUPPORTED;
8282 /* Acquire NVM for read access */
8283 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8284 last_aq_status = pf->hw.aq.asq_last_status;
8286 dev_info(&pf->pdev->dev,
8287 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8288 i40e_stat_str(&pf->hw, ret),
8289 i40e_aq_str(&pf->hw, last_aq_status));
8293 /* Read word 0x10 of NVM - SW compatibility word 1 */
8294 ret = i40e_aq_read_nvm(&pf->hw,
8295 I40E_SR_NVM_CONTROL_WORD,
8296 0x10, sizeof(nvm_word), &nvm_word,
8298 /* Save off last admin queue command status before releasing
8301 last_aq_status = pf->hw.aq.asq_last_status;
8302 i40e_release_nvm(&pf->hw);
8304 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8305 i40e_stat_str(&pf->hw, ret),
8306 i40e_aq_str(&pf->hw, last_aq_status));
8310 /* Wait a bit for NVM release to complete */
8313 /* Acquire NVM for write access */
8314 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8315 last_aq_status = pf->hw.aq.asq_last_status;
8317 dev_info(&pf->pdev->dev,
8318 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8319 i40e_stat_str(&pf->hw, ret),
8320 i40e_aq_str(&pf->hw, last_aq_status));
8323 /* Write it back out unchanged to initiate update NVM,
8324 * which will force a write of the shadow (alt) RAM to
8325 * the NVM - thus storing the bandwidth values permanently.
8327 ret = i40e_aq_update_nvm(&pf->hw,
8328 I40E_SR_NVM_CONTROL_WORD,
8329 0x10, sizeof(nvm_word),
8330 &nvm_word, true, NULL);
8331 /* Save off last admin queue command status before releasing
8334 last_aq_status = pf->hw.aq.asq_last_status;
8335 i40e_release_nvm(&pf->hw);
8337 dev_info(&pf->pdev->dev,
8338 "BW settings NOT SAVED, err %s aq_err %s\n",
8339 i40e_stat_str(&pf->hw, ret),
8340 i40e_aq_str(&pf->hw, last_aq_status));
8347 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8348 * @pf: board private structure to initialize
8350 * i40e_sw_init initializes the Adapter private data structure.
8351 * Fields are initialized based on PCI device information and
8352 * OS network device settings (MTU size).
8354 static int i40e_sw_init(struct i40e_pf *pf)
8359 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8360 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8361 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8362 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8363 if (I40E_DEBUG_USER & debug)
8364 pf->hw.debug_mask = debug;
8365 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8366 I40E_DEFAULT_MSG_ENABLE);
8369 /* Set default capability flags */
8370 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8371 I40E_FLAG_MSI_ENABLED |
8372 I40E_FLAG_LINK_POLLING_ENABLED |
8373 I40E_FLAG_MSIX_ENABLED;
8375 if (iommu_present(&pci_bus_type))
8376 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8378 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8380 /* Set default ITR */
8381 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8382 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8384 /* Depending on PF configurations, it is possible that the RSS
8385 * maximum might end up larger than the available queues
8387 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8388 pf->alloc_rss_size = 1;
8389 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8390 pf->rss_size_max = min_t(int, pf->rss_size_max,
8391 pf->hw.func_caps.num_tx_qp);
8392 if (pf->hw.func_caps.rss) {
8393 pf->flags |= I40E_FLAG_RSS_ENABLED;
8394 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8398 /* MFP mode enabled */
8399 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8400 pf->flags |= I40E_FLAG_MFP_ENABLED;
8401 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8402 if (i40e_get_npar_bw_setting(pf))
8403 dev_warn(&pf->pdev->dev,
8404 "Could not get NPAR bw settings\n");
8406 dev_info(&pf->pdev->dev,
8407 "Min BW = %8.8x, Max BW = %8.8x\n",
8408 pf->npar_min_bw, pf->npar_max_bw);
8411 /* FW/NVM is not yet fixed in this regard */
8412 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8413 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8414 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8415 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8416 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8417 pf->hw.num_partitions > 1)
8418 dev_info(&pf->pdev->dev,
8419 "Flow Director Sideband mode Disabled in MFP mode\n");
8421 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8422 pf->fdir_pf_filter_count =
8423 pf->hw.func_caps.fd_filters_guaranteed;
8424 pf->hw.fdir_shared_filter_count =
8425 pf->hw.func_caps.fd_filters_best_effort;
8428 if (((pf->hw.mac.type == I40E_MAC_X710) ||
8429 (pf->hw.mac.type == I40E_MAC_XL710)) &&
8430 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8431 (pf->hw.aq.fw_maj_ver < 4)))
8432 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8434 if (pf->hw.func_caps.vmdq) {
8435 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8436 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8437 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8441 i40e_init_pf_fcoe(pf);
8443 #endif /* I40E_FCOE */
8444 #ifdef CONFIG_PCI_IOV
8445 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8446 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8447 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8448 pf->num_req_vfs = min_t(int,
8449 pf->hw.func_caps.num_vfs,
8452 #endif /* CONFIG_PCI_IOV */
8453 if (pf->hw.mac.type == I40E_MAC_X722) {
8454 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8455 I40E_FLAG_128_QP_RSS_CAPABLE |
8456 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8457 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8458 I40E_FLAG_WB_ON_ITR_CAPABLE |
8459 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8460 I40E_FLAG_100M_SGMII_CAPABLE |
8461 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8462 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8463 ((pf->hw.aq.api_maj_ver == 1) &&
8464 (pf->hw.aq.api_min_ver > 4))) {
8465 /* Supported in FW API version higher than 1.4 */
8466 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8469 pf->eeprom_version = 0xDEAD;
8470 pf->lan_veb = I40E_NO_VEB;
8471 pf->lan_vsi = I40E_NO_VSI;
8473 /* By default FW has this off for performance reasons */
8474 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8476 /* set up queue assignment tracking */
8477 size = sizeof(struct i40e_lump_tracking)
8478 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8479 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8484 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8485 pf->qp_pile->search_hint = 0;
8487 pf->tx_timeout_recovery_level = 1;
8489 mutex_init(&pf->switch_mutex);
8491 /* If NPAR is enabled nudge the Tx scheduler */
8492 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8493 i40e_set_npar_bw_setting(pf);
8500 * i40e_set_ntuple - set the ntuple feature flag and take action
8501 * @pf: board private structure to initialize
8502 * @features: the feature set that the stack is suggesting
8504 * returns a bool to indicate if reset needs to happen
8506 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8508 bool need_reset = false;
8510 /* Check if Flow Director n-tuple support was enabled or disabled. If
8511 * the state changed, we need to reset.
8513 if (features & NETIF_F_NTUPLE) {
8514 /* Enable filters and mark for reset */
8515 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8517 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8519 /* turn off filters, mark for reset and clear SW filter list */
8520 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8522 i40e_fdir_filter_exit(pf);
8524 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8525 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8526 /* reset fd counters */
8527 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8528 pf->fdir_pf_active_filters = 0;
8529 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8530 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8531 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8532 /* if ATR was auto disabled it can be re-enabled. */
8533 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8534 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8535 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8541 * i40e_set_features - set the netdev feature flags
8542 * @netdev: ptr to the netdev being adjusted
8543 * @features: the feature set that the stack is suggesting
8545 static int i40e_set_features(struct net_device *netdev,
8546 netdev_features_t features)
8548 struct i40e_netdev_priv *np = netdev_priv(netdev);
8549 struct i40e_vsi *vsi = np->vsi;
8550 struct i40e_pf *pf = vsi->back;
8553 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8554 i40e_vlan_stripping_enable(vsi);
8556 i40e_vlan_stripping_disable(vsi);
8558 need_reset = i40e_set_ntuple(pf, features);
8561 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8566 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
8568 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8569 * @pf: board private structure
8570 * @port: The UDP port to look up
8572 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8574 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8578 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8579 if (pf->udp_ports[i].index == port)
8588 #if IS_ENABLED(CONFIG_VXLAN)
8590 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8591 * @netdev: This physical port's netdev
8592 * @sa_family: Socket Family that VXLAN is notifying us about
8593 * @port: New UDP port number that VXLAN started listening to
8595 static void i40e_add_vxlan_port(struct net_device *netdev,
8596 sa_family_t sa_family, __be16 port)
8598 struct i40e_netdev_priv *np = netdev_priv(netdev);
8599 struct i40e_vsi *vsi = np->vsi;
8600 struct i40e_pf *pf = vsi->back;
8604 if (sa_family == AF_INET6)
8607 idx = i40e_get_udp_port_idx(pf, port);
8609 /* Check if port already exists */
8610 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8611 netdev_info(netdev, "vxlan port %d already offloaded\n",
8616 /* Now check if there is space to add the new port */
8617 next_idx = i40e_get_udp_port_idx(pf, 0);
8619 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8620 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8625 /* New port: add it and mark its index in the bitmap */
8626 pf->udp_ports[next_idx].index = port;
8627 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8628 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8629 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8633 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8634 * @netdev: This physical port's netdev
8635 * @sa_family: Socket Family that VXLAN is notifying us about
8636 * @port: UDP port number that VXLAN stopped listening to
8638 static void i40e_del_vxlan_port(struct net_device *netdev,
8639 sa_family_t sa_family, __be16 port)
8641 struct i40e_netdev_priv *np = netdev_priv(netdev);
8642 struct i40e_vsi *vsi = np->vsi;
8643 struct i40e_pf *pf = vsi->back;
8646 if (sa_family == AF_INET6)
8649 idx = i40e_get_udp_port_idx(pf, port);
8651 /* Check if port already exists */
8652 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8653 /* if port exists, set it to 0 (mark for deletion)
8654 * and make it pending
8656 pf->udp_ports[idx].index = 0;
8657 pf->pending_udp_bitmap |= BIT_ULL(idx);
8658 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8660 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8666 #if IS_ENABLED(CONFIG_GENEVE)
8668 * i40e_add_geneve_port - Get notifications about GENEVE ports that come up
8669 * @netdev: This physical port's netdev
8670 * @sa_family: Socket Family that GENEVE is notifying us about
8671 * @port: New UDP port number that GENEVE started listening to
8673 static void i40e_add_geneve_port(struct net_device *netdev,
8674 sa_family_t sa_family, __be16 port)
8676 struct i40e_netdev_priv *np = netdev_priv(netdev);
8677 struct i40e_vsi *vsi = np->vsi;
8678 struct i40e_pf *pf = vsi->back;
8682 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8685 if (sa_family == AF_INET6)
8688 idx = i40e_get_udp_port_idx(pf, port);
8690 /* Check if port already exists */
8691 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8692 netdev_info(netdev, "udp port %d already offloaded\n",
8697 /* Now check if there is space to add the new port */
8698 next_idx = i40e_get_udp_port_idx(pf, 0);
8700 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8701 netdev_info(netdev, "maximum number of UDP ports reached, not adding port %d\n",
8706 /* New port: add it and mark its index in the bitmap */
8707 pf->udp_ports[next_idx].index = port;
8708 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8709 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8710 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8712 dev_info(&pf->pdev->dev, "adding geneve port %d\n", ntohs(port));
8716 * i40e_del_geneve_port - Get notifications about GENEVE ports that go away
8717 * @netdev: This physical port's netdev
8718 * @sa_family: Socket Family that GENEVE is notifying us about
8719 * @port: UDP port number that GENEVE stopped listening to
8721 static void i40e_del_geneve_port(struct net_device *netdev,
8722 sa_family_t sa_family, __be16 port)
8724 struct i40e_netdev_priv *np = netdev_priv(netdev);
8725 struct i40e_vsi *vsi = np->vsi;
8726 struct i40e_pf *pf = vsi->back;
8729 if (sa_family == AF_INET6)
8732 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8735 idx = i40e_get_udp_port_idx(pf, port);
8737 /* Check if port already exists */
8738 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8739 /* if port exists, set it to 0 (mark for deletion)
8740 * and make it pending
8742 pf->udp_ports[idx].index = 0;
8743 pf->pending_udp_bitmap |= BIT_ULL(idx);
8744 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8746 dev_info(&pf->pdev->dev, "deleting geneve port %d\n",
8749 netdev_warn(netdev, "geneve port %d was not found, not deleting\n",
8755 static int i40e_get_phys_port_id(struct net_device *netdev,
8756 struct netdev_phys_item_id *ppid)
8758 struct i40e_netdev_priv *np = netdev_priv(netdev);
8759 struct i40e_pf *pf = np->vsi->back;
8760 struct i40e_hw *hw = &pf->hw;
8762 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8765 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8766 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8772 * i40e_ndo_fdb_add - add an entry to the hardware database
8773 * @ndm: the input from the stack
8774 * @tb: pointer to array of nladdr (unused)
8775 * @dev: the net device pointer
8776 * @addr: the MAC address entry being added
8777 * @flags: instructions from stack about fdb operation
8779 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8780 struct net_device *dev,
8781 const unsigned char *addr, u16 vid,
8784 struct i40e_netdev_priv *np = netdev_priv(dev);
8785 struct i40e_pf *pf = np->vsi->back;
8788 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8792 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8796 /* Hardware does not support aging addresses so if a
8797 * ndm_state is given only allow permanent addresses
8799 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8800 netdev_info(dev, "FDB only supports static addresses\n");
8804 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8805 err = dev_uc_add_excl(dev, addr);
8806 else if (is_multicast_ether_addr(addr))
8807 err = dev_mc_add_excl(dev, addr);
8811 /* Only return duplicate errors if NLM_F_EXCL is set */
8812 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8819 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8820 * @dev: the netdev being configured
8821 * @nlh: RTNL message
8823 * Inserts a new hardware bridge if not already created and
8824 * enables the bridging mode requested (VEB or VEPA). If the
8825 * hardware bridge has already been inserted and the request
8826 * is to change the mode then that requires a PF reset to
8827 * allow rebuild of the components with required hardware
8828 * bridge mode enabled.
8830 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8831 struct nlmsghdr *nlh,
8834 struct i40e_netdev_priv *np = netdev_priv(dev);
8835 struct i40e_vsi *vsi = np->vsi;
8836 struct i40e_pf *pf = vsi->back;
8837 struct i40e_veb *veb = NULL;
8838 struct nlattr *attr, *br_spec;
8841 /* Only for PF VSI for now */
8842 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8845 /* Find the HW bridge for PF VSI */
8846 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8847 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8851 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8853 nla_for_each_nested(attr, br_spec, rem) {
8856 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8859 mode = nla_get_u16(attr);
8860 if ((mode != BRIDGE_MODE_VEPA) &&
8861 (mode != BRIDGE_MODE_VEB))
8864 /* Insert a new HW bridge */
8866 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8867 vsi->tc_config.enabled_tc);
8869 veb->bridge_mode = mode;
8870 i40e_config_bridge_mode(veb);
8872 /* No Bridge HW offload available */
8876 } else if (mode != veb->bridge_mode) {
8877 /* Existing HW bridge but different mode needs reset */
8878 veb->bridge_mode = mode;
8879 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8880 if (mode == BRIDGE_MODE_VEB)
8881 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8883 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8884 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8893 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8896 * @seq: RTNL message seq #
8897 * @dev: the netdev being configured
8898 * @filter_mask: unused
8899 * @nlflags: netlink flags passed in
8901 * Return the mode in which the hardware bridge is operating in
8904 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8905 struct net_device *dev,
8906 u32 __always_unused filter_mask,
8909 struct i40e_netdev_priv *np = netdev_priv(dev);
8910 struct i40e_vsi *vsi = np->vsi;
8911 struct i40e_pf *pf = vsi->back;
8912 struct i40e_veb *veb = NULL;
8915 /* Only for PF VSI for now */
8916 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8919 /* Find the HW bridge for the PF VSI */
8920 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8921 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8928 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8929 nlflags, 0, 0, filter_mask, NULL);
8932 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
8933 * inner mac plus all inner ethertypes.
8935 #define I40E_MAX_TUNNEL_HDR_LEN 128
8937 * i40e_features_check - Validate encapsulated packet conforms to limits
8939 * @dev: This physical port's netdev
8940 * @features: Offload features that the stack believes apply
8942 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8943 struct net_device *dev,
8944 netdev_features_t features)
8946 if (skb->encapsulation &&
8947 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
8948 I40E_MAX_TUNNEL_HDR_LEN))
8949 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
8954 static const struct net_device_ops i40e_netdev_ops = {
8955 .ndo_open = i40e_open,
8956 .ndo_stop = i40e_close,
8957 .ndo_start_xmit = i40e_lan_xmit_frame,
8958 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8959 .ndo_set_rx_mode = i40e_set_rx_mode,
8960 .ndo_validate_addr = eth_validate_addr,
8961 .ndo_set_mac_address = i40e_set_mac,
8962 .ndo_change_mtu = i40e_change_mtu,
8963 .ndo_do_ioctl = i40e_ioctl,
8964 .ndo_tx_timeout = i40e_tx_timeout,
8965 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8966 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8967 #ifdef CONFIG_NET_POLL_CONTROLLER
8968 .ndo_poll_controller = i40e_netpoll,
8970 .ndo_setup_tc = __i40e_setup_tc,
8972 .ndo_fcoe_enable = i40e_fcoe_enable,
8973 .ndo_fcoe_disable = i40e_fcoe_disable,
8975 .ndo_set_features = i40e_set_features,
8976 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8977 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8978 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8979 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8980 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8981 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8982 #if IS_ENABLED(CONFIG_VXLAN)
8983 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8984 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8986 #if IS_ENABLED(CONFIG_GENEVE)
8987 .ndo_add_geneve_port = i40e_add_geneve_port,
8988 .ndo_del_geneve_port = i40e_del_geneve_port,
8990 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8991 .ndo_fdb_add = i40e_ndo_fdb_add,
8992 .ndo_features_check = i40e_features_check,
8993 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8994 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8998 * i40e_config_netdev - Setup the netdev flags
8999 * @vsi: the VSI being configured
9001 * Returns 0 on success, negative value on failure
9003 static int i40e_config_netdev(struct i40e_vsi *vsi)
9005 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
9006 struct i40e_pf *pf = vsi->back;
9007 struct i40e_hw *hw = &pf->hw;
9008 struct i40e_netdev_priv *np;
9009 struct net_device *netdev;
9010 u8 mac_addr[ETH_ALEN];
9013 etherdev_size = sizeof(struct i40e_netdev_priv);
9014 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9018 vsi->netdev = netdev;
9019 np = netdev_priv(netdev);
9022 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
9023 NETIF_F_GSO_UDP_TUNNEL |
9028 netdev->features = NETIF_F_SG |
9032 NETIF_F_GSO_UDP_TUNNEL |
9034 NETIF_F_HW_VLAN_CTAG_TX |
9035 NETIF_F_HW_VLAN_CTAG_RX |
9036 NETIF_F_HW_VLAN_CTAG_FILTER |
9045 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9046 netdev->features |= NETIF_F_NTUPLE;
9048 /* copy netdev features into list of user selectable features */
9049 netdev->hw_features |= netdev->features;
9051 if (vsi->type == I40E_VSI_MAIN) {
9052 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9053 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9054 /* The following steps are necessary to prevent reception
9055 * of tagged packets - some older NVM configurations load a
9056 * default a MAC-VLAN filter that accepts any tagged packet
9057 * which must be replaced by a normal filter.
9059 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
9060 spin_lock_bh(&vsi->mac_filter_list_lock);
9061 i40e_add_filter(vsi, mac_addr,
9062 I40E_VLAN_ANY, false, true);
9063 spin_unlock_bh(&vsi->mac_filter_list_lock);
9066 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9067 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9068 pf->vsi[pf->lan_vsi]->netdev->name);
9069 random_ether_addr(mac_addr);
9071 spin_lock_bh(&vsi->mac_filter_list_lock);
9072 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9073 spin_unlock_bh(&vsi->mac_filter_list_lock);
9076 spin_lock_bh(&vsi->mac_filter_list_lock);
9077 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
9078 spin_unlock_bh(&vsi->mac_filter_list_lock);
9080 ether_addr_copy(netdev->dev_addr, mac_addr);
9081 ether_addr_copy(netdev->perm_addr, mac_addr);
9082 /* vlan gets same features (except vlan offload)
9083 * after any tweaks for specific VSI types
9085 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
9086 NETIF_F_HW_VLAN_CTAG_RX |
9087 NETIF_F_HW_VLAN_CTAG_FILTER);
9088 netdev->priv_flags |= IFF_UNICAST_FLT;
9089 netdev->priv_flags |= IFF_SUPP_NOFCS;
9090 /* Setup netdev TC information */
9091 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9093 netdev->netdev_ops = &i40e_netdev_ops;
9094 netdev->watchdog_timeo = 5 * HZ;
9095 i40e_set_ethtool_ops(netdev);
9097 i40e_fcoe_config_netdev(netdev, vsi);
9104 * i40e_vsi_delete - Delete a VSI from the switch
9105 * @vsi: the VSI being removed
9107 * Returns 0 on success, negative value on failure
9109 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9111 /* remove default VSI is not allowed */
9112 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9115 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9119 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9120 * @vsi: the VSI being queried
9122 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9124 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9126 struct i40e_veb *veb;
9127 struct i40e_pf *pf = vsi->back;
9129 /* Uplink is not a bridge so default to VEB */
9130 if (vsi->veb_idx == I40E_NO_VEB)
9133 veb = pf->veb[vsi->veb_idx];
9135 dev_info(&pf->pdev->dev,
9136 "There is no veb associated with the bridge\n");
9140 /* Uplink is a bridge in VEPA mode */
9141 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9144 /* Uplink is a bridge in VEB mode */
9148 /* VEPA is now default bridge, so return 0 */
9153 * i40e_add_vsi - Add a VSI to the switch
9154 * @vsi: the VSI being configured
9156 * This initializes a VSI context depending on the VSI type to be added and
9157 * passes it down to the add_vsi aq command.
9159 static int i40e_add_vsi(struct i40e_vsi *vsi)
9162 u8 laa_macaddr[ETH_ALEN];
9163 bool found_laa_mac_filter = false;
9164 struct i40e_pf *pf = vsi->back;
9165 struct i40e_hw *hw = &pf->hw;
9166 struct i40e_vsi_context ctxt;
9167 struct i40e_mac_filter *f, *ftmp;
9169 u8 enabled_tc = 0x1; /* TC0 enabled */
9172 memset(&ctxt, 0, sizeof(ctxt));
9173 switch (vsi->type) {
9175 /* The PF's main VSI is already setup as part of the
9176 * device initialization, so we'll not bother with
9177 * the add_vsi call, but we will retrieve the current
9180 ctxt.seid = pf->main_vsi_seid;
9181 ctxt.pf_num = pf->hw.pf_id;
9183 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9184 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9186 dev_info(&pf->pdev->dev,
9187 "couldn't get PF vsi config, err %s aq_err %s\n",
9188 i40e_stat_str(&pf->hw, ret),
9189 i40e_aq_str(&pf->hw,
9190 pf->hw.aq.asq_last_status));
9193 vsi->info = ctxt.info;
9194 vsi->info.valid_sections = 0;
9196 vsi->seid = ctxt.seid;
9197 vsi->id = ctxt.vsi_number;
9199 enabled_tc = i40e_pf_get_tc_map(pf);
9201 /* MFP mode setup queue map and update VSI */
9202 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9203 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9204 memset(&ctxt, 0, sizeof(ctxt));
9205 ctxt.seid = pf->main_vsi_seid;
9206 ctxt.pf_num = pf->hw.pf_id;
9208 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9209 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9211 dev_info(&pf->pdev->dev,
9212 "update vsi failed, err %s aq_err %s\n",
9213 i40e_stat_str(&pf->hw, ret),
9214 i40e_aq_str(&pf->hw,
9215 pf->hw.aq.asq_last_status));
9219 /* update the local VSI info queue map */
9220 i40e_vsi_update_queue_map(vsi, &ctxt);
9221 vsi->info.valid_sections = 0;
9223 /* Default/Main VSI is only enabled for TC0
9224 * reconfigure it to enable all TCs that are
9225 * available on the port in SFP mode.
9226 * For MFP case the iSCSI PF would use this
9227 * flow to enable LAN+iSCSI TC.
9229 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9231 dev_info(&pf->pdev->dev,
9232 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9234 i40e_stat_str(&pf->hw, ret),
9235 i40e_aq_str(&pf->hw,
9236 pf->hw.aq.asq_last_status));
9243 ctxt.pf_num = hw->pf_id;
9245 ctxt.uplink_seid = vsi->uplink_seid;
9246 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9247 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9248 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9249 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9250 ctxt.info.valid_sections |=
9251 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9252 ctxt.info.switch_id =
9253 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9255 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9258 case I40E_VSI_VMDQ2:
9259 ctxt.pf_num = hw->pf_id;
9261 ctxt.uplink_seid = vsi->uplink_seid;
9262 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9263 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9265 /* This VSI is connected to VEB so the switch_id
9266 * should be set to zero by default.
9268 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9269 ctxt.info.valid_sections |=
9270 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9271 ctxt.info.switch_id =
9272 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9275 /* Setup the VSI tx/rx queue map for TC0 only for now */
9276 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9279 case I40E_VSI_SRIOV:
9280 ctxt.pf_num = hw->pf_id;
9281 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9282 ctxt.uplink_seid = vsi->uplink_seid;
9283 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9284 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9286 /* This VSI is connected to VEB so the switch_id
9287 * should be set to zero by default.
9289 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9290 ctxt.info.valid_sections |=
9291 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9292 ctxt.info.switch_id =
9293 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9296 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9297 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9298 if (pf->vf[vsi->vf_id].spoofchk) {
9299 ctxt.info.valid_sections |=
9300 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9301 ctxt.info.sec_flags |=
9302 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9303 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9305 /* Setup the VSI tx/rx queue map for TC0 only for now */
9306 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9311 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9313 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9318 #endif /* I40E_FCOE */
9323 if (vsi->type != I40E_VSI_MAIN) {
9324 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9326 dev_info(&vsi->back->pdev->dev,
9327 "add vsi failed, err %s aq_err %s\n",
9328 i40e_stat_str(&pf->hw, ret),
9329 i40e_aq_str(&pf->hw,
9330 pf->hw.aq.asq_last_status));
9334 vsi->info = ctxt.info;
9335 vsi->info.valid_sections = 0;
9336 vsi->seid = ctxt.seid;
9337 vsi->id = ctxt.vsi_number;
9340 spin_lock_bh(&vsi->mac_filter_list_lock);
9341 /* If macvlan filters already exist, force them to get loaded */
9342 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9346 /* Expected to have only one MAC filter entry for LAA in list */
9347 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9348 ether_addr_copy(laa_macaddr, f->macaddr);
9349 found_laa_mac_filter = true;
9352 spin_unlock_bh(&vsi->mac_filter_list_lock);
9354 if (found_laa_mac_filter) {
9355 struct i40e_aqc_remove_macvlan_element_data element;
9357 memset(&element, 0, sizeof(element));
9358 ether_addr_copy(element.mac_addr, laa_macaddr);
9359 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9360 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9363 /* some older FW has a different default */
9365 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9366 i40e_aq_remove_macvlan(hw, vsi->seid,
9370 i40e_aq_mac_address_write(hw,
9371 I40E_AQC_WRITE_TYPE_LAA_WOL,
9376 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9377 pf->flags |= I40E_FLAG_FILTER_SYNC;
9380 /* Update VSI BW information */
9381 ret = i40e_vsi_get_bw_info(vsi);
9383 dev_info(&pf->pdev->dev,
9384 "couldn't get vsi bw info, err %s aq_err %s\n",
9385 i40e_stat_str(&pf->hw, ret),
9386 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9387 /* VSI is already added so not tearing that up */
9396 * i40e_vsi_release - Delete a VSI and free its resources
9397 * @vsi: the VSI being removed
9399 * Returns 0 on success or < 0 on error
9401 int i40e_vsi_release(struct i40e_vsi *vsi)
9403 struct i40e_mac_filter *f, *ftmp;
9404 struct i40e_veb *veb = NULL;
9411 /* release of a VEB-owner or last VSI is not allowed */
9412 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9413 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9414 vsi->seid, vsi->uplink_seid);
9417 if (vsi == pf->vsi[pf->lan_vsi] &&
9418 !test_bit(__I40E_DOWN, &pf->state)) {
9419 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9423 uplink_seid = vsi->uplink_seid;
9424 if (vsi->type != I40E_VSI_SRIOV) {
9425 if (vsi->netdev_registered) {
9426 vsi->netdev_registered = false;
9428 /* results in a call to i40e_close() */
9429 unregister_netdev(vsi->netdev);
9432 i40e_vsi_close(vsi);
9434 i40e_vsi_disable_irq(vsi);
9437 spin_lock_bh(&vsi->mac_filter_list_lock);
9438 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9439 i40e_del_filter(vsi, f->macaddr, f->vlan,
9440 f->is_vf, f->is_netdev);
9441 spin_unlock_bh(&vsi->mac_filter_list_lock);
9443 i40e_sync_vsi_filters(vsi);
9445 i40e_vsi_delete(vsi);
9446 i40e_vsi_free_q_vectors(vsi);
9448 free_netdev(vsi->netdev);
9451 i40e_vsi_clear_rings(vsi);
9452 i40e_vsi_clear(vsi);
9454 /* If this was the last thing on the VEB, except for the
9455 * controlling VSI, remove the VEB, which puts the controlling
9456 * VSI onto the next level down in the switch.
9458 * Well, okay, there's one more exception here: don't remove
9459 * the orphan VEBs yet. We'll wait for an explicit remove request
9460 * from up the network stack.
9462 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9464 pf->vsi[i]->uplink_seid == uplink_seid &&
9465 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9466 n++; /* count the VSIs */
9469 for (i = 0; i < I40E_MAX_VEB; i++) {
9472 if (pf->veb[i]->uplink_seid == uplink_seid)
9473 n++; /* count the VEBs */
9474 if (pf->veb[i]->seid == uplink_seid)
9477 if (n == 0 && veb && veb->uplink_seid != 0)
9478 i40e_veb_release(veb);
9484 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9485 * @vsi: ptr to the VSI
9487 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9488 * corresponding SW VSI structure and initializes num_queue_pairs for the
9489 * newly allocated VSI.
9491 * Returns 0 on success or negative on failure
9493 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9496 struct i40e_pf *pf = vsi->back;
9498 if (vsi->q_vectors[0]) {
9499 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9504 if (vsi->base_vector) {
9505 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9506 vsi->seid, vsi->base_vector);
9510 ret = i40e_vsi_alloc_q_vectors(vsi);
9512 dev_info(&pf->pdev->dev,
9513 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9514 vsi->num_q_vectors, vsi->seid, ret);
9515 vsi->num_q_vectors = 0;
9516 goto vector_setup_out;
9519 /* In Legacy mode, we do not have to get any other vector since we
9520 * piggyback on the misc/ICR0 for queue interrupts.
9522 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9524 if (vsi->num_q_vectors)
9525 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9526 vsi->num_q_vectors, vsi->idx);
9527 if (vsi->base_vector < 0) {
9528 dev_info(&pf->pdev->dev,
9529 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9530 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9531 i40e_vsi_free_q_vectors(vsi);
9533 goto vector_setup_out;
9541 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9542 * @vsi: pointer to the vsi.
9544 * This re-allocates a vsi's queue resources.
9546 * Returns pointer to the successfully allocated and configured VSI sw struct
9547 * on success, otherwise returns NULL on failure.
9549 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9551 struct i40e_pf *pf = vsi->back;
9555 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9556 i40e_vsi_clear_rings(vsi);
9558 i40e_vsi_free_arrays(vsi, false);
9559 i40e_set_num_rings_in_vsi(vsi);
9560 ret = i40e_vsi_alloc_arrays(vsi, false);
9564 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9566 dev_info(&pf->pdev->dev,
9567 "failed to get tracking for %d queues for VSI %d err %d\n",
9568 vsi->alloc_queue_pairs, vsi->seid, ret);
9571 vsi->base_queue = ret;
9573 /* Update the FW view of the VSI. Force a reset of TC and queue
9574 * layout configurations.
9576 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9577 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9578 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9579 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9581 /* assign it some queues */
9582 ret = i40e_alloc_rings(vsi);
9586 /* map all of the rings to the q_vectors */
9587 i40e_vsi_map_rings_to_vectors(vsi);
9591 i40e_vsi_free_q_vectors(vsi);
9592 if (vsi->netdev_registered) {
9593 vsi->netdev_registered = false;
9594 unregister_netdev(vsi->netdev);
9595 free_netdev(vsi->netdev);
9598 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9600 i40e_vsi_clear(vsi);
9605 * i40e_macaddr_init - explicitly write the mac address filters.
9607 * @vsi: pointer to the vsi.
9608 * @macaddr: the MAC address
9610 * This is needed when the macaddr has been obtained by other
9611 * means than the default, e.g., from Open Firmware or IDPROM.
9612 * Returns 0 on success, negative on failure
9614 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
9617 struct i40e_aqc_add_macvlan_element_data element;
9619 ret = i40e_aq_mac_address_write(&vsi->back->hw,
9620 I40E_AQC_WRITE_TYPE_LAA_WOL,
9623 dev_info(&vsi->back->pdev->dev,
9624 "Addr change for VSI failed: %d\n", ret);
9625 return -EADDRNOTAVAIL;
9628 memset(&element, 0, sizeof(element));
9629 ether_addr_copy(element.mac_addr, macaddr);
9630 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
9631 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
9633 dev_info(&vsi->back->pdev->dev,
9634 "add filter failed err %s aq_err %s\n",
9635 i40e_stat_str(&vsi->back->hw, ret),
9636 i40e_aq_str(&vsi->back->hw,
9637 vsi->back->hw.aq.asq_last_status));
9643 * i40e_vsi_setup - Set up a VSI by a given type
9644 * @pf: board private structure
9646 * @uplink_seid: the switch element to link to
9647 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9649 * This allocates the sw VSI structure and its queue resources, then add a VSI
9650 * to the identified VEB.
9652 * Returns pointer to the successfully allocated and configure VSI sw struct on
9653 * success, otherwise returns NULL on failure.
9655 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9656 u16 uplink_seid, u32 param1)
9658 struct i40e_vsi *vsi = NULL;
9659 struct i40e_veb *veb = NULL;
9663 /* The requested uplink_seid must be either
9664 * - the PF's port seid
9665 * no VEB is needed because this is the PF
9666 * or this is a Flow Director special case VSI
9667 * - seid of an existing VEB
9668 * - seid of a VSI that owns an existing VEB
9669 * - seid of a VSI that doesn't own a VEB
9670 * a new VEB is created and the VSI becomes the owner
9671 * - seid of the PF VSI, which is what creates the first VEB
9672 * this is a special case of the previous
9674 * Find which uplink_seid we were given and create a new VEB if needed
9676 for (i = 0; i < I40E_MAX_VEB; i++) {
9677 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9683 if (!veb && uplink_seid != pf->mac_seid) {
9685 for (i = 0; i < pf->num_alloc_vsi; i++) {
9686 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9692 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9697 if (vsi->uplink_seid == pf->mac_seid)
9698 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9699 vsi->tc_config.enabled_tc);
9700 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9701 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9702 vsi->tc_config.enabled_tc);
9704 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9705 dev_info(&vsi->back->pdev->dev,
9706 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9709 /* We come up by default in VEPA mode if SRIOV is not
9710 * already enabled, in which case we can't force VEPA
9713 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9714 veb->bridge_mode = BRIDGE_MODE_VEPA;
9715 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9717 i40e_config_bridge_mode(veb);
9719 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9720 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9724 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9728 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9729 uplink_seid = veb->seid;
9732 /* get vsi sw struct */
9733 v_idx = i40e_vsi_mem_alloc(pf, type);
9736 vsi = pf->vsi[v_idx];
9740 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9742 if (type == I40E_VSI_MAIN)
9743 pf->lan_vsi = v_idx;
9744 else if (type == I40E_VSI_SRIOV)
9745 vsi->vf_id = param1;
9746 /* assign it some queues */
9747 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9750 dev_info(&pf->pdev->dev,
9751 "failed to get tracking for %d queues for VSI %d err=%d\n",
9752 vsi->alloc_queue_pairs, vsi->seid, ret);
9755 vsi->base_queue = ret;
9757 /* get a VSI from the hardware */
9758 vsi->uplink_seid = uplink_seid;
9759 ret = i40e_add_vsi(vsi);
9763 switch (vsi->type) {
9764 /* setup the netdev if needed */
9766 /* Apply relevant filters if a platform-specific mac
9767 * address was selected.
9769 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9770 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9772 dev_warn(&pf->pdev->dev,
9773 "could not set up macaddr; err %d\n",
9777 case I40E_VSI_VMDQ2:
9779 ret = i40e_config_netdev(vsi);
9782 ret = register_netdev(vsi->netdev);
9785 vsi->netdev_registered = true;
9786 netif_carrier_off(vsi->netdev);
9787 #ifdef CONFIG_I40E_DCB
9788 /* Setup DCB netlink interface */
9789 i40e_dcbnl_setup(vsi);
9790 #endif /* CONFIG_I40E_DCB */
9794 /* set up vectors and rings if needed */
9795 ret = i40e_vsi_setup_vectors(vsi);
9799 ret = i40e_alloc_rings(vsi);
9803 /* map all of the rings to the q_vectors */
9804 i40e_vsi_map_rings_to_vectors(vsi);
9806 i40e_vsi_reset_stats(vsi);
9810 /* no netdev or rings for the other VSI types */
9814 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9815 (vsi->type == I40E_VSI_VMDQ2)) {
9816 ret = i40e_vsi_config_rss(vsi);
9821 i40e_vsi_free_q_vectors(vsi);
9823 if (vsi->netdev_registered) {
9824 vsi->netdev_registered = false;
9825 unregister_netdev(vsi->netdev);
9826 free_netdev(vsi->netdev);
9830 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9832 i40e_vsi_clear(vsi);
9838 * i40e_veb_get_bw_info - Query VEB BW information
9839 * @veb: the veb to query
9841 * Query the Tx scheduler BW configuration data for given VEB
9843 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9845 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9846 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9847 struct i40e_pf *pf = veb->pf;
9848 struct i40e_hw *hw = &pf->hw;
9853 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9856 dev_info(&pf->pdev->dev,
9857 "query veb bw config failed, err %s aq_err %s\n",
9858 i40e_stat_str(&pf->hw, ret),
9859 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9863 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9866 dev_info(&pf->pdev->dev,
9867 "query veb bw ets config failed, err %s aq_err %s\n",
9868 i40e_stat_str(&pf->hw, ret),
9869 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9873 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9874 veb->bw_max_quanta = ets_data.tc_bw_max;
9875 veb->is_abs_credits = bw_data.absolute_credits_enable;
9876 veb->enabled_tc = ets_data.tc_valid_bits;
9877 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9878 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9879 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9880 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9881 veb->bw_tc_limit_credits[i] =
9882 le16_to_cpu(bw_data.tc_bw_limits[i]);
9883 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9891 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9892 * @pf: board private structure
9894 * On error: returns error code (negative)
9895 * On success: returns vsi index in PF (positive)
9897 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9900 struct i40e_veb *veb;
9903 /* Need to protect the allocation of switch elements at the PF level */
9904 mutex_lock(&pf->switch_mutex);
9906 /* VEB list may be fragmented if VEB creation/destruction has
9907 * been happening. We can afford to do a quick scan to look
9908 * for any free slots in the list.
9910 * find next empty veb slot, looping back around if necessary
9913 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9915 if (i >= I40E_MAX_VEB) {
9917 goto err_alloc_veb; /* out of VEB slots! */
9920 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9927 veb->enabled_tc = 1;
9932 mutex_unlock(&pf->switch_mutex);
9937 * i40e_switch_branch_release - Delete a branch of the switch tree
9938 * @branch: where to start deleting
9940 * This uses recursion to find the tips of the branch to be
9941 * removed, deleting until we get back to and can delete this VEB.
9943 static void i40e_switch_branch_release(struct i40e_veb *branch)
9945 struct i40e_pf *pf = branch->pf;
9946 u16 branch_seid = branch->seid;
9947 u16 veb_idx = branch->idx;
9950 /* release any VEBs on this VEB - RECURSION */
9951 for (i = 0; i < I40E_MAX_VEB; i++) {
9954 if (pf->veb[i]->uplink_seid == branch->seid)
9955 i40e_switch_branch_release(pf->veb[i]);
9958 /* Release the VSIs on this VEB, but not the owner VSI.
9960 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9961 * the VEB itself, so don't use (*branch) after this loop.
9963 for (i = 0; i < pf->num_alloc_vsi; i++) {
9966 if (pf->vsi[i]->uplink_seid == branch_seid &&
9967 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9968 i40e_vsi_release(pf->vsi[i]);
9972 /* There's one corner case where the VEB might not have been
9973 * removed, so double check it here and remove it if needed.
9974 * This case happens if the veb was created from the debugfs
9975 * commands and no VSIs were added to it.
9977 if (pf->veb[veb_idx])
9978 i40e_veb_release(pf->veb[veb_idx]);
9982 * i40e_veb_clear - remove veb struct
9983 * @veb: the veb to remove
9985 static void i40e_veb_clear(struct i40e_veb *veb)
9991 struct i40e_pf *pf = veb->pf;
9993 mutex_lock(&pf->switch_mutex);
9994 if (pf->veb[veb->idx] == veb)
9995 pf->veb[veb->idx] = NULL;
9996 mutex_unlock(&pf->switch_mutex);
10003 * i40e_veb_release - Delete a VEB and free its resources
10004 * @veb: the VEB being removed
10006 void i40e_veb_release(struct i40e_veb *veb)
10008 struct i40e_vsi *vsi = NULL;
10009 struct i40e_pf *pf;
10014 /* find the remaining VSI and check for extras */
10015 for (i = 0; i < pf->num_alloc_vsi; i++) {
10016 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10022 dev_info(&pf->pdev->dev,
10023 "can't remove VEB %d with %d VSIs left\n",
10028 /* move the remaining VSI to uplink veb */
10029 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10030 if (veb->uplink_seid) {
10031 vsi->uplink_seid = veb->uplink_seid;
10032 if (veb->uplink_seid == pf->mac_seid)
10033 vsi->veb_idx = I40E_NO_VEB;
10035 vsi->veb_idx = veb->veb_idx;
10038 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10039 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10042 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10043 i40e_veb_clear(veb);
10047 * i40e_add_veb - create the VEB in the switch
10048 * @veb: the VEB to be instantiated
10049 * @vsi: the controlling VSI
10051 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10053 struct i40e_pf *pf = veb->pf;
10054 bool is_default = veb->pf->cur_promisc;
10055 bool is_cloud = false;
10058 /* get a VEB from the hardware */
10059 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10060 veb->enabled_tc, is_default,
10061 is_cloud, &veb->seid, NULL);
10063 dev_info(&pf->pdev->dev,
10064 "couldn't add VEB, err %s aq_err %s\n",
10065 i40e_stat_str(&pf->hw, ret),
10066 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10070 /* get statistics counter */
10071 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10072 &veb->stats_idx, NULL, NULL, NULL);
10074 dev_info(&pf->pdev->dev,
10075 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10076 i40e_stat_str(&pf->hw, ret),
10077 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10080 ret = i40e_veb_get_bw_info(veb);
10082 dev_info(&pf->pdev->dev,
10083 "couldn't get VEB bw info, err %s aq_err %s\n",
10084 i40e_stat_str(&pf->hw, ret),
10085 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10086 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10090 vsi->uplink_seid = veb->seid;
10091 vsi->veb_idx = veb->idx;
10092 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10098 * i40e_veb_setup - Set up a VEB
10099 * @pf: board private structure
10100 * @flags: VEB setup flags
10101 * @uplink_seid: the switch element to link to
10102 * @vsi_seid: the initial VSI seid
10103 * @enabled_tc: Enabled TC bit-map
10105 * This allocates the sw VEB structure and links it into the switch
10106 * It is possible and legal for this to be a duplicate of an already
10107 * existing VEB. It is also possible for both uplink and vsi seids
10108 * to be zero, in order to create a floating VEB.
10110 * Returns pointer to the successfully allocated VEB sw struct on
10111 * success, otherwise returns NULL on failure.
10113 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10114 u16 uplink_seid, u16 vsi_seid,
10117 struct i40e_veb *veb, *uplink_veb = NULL;
10118 int vsi_idx, veb_idx;
10121 /* if one seid is 0, the other must be 0 to create a floating relay */
10122 if ((uplink_seid == 0 || vsi_seid == 0) &&
10123 (uplink_seid + vsi_seid != 0)) {
10124 dev_info(&pf->pdev->dev,
10125 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10126 uplink_seid, vsi_seid);
10130 /* make sure there is such a vsi and uplink */
10131 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10132 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10134 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10135 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10140 if (uplink_seid && uplink_seid != pf->mac_seid) {
10141 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10142 if (pf->veb[veb_idx] &&
10143 pf->veb[veb_idx]->seid == uplink_seid) {
10144 uplink_veb = pf->veb[veb_idx];
10149 dev_info(&pf->pdev->dev,
10150 "uplink seid %d not found\n", uplink_seid);
10155 /* get veb sw struct */
10156 veb_idx = i40e_veb_mem_alloc(pf);
10159 veb = pf->veb[veb_idx];
10160 veb->flags = flags;
10161 veb->uplink_seid = uplink_seid;
10162 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10163 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10165 /* create the VEB in the switch */
10166 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10169 if (vsi_idx == pf->lan_vsi)
10170 pf->lan_veb = veb->idx;
10175 i40e_veb_clear(veb);
10181 * i40e_setup_pf_switch_element - set PF vars based on switch type
10182 * @pf: board private structure
10183 * @ele: element we are building info from
10184 * @num_reported: total number of elements
10185 * @printconfig: should we print the contents
10187 * helper function to assist in extracting a few useful SEID values.
10189 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10190 struct i40e_aqc_switch_config_element_resp *ele,
10191 u16 num_reported, bool printconfig)
10193 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10194 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10195 u8 element_type = ele->element_type;
10196 u16 seid = le16_to_cpu(ele->seid);
10199 dev_info(&pf->pdev->dev,
10200 "type=%d seid=%d uplink=%d downlink=%d\n",
10201 element_type, seid, uplink_seid, downlink_seid);
10203 switch (element_type) {
10204 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10205 pf->mac_seid = seid;
10207 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10209 if (uplink_seid != pf->mac_seid)
10211 if (pf->lan_veb == I40E_NO_VEB) {
10214 /* find existing or else empty VEB */
10215 for (v = 0; v < I40E_MAX_VEB; v++) {
10216 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10221 if (pf->lan_veb == I40E_NO_VEB) {
10222 v = i40e_veb_mem_alloc(pf);
10229 pf->veb[pf->lan_veb]->seid = seid;
10230 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10231 pf->veb[pf->lan_veb]->pf = pf;
10232 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10234 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10235 if (num_reported != 1)
10237 /* This is immediately after a reset so we can assume this is
10240 pf->mac_seid = uplink_seid;
10241 pf->pf_seid = downlink_seid;
10242 pf->main_vsi_seid = seid;
10244 dev_info(&pf->pdev->dev,
10245 "pf_seid=%d main_vsi_seid=%d\n",
10246 pf->pf_seid, pf->main_vsi_seid);
10248 case I40E_SWITCH_ELEMENT_TYPE_PF:
10249 case I40E_SWITCH_ELEMENT_TYPE_VF:
10250 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10251 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10252 case I40E_SWITCH_ELEMENT_TYPE_PE:
10253 case I40E_SWITCH_ELEMENT_TYPE_PA:
10254 /* ignore these for now */
10257 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10258 element_type, seid);
10264 * i40e_fetch_switch_configuration - Get switch config from firmware
10265 * @pf: board private structure
10266 * @printconfig: should we print the contents
10268 * Get the current switch configuration from the device and
10269 * extract a few useful SEID values.
10271 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10273 struct i40e_aqc_get_switch_config_resp *sw_config;
10279 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10283 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10285 u16 num_reported, num_total;
10287 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10291 dev_info(&pf->pdev->dev,
10292 "get switch config failed err %s aq_err %s\n",
10293 i40e_stat_str(&pf->hw, ret),
10294 i40e_aq_str(&pf->hw,
10295 pf->hw.aq.asq_last_status));
10300 num_reported = le16_to_cpu(sw_config->header.num_reported);
10301 num_total = le16_to_cpu(sw_config->header.num_total);
10304 dev_info(&pf->pdev->dev,
10305 "header: %d reported %d total\n",
10306 num_reported, num_total);
10308 for (i = 0; i < num_reported; i++) {
10309 struct i40e_aqc_switch_config_element_resp *ele =
10310 &sw_config->element[i];
10312 i40e_setup_pf_switch_element(pf, ele, num_reported,
10315 } while (next_seid != 0);
10322 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10323 * @pf: board private structure
10324 * @reinit: if the Main VSI needs to re-initialized.
10326 * Returns 0 on success, negative value on failure
10328 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10332 /* find out what's out there already */
10333 ret = i40e_fetch_switch_configuration(pf, false);
10335 dev_info(&pf->pdev->dev,
10336 "couldn't fetch switch config, err %s aq_err %s\n",
10337 i40e_stat_str(&pf->hw, ret),
10338 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10341 i40e_pf_reset_stats(pf);
10343 /* first time setup */
10344 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10345 struct i40e_vsi *vsi = NULL;
10348 /* Set up the PF VSI associated with the PF's main VSI
10349 * that is already in the HW switch
10351 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10352 uplink_seid = pf->veb[pf->lan_veb]->seid;
10354 uplink_seid = pf->mac_seid;
10355 if (pf->lan_vsi == I40E_NO_VSI)
10356 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10358 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10360 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10361 i40e_fdir_teardown(pf);
10365 /* force a reset of TC and queue layout configurations */
10366 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10368 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10369 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10370 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10372 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10374 i40e_fdir_sb_setup(pf);
10376 /* Setup static PF queue filter control settings */
10377 ret = i40e_setup_pf_filter_control(pf);
10379 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10381 /* Failure here should not stop continuing other steps */
10384 /* enable RSS in the HW, even for only one queue, as the stack can use
10387 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10388 i40e_pf_config_rss(pf);
10390 /* fill in link information and enable LSE reporting */
10391 i40e_update_link_info(&pf->hw);
10392 i40e_link_event(pf);
10394 /* Initialize user-specific link properties */
10395 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10396 I40E_AQ_AN_COMPLETED) ? true : false);
10404 * i40e_determine_queue_usage - Work out queue distribution
10405 * @pf: board private structure
10407 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10411 pf->num_lan_qps = 0;
10413 pf->num_fcoe_qps = 0;
10416 /* Find the max queues to be put into basic use. We'll always be
10417 * using TC0, whether or not DCB is running, and TC0 will get the
10420 queues_left = pf->hw.func_caps.num_tx_qp;
10422 if ((queues_left == 1) ||
10423 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10424 /* one qp for PF, no queues for anything else */
10426 pf->alloc_rss_size = pf->num_lan_qps = 1;
10428 /* make sure all the fancies are disabled */
10429 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10431 I40E_FLAG_FCOE_ENABLED |
10433 I40E_FLAG_FD_SB_ENABLED |
10434 I40E_FLAG_FD_ATR_ENABLED |
10435 I40E_FLAG_DCB_CAPABLE |
10436 I40E_FLAG_SRIOV_ENABLED |
10437 I40E_FLAG_VMDQ_ENABLED);
10438 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10439 I40E_FLAG_FD_SB_ENABLED |
10440 I40E_FLAG_FD_ATR_ENABLED |
10441 I40E_FLAG_DCB_CAPABLE))) {
10442 /* one qp for PF */
10443 pf->alloc_rss_size = pf->num_lan_qps = 1;
10444 queues_left -= pf->num_lan_qps;
10446 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10448 I40E_FLAG_FCOE_ENABLED |
10450 I40E_FLAG_FD_SB_ENABLED |
10451 I40E_FLAG_FD_ATR_ENABLED |
10452 I40E_FLAG_DCB_ENABLED |
10453 I40E_FLAG_VMDQ_ENABLED);
10455 /* Not enough queues for all TCs */
10456 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10457 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10458 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10459 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10461 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10462 num_online_cpus());
10463 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10464 pf->hw.func_caps.num_tx_qp);
10466 queues_left -= pf->num_lan_qps;
10470 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10471 if (I40E_DEFAULT_FCOE <= queues_left) {
10472 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10473 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10474 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10476 pf->num_fcoe_qps = 0;
10477 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10478 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10481 queues_left -= pf->num_fcoe_qps;
10485 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10486 if (queues_left > 1) {
10487 queues_left -= 1; /* save 1 queue for FD */
10489 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10490 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10494 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10495 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10496 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10497 (queues_left / pf->num_vf_qps));
10498 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10501 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10502 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10503 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10504 (queues_left / pf->num_vmdq_qps));
10505 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10508 pf->queues_left = queues_left;
10509 dev_dbg(&pf->pdev->dev,
10510 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10511 pf->hw.func_caps.num_tx_qp,
10512 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10513 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10514 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10517 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10522 * i40e_setup_pf_filter_control - Setup PF static filter control
10523 * @pf: PF to be setup
10525 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10526 * settings. If PE/FCoE are enabled then it will also set the per PF
10527 * based filter sizes required for them. It also enables Flow director,
10528 * ethertype and macvlan type filter settings for the pf.
10530 * Returns 0 on success, negative on failure
10532 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10534 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10536 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10538 /* Flow Director is enabled */
10539 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10540 settings->enable_fdir = true;
10542 /* Ethtype and MACVLAN filters enabled for PF */
10543 settings->enable_ethtype = true;
10544 settings->enable_macvlan = true;
10546 if (i40e_set_filter_control(&pf->hw, settings))
10552 #define INFO_STRING_LEN 255
10553 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10554 static void i40e_print_features(struct i40e_pf *pf)
10556 struct i40e_hw *hw = &pf->hw;
10560 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10564 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10565 #ifdef CONFIG_PCI_IOV
10566 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10568 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d RX: %s",
10569 pf->hw.func_caps.num_vsis,
10570 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10571 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10573 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10574 i += snprintf(&buf[i], REMAIN(i), " RSS");
10575 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10576 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10577 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10578 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10579 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10581 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10582 i += snprintf(&buf[i], REMAIN(i), " DCB");
10583 #if IS_ENABLED(CONFIG_VXLAN)
10584 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10586 #if IS_ENABLED(CONFIG_GENEVE)
10587 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10589 if (pf->flags & I40E_FLAG_PTP)
10590 i += snprintf(&buf[i], REMAIN(i), " PTP");
10592 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10593 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10595 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10596 i += snprintf(&buf[i], REMAIN(i), " VEB");
10598 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10600 dev_info(&pf->pdev->dev, "%s\n", buf);
10602 WARN_ON(i > INFO_STRING_LEN);
10606 * i40e_get_platform_mac_addr - get platform-specific MAC address
10608 * @pdev: PCI device information struct
10609 * @pf: board private structure
10611 * Look up the MAC address in Open Firmware on systems that support it,
10612 * and use IDPROM on SPARC if no OF address is found. On return, the
10613 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10614 * has been selected.
10616 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10618 struct device_node *dp = pci_device_to_OF_node(pdev);
10619 const unsigned char *addr;
10620 u8 *mac_addr = pf->hw.mac.addr;
10622 pf->flags &= ~I40E_FLAG_PF_MAC;
10623 addr = of_get_mac_address(dp);
10625 ether_addr_copy(mac_addr, addr);
10626 pf->flags |= I40E_FLAG_PF_MAC;
10627 #ifdef CONFIG_SPARC
10629 ether_addr_copy(mac_addr, idprom->id_ethaddr);
10630 pf->flags |= I40E_FLAG_PF_MAC;
10631 #endif /* CONFIG_SPARC */
10636 * i40e_probe - Device initialization routine
10637 * @pdev: PCI device information struct
10638 * @ent: entry in i40e_pci_tbl
10640 * i40e_probe initializes a PF identified by a pci_dev structure.
10641 * The OS initialization, configuring of the PF private structure,
10642 * and a hardware reset occur.
10644 * Returns 0 on success, negative on failure
10646 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10648 struct i40e_aq_get_phy_abilities_resp abilities;
10649 struct i40e_pf *pf;
10650 struct i40e_hw *hw;
10651 static u16 pfs_found;
10659 err = pci_enable_device_mem(pdev);
10663 /* set up for high or low dma */
10664 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10666 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10668 dev_err(&pdev->dev,
10669 "DMA configuration failed: 0x%x\n", err);
10674 /* set up pci connections */
10675 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10676 IORESOURCE_MEM), i40e_driver_name);
10678 dev_info(&pdev->dev,
10679 "pci_request_selected_regions failed %d\n", err);
10683 pci_enable_pcie_error_reporting(pdev);
10684 pci_set_master(pdev);
10686 /* Now that we have a PCI connection, we need to do the
10687 * low level device setup. This is primarily setting up
10688 * the Admin Queue structures and then querying for the
10689 * device's current profile information.
10691 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10698 set_bit(__I40E_DOWN, &pf->state);
10703 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10704 I40E_MAX_CSR_SPACE);
10706 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10707 if (!hw->hw_addr) {
10709 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10710 (unsigned int)pci_resource_start(pdev, 0),
10711 pf->ioremap_len, err);
10714 hw->vendor_id = pdev->vendor;
10715 hw->device_id = pdev->device;
10716 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10717 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10718 hw->subsystem_device_id = pdev->subsystem_device;
10719 hw->bus.device = PCI_SLOT(pdev->devfn);
10720 hw->bus.func = PCI_FUNC(pdev->devfn);
10721 pf->instance = pfs_found;
10724 pf->msg_enable = pf->hw.debug_mask;
10725 pf->msg_enable = debug;
10728 /* do a special CORER for clearing PXE mode once at init */
10729 if (hw->revision_id == 0 &&
10730 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10731 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10736 i40e_clear_pxe_mode(hw);
10739 /* Reset here to make sure all is clean and to define PF 'n' */
10741 err = i40e_pf_reset(hw);
10743 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10748 hw->aq.num_arq_entries = I40E_AQ_LEN;
10749 hw->aq.num_asq_entries = I40E_AQ_LEN;
10750 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10751 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10752 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10754 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10756 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10758 err = i40e_init_shared_code(hw);
10760 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10765 /* set up a default setting for link flow control */
10766 pf->hw.fc.requested_mode = I40E_FC_NONE;
10768 /* set up the locks for the AQ, do this only once in probe
10769 * and destroy them only once in remove
10771 mutex_init(&hw->aq.asq_mutex);
10772 mutex_init(&hw->aq.arq_mutex);
10774 err = i40e_init_adminq(hw);
10776 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10777 dev_info(&pdev->dev,
10778 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10780 dev_info(&pdev->dev,
10781 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10786 /* provide nvm, fw, api versions */
10787 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10788 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10789 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10790 i40e_nvm_version_str(hw));
10792 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10793 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10794 dev_info(&pdev->dev,
10795 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10796 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10797 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10798 dev_info(&pdev->dev,
10799 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10801 i40e_verify_eeprom(pf);
10803 /* Rev 0 hardware was never productized */
10804 if (hw->revision_id < 1)
10805 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10807 i40e_clear_pxe_mode(hw);
10808 err = i40e_get_capabilities(pf);
10810 goto err_adminq_setup;
10812 err = i40e_sw_init(pf);
10814 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10818 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10819 hw->func_caps.num_rx_qp,
10820 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10822 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10823 goto err_init_lan_hmc;
10826 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10828 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10830 goto err_configure_lan_hmc;
10833 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10834 * Ignore error return codes because if it was already disabled via
10835 * hardware settings this will fail
10837 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10838 (pf->hw.aq.fw_maj_ver < 4)) {
10839 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10840 i40e_aq_stop_lldp(hw, true, NULL);
10843 i40e_get_mac_addr(hw, hw->mac.addr);
10844 /* allow a platform config to override the HW addr */
10845 i40e_get_platform_mac_addr(pdev, pf);
10846 if (!is_valid_ether_addr(hw->mac.addr)) {
10847 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10851 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10852 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10853 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10854 if (is_valid_ether_addr(hw->mac.port_addr))
10855 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10857 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10859 dev_info(&pdev->dev,
10860 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10861 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10862 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10864 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10866 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10867 #endif /* I40E_FCOE */
10869 pci_set_drvdata(pdev, pf);
10870 pci_save_state(pdev);
10871 #ifdef CONFIG_I40E_DCB
10872 err = i40e_init_pf_dcb(pf);
10874 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10875 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10876 /* Continue without DCB enabled */
10878 #endif /* CONFIG_I40E_DCB */
10880 /* set up periodic task facility */
10881 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10882 pf->service_timer_period = HZ;
10884 INIT_WORK(&pf->service_task, i40e_service_task);
10885 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10886 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10888 /* NVM bit on means WoL disabled for the port */
10889 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10890 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10891 pf->wol_en = false;
10894 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10896 /* set up the main switch operations */
10897 i40e_determine_queue_usage(pf);
10898 err = i40e_init_interrupt_scheme(pf);
10900 goto err_switch_setup;
10902 /* The number of VSIs reported by the FW is the minimum guaranteed
10903 * to us; HW supports far more and we share the remaining pool with
10904 * the other PFs. We allocate space for more than the guarantee with
10905 * the understanding that we might not get them all later.
10907 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10908 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10910 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10912 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10913 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
10917 goto err_switch_setup;
10920 #ifdef CONFIG_PCI_IOV
10921 /* prep for VF support */
10922 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10923 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10924 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10925 if (pci_num_vf(pdev))
10926 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10929 err = i40e_setup_pf_switch(pf, false);
10931 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10935 /* Make sure flow control is set according to current settings */
10936 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10937 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10938 dev_dbg(&pf->pdev->dev,
10939 "Set fc with err %s aq_err %s on get_phy_cap\n",
10940 i40e_stat_str(hw, err),
10941 i40e_aq_str(hw, hw->aq.asq_last_status));
10942 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10943 dev_dbg(&pf->pdev->dev,
10944 "Set fc with err %s aq_err %s on set_phy_config\n",
10945 i40e_stat_str(hw, err),
10946 i40e_aq_str(hw, hw->aq.asq_last_status));
10947 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10948 dev_dbg(&pf->pdev->dev,
10949 "Set fc with err %s aq_err %s on get_link_info\n",
10950 i40e_stat_str(hw, err),
10951 i40e_aq_str(hw, hw->aq.asq_last_status));
10953 /* if FDIR VSI was set up, start it now */
10954 for (i = 0; i < pf->num_alloc_vsi; i++) {
10955 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10956 i40e_vsi_open(pf->vsi[i]);
10961 /* The driver only wants link up/down and module qualification
10962 * reports from firmware. Note the negative logic.
10964 err = i40e_aq_set_phy_int_mask(&pf->hw,
10965 ~(I40E_AQ_EVENT_LINK_UPDOWN |
10966 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10968 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10969 i40e_stat_str(&pf->hw, err),
10970 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10972 /* Reconfigure hardware for allowing smaller MSS in the case
10973 * of TSO, so that we avoid the MDD being fired and causing
10974 * a reset in the case of small MSS+TSO.
10976 val = rd32(hw, I40E_REG_MSS);
10977 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10978 val &= ~I40E_REG_MSS_MIN_MASK;
10979 val |= I40E_64BYTE_MSS;
10980 wr32(hw, I40E_REG_MSS, val);
10983 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
10985 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10987 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10988 i40e_stat_str(&pf->hw, err),
10989 i40e_aq_str(&pf->hw,
10990 pf->hw.aq.asq_last_status));
10992 /* The main driver is (mostly) up and happy. We need to set this state
10993 * before setting up the misc vector or we get a race and the vector
10994 * ends up disabled forever.
10996 clear_bit(__I40E_DOWN, &pf->state);
10998 /* In case of MSIX we are going to setup the misc vector right here
10999 * to handle admin queue events etc. In case of legacy and MSI
11000 * the misc functionality and queue processing is combined in
11001 * the same vector and that gets setup at open.
11003 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11004 err = i40e_setup_misc_vector(pf);
11006 dev_info(&pdev->dev,
11007 "setup of misc vector failed: %d\n", err);
11012 #ifdef CONFIG_PCI_IOV
11013 /* prep for VF support */
11014 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11015 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11016 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11017 /* disable link interrupts for VFs */
11018 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11019 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11020 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11023 if (pci_num_vf(pdev)) {
11024 dev_info(&pdev->dev,
11025 "Active VFs found, allocating resources.\n");
11026 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11028 dev_info(&pdev->dev,
11029 "Error %d allocating resources for existing VFs\n",
11033 #endif /* CONFIG_PCI_IOV */
11037 i40e_dbg_pf_init(pf);
11039 /* tell the firmware that we're starting */
11040 i40e_send_version(pf);
11042 /* since everything's happy, start the service_task timer */
11043 mod_timer(&pf->service_timer,
11044 round_jiffies(jiffies + pf->service_timer_period));
11047 /* create FCoE interface */
11048 i40e_fcoe_vsi_setup(pf);
11051 #define PCI_SPEED_SIZE 8
11052 #define PCI_WIDTH_SIZE 8
11053 /* Devices on the IOSF bus do not have this information
11054 * and will report PCI Gen 1 x 1 by default so don't bother
11057 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11058 char speed[PCI_SPEED_SIZE] = "Unknown";
11059 char width[PCI_WIDTH_SIZE] = "Unknown";
11061 /* Get the negotiated link width and speed from PCI config
11064 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11067 i40e_set_pci_config_data(hw, link_status);
11069 switch (hw->bus.speed) {
11070 case i40e_bus_speed_8000:
11071 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11072 case i40e_bus_speed_5000:
11073 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11074 case i40e_bus_speed_2500:
11075 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11079 switch (hw->bus.width) {
11080 case i40e_bus_width_pcie_x8:
11081 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11082 case i40e_bus_width_pcie_x4:
11083 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11084 case i40e_bus_width_pcie_x2:
11085 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11086 case i40e_bus_width_pcie_x1:
11087 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11092 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11095 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11096 hw->bus.speed < i40e_bus_speed_8000) {
11097 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11098 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11102 /* get the requested speeds from the fw */
11103 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11105 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11106 i40e_stat_str(&pf->hw, err),
11107 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11108 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11110 /* get the supported phy types from the fw */
11111 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11113 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11114 i40e_stat_str(&pf->hw, err),
11115 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11116 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11118 /* Add a filter to drop all Flow control frames from any VSI from being
11119 * transmitted. By doing so we stop a malicious VF from sending out
11120 * PAUSE or PFC frames and potentially controlling traffic for other
11122 * The FW can still send Flow control frames if enabled.
11124 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11125 pf->main_vsi_seid);
11127 /* print a string summarizing features */
11128 i40e_print_features(pf);
11132 /* Unwind what we've done if something failed in the setup */
11134 set_bit(__I40E_DOWN, &pf->state);
11135 i40e_clear_interrupt_scheme(pf);
11138 i40e_reset_interrupt_capability(pf);
11139 del_timer_sync(&pf->service_timer);
11141 err_configure_lan_hmc:
11142 (void)i40e_shutdown_lan_hmc(hw);
11144 kfree(pf->qp_pile);
11147 (void)i40e_shutdown_adminq(hw);
11149 iounmap(hw->hw_addr);
11153 pci_disable_pcie_error_reporting(pdev);
11154 pci_release_selected_regions(pdev,
11155 pci_select_bars(pdev, IORESOURCE_MEM));
11158 pci_disable_device(pdev);
11163 * i40e_remove - Device removal routine
11164 * @pdev: PCI device information struct
11166 * i40e_remove is called by the PCI subsystem to alert the driver
11167 * that is should release a PCI device. This could be caused by a
11168 * Hot-Plug event, or because the driver is going to be removed from
11171 static void i40e_remove(struct pci_dev *pdev)
11173 struct i40e_pf *pf = pci_get_drvdata(pdev);
11174 struct i40e_hw *hw = &pf->hw;
11175 i40e_status ret_code;
11178 i40e_dbg_pf_exit(pf);
11182 /* Disable RSS in hw */
11183 wr32(hw, I40E_PFQF_HENA(0), 0);
11184 wr32(hw, I40E_PFQF_HENA(1), 0);
11186 /* no more scheduling of any task */
11187 set_bit(__I40E_DOWN, &pf->state);
11188 del_timer_sync(&pf->service_timer);
11189 cancel_work_sync(&pf->service_task);
11191 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11193 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11196 i40e_fdir_teardown(pf);
11198 /* If there is a switch structure or any orphans, remove them.
11199 * This will leave only the PF's VSI remaining.
11201 for (i = 0; i < I40E_MAX_VEB; i++) {
11205 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11206 pf->veb[i]->uplink_seid == 0)
11207 i40e_switch_branch_release(pf->veb[i]);
11210 /* Now we can shutdown the PF's VSI, just before we kill
11213 if (pf->vsi[pf->lan_vsi])
11214 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11216 /* shutdown and destroy the HMC */
11217 if (pf->hw.hmc.hmc_obj) {
11218 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
11220 dev_warn(&pdev->dev,
11221 "Failed to destroy the HMC resources: %d\n",
11225 /* shutdown the adminq */
11226 ret_code = i40e_shutdown_adminq(&pf->hw);
11228 dev_warn(&pdev->dev,
11229 "Failed to destroy the Admin Queue resources: %d\n",
11232 /* destroy the locks only once, here */
11233 mutex_destroy(&hw->aq.arq_mutex);
11234 mutex_destroy(&hw->aq.asq_mutex);
11236 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11237 i40e_clear_interrupt_scheme(pf);
11238 for (i = 0; i < pf->num_alloc_vsi; i++) {
11240 i40e_vsi_clear_rings(pf->vsi[i]);
11241 i40e_vsi_clear(pf->vsi[i]);
11246 for (i = 0; i < I40E_MAX_VEB; i++) {
11251 kfree(pf->qp_pile);
11254 iounmap(pf->hw.hw_addr);
11256 pci_release_selected_regions(pdev,
11257 pci_select_bars(pdev, IORESOURCE_MEM));
11259 pci_disable_pcie_error_reporting(pdev);
11260 pci_disable_device(pdev);
11264 * i40e_pci_error_detected - warning that something funky happened in PCI land
11265 * @pdev: PCI device information struct
11267 * Called to warn that something happened and the error handling steps
11268 * are in progress. Allows the driver to quiesce things, be ready for
11271 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11272 enum pci_channel_state error)
11274 struct i40e_pf *pf = pci_get_drvdata(pdev);
11276 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11278 /* shutdown all operations */
11279 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11281 i40e_prep_for_reset(pf);
11285 /* Request a slot reset */
11286 return PCI_ERS_RESULT_NEED_RESET;
11290 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11291 * @pdev: PCI device information struct
11293 * Called to find if the driver can work with the device now that
11294 * the pci slot has been reset. If a basic connection seems good
11295 * (registers are readable and have sane content) then return a
11296 * happy little PCI_ERS_RESULT_xxx.
11298 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11300 struct i40e_pf *pf = pci_get_drvdata(pdev);
11301 pci_ers_result_t result;
11305 dev_dbg(&pdev->dev, "%s\n", __func__);
11306 if (pci_enable_device_mem(pdev)) {
11307 dev_info(&pdev->dev,
11308 "Cannot re-enable PCI device after reset.\n");
11309 result = PCI_ERS_RESULT_DISCONNECT;
11311 pci_set_master(pdev);
11312 pci_restore_state(pdev);
11313 pci_save_state(pdev);
11314 pci_wake_from_d3(pdev, false);
11316 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11318 result = PCI_ERS_RESULT_RECOVERED;
11320 result = PCI_ERS_RESULT_DISCONNECT;
11323 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11325 dev_info(&pdev->dev,
11326 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11328 /* non-fatal, continue */
11335 * i40e_pci_error_resume - restart operations after PCI error recovery
11336 * @pdev: PCI device information struct
11338 * Called to allow the driver to bring things back up after PCI error
11339 * and/or reset recovery has finished.
11341 static void i40e_pci_error_resume(struct pci_dev *pdev)
11343 struct i40e_pf *pf = pci_get_drvdata(pdev);
11345 dev_dbg(&pdev->dev, "%s\n", __func__);
11346 if (test_bit(__I40E_SUSPENDED, &pf->state))
11350 i40e_handle_reset_warning(pf);
11355 * i40e_shutdown - PCI callback for shutting down
11356 * @pdev: PCI device information struct
11358 static void i40e_shutdown(struct pci_dev *pdev)
11360 struct i40e_pf *pf = pci_get_drvdata(pdev);
11361 struct i40e_hw *hw = &pf->hw;
11363 set_bit(__I40E_SUSPENDED, &pf->state);
11364 set_bit(__I40E_DOWN, &pf->state);
11366 i40e_prep_for_reset(pf);
11369 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11370 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11372 del_timer_sync(&pf->service_timer);
11373 cancel_work_sync(&pf->service_task);
11374 i40e_fdir_teardown(pf);
11377 i40e_prep_for_reset(pf);
11380 wr32(hw, I40E_PFPM_APM,
11381 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11382 wr32(hw, I40E_PFPM_WUFC,
11383 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11385 i40e_clear_interrupt_scheme(pf);
11387 if (system_state == SYSTEM_POWER_OFF) {
11388 pci_wake_from_d3(pdev, pf->wol_en);
11389 pci_set_power_state(pdev, PCI_D3hot);
11395 * i40e_suspend - PCI callback for moving to D3
11396 * @pdev: PCI device information struct
11398 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11400 struct i40e_pf *pf = pci_get_drvdata(pdev);
11401 struct i40e_hw *hw = &pf->hw;
11403 set_bit(__I40E_SUSPENDED, &pf->state);
11404 set_bit(__I40E_DOWN, &pf->state);
11407 i40e_prep_for_reset(pf);
11410 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11411 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11413 pci_wake_from_d3(pdev, pf->wol_en);
11414 pci_set_power_state(pdev, PCI_D3hot);
11420 * i40e_resume - PCI callback for waking up from D3
11421 * @pdev: PCI device information struct
11423 static int i40e_resume(struct pci_dev *pdev)
11425 struct i40e_pf *pf = pci_get_drvdata(pdev);
11428 pci_set_power_state(pdev, PCI_D0);
11429 pci_restore_state(pdev);
11430 /* pci_restore_state() clears dev->state_saves, so
11431 * call pci_save_state() again to restore it.
11433 pci_save_state(pdev);
11435 err = pci_enable_device_mem(pdev);
11437 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11440 pci_set_master(pdev);
11442 /* no wakeup events while running */
11443 pci_wake_from_d3(pdev, false);
11445 /* handling the reset will rebuild the device state */
11446 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11447 clear_bit(__I40E_DOWN, &pf->state);
11449 i40e_reset_and_rebuild(pf, false);
11457 static const struct pci_error_handlers i40e_err_handler = {
11458 .error_detected = i40e_pci_error_detected,
11459 .slot_reset = i40e_pci_error_slot_reset,
11460 .resume = i40e_pci_error_resume,
11463 static struct pci_driver i40e_driver = {
11464 .name = i40e_driver_name,
11465 .id_table = i40e_pci_tbl,
11466 .probe = i40e_probe,
11467 .remove = i40e_remove,
11469 .suspend = i40e_suspend,
11470 .resume = i40e_resume,
11472 .shutdown = i40e_shutdown,
11473 .err_handler = &i40e_err_handler,
11474 .sriov_configure = i40e_pci_sriov_configure,
11478 * i40e_init_module - Driver registration routine
11480 * i40e_init_module is the first routine called when the driver is
11481 * loaded. All it does is register with the PCI subsystem.
11483 static int __init i40e_init_module(void)
11485 pr_info("%s: %s - version %s\n", i40e_driver_name,
11486 i40e_driver_string, i40e_driver_version_str);
11487 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11489 /* we will see if single thread per module is enough for now,
11490 * it can't be any worse than using the system workqueue which
11491 * was already single threaded
11493 i40e_wq = create_singlethread_workqueue(i40e_driver_name);
11495 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11500 return pci_register_driver(&i40e_driver);
11502 module_init(i40e_init_module);
11505 * i40e_exit_module - Driver exit cleanup routine
11507 * i40e_exit_module is called just before the driver is removed
11510 static void __exit i40e_exit_module(void)
11512 pci_unregister_driver(&i40e_driver);
11513 destroy_workqueue(i40e_wq);
11516 module_exit(i40e_exit_module);