Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
[sfrench/cifs-2.6.git] / drivers / net / ethernet / hisilicon / hns / hns_dsaf_xgmac.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (c) 2014-2015 Hisilicon Limited.
4  */
5
6 #include <linux/io-64-nonatomic-hi-lo.h>
7 #include <linux/of_mdio.h>
8 #include "hns_dsaf_main.h"
9 #include "hns_dsaf_mac.h"
10 #include "hns_dsaf_xgmac.h"
11 #include "hns_dsaf_reg.h"
12
13 static const struct mac_stats_string g_xgmac_stats_string[] = {
14         {"xgmac_tx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(tx_fragment_err)},
15         {"xgmac_tx_good_pkts_minto64", MAC_STATS_FIELD_OFF(tx_undersize)},
16         {"xgmac_tx_total_pkts_minto64", MAC_STATS_FIELD_OFF(tx_under_min_pkts)},
17         {"xgmac_tx_pkts_64", MAC_STATS_FIELD_OFF(tx_64bytes)},
18         {"xgmac_tx_pkts_65to127", MAC_STATS_FIELD_OFF(tx_65to127)},
19         {"xgmac_tx_pkts_128to255", MAC_STATS_FIELD_OFF(tx_128to255)},
20         {"xgmac_tx_pkts_256to511", MAC_STATS_FIELD_OFF(tx_256to511)},
21         {"xgmac_tx_pkts_512to1023", MAC_STATS_FIELD_OFF(tx_512to1023)},
22         {"xgmac_tx_pkts_1024to1518", MAC_STATS_FIELD_OFF(tx_1024to1518)},
23         {"xgmac_tx_pkts_1519tomax", MAC_STATS_FIELD_OFF(tx_1519tomax)},
24         {"xgmac_tx_good_pkts_1519tomax",
25                 MAC_STATS_FIELD_OFF(tx_1519tomax_good)},
26         {"xgmac_tx_good_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_oversize)},
27         {"xgmac_tx_bad_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_jabber_err)},
28         {"xgmac_tx_good_pkts_all", MAC_STATS_FIELD_OFF(tx_good_pkts)},
29         {"xgmac_tx_good_byte_all", MAC_STATS_FIELD_OFF(tx_good_bytes)},
30         {"xgmac_tx_total_pkt", MAC_STATS_FIELD_OFF(tx_total_pkts)},
31         {"xgmac_tx_total_byt", MAC_STATS_FIELD_OFF(tx_total_bytes)},
32         {"xgmac_tx_uc_pkt", MAC_STATS_FIELD_OFF(tx_uc_pkts)},
33         {"xgmac_tx_mc_pkt", MAC_STATS_FIELD_OFF(tx_mc_pkts)},
34         {"xgmac_tx_bc_pkt", MAC_STATS_FIELD_OFF(tx_bc_pkts)},
35         {"xgmac_tx_pause_frame_num", MAC_STATS_FIELD_OFF(tx_pfc_tc0)},
36         {"xgmac_tx_pfc_per_1pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc1)},
37         {"xgmac_tx_pfc_per_2pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc2)},
38         {"xgmac_tx_pfc_per_3pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc3)},
39         {"xgmac_tx_pfc_per_4pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc4)},
40         {"xgmac_tx_pfc_per_5pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc5)},
41         {"xgmac_tx_pfc_per_6pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc6)},
42         {"xgmac_tx_pfc_per_7pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc7)},
43         {"xgmac_tx_mac_ctrol_frame", MAC_STATS_FIELD_OFF(tx_ctrl)},
44         {"xgmac_tx_1731_pkts", MAC_STATS_FIELD_OFF(tx_1731_pkts)},
45         {"xgmac_tx_1588_pkts", MAC_STATS_FIELD_OFF(tx_1588_pkts)},
46         {"xgmac_rx_good_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_good_from_sw)},
47         {"xgmac_rx_bad_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_bad_from_sw)},
48         {"xgmac_tx_bad_pkt_64tomax", MAC_STATS_FIELD_OFF(tx_bad_pkts)},
49
50         {"xgmac_rx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(rx_fragment_err)},
51         {"xgmac_rx_good_pkts_minto64", MAC_STATS_FIELD_OFF(rx_undersize)},
52         {"xgmac_rx_total_pkts_minto64", MAC_STATS_FIELD_OFF(rx_under_min)},
53         {"xgmac_rx_pkt_64", MAC_STATS_FIELD_OFF(rx_64bytes)},
54         {"xgmac_rx_pkt_65to127", MAC_STATS_FIELD_OFF(rx_65to127)},
55         {"xgmac_rx_pkt_128to255", MAC_STATS_FIELD_OFF(rx_128to255)},
56         {"xgmac_rx_pkt_256to511", MAC_STATS_FIELD_OFF(rx_256to511)},
57         {"xgmac_rx_pkt_512to1023", MAC_STATS_FIELD_OFF(rx_512to1023)},
58         {"xgmac_rx_pkt_1024to1518", MAC_STATS_FIELD_OFF(rx_1024to1518)},
59         {"xgmac_rx_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax)},
60         {"xgmac_rx_good_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax_good)},
61         {"xgmac_rx_good_pkt_untramax", MAC_STATS_FIELD_OFF(rx_oversize)},
62         {"xgmac_rx_bad_pkt_untramax", MAC_STATS_FIELD_OFF(rx_jabber_err)},
63         {"xgmac_rx_good_pkt", MAC_STATS_FIELD_OFF(rx_good_pkts)},
64         {"xgmac_rx_good_byt", MAC_STATS_FIELD_OFF(rx_good_bytes)},
65         {"xgmac_rx_pkt", MAC_STATS_FIELD_OFF(rx_total_pkts)},
66         {"xgmac_rx_byt", MAC_STATS_FIELD_OFF(rx_total_bytes)},
67         {"xgmac_rx_uc_pkt", MAC_STATS_FIELD_OFF(rx_uc_pkts)},
68         {"xgmac_rx_mc_pkt", MAC_STATS_FIELD_OFF(rx_mc_pkts)},
69         {"xgmac_rx_bc_pkt", MAC_STATS_FIELD_OFF(rx_bc_pkts)},
70         {"xgmac_rx_pause_frame_num", MAC_STATS_FIELD_OFF(rx_pfc_tc0)},
71         {"xgmac_rx_pfc_per_1pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc1)},
72         {"xgmac_rx_pfc_per_2pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc2)},
73         {"xgmac_rx_pfc_per_3pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc3)},
74         {"xgmac_rx_pfc_per_4pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc4)},
75         {"xgmac_rx_pfc_per_5pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc5)},
76         {"xgmac_rx_pfc_per_6pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc6)},
77         {"xgmac_rx_pfc_per_7pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc7)},
78         {"xgmac_rx_mac_control", MAC_STATS_FIELD_OFF(rx_unknown_ctrl)},
79         {"xgmac_tx_good_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_good_to_sw)},
80         {"xgmac_tx_bad_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_bad_to_sw)},
81         {"xgmac_rx_1731_pkt", MAC_STATS_FIELD_OFF(rx_1731_pkts)},
82         {"xgmac_rx_symbol_err_pkt", MAC_STATS_FIELD_OFF(rx_symbol_err)},
83         {"xgmac_rx_fcs_pkt", MAC_STATS_FIELD_OFF(rx_fcs_err)}
84 };
85
86 /**
87  *hns_xgmac_tx_enable - xgmac port tx enable
88  *@drv: mac driver
89  *@value: value of enable
90  */
91 static void hns_xgmac_tx_enable(struct mac_driver *drv, u32 value)
92 {
93         dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_TX_B, !!value);
94 }
95
96 /**
97  *hns_xgmac_rx_enable - xgmac port rx enable
98  *@drv: mac driver
99  *@value: value of enable
100  */
101 static void hns_xgmac_rx_enable(struct mac_driver *drv, u32 value)
102 {
103         dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_RX_B, !!value);
104 }
105
106 /**
107  * hns_xgmac_tx_lf_rf_insert - insert lf rf control about xgmac
108  * @mac_drv: mac driver
109  * @mode: inserf rf or lf
110  */
111 static void hns_xgmac_lf_rf_insert(struct mac_driver *mac_drv, u32 mode)
112 {
113         dsaf_set_dev_field(mac_drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG,
114                            XGMAC_LF_RF_INSERT_M, XGMAC_LF_RF_INSERT_S, mode);
115 }
116
117 /**
118  * hns_xgmac__lf_rf_control_init - initial the lf rf control register
119  * @mac_drv: mac driver
120  */
121 static void hns_xgmac_lf_rf_control_init(struct mac_driver *mac_drv)
122 {
123         u32 val = 0;
124
125         dsaf_set_bit(val, XGMAC_UNIDIR_EN_B, 0);
126         dsaf_set_bit(val, XGMAC_RF_TX_EN_B, 1);
127         dsaf_set_field(val, XGMAC_LF_RF_INSERT_M, XGMAC_LF_RF_INSERT_S, 0);
128         dsaf_write_dev(mac_drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG, val);
129 }
130
131 /**
132  *hns_xgmac_enable - enable xgmac port
133  *@drv: mac driver
134  *@mode: mode of mac port
135  */
136 static void hns_xgmac_enable(void *mac_drv, enum mac_commom_mode mode)
137 {
138         struct mac_driver *drv = (struct mac_driver *)mac_drv;
139
140         hns_xgmac_lf_rf_insert(drv, HNS_XGMAC_NO_LF_RF_INSERT);
141
142         /*enable XGE rX/tX */
143         if (mode == MAC_COMM_MODE_TX) {
144                 hns_xgmac_tx_enable(drv, 1);
145         } else if (mode == MAC_COMM_MODE_RX) {
146                 hns_xgmac_rx_enable(drv, 1);
147         } else if (mode == MAC_COMM_MODE_RX_AND_TX) {
148                 hns_xgmac_tx_enable(drv, 1);
149                 hns_xgmac_rx_enable(drv, 1);
150         } else {
151                 dev_err(drv->dev, "error mac mode:%d\n", mode);
152         }
153 }
154
155 /**
156  *hns_xgmac_disable - disable xgmac port
157  *@mac_drv: mac driver
158  *@mode: mode of mac port
159  */
160 static void hns_xgmac_disable(void *mac_drv, enum mac_commom_mode mode)
161 {
162         struct mac_driver *drv = (struct mac_driver *)mac_drv;
163
164         if (mode == MAC_COMM_MODE_TX) {
165                 hns_xgmac_tx_enable(drv, 0);
166         } else if (mode == MAC_COMM_MODE_RX) {
167                 hns_xgmac_rx_enable(drv, 0);
168         } else if (mode == MAC_COMM_MODE_RX_AND_TX) {
169                 hns_xgmac_tx_enable(drv, 0);
170                 hns_xgmac_rx_enable(drv, 0);
171         }
172         hns_xgmac_lf_rf_insert(drv, HNS_XGMAC_LF_INSERT);
173 }
174
175 /**
176  *hns_xgmac_pma_fec_enable - xgmac PMA FEC enable
177  *@drv: mac driver
178  *@tx_value: tx value
179  *@rx_value: rx value
180  *return status
181  */
182 static void hns_xgmac_pma_fec_enable(struct mac_driver *drv, u32 tx_value,
183                                      u32 rx_value)
184 {
185         u32 origin = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG);
186
187         dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_TX_B, !!tx_value);
188         dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_RX_B, !!rx_value);
189         dsaf_write_dev(drv, XGMAC_PMA_FEC_CONTROL_REG, origin);
190 }
191
192 /* clr exc irq for xge*/
193 static void hns_xgmac_exc_irq_en(struct mac_driver *drv, u32 en)
194 {
195         u32 clr_vlue = 0xfffffffful;
196         u32 msk_vlue = en ? 0xfffffffful : 0; /*1 is en, 0 is dis*/
197
198         dsaf_write_dev(drv, XGMAC_INT_STATUS_REG, clr_vlue);
199         dsaf_write_dev(drv, XGMAC_INT_ENABLE_REG, msk_vlue);
200 }
201
202 /**
203  *hns_xgmac_init - initialize XGE
204  *@mac_drv: mac driver
205  */
206 static void hns_xgmac_init(void *mac_drv)
207 {
208         struct mac_driver *drv = (struct mac_driver *)mac_drv;
209         struct dsaf_device *dsaf_dev
210                 = (struct dsaf_device *)dev_get_drvdata(drv->dev);
211         u32 port = drv->mac_id;
212
213         dsaf_dev->misc_op->xge_srst(dsaf_dev, port, 0);
214         msleep(100);
215         dsaf_dev->misc_op->xge_srst(dsaf_dev, port, 1);
216
217         msleep(100);
218         hns_xgmac_lf_rf_control_init(drv);
219         hns_xgmac_exc_irq_en(drv, 0);
220
221         hns_xgmac_pma_fec_enable(drv, 0x0, 0x0);
222
223         hns_xgmac_disable(mac_drv, MAC_COMM_MODE_RX_AND_TX);
224 }
225
226 /**
227  *hns_xgmac_config_pad_and_crc - set xgmac pad and crc enable the same time
228  *@mac_drv: mac driver
229  *@newval:enable of pad and crc
230  */
231 static void hns_xgmac_config_pad_and_crc(void *mac_drv, u8 newval)
232 {
233         struct mac_driver *drv = (struct mac_driver *)mac_drv;
234         u32 origin = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
235
236         dsaf_set_bit(origin, XGMAC_CTL_TX_PAD_B, !!newval);
237         dsaf_set_bit(origin, XGMAC_CTL_TX_FCS_B, !!newval);
238         dsaf_set_bit(origin, XGMAC_CTL_RX_FCS_B, !!newval);
239         dsaf_write_dev(drv, XGMAC_MAC_CONTROL_REG, origin);
240 }
241
242 /**
243  *hns_xgmac_pausefrm_cfg - set pause param about xgmac
244  *@mac_drv: mac driver
245  *@newval:enable of pad and crc
246  */
247 static void hns_xgmac_pausefrm_cfg(void *mac_drv, u32 rx_en, u32 tx_en)
248 {
249         struct mac_driver *drv = (struct mac_driver *)mac_drv;
250         u32 origin = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
251
252         dsaf_set_bit(origin, XGMAC_PAUSE_CTL_TX_B, !!tx_en);
253         dsaf_set_bit(origin, XGMAC_PAUSE_CTL_RX_B, !!rx_en);
254         dsaf_write_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG, origin);
255 }
256
257 static void hns_xgmac_set_pausefrm_mac_addr(void *mac_drv, char *mac_addr)
258 {
259         struct mac_driver *drv = (struct mac_driver *)mac_drv;
260
261         u32 high_val = mac_addr[1] | (mac_addr[0] << 8);
262         u32 low_val = mac_addr[5] | (mac_addr[4] << 8)
263                 | (mac_addr[3] << 16) | (mac_addr[2] << 24);
264         dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG, low_val);
265         dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG, high_val);
266 }
267
268 /**
269  *hns_xgmac_set_rx_ignore_pause_frames - set rx pause param about xgmac
270  *@mac_drv: mac driver
271  *@enable:enable rx pause param
272  */
273 static void hns_xgmac_set_rx_ignore_pause_frames(void *mac_drv, u32 enable)
274 {
275         struct mac_driver *drv = (struct mac_driver *)mac_drv;
276
277         dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG,
278                          XGMAC_PAUSE_CTL_RX_B, !!enable);
279 }
280
281 /**
282  *hns_xgmac_set_tx_auto_pause_frames - set tx pause param about xgmac
283  *@mac_drv: mac driver
284  *@enable:enable tx pause param
285  */
286 static void hns_xgmac_set_tx_auto_pause_frames(void *mac_drv, u16 enable)
287 {
288         struct mac_driver *drv = (struct mac_driver *)mac_drv;
289
290         dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG,
291                          XGMAC_PAUSE_CTL_TX_B, !!enable);
292
293         /*if enable is not zero ,set tx pause time */
294         if (enable)
295                 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_TIME_REG, enable);
296 }
297
298 /**
299  *hns_xgmac_config_max_frame_length - set xgmac max frame length
300  *@mac_drv: mac driver
301  *@newval:xgmac max frame length
302  */
303 static void hns_xgmac_config_max_frame_length(void *mac_drv, u16 newval)
304 {
305         struct mac_driver *drv = (struct mac_driver *)mac_drv;
306
307         dsaf_write_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG, newval);
308 }
309
310 static void hns_xgmac_update_stats(void *mac_drv)
311 {
312         struct mac_driver *drv = (struct mac_driver *)mac_drv;
313         struct mac_hw_stats *hw_stats = &drv->mac_cb->hw_stats;
314
315         /* TX */
316         hw_stats->tx_fragment_err
317                 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_FRAGMENT);
318         hw_stats->tx_undersize
319                 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERSIZE);
320         hw_stats->tx_under_min_pkts
321                 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERMIN);
322         hw_stats->tx_64bytes = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_64OCTETS);
323         hw_stats->tx_65to127
324                 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_65TO127OCTETS);
325         hw_stats->tx_128to255
326                 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_128TO255OCTETS);
327         hw_stats->tx_256to511
328                 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_256TO511OCTETS);
329         hw_stats->tx_512to1023
330                 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_512TO1023OCTETS);
331         hw_stats->tx_1024to1518
332                 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1024TO1518OCTETS);
333         hw_stats->tx_1519tomax
334                 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETS);
335         hw_stats->tx_1519tomax_good
336                 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETSOK);
337         hw_stats->tx_oversize = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_OVERSIZE);
338         hw_stats->tx_jabber_err = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_JABBER);
339         hw_stats->tx_good_pkts = hns_mac_reg_read64(drv, XGMAC_TX_GOODPKTS);
340         hw_stats->tx_good_bytes = hns_mac_reg_read64(drv, XGMAC_TX_GOODOCTETS);
341         hw_stats->tx_total_pkts = hns_mac_reg_read64(drv, XGMAC_TX_TOTAL_PKTS);
342         hw_stats->tx_total_bytes
343                 = hns_mac_reg_read64(drv, XGMAC_TX_TOTALOCTETS);
344         hw_stats->tx_uc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_UNICASTPKTS);
345         hw_stats->tx_mc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_MULTICASTPKTS);
346         hw_stats->tx_bc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_BROADCASTPKTS);
347         hw_stats->tx_pfc_tc0 = hns_mac_reg_read64(drv, XGMAC_TX_PRI0PAUSEPKTS);
348         hw_stats->tx_pfc_tc1 = hns_mac_reg_read64(drv, XGMAC_TX_PRI1PAUSEPKTS);
349         hw_stats->tx_pfc_tc2 = hns_mac_reg_read64(drv, XGMAC_TX_PRI2PAUSEPKTS);
350         hw_stats->tx_pfc_tc3 = hns_mac_reg_read64(drv, XGMAC_TX_PRI3PAUSEPKTS);
351         hw_stats->tx_pfc_tc4 = hns_mac_reg_read64(drv, XGMAC_TX_PRI4PAUSEPKTS);
352         hw_stats->tx_pfc_tc5 = hns_mac_reg_read64(drv, XGMAC_TX_PRI5PAUSEPKTS);
353         hw_stats->tx_pfc_tc6 = hns_mac_reg_read64(drv, XGMAC_TX_PRI6PAUSEPKTS);
354         hw_stats->tx_pfc_tc7 = hns_mac_reg_read64(drv, XGMAC_TX_PRI7PAUSEPKTS);
355         hw_stats->tx_ctrl = hns_mac_reg_read64(drv, XGMAC_TX_MACCTRLPKTS);
356         hw_stats->tx_1731_pkts = hns_mac_reg_read64(drv, XGMAC_TX_1731PKTS);
357         hw_stats->tx_1588_pkts = hns_mac_reg_read64(drv, XGMAC_TX_1588PKTS);
358         hw_stats->rx_good_from_sw
359                 = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPGOODPKTS);
360         hw_stats->rx_bad_from_sw
361                 = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPBADPKTS);
362         hw_stats->tx_bad_pkts = hns_mac_reg_read64(drv, XGMAC_TX_ERRALLPKTS);
363
364         /* RX */
365         hw_stats->rx_fragment_err
366                 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_FRAGMENT);
367         hw_stats->rx_undersize
368                 = hns_mac_reg_read64(drv, XGMAC_RX_PKTSUNDERSIZE);
369         hw_stats->rx_under_min
370                 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_UNDERMIN);
371         hw_stats->rx_64bytes = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_64OCTETS);
372         hw_stats->rx_65to127
373                 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_65TO127OCTETS);
374         hw_stats->rx_128to255
375                 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_128TO255OCTETS);
376         hw_stats->rx_256to511
377                 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_256TO511OCTETS);
378         hw_stats->rx_512to1023
379                 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_512TO1023OCTETS);
380         hw_stats->rx_1024to1518
381                 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1024TO1518OCTETS);
382         hw_stats->rx_1519tomax
383                 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETS);
384         hw_stats->rx_1519tomax_good
385                 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETSOK);
386         hw_stats->rx_oversize = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_OVERSIZE);
387         hw_stats->rx_jabber_err = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_JABBER);
388         hw_stats->rx_good_pkts = hns_mac_reg_read64(drv, XGMAC_RX_GOODPKTS);
389         hw_stats->rx_good_bytes = hns_mac_reg_read64(drv, XGMAC_RX_GOODOCTETS);
390         hw_stats->rx_total_pkts = hns_mac_reg_read64(drv, XGMAC_RX_TOTAL_PKTS);
391         hw_stats->rx_total_bytes
392                 = hns_mac_reg_read64(drv, XGMAC_RX_TOTALOCTETS);
393         hw_stats->rx_uc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_UNICASTPKTS);
394         hw_stats->rx_mc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_MULTICASTPKTS);
395         hw_stats->rx_bc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_BROADCASTPKTS);
396         hw_stats->rx_pfc_tc0 = hns_mac_reg_read64(drv, XGMAC_RX_PRI0PAUSEPKTS);
397         hw_stats->rx_pfc_tc1 = hns_mac_reg_read64(drv, XGMAC_RX_PRI1PAUSEPKTS);
398         hw_stats->rx_pfc_tc2 = hns_mac_reg_read64(drv, XGMAC_RX_PRI2PAUSEPKTS);
399         hw_stats->rx_pfc_tc3 = hns_mac_reg_read64(drv, XGMAC_RX_PRI3PAUSEPKTS);
400         hw_stats->rx_pfc_tc4 = hns_mac_reg_read64(drv, XGMAC_RX_PRI4PAUSEPKTS);
401         hw_stats->rx_pfc_tc5 = hns_mac_reg_read64(drv, XGMAC_RX_PRI5PAUSEPKTS);
402         hw_stats->rx_pfc_tc6 = hns_mac_reg_read64(drv, XGMAC_RX_PRI6PAUSEPKTS);
403         hw_stats->rx_pfc_tc7 = hns_mac_reg_read64(drv, XGMAC_RX_PRI7PAUSEPKTS);
404
405         hw_stats->rx_unknown_ctrl
406                 = hns_mac_reg_read64(drv, XGMAC_RX_MACCTRLPKTS);
407         hw_stats->tx_good_to_sw
408                 = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPGOODPKTS);
409         hw_stats->tx_bad_to_sw
410                 = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPBADPKTS);
411         hw_stats->rx_1731_pkts = hns_mac_reg_read64(drv, XGMAC_RX_1731PKTS);
412         hw_stats->rx_symbol_err
413                 = hns_mac_reg_read64(drv, XGMAC_RX_SYMBOLERRPKTS);
414         hw_stats->rx_fcs_err = hns_mac_reg_read64(drv, XGMAC_RX_FCSERRPKTS);
415 }
416
417 /**
418  *hns_xgmac_free - free xgmac driver
419  *@mac_drv: mac driver
420  */
421 static void hns_xgmac_free(void *mac_drv)
422 {
423         struct mac_driver *drv = (struct mac_driver *)mac_drv;
424         struct dsaf_device *dsaf_dev
425                 = (struct dsaf_device *)dev_get_drvdata(drv->dev);
426
427         u32 mac_id = drv->mac_id;
428
429         dsaf_dev->misc_op->xge_srst(dsaf_dev, mac_id, 0);
430 }
431
432 /**
433  *hns_xgmac_get_info - get xgmac information
434  *@mac_drv: mac driver
435  *@mac_info:mac information
436  */
437 static void hns_xgmac_get_info(void *mac_drv, struct mac_info *mac_info)
438 {
439         struct mac_driver *drv = (struct mac_driver *)mac_drv;
440         u32 pause_time, pause_ctrl, port_mode, ctrl_val;
441
442         ctrl_val = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
443         mac_info->pad_and_crc_en = dsaf_get_bit(ctrl_val, XGMAC_CTL_TX_PAD_B);
444         mac_info->auto_neg = 0;
445
446         pause_time = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG);
447         mac_info->tx_pause_time = pause_time;
448
449         port_mode = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG);
450         mac_info->port_en = dsaf_get_field(port_mode, XGMAC_PORT_MODE_TX_M,
451                                            XGMAC_PORT_MODE_TX_S) &&
452                                 dsaf_get_field(port_mode, XGMAC_PORT_MODE_RX_M,
453                                                XGMAC_PORT_MODE_RX_S);
454         mac_info->duplex = 1;
455         mac_info->speed = MAC_SPEED_10000;
456
457         pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
458         mac_info->rx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B);
459         mac_info->tx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B);
460 }
461
462 /**
463  *hns_xgmac_get_pausefrm_cfg - get xgmac pause param
464  *@mac_drv: mac driver
465  *@rx_en:xgmac rx pause enable
466  *@tx_en:xgmac tx pause enable
467  */
468 static void hns_xgmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_en, u32 *tx_en)
469 {
470         struct mac_driver *drv = (struct mac_driver *)mac_drv;
471         u32 pause_ctrl;
472
473         pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
474         *rx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B);
475         *tx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B);
476 }
477
478 /**
479  *hns_xgmac_get_link_status - get xgmac link status
480  *@mac_drv: mac driver
481  *@link_stat: xgmac link stat
482  */
483 static void hns_xgmac_get_link_status(void *mac_drv, u32 *link_stat)
484 {
485         struct mac_driver *drv = (struct mac_driver *)mac_drv;
486
487         *link_stat = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG);
488 }
489
490 /**
491  *hns_xgmac_get_regs - dump xgmac regs
492  *@mac_drv: mac driver
493  *@cmd:ethtool cmd
494  *@data:data for value of regs
495  */
496 static void hns_xgmac_get_regs(void *mac_drv, void *data)
497 {
498         u32 i = 0;
499         struct mac_driver *drv = (struct mac_driver *)mac_drv;
500         u32 *regs = data;
501         u64 qtmp;
502
503         /* base config registers */
504         regs[0] = dsaf_read_dev(drv, XGMAC_INT_STATUS_REG);
505         regs[1] = dsaf_read_dev(drv, XGMAC_INT_ENABLE_REG);
506         regs[2] = dsaf_read_dev(drv, XGMAC_INT_SET_REG);
507         regs[3] = dsaf_read_dev(drv, XGMAC_IERR_U_INFO_REG);
508         regs[4] = dsaf_read_dev(drv, XGMAC_OVF_INFO_REG);
509         regs[5] = dsaf_read_dev(drv, XGMAC_OVF_CNT_REG);
510         regs[6] = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG);
511         regs[7] = dsaf_read_dev(drv, XGMAC_CLK_ENABLE_REG);
512         regs[8] = dsaf_read_dev(drv, XGMAC_RESET_REG);
513         regs[9] = dsaf_read_dev(drv, XGMAC_LINK_CONTROL_REG);
514         regs[10] = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG);
515
516         regs[11] = dsaf_read_dev(drv, XGMAC_SPARE_REG);
517         regs[12] = dsaf_read_dev(drv, XGMAC_SPARE_CNT_REG);
518         regs[13] = dsaf_read_dev(drv, XGMAC_MAC_ENABLE_REG);
519         regs[14] = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
520         regs[15] = dsaf_read_dev(drv, XGMAC_MAC_IPG_REG);
521         regs[16] = dsaf_read_dev(drv, XGMAC_MAC_MSG_CRC_EN_REG);
522         regs[17] = dsaf_read_dev(drv, XGMAC_MAC_MSG_IMG_REG);
523         regs[18] = dsaf_read_dev(drv, XGMAC_MAC_MSG_FC_CFG_REG);
524         regs[19] = dsaf_read_dev(drv, XGMAC_MAC_MSG_TC_CFG_REG);
525         regs[20] = dsaf_read_dev(drv, XGMAC_MAC_PAD_SIZE_REG);
526         regs[21] = dsaf_read_dev(drv, XGMAC_MAC_MIN_PKT_SIZE_REG);
527         regs[22] = dsaf_read_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG);
528         regs[23] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
529         regs[24] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG);
530         regs[25] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_GAP_REG);
531         regs[26] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG);
532         regs[27] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG);
533         regs[28] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_PEER_MAC_H_REG);
534         regs[29] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_PEER_MAC_L_REG);
535         regs[30] = dsaf_read_dev(drv, XGMAC_MAC_PFC_PRI_EN_REG);
536         regs[31] = dsaf_read_dev(drv, XGMAC_MAC_1588_CTRL_REG);
537         regs[32] = dsaf_read_dev(drv, XGMAC_MAC_1588_TX_PORT_DLY_REG);
538         regs[33] = dsaf_read_dev(drv, XGMAC_MAC_1588_RX_PORT_DLY_REG);
539         regs[34] = dsaf_read_dev(drv, XGMAC_MAC_1588_ASYM_DLY_REG);
540         regs[35] = dsaf_read_dev(drv, XGMAC_MAC_1588_ADJUST_CFG_REG);
541
542         regs[36] = dsaf_read_dev(drv, XGMAC_MAC_Y1731_ETH_TYPE_REG);
543         regs[37] = dsaf_read_dev(drv, XGMAC_MAC_MIB_CONTROL_REG);
544         regs[38] = dsaf_read_dev(drv, XGMAC_MAC_WAN_RATE_ADJUST_REG);
545         regs[39] = dsaf_read_dev(drv, XGMAC_MAC_TX_ERR_MARK_REG);
546         regs[40] = dsaf_read_dev(drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG);
547         regs[41] = dsaf_read_dev(drv, XGMAC_MAC_RX_LF_RF_STATUS_REG);
548         regs[42] = dsaf_read_dev(drv, XGMAC_MAC_TX_RUNT_PKT_CNT_REG);
549         regs[43] = dsaf_read_dev(drv, XGMAC_MAC_RX_RUNT_PKT_CNT_REG);
550         regs[44] = dsaf_read_dev(drv, XGMAC_MAC_RX_PREAM_ERR_PKT_CNT_REG);
551         regs[45] = dsaf_read_dev(drv, XGMAC_MAC_TX_LF_RF_TERM_PKT_CNT_REG);
552         regs[46] = dsaf_read_dev(drv, XGMAC_MAC_TX_SN_MISMATCH_PKT_CNT_REG);
553         regs[47] = dsaf_read_dev(drv, XGMAC_MAC_RX_ERR_MSG_CNT_REG);
554         regs[48] = dsaf_read_dev(drv, XGMAC_MAC_RX_ERR_EFD_CNT_REG);
555         regs[49] = dsaf_read_dev(drv, XGMAC_MAC_ERR_INFO_REG);
556         regs[50] = dsaf_read_dev(drv, XGMAC_MAC_DBG_INFO_REG);
557
558         regs[51] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SYNC_THD_REG);
559         regs[52] = dsaf_read_dev(drv, XGMAC_PCS_STATUS1_REG);
560         regs[53] = dsaf_read_dev(drv, XGMAC_PCS_BASER_STATUS1_REG);
561         regs[54] = dsaf_read_dev(drv, XGMAC_PCS_BASER_STATUS2_REG);
562         regs[55] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDA_0_REG);
563         regs[56] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDA_1_REG);
564         regs[57] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDB_0_REG);
565         regs[58] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDB_1_REG);
566         regs[59] = dsaf_read_dev(drv, XGMAC_PCS_BASER_TEST_CONTROL_REG);
567         regs[60] = dsaf_read_dev(drv, XGMAC_PCS_BASER_TEST_ERR_CNT_REG);
568         regs[61] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO_REG);
569         regs[62] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO1_REG);
570         regs[63] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO2_REG);
571         regs[64] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO3_REG);
572
573         regs[65] = dsaf_read_dev(drv, XGMAC_PMA_ENABLE_REG);
574         regs[66] = dsaf_read_dev(drv, XGMAC_PMA_CONTROL_REG);
575         regs[67] = dsaf_read_dev(drv, XGMAC_PMA_SIGNAL_STATUS_REG);
576         regs[68] = dsaf_read_dev(drv, XGMAC_PMA_DBG_INFO_REG);
577         regs[69] = dsaf_read_dev(drv, XGMAC_PMA_FEC_ABILITY_REG);
578         regs[70] = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG);
579         regs[71] = dsaf_read_dev(drv, XGMAC_PMA_FEC_CORR_BLOCK_CNT__REG);
580         regs[72] = dsaf_read_dev(drv, XGMAC_PMA_FEC_UNCORR_BLOCK_CNT__REG);
581
582         /* status registers */
583 #define hns_xgmac_cpy_q(p, q) \
584         do {\
585                 *(p) = (u32)(q);\
586                 *((p) + 1) = (u32)((q) >> 32);\
587         } while (0)
588
589         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_FRAGMENT);
590         hns_xgmac_cpy_q(&regs[73], qtmp);
591         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERSIZE);
592         hns_xgmac_cpy_q(&regs[75], qtmp);
593         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERMIN);
594         hns_xgmac_cpy_q(&regs[77], qtmp);
595         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_64OCTETS);
596         hns_xgmac_cpy_q(&regs[79], qtmp);
597         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_65TO127OCTETS);
598         hns_xgmac_cpy_q(&regs[81], qtmp);
599         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_128TO255OCTETS);
600         hns_xgmac_cpy_q(&regs[83], qtmp);
601         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_256TO511OCTETS);
602         hns_xgmac_cpy_q(&regs[85], qtmp);
603         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_512TO1023OCTETS);
604         hns_xgmac_cpy_q(&regs[87], qtmp);
605         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1024TO1518OCTETS);
606         hns_xgmac_cpy_q(&regs[89], qtmp);
607         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETS);
608         hns_xgmac_cpy_q(&regs[91], qtmp);
609         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETSOK);
610         hns_xgmac_cpy_q(&regs[93], qtmp);
611         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_OVERSIZE);
612         hns_xgmac_cpy_q(&regs[95], qtmp);
613         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_JABBER);
614         hns_xgmac_cpy_q(&regs[97], qtmp);
615         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_GOODPKTS);
616         hns_xgmac_cpy_q(&regs[99], qtmp);
617         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_GOODOCTETS);
618         hns_xgmac_cpy_q(&regs[101], qtmp);
619         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_TOTAL_PKTS);
620         hns_xgmac_cpy_q(&regs[103], qtmp);
621         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_TOTALOCTETS);
622         hns_xgmac_cpy_q(&regs[105], qtmp);
623         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_UNICASTPKTS);
624         hns_xgmac_cpy_q(&regs[107], qtmp);
625         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_MULTICASTPKTS);
626         hns_xgmac_cpy_q(&regs[109], qtmp);
627         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_BROADCASTPKTS);
628         hns_xgmac_cpy_q(&regs[111], qtmp);
629         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI0PAUSEPKTS);
630         hns_xgmac_cpy_q(&regs[113], qtmp);
631         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI1PAUSEPKTS);
632         hns_xgmac_cpy_q(&regs[115], qtmp);
633         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI2PAUSEPKTS);
634         hns_xgmac_cpy_q(&regs[117], qtmp);
635         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI3PAUSEPKTS);
636         hns_xgmac_cpy_q(&regs[119], qtmp);
637         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI4PAUSEPKTS);
638         hns_xgmac_cpy_q(&regs[121], qtmp);
639         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI5PAUSEPKTS);
640         hns_xgmac_cpy_q(&regs[123], qtmp);
641         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI6PAUSEPKTS);
642         hns_xgmac_cpy_q(&regs[125], qtmp);
643         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI7PAUSEPKTS);
644         hns_xgmac_cpy_q(&regs[127], qtmp);
645         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_MACCTRLPKTS);
646         hns_xgmac_cpy_q(&regs[129], qtmp);
647         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_1731PKTS);
648         hns_xgmac_cpy_q(&regs[131], qtmp);
649         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_1588PKTS);
650         hns_xgmac_cpy_q(&regs[133], qtmp);
651         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPGOODPKTS);
652         hns_xgmac_cpy_q(&regs[135], qtmp);
653         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPBADPKTS);
654         hns_xgmac_cpy_q(&regs[137], qtmp);
655         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_ERRALLPKTS);
656         hns_xgmac_cpy_q(&regs[139], qtmp);
657
658         /* RX */
659         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_FRAGMENT);
660         hns_xgmac_cpy_q(&regs[141], qtmp);
661         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTSUNDERSIZE);
662         hns_xgmac_cpy_q(&regs[143], qtmp);
663         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_UNDERMIN);
664         hns_xgmac_cpy_q(&regs[145], qtmp);
665         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_64OCTETS);
666         hns_xgmac_cpy_q(&regs[147], qtmp);
667         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_65TO127OCTETS);
668         hns_xgmac_cpy_q(&regs[149], qtmp);
669         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_128TO255OCTETS);
670         hns_xgmac_cpy_q(&regs[151], qtmp);
671         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_256TO511OCTETS);
672         hns_xgmac_cpy_q(&regs[153], qtmp);
673         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_512TO1023OCTETS);
674         hns_xgmac_cpy_q(&regs[155], qtmp);
675         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1024TO1518OCTETS);
676         hns_xgmac_cpy_q(&regs[157], qtmp);
677         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETS);
678         hns_xgmac_cpy_q(&regs[159], qtmp);
679         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETSOK);
680         hns_xgmac_cpy_q(&regs[161], qtmp);
681         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_OVERSIZE);
682         hns_xgmac_cpy_q(&regs[163], qtmp);
683         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_JABBER);
684         hns_xgmac_cpy_q(&regs[165], qtmp);
685         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_GOODPKTS);
686         hns_xgmac_cpy_q(&regs[167], qtmp);
687         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_GOODOCTETS);
688         hns_xgmac_cpy_q(&regs[169], qtmp);
689         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_TOTAL_PKTS);
690         hns_xgmac_cpy_q(&regs[171], qtmp);
691         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_TOTALOCTETS);
692         hns_xgmac_cpy_q(&regs[173], qtmp);
693         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_UNICASTPKTS);
694         hns_xgmac_cpy_q(&regs[175], qtmp);
695         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_MULTICASTPKTS);
696         hns_xgmac_cpy_q(&regs[177], qtmp);
697         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_BROADCASTPKTS);
698         hns_xgmac_cpy_q(&regs[179], qtmp);
699         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI0PAUSEPKTS);
700         hns_xgmac_cpy_q(&regs[181], qtmp);
701         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI1PAUSEPKTS);
702         hns_xgmac_cpy_q(&regs[183], qtmp);
703         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI2PAUSEPKTS);
704         hns_xgmac_cpy_q(&regs[185], qtmp);
705         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI3PAUSEPKTS);
706         hns_xgmac_cpy_q(&regs[187], qtmp);
707         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI4PAUSEPKTS);
708         hns_xgmac_cpy_q(&regs[189], qtmp);
709         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI5PAUSEPKTS);
710         hns_xgmac_cpy_q(&regs[191], qtmp);
711         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI6PAUSEPKTS);
712         hns_xgmac_cpy_q(&regs[193], qtmp);
713         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI7PAUSEPKTS);
714         hns_xgmac_cpy_q(&regs[195], qtmp);
715
716         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_MACCTRLPKTS);
717         hns_xgmac_cpy_q(&regs[197], qtmp);
718         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPGOODPKTS);
719         hns_xgmac_cpy_q(&regs[199], qtmp);
720         qtmp = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPBADPKTS);
721         hns_xgmac_cpy_q(&regs[201], qtmp);
722         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_1731PKTS);
723         hns_xgmac_cpy_q(&regs[203], qtmp);
724         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_SYMBOLERRPKTS);
725         hns_xgmac_cpy_q(&regs[205], qtmp);
726         qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FCSERRPKTS);
727         hns_xgmac_cpy_q(&regs[207], qtmp);
728
729         /* mark end of mac regs */
730         for (i = 208; i < 214; i++)
731                 regs[i] = 0xaaaaaaaa;
732 }
733
734 /**
735  *hns_xgmac_get_stats - get xgmac statistic
736  *@mac_drv: mac driver
737  *@data:data for value of stats regs
738  */
739 static void hns_xgmac_get_stats(void *mac_drv, u64 *data)
740 {
741         u32 i;
742         u64 *buf = data;
743         struct mac_driver *drv = (struct mac_driver *)mac_drv;
744         struct mac_hw_stats *hw_stats = NULL;
745
746         hw_stats = &drv->mac_cb->hw_stats;
747
748         for (i = 0; i < ARRAY_SIZE(g_xgmac_stats_string); i++) {
749                 buf[i] = DSAF_STATS_READ(hw_stats,
750                         g_xgmac_stats_string[i].offset);
751         }
752 }
753
754 /**
755  *hns_xgmac_get_strings - get xgmac strings name
756  *@stringset: type of values in data
757  *@data:data for value of string name
758  */
759 static void hns_xgmac_get_strings(u32 stringset, u8 *data)
760 {
761         char *buff = (char *)data;
762         u32 i;
763
764         if (stringset != ETH_SS_STATS)
765                 return;
766
767         for (i = 0; i < ARRAY_SIZE(g_xgmac_stats_string); i++) {
768                 snprintf(buff, ETH_GSTRING_LEN, g_xgmac_stats_string[i].desc);
769                 buff = buff + ETH_GSTRING_LEN;
770         }
771 }
772
773 /**
774  *hns_xgmac_get_sset_count - get xgmac string set count
775  *@stringset: type of values in data
776  *return xgmac string set count
777  */
778 static int hns_xgmac_get_sset_count(int stringset)
779 {
780         if (stringset == ETH_SS_STATS || stringset == ETH_SS_PRIV_FLAGS)
781                 return ARRAY_SIZE(g_xgmac_stats_string);
782
783         return 0;
784 }
785
786 /**
787  *hns_xgmac_get_regs_count - get xgmac regs count
788  *return xgmac regs count
789  */
790 static int hns_xgmac_get_regs_count(void)
791 {
792         return HNS_XGMAC_DUMP_NUM;
793 }
794
795 void *hns_xgmac_config(struct hns_mac_cb *mac_cb, struct mac_params *mac_param)
796 {
797         struct mac_driver *mac_drv;
798
799         mac_drv = devm_kzalloc(mac_cb->dev, sizeof(*mac_drv), GFP_KERNEL);
800         if (!mac_drv)
801                 return NULL;
802
803         mac_drv->mac_init = hns_xgmac_init;
804         mac_drv->mac_enable = hns_xgmac_enable;
805         mac_drv->mac_disable = hns_xgmac_disable;
806
807         mac_drv->mac_id = mac_param->mac_id;
808         mac_drv->mac_mode = mac_param->mac_mode;
809         mac_drv->io_base = mac_param->vaddr;
810         mac_drv->dev = mac_param->dev;
811         mac_drv->mac_cb = mac_cb;
812
813         mac_drv->set_mac_addr = hns_xgmac_set_pausefrm_mac_addr;
814         mac_drv->set_an_mode = NULL;
815         mac_drv->config_loopback = NULL;
816         mac_drv->config_pad_and_crc = hns_xgmac_config_pad_and_crc;
817         mac_drv->config_half_duplex = NULL;
818         mac_drv->set_rx_ignore_pause_frames =
819                 hns_xgmac_set_rx_ignore_pause_frames;
820         mac_drv->mac_free = hns_xgmac_free;
821         mac_drv->adjust_link = NULL;
822         mac_drv->set_tx_auto_pause_frames = hns_xgmac_set_tx_auto_pause_frames;
823         mac_drv->config_max_frame_length = hns_xgmac_config_max_frame_length;
824         mac_drv->mac_pausefrm_cfg = hns_xgmac_pausefrm_cfg;
825         mac_drv->autoneg_stat = NULL;
826         mac_drv->get_info = hns_xgmac_get_info;
827         mac_drv->get_pause_enable = hns_xgmac_get_pausefrm_cfg;
828         mac_drv->get_link_status = hns_xgmac_get_link_status;
829         mac_drv->get_regs = hns_xgmac_get_regs;
830         mac_drv->get_ethtool_stats = hns_xgmac_get_stats;
831         mac_drv->get_sset_count = hns_xgmac_get_sset_count;
832         mac_drv->get_regs_count = hns_xgmac_get_regs_count;
833         mac_drv->get_strings = hns_xgmac_get_strings;
834         mac_drv->update_stats = hns_xgmac_update_stats;
835
836         return (void *)mac_drv;
837 }