2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
4 * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
38 #include <linux/bitops.h>
39 #include <linux/cache.h>
40 #include <linux/interrupt.h>
41 #include <linux/list.h>
42 #include <linux/netdevice.h>
43 #include <linux/pci.h>
44 #include <linux/spinlock.h>
45 #include <linux/timer.h>
47 #include "cxgb4_uld.h"
50 #define FW_VERSION_MAJOR 1
51 #define FW_VERSION_MINOR 1
52 #define FW_VERSION_MICRO 0
54 #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__)
57 MAX_NPORTS = 4, /* max # of ports */
58 SERNUM_LEN = 24, /* Serial # length */
59 EC_LEN = 16, /* E/C length */
60 ID_LEN = 16, /* ID length */
70 MEMWIN0_APERTURE = 2048,
71 MEMWIN0_BASE = 0x1b800,
72 MEMWIN1_APERTURE = 32768,
73 MEMWIN1_BASE = 0x28000,
74 MEMWIN2_APERTURE = 65536,
75 MEMWIN2_BASE = 0x30000,
93 PAUSE_AUTONEG = 1 << 2
97 u64 tx_octets; /* total # of octets in good frames */
98 u64 tx_frames; /* all good frames */
99 u64 tx_bcast_frames; /* all broadcast frames */
100 u64 tx_mcast_frames; /* all multicast frames */
101 u64 tx_ucast_frames; /* all unicast frames */
102 u64 tx_error_frames; /* all error frames */
104 u64 tx_frames_64; /* # of Tx frames in a particular range */
105 u64 tx_frames_65_127;
106 u64 tx_frames_128_255;
107 u64 tx_frames_256_511;
108 u64 tx_frames_512_1023;
109 u64 tx_frames_1024_1518;
110 u64 tx_frames_1519_max;
112 u64 tx_drop; /* # of dropped Tx frames */
113 u64 tx_pause; /* # of transmitted pause frames */
114 u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */
115 u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */
116 u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */
117 u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */
118 u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */
119 u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */
120 u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */
121 u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */
123 u64 rx_octets; /* total # of octets in good frames */
124 u64 rx_frames; /* all good frames */
125 u64 rx_bcast_frames; /* all broadcast frames */
126 u64 rx_mcast_frames; /* all multicast frames */
127 u64 rx_ucast_frames; /* all unicast frames */
128 u64 rx_too_long; /* # of frames exceeding MTU */
129 u64 rx_jabber; /* # of jabber frames */
130 u64 rx_fcs_err; /* # of received frames with bad FCS */
131 u64 rx_len_err; /* # of received frames with length error */
132 u64 rx_symbol_err; /* symbol errors */
133 u64 rx_runt; /* # of short frames */
135 u64 rx_frames_64; /* # of Rx frames in a particular range */
136 u64 rx_frames_65_127;
137 u64 rx_frames_128_255;
138 u64 rx_frames_256_511;
139 u64 rx_frames_512_1023;
140 u64 rx_frames_1024_1518;
141 u64 rx_frames_1519_max;
143 u64 rx_pause; /* # of received pause frames */
144 u64 rx_ppp0; /* # of received PPP prio 0 frames */
145 u64 rx_ppp1; /* # of received PPP prio 1 frames */
146 u64 rx_ppp2; /* # of received PPP prio 2 frames */
147 u64 rx_ppp3; /* # of received PPP prio 3 frames */
148 u64 rx_ppp4; /* # of received PPP prio 4 frames */
149 u64 rx_ppp5; /* # of received PPP prio 5 frames */
150 u64 rx_ppp6; /* # of received PPP prio 6 frames */
151 u64 rx_ppp7; /* # of received PPP prio 7 frames */
153 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
154 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
155 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */
156 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */
157 u64 rx_trunc0; /* buffer-group 0 truncated packets */
158 u64 rx_trunc1; /* buffer-group 1 truncated packets */
159 u64 rx_trunc2; /* buffer-group 2 truncated packets */
160 u64 rx_trunc3; /* buffer-group 3 truncated packets */
163 struct lb_port_stats {
176 u64 frames_1024_1518;
191 struct tp_tcp_stats {
198 struct tp_err_stats {
203 u32 ofldChanDrops[4];
205 u32 ofldVlanDrops[4];
212 unsigned int ntxchan; /* # of Tx channels */
213 unsigned int tre; /* log2 of core clocks per TP tick */
215 uint32_t dack_re; /* DACK timer resolution */
216 unsigned short tx_modq[NCHAN]; /* channel to modulation queue map */
222 u8 sn[SERNUM_LEN + 1];
231 struct adapter_params {
233 struct vpd_params vpd;
234 struct pci_params pci;
236 unsigned int sf_size; /* serial flash size in bytes */
237 unsigned int sf_nsec; /* # of flash sectors */
238 unsigned int sf_fw_start; /* start of FW image in flash */
240 unsigned int fw_vers;
241 unsigned int tp_vers;
244 unsigned short mtus[NMTUS];
245 unsigned short a_wnd[NCCTRL_WIN];
246 unsigned short b_wnd[NCCTRL_WIN];
248 unsigned char nports; /* # of ethernet ports */
249 unsigned char portvec;
250 unsigned char rev; /* chip revision */
251 unsigned char offload;
253 unsigned int ofldq_wr_cred;
256 struct trace_params {
257 u32 data[TRACE_LEN / 4];
258 u32 mask[TRACE_LEN / 4];
259 unsigned short snap_len;
260 unsigned short min_len;
261 unsigned char skip_ofst;
262 unsigned char skip_len;
263 unsigned char invert;
268 unsigned short supported; /* link capabilities */
269 unsigned short advertising; /* advertised capabilities */
270 unsigned short requested_speed; /* speed user has requested */
271 unsigned short speed; /* actual link speed */
272 unsigned char requested_fc; /* flow control user has requested */
273 unsigned char fc; /* actual link flow control */
274 unsigned char autoneg; /* autonegotiating? */
275 unsigned char link_ok; /* link up? */
278 #define FW_LEN16(fw_struct) FW_CMD_LEN16(sizeof(fw_struct) / 16)
281 MAX_ETH_QSETS = 32, /* # of Ethernet Tx/Rx queue sets */
282 MAX_OFLD_QSETS = 16, /* # of offload Tx/Rx queue sets */
283 MAX_CTRL_QUEUES = NCHAN, /* # of control Tx queues */
284 MAX_RDMA_QUEUES = NCHAN, /* # of streaming RDMA Rx queues */
288 MAX_EGRQ = 128, /* max # of egress queues, including FLs */
289 MAX_INGQ = 64 /* max # of interrupt-capable ingress queues */
296 struct adapter *adapter;
298 s16 xact_addr_filt; /* index of exact MAC address filter */
299 u16 rss_size; /* size of VI's RSS table slice */
305 u8 lport; /* associated offload logical port */
306 u8 nqsets; /* # of qsets */
307 u8 first_qset; /* index of first qset */
309 struct link_config link_cfg;
316 enum { /* adapter flags */
317 FULL_INIT_DONE = (1 << 0),
318 USING_MSI = (1 << 1),
319 USING_MSIX = (1 << 2),
321 RSS_TNLALLLOOKUP = (1 << 5),
322 USING_SOFT_PARAMS = (1 << 6),
323 MASTER_PF = (1 << 7),
324 FW_OFLD_CONN = (1 << 9),
329 struct sge_fl { /* SGE free-buffer queue state */
330 unsigned int avail; /* # of available Rx buffers */
331 unsigned int pend_cred; /* new buffers since last FL DB ring */
332 unsigned int cidx; /* consumer index */
333 unsigned int pidx; /* producer index */
334 unsigned long alloc_failed; /* # of times buffer allocation failed */
335 unsigned long large_alloc_failed;
336 unsigned long starving;
338 unsigned int cntxt_id; /* SGE context id for the free list */
339 unsigned int size; /* capacity of free list */
340 struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */
341 __be64 *desc; /* address of HW Rx descriptor ring */
342 dma_addr_t addr; /* bus address of HW ring start */
345 /* A packet gather list */
347 struct page_frag frags[MAX_SKB_FRAGS];
348 void *va; /* virtual address of first byte */
349 unsigned int nfrags; /* # of fragments */
350 unsigned int tot_len; /* total length of fragments */
353 typedef int (*rspq_handler_t)(struct sge_rspq *q, const __be64 *rsp,
354 const struct pkt_gl *gl);
356 struct sge_rspq { /* state for an SGE response queue */
357 struct napi_struct napi;
358 const __be64 *cur_desc; /* current descriptor in queue */
359 unsigned int cidx; /* consumer index */
360 u8 gen; /* current generation bit */
361 u8 intr_params; /* interrupt holdoff parameters */
362 u8 next_intr_params; /* holdoff params for next interrupt */
363 u8 pktcnt_idx; /* interrupt packet threshold */
364 u8 uld; /* ULD handling this queue */
365 u8 idx; /* queue index within its group */
366 int offset; /* offset into current Rx buffer */
367 u16 cntxt_id; /* SGE context id for the response q */
368 u16 abs_id; /* absolute SGE id for the response q */
369 __be64 *desc; /* address of HW response ring */
370 dma_addr_t phys_addr; /* physical address of the ring */
371 unsigned int iqe_len; /* entry size */
372 unsigned int size; /* capacity of response queue */
373 struct adapter *adap;
374 struct net_device *netdev; /* associated net device */
375 rspq_handler_t handler;
378 struct sge_eth_stats { /* Ethernet queue statistics */
379 unsigned long pkts; /* # of ethernet packets */
380 unsigned long lro_pkts; /* # of LRO super packets */
381 unsigned long lro_merged; /* # of wire packets merged by LRO */
382 unsigned long rx_cso; /* # of Rx checksum offloads */
383 unsigned long vlan_ex; /* # of Rx VLAN extractions */
384 unsigned long rx_drops; /* # of packets dropped due to no mem */
387 struct sge_eth_rxq { /* SW Ethernet Rx queue */
388 struct sge_rspq rspq;
390 struct sge_eth_stats stats;
391 } ____cacheline_aligned_in_smp;
393 struct sge_ofld_stats { /* offload queue statistics */
394 unsigned long pkts; /* # of packets */
395 unsigned long imm; /* # of immediate-data packets */
396 unsigned long an; /* # of asynchronous notifications */
397 unsigned long nomem; /* # of responses deferred due to no mem */
400 struct sge_ofld_rxq { /* SW offload Rx queue */
401 struct sge_rspq rspq;
403 struct sge_ofld_stats stats;
404 } ____cacheline_aligned_in_smp;
413 unsigned int in_use; /* # of in-use Tx descriptors */
414 unsigned int size; /* # of descriptors */
415 unsigned int cidx; /* SW consumer index */
416 unsigned int pidx; /* producer index */
417 unsigned long stops; /* # of times q has been stopped */
418 unsigned long restarts; /* # of queue restarts */
419 unsigned int cntxt_id; /* SGE context id for the Tx q */
420 struct tx_desc *desc; /* address of HW Tx descriptor ring */
421 struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */
422 struct sge_qstat *stat; /* queue status entry */
423 dma_addr_t phys_addr; /* physical address of the ring */
426 unsigned short db_pidx;
429 struct sge_eth_txq { /* state for an SGE Ethernet Tx queue */
431 struct netdev_queue *txq; /* associated netdev TX queue */
432 unsigned long tso; /* # of TSO requests */
433 unsigned long tx_cso; /* # of Tx checksum offloads */
434 unsigned long vlan_ins; /* # of Tx VLAN insertions */
435 unsigned long mapping_err; /* # of I/O MMU packet mapping errors */
436 } ____cacheline_aligned_in_smp;
438 struct sge_ofld_txq { /* state for an SGE offload Tx queue */
440 struct adapter *adap;
441 struct sk_buff_head sendq; /* list of backpressured packets */
442 struct tasklet_struct qresume_tsk; /* restarts the queue */
443 u8 full; /* the Tx ring is full */
444 unsigned long mapping_err; /* # of I/O MMU packet mapping errors */
445 } ____cacheline_aligned_in_smp;
447 struct sge_ctrl_txq { /* state for an SGE control Tx queue */
449 struct adapter *adap;
450 struct sk_buff_head sendq; /* list of backpressured packets */
451 struct tasklet_struct qresume_tsk; /* restarts the queue */
452 u8 full; /* the Tx ring is full */
453 } ____cacheline_aligned_in_smp;
456 struct sge_eth_txq ethtxq[MAX_ETH_QSETS];
457 struct sge_ofld_txq ofldtxq[MAX_OFLD_QSETS];
458 struct sge_ctrl_txq ctrlq[MAX_CTRL_QUEUES];
460 struct sge_eth_rxq ethrxq[MAX_ETH_QSETS];
461 struct sge_ofld_rxq ofldrxq[MAX_OFLD_QSETS];
462 struct sge_ofld_rxq rdmarxq[MAX_RDMA_QUEUES];
463 struct sge_rspq fw_evtq ____cacheline_aligned_in_smp;
465 struct sge_rspq intrq ____cacheline_aligned_in_smp;
466 spinlock_t intrq_lock;
468 u16 max_ethqsets; /* # of available Ethernet queue sets */
469 u16 ethqsets; /* # of active Ethernet queue sets */
470 u16 ethtxq_rover; /* Tx queue to clean up next */
471 u16 ofldqsets; /* # of active offload queue sets */
472 u16 rdmaqs; /* # of available RDMA Rx queues */
473 u16 ofld_rxq[MAX_OFLD_QSETS];
475 u16 timer_val[SGE_NTIMERS];
476 u8 counter_val[SGE_NCOUNTERS];
477 u32 fl_pg_order; /* large page allocation size */
478 u32 stat_len; /* length of status page at ring end */
479 u32 pktshift; /* padding between CPL & packet data */
480 u32 fl_align; /* response queue message alignment */
481 u32 fl_starve_thres; /* Free List starvation threshold */
482 unsigned int starve_thres;
484 unsigned int egr_start;
485 unsigned int ingr_start;
486 void *egr_map[MAX_EGRQ]; /* qid->queue egress queue map */
487 struct sge_rspq *ingr_map[MAX_INGQ]; /* qid->queue ingress queue map */
488 DECLARE_BITMAP(starving_fl, MAX_EGRQ);
489 DECLARE_BITMAP(txq_maperr, MAX_EGRQ);
490 struct timer_list rx_timer; /* refills starving FLs */
491 struct timer_list tx_timer; /* checks Tx queues */
494 #define for_each_ethrxq(sge, i) for (i = 0; i < (sge)->ethqsets; i++)
495 #define for_each_ofldrxq(sge, i) for (i = 0; i < (sge)->ofldqsets; i++)
496 #define for_each_rdmarxq(sge, i) for (i = 0; i < (sge)->rdmaqs; i++)
502 struct pci_dev *pdev;
503 struct device *pdev_dev;
510 struct adapter_params params;
511 struct cxgb4_virt_res vres;
518 char desc[IFNAMSIZ + 10];
519 } msix_info[MAX_INGQ + 1];
523 struct net_device *port[MAX_NPORTS];
524 u8 chan_map[NCHAN]; /* channel -> port map */
526 unsigned int l2t_start;
527 unsigned int l2t_end;
528 struct l2t_data *l2t;
529 void *uld_handle[CXGB4_ULD_MAX];
530 struct list_head list_node;
532 struct tid_info tids;
533 void **tid_release_head;
534 spinlock_t tid_release_lock;
535 struct work_struct tid_release_task;
536 struct work_struct db_full_task;
537 struct work_struct db_drop_task;
538 bool tid_release_task_busy;
540 struct dentry *debugfs_root;
542 spinlock_t stats_lock;
545 static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr)
547 return readl(adap->regs + reg_addr);
550 static inline void t4_write_reg(struct adapter *adap, u32 reg_addr, u32 val)
552 writel(val, adap->regs + reg_addr);
556 static inline u64 readq(const volatile void __iomem *addr)
558 return readl(addr) + ((u64)readl(addr + 4) << 32);
561 static inline void writeq(u64 val, volatile void __iomem *addr)
564 writel(val >> 32, addr + 4);
568 static inline u64 t4_read_reg64(struct adapter *adap, u32 reg_addr)
570 return readq(adap->regs + reg_addr);
573 static inline void t4_write_reg64(struct adapter *adap, u32 reg_addr, u64 val)
575 writeq(val, adap->regs + reg_addr);
579 * netdev2pinfo - return the port_info structure associated with a net_device
582 * Return the struct port_info associated with a net_device
584 static inline struct port_info *netdev2pinfo(const struct net_device *dev)
586 return netdev_priv(dev);
590 * adap2pinfo - return the port_info of a port
592 * @idx: the port index
594 * Return the port_info structure for the port of the given index.
596 static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
598 return netdev_priv(adap->port[idx]);
602 * netdev2adap - return the adapter structure associated with a net_device
605 * Return the struct adapter associated with a net_device
607 static inline struct adapter *netdev2adap(const struct net_device *dev)
609 return netdev2pinfo(dev)->adapter;
612 void t4_os_portmod_changed(const struct adapter *adap, int port_id);
613 void t4_os_link_changed(struct adapter *adap, int port_id, int link_stat);
615 void *t4_alloc_mem(size_t size);
617 void t4_free_sge_resources(struct adapter *adap);
618 irq_handler_t t4_intr_handler(struct adapter *adap);
619 netdev_tx_t t4_eth_xmit(struct sk_buff *skb, struct net_device *dev);
620 int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp,
621 const struct pkt_gl *gl);
622 int t4_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
623 int t4_ofld_send(struct adapter *adap, struct sk_buff *skb);
624 int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
625 struct net_device *dev, int intr_idx,
626 struct sge_fl *fl, rspq_handler_t hnd);
627 int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq,
628 struct net_device *dev, struct netdev_queue *netdevq,
630 int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq,
631 struct net_device *dev, unsigned int iqid,
632 unsigned int cmplqid);
633 int t4_sge_alloc_ofld_txq(struct adapter *adap, struct sge_ofld_txq *txq,
634 struct net_device *dev, unsigned int iqid);
635 irqreturn_t t4_sge_intr_msix(int irq, void *cookie);
636 int t4_sge_init(struct adapter *adap);
637 void t4_sge_start(struct adapter *adap);
638 void t4_sge_stop(struct adapter *adap);
639 extern int dbfifo_int_thresh;
641 #define for_each_port(adapter, iter) \
642 for (iter = 0; iter < (adapter)->params.nports; ++iter)
644 static inline unsigned int core_ticks_per_usec(const struct adapter *adap)
646 return adap->params.vpd.cclk / 1000;
649 static inline unsigned int us_to_core_ticks(const struct adapter *adap,
652 return (us * adap->params.vpd.cclk) / 1000;
655 static inline unsigned int core_ticks_to_us(const struct adapter *adapter,
658 /* add Core Clock / 2 to round ticks to nearest uS */
659 return ((ticks * 1000 + adapter->params.vpd.cclk/2) /
660 adapter->params.vpd.cclk);
663 void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask,
666 int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
667 void *rpl, bool sleep_ok);
669 static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
672 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true);
675 static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd,
678 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false);
681 void t4_write_indirect(struct adapter *adap, unsigned int addr_reg,
682 unsigned int data_reg, const u32 *vals,
683 unsigned int nregs, unsigned int start_idx);
684 void t4_intr_enable(struct adapter *adapter);
685 void t4_intr_disable(struct adapter *adapter);
686 int t4_slow_intr_handler(struct adapter *adapter);
688 int t4_wait_dev_ready(struct adapter *adap);
689 int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port,
690 struct link_config *lc);
691 int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
692 int t4_memory_write(struct adapter *adap, int mtype, u32 addr, u32 len,
694 int t4_seeprom_wp(struct adapter *adapter, bool enable);
695 int get_vpd_params(struct adapter *adapter, struct vpd_params *p);
696 int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
697 unsigned int t4_flash_cfg_addr(struct adapter *adapter);
698 int t4_check_fw_version(struct adapter *adapter);
699 int t4_prep_adapter(struct adapter *adapter);
700 int t4_port_init(struct adapter *adap, int mbox, int pf, int vf);
701 void t4_fatal_err(struct adapter *adapter);
702 int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
703 int start, int n, const u16 *rspq, unsigned int nrspq);
704 int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
706 int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity);
707 int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data,
710 void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
711 void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
712 void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr,
713 unsigned int mask, unsigned int val);
714 void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
715 struct tp_tcp_stats *v6);
716 void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
717 const unsigned short *alpha, const unsigned short *beta);
719 void t4_wol_magic_enable(struct adapter *adap, unsigned int port,
721 int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
722 u64 mask0, u64 mask1, unsigned int crc, bool enable);
724 int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
725 enum dev_master master, enum dev_state *state);
726 int t4_fw_bye(struct adapter *adap, unsigned int mbox);
727 int t4_early_init(struct adapter *adap, unsigned int mbox);
728 int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
729 int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force);
730 int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset);
731 int t4_fw_upgrade(struct adapter *adap, unsigned int mbox,
732 const u8 *fw_data, unsigned int size, int force);
733 int t4_fw_config_file(struct adapter *adap, unsigned int mbox,
734 unsigned int mtype, unsigned int maddr,
735 u32 *finiver, u32 *finicsum, u32 *cfcsum);
736 int t4_fixup_host_params(struct adapter *adap, unsigned int page_size,
737 unsigned int cache_line_size);
738 int t4_fw_initialize(struct adapter *adap, unsigned int mbox);
739 int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
740 unsigned int vf, unsigned int nparams, const u32 *params,
742 int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
743 unsigned int vf, unsigned int nparams, const u32 *params,
745 int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
746 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
747 unsigned int rxqi, unsigned int rxq, unsigned int tc,
748 unsigned int vi, unsigned int cmask, unsigned int pmask,
749 unsigned int nexact, unsigned int rcaps, unsigned int wxcaps);
750 int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
751 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
752 unsigned int *rss_size);
753 int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
754 int mtu, int promisc, int all_multi, int bcast, int vlanex,
756 int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox,
757 unsigned int viid, bool free, unsigned int naddr,
758 const u8 **addr, u16 *idx, u64 *hash, bool sleep_ok);
759 int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
760 int idx, const u8 *addr, bool persist, bool add_smt);
761 int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
762 bool ucast, u64 vec, bool sleep_ok);
763 int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
764 bool rx_en, bool tx_en);
765 int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
766 unsigned int nblinks);
767 int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
768 unsigned int mmd, unsigned int reg, u16 *valp);
769 int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
770 unsigned int mmd, unsigned int reg, u16 val);
771 int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
772 unsigned int vf, unsigned int iqtype, unsigned int iqid,
773 unsigned int fl0id, unsigned int fl1id);
774 int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
775 unsigned int vf, unsigned int eqid);
776 int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
777 unsigned int vf, unsigned int eqid);
778 int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
779 unsigned int vf, unsigned int eqid);
780 int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
781 void t4_db_full(struct adapter *adapter);
782 void t4_db_dropped(struct adapter *adapter);
783 int t4_mem_win_read_len(struct adapter *adap, u32 addr, __be32 *data, int len);
784 int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox,
786 #endif /* __CXGB4_H__ */