2 * Copyright (C) 2016 Sigma Designs
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/iopoll.h>
13 #include <linux/module.h>
14 #include <linux/mtd/rawnand.h>
15 #include <linux/dmaengine.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/platform_device.h>
19 /* Offsets relative to chip->base */
24 /* Offsets relative to reg_base */
25 #define NFC_STATUS 0x00
26 #define NFC_FLASH_CMD 0x04
27 #define NFC_DEVICE_CFG 0x08
28 #define NFC_TIMING1 0x0c
29 #define NFC_TIMING2 0x10
30 #define NFC_XFER_CFG 0x14
31 #define NFC_PKT_0_CFG 0x18
32 #define NFC_PKT_N_CFG 0x1c
33 #define NFC_BB_CFG 0x20
34 #define NFC_ADDR_PAGE 0x24
35 #define NFC_ADDR_OFFSET 0x28
36 #define NFC_XFER_STATUS 0x2c
38 /* NFC_STATUS values */
39 #define CMD_READY BIT(31)
41 /* NFC_FLASH_CMD values */
45 /* NFC_XFER_STATUS values */
46 #define PAGE_IS_EMPTY BIT(16)
48 /* Offsets relative to mem_base */
49 #define METADATA 0x000
50 #define ERROR_REPORT 0x1c0
53 * Error reports are split in two bytes:
54 * byte 0 for the first packet in the page (PKT_0)
55 * byte 1 for other packets in the page (PKT_N, for N > 0)
56 * ERR_COUNT_PKT_N is the max error count over all but the first packet.
58 #define ERR_COUNT_PKT_0(v) (((v) >> 0) & 0x3f)
59 #define ERR_COUNT_PKT_N(v) (((v) >> 8) & 0x3f)
60 #define DECODE_FAIL_PKT_0(v) (((v) & BIT(7)) == 0)
61 #define DECODE_FAIL_PKT_N(v) (((v) & BIT(15)) == 0)
63 /* Offsets relative to pbus_base */
64 #define PBUS_CS_CTRL 0x83c
65 #define PBUS_PAD_MODE 0x8f0
67 /* PBUS_CS_CTRL values */
68 #define PBUS_IORDY BIT(31)
71 * PBUS_PAD_MODE values
72 * In raw mode, the driver communicates directly with the NAND chips.
73 * In NFC mode, the NAND Flash controller manages the communication.
74 * We use NFC mode for read and write; raw mode for everything else.
77 #define MODE_NFC BIT(31)
79 #define METADATA_SIZE 4
81 #define FIELD_ORDER 15
86 struct nand_controller hw;
87 void __iomem *reg_base;
88 void __iomem *mem_base;
89 void __iomem *pbus_base;
90 struct tango_chip *chips[MAX_CS];
91 struct dma_chan *chan;
95 #define to_tango_nfc(ptr) container_of(ptr, struct tango_nfc, hw)
98 struct nand_chip nand_chip;
108 #define to_tango_chip(ptr) container_of(ptr, struct tango_chip, nand_chip)
110 #define XFER_CFG(cs, page_count, steps, metadata_size) \
111 ((cs) << 24 | (page_count) << 16 | (steps) << 8 | (metadata_size))
113 #define PKT_CFG(size, strength) ((size) << 16 | (strength))
115 #define BB_CFG(bb_offset, bb_size) ((bb_offset) << 16 | (bb_size))
117 #define TIMING(t0, t1, t2, t3) ((t0) << 24 | (t1) << 16 | (t2) << 8 | (t3))
119 static void tango_cmd_ctrl(struct nand_chip *chip, int dat, unsigned int ctrl)
121 struct tango_chip *tchip = to_tango_chip(chip);
124 writeb_relaxed(dat, tchip->base + PBUS_CMD);
127 writeb_relaxed(dat, tchip->base + PBUS_ADDR);
130 static int tango_dev_ready(struct nand_chip *chip)
132 struct tango_nfc *nfc = to_tango_nfc(chip->controller);
134 return readl_relaxed(nfc->pbus_base + PBUS_CS_CTRL) & PBUS_IORDY;
137 static u8 tango_read_byte(struct nand_chip *chip)
139 struct tango_chip *tchip = to_tango_chip(chip);
141 return readb_relaxed(tchip->base + PBUS_DATA);
144 static void tango_read_buf(struct nand_chip *chip, u8 *buf, int len)
146 struct tango_chip *tchip = to_tango_chip(chip);
148 ioread8_rep(tchip->base + PBUS_DATA, buf, len);
151 static void tango_write_buf(struct nand_chip *chip, const u8 *buf, int len)
153 struct tango_chip *tchip = to_tango_chip(chip);
155 iowrite8_rep(tchip->base + PBUS_DATA, buf, len);
158 static void tango_select_chip(struct nand_chip *chip, int idx)
160 struct tango_nfc *nfc = to_tango_nfc(chip->controller);
161 struct tango_chip *tchip = to_tango_chip(chip);
164 return; /* No "chip unselect" function */
166 writel_relaxed(tchip->timing1, nfc->reg_base + NFC_TIMING1);
167 writel_relaxed(tchip->timing2, nfc->reg_base + NFC_TIMING2);
168 writel_relaxed(tchip->xfer_cfg, nfc->reg_base + NFC_XFER_CFG);
169 writel_relaxed(tchip->pkt_0_cfg, nfc->reg_base + NFC_PKT_0_CFG);
170 writel_relaxed(tchip->pkt_n_cfg, nfc->reg_base + NFC_PKT_N_CFG);
171 writel_relaxed(tchip->bb_cfg, nfc->reg_base + NFC_BB_CFG);
175 * The controller does not check for bitflips in erased pages,
176 * therefore software must check instead.
178 static int check_erased_page(struct nand_chip *chip, u8 *buf)
180 struct mtd_info *mtd = nand_to_mtd(chip);
181 u8 *meta = chip->oob_poi + BBM_SIZE;
182 u8 *ecc = chip->oob_poi + BBM_SIZE + METADATA_SIZE;
183 const int ecc_size = chip->ecc.bytes;
184 const int pkt_size = chip->ecc.size;
185 int i, res, meta_len, bitflips = 0;
187 for (i = 0; i < chip->ecc.steps; ++i) {
188 meta_len = i ? 0 : METADATA_SIZE;
189 res = nand_check_erased_ecc_chunk(buf, pkt_size, ecc, ecc_size,
193 mtd->ecc_stats.failed++;
195 mtd->ecc_stats.corrected += res;
197 bitflips = max(res, bitflips);
205 static int decode_error_report(struct nand_chip *chip)
208 struct mtd_info *mtd = nand_to_mtd(chip);
209 struct tango_nfc *nfc = to_tango_nfc(chip->controller);
211 status = readl_relaxed(nfc->reg_base + NFC_XFER_STATUS);
212 if (status & PAGE_IS_EMPTY)
215 res = readl_relaxed(nfc->mem_base + ERROR_REPORT);
217 if (DECODE_FAIL_PKT_0(res) || DECODE_FAIL_PKT_N(res))
220 /* ERR_COUNT_PKT_N is max, not sum, but that's all we have */
221 mtd->ecc_stats.corrected +=
222 ERR_COUNT_PKT_0(res) + ERR_COUNT_PKT_N(res);
224 return max(ERR_COUNT_PKT_0(res), ERR_COUNT_PKT_N(res));
227 static void tango_dma_callback(void *arg)
232 static int do_dma(struct tango_nfc *nfc, enum dma_data_direction dir, int cmd,
233 const void *buf, int len, int page)
235 void __iomem *addr = nfc->reg_base + NFC_STATUS;
236 struct dma_chan *chan = nfc->chan;
237 struct dma_async_tx_descriptor *desc;
238 enum dma_transfer_direction tdir;
239 struct scatterlist sg;
240 struct completion tx_done;
244 sg_init_one(&sg, buf, len);
245 if (dma_map_sg(chan->device->dev, &sg, 1, dir) != 1)
248 tdir = dir == DMA_TO_DEVICE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
249 desc = dmaengine_prep_slave_sg(chan, &sg, 1, tdir, DMA_PREP_INTERRUPT);
253 desc->callback = tango_dma_callback;
254 desc->callback_param = &tx_done;
255 init_completion(&tx_done);
257 writel_relaxed(MODE_NFC, nfc->pbus_base + PBUS_PAD_MODE);
259 writel_relaxed(page, nfc->reg_base + NFC_ADDR_PAGE);
260 writel_relaxed(0, nfc->reg_base + NFC_ADDR_OFFSET);
261 writel_relaxed(cmd, nfc->reg_base + NFC_FLASH_CMD);
263 dmaengine_submit(desc);
264 dma_async_issue_pending(chan);
266 res = wait_for_completion_timeout(&tx_done, HZ);
268 err = readl_poll_timeout(addr, val, val & CMD_READY, 0, 1000);
270 writel_relaxed(MODE_RAW, nfc->pbus_base + PBUS_PAD_MODE);
273 dma_unmap_sg(chan->device->dev, &sg, 1, dir);
278 static int tango_read_page(struct nand_chip *chip, u8 *buf,
279 int oob_required, int page)
281 struct mtd_info *mtd = nand_to_mtd(chip);
282 struct tango_nfc *nfc = to_tango_nfc(chip->controller);
283 int err, res, len = mtd->writesize;
286 chip->ecc.read_oob(chip, page);
288 err = do_dma(nfc, DMA_FROM_DEVICE, NFC_READ, buf, len, page);
292 res = decode_error_report(chip);
294 chip->ecc.read_oob_raw(chip, page);
295 res = check_erased_page(chip, buf);
301 static int tango_write_page(struct nand_chip *chip, const u8 *buf,
302 int oob_required, int page)
304 struct mtd_info *mtd = nand_to_mtd(chip);
305 struct tango_nfc *nfc = to_tango_nfc(chip->controller);
306 int err, status, len = mtd->writesize;
308 /* Calling tango_write_oob() would send PAGEPROG twice */
312 writel_relaxed(0xffffffff, nfc->mem_base + METADATA);
313 err = do_dma(nfc, DMA_TO_DEVICE, NFC_WRITE, buf, len, page);
317 status = chip->legacy.waitfunc(chip);
318 if (status & NAND_STATUS_FAIL)
324 static void aux_read(struct nand_chip *chip, u8 **buf, int len, int *pos)
329 /* skip over "len" bytes */
330 nand_change_read_column_op(chip, *pos, NULL, 0, false);
332 tango_read_buf(chip, *buf, len);
337 static void aux_write(struct nand_chip *chip, const u8 **buf, int len, int *pos)
342 /* skip over "len" bytes */
343 nand_change_write_column_op(chip, *pos, NULL, 0, false);
345 tango_write_buf(chip, *buf, len);
351 * Physical page layout (not drawn to scale)
353 * NB: Bad Block Marker area splits PKT_N in two (N1, N2).
355 * +---+-----------------+-------+-----+-----------+-----+----+-------+
356 * | M | PKT_0 | ECC_0 | ... | N1 | BBM | N2 | ECC_N |
357 * +---+-----------------+-------+-----+-----------+-----+----+-------+
359 * Logical page layout:
361 * +-----+---+-------+-----+-------+
362 * oob = | BBM | M | ECC_0 | ... | ECC_N |
363 * +-----+---+-------+-----+-------+
365 * +-----------------+-----+-----------------+
366 * buf = | PKT_0 | ... | PKT_N |
367 * +-----------------+-----+-----------------+
369 static void raw_read(struct nand_chip *chip, u8 *buf, u8 *oob)
371 struct mtd_info *mtd = nand_to_mtd(chip);
373 const int page_size = mtd->writesize;
374 const int ecc_size = chip->ecc.bytes;
375 const int pkt_size = chip->ecc.size;
376 int pos = 0; /* position within physical page */
377 int rem = page_size; /* bytes remaining until BBM area */
382 aux_read(chip, &oob, METADATA_SIZE, &pos);
384 while (rem > pkt_size) {
385 aux_read(chip, &buf, pkt_size, &pos);
386 aux_read(chip, &oob, ecc_size, &pos);
387 rem = page_size - pos;
390 aux_read(chip, &buf, rem, &pos);
391 aux_read(chip, &oob_orig, BBM_SIZE, &pos);
392 aux_read(chip, &buf, pkt_size - rem, &pos);
393 aux_read(chip, &oob, ecc_size, &pos);
396 static void raw_write(struct nand_chip *chip, const u8 *buf, const u8 *oob)
398 struct mtd_info *mtd = nand_to_mtd(chip);
399 const u8 *oob_orig = oob;
400 const int page_size = mtd->writesize;
401 const int ecc_size = chip->ecc.bytes;
402 const int pkt_size = chip->ecc.size;
403 int pos = 0; /* position within physical page */
404 int rem = page_size; /* bytes remaining until BBM area */
409 aux_write(chip, &oob, METADATA_SIZE, &pos);
411 while (rem > pkt_size) {
412 aux_write(chip, &buf, pkt_size, &pos);
413 aux_write(chip, &oob, ecc_size, &pos);
414 rem = page_size - pos;
417 aux_write(chip, &buf, rem, &pos);
418 aux_write(chip, &oob_orig, BBM_SIZE, &pos);
419 aux_write(chip, &buf, pkt_size - rem, &pos);
420 aux_write(chip, &oob, ecc_size, &pos);
423 static int tango_read_page_raw(struct nand_chip *chip, u8 *buf,
424 int oob_required, int page)
426 nand_read_page_op(chip, page, 0, NULL, 0);
427 raw_read(chip, buf, chip->oob_poi);
431 static int tango_write_page_raw(struct nand_chip *chip, const u8 *buf,
432 int oob_required, int page)
434 nand_prog_page_begin_op(chip, page, 0, NULL, 0);
435 raw_write(chip, buf, chip->oob_poi);
436 return nand_prog_page_end_op(chip);
439 static int tango_read_oob(struct nand_chip *chip, int page)
441 nand_read_page_op(chip, page, 0, NULL, 0);
442 raw_read(chip, NULL, chip->oob_poi);
446 static int tango_write_oob(struct nand_chip *chip, int page)
448 nand_prog_page_begin_op(chip, page, 0, NULL, 0);
449 raw_write(chip, NULL, chip->oob_poi);
450 return nand_prog_page_end_op(chip);
453 static int oob_ecc(struct mtd_info *mtd, int idx, struct mtd_oob_region *res)
455 struct nand_chip *chip = mtd_to_nand(mtd);
456 struct nand_ecc_ctrl *ecc = &chip->ecc;
458 if (idx >= ecc->steps)
461 res->offset = BBM_SIZE + METADATA_SIZE + ecc->bytes * idx;
462 res->length = ecc->bytes;
467 static int oob_free(struct mtd_info *mtd, int idx, struct mtd_oob_region *res)
469 return -ERANGE; /* no free space in spare area */
472 static const struct mtd_ooblayout_ops tango_nand_ooblayout_ops = {
477 static u32 to_ticks(int kHz, int ps)
479 return DIV_ROUND_UP_ULL((u64)kHz * ps, NSEC_PER_SEC);
482 static int tango_set_timings(struct nand_chip *chip, int csline,
483 const struct nand_data_interface *conf)
485 const struct nand_sdr_timings *sdr = nand_get_sdr_timings(conf);
486 struct tango_nfc *nfc = to_tango_nfc(chip->controller);
487 struct tango_chip *tchip = to_tango_chip(chip);
488 u32 Trdy, Textw, Twc, Twpw, Tacc, Thold, Trpw, Textr;
489 int kHz = nfc->freq_kHz;
494 if (csline == NAND_DATA_IFACE_CHECK_ONLY)
497 Trdy = to_ticks(kHz, sdr->tCEA_max - sdr->tREA_max);
498 Textw = to_ticks(kHz, sdr->tWB_max);
499 Twc = to_ticks(kHz, sdr->tWC_min);
500 Twpw = to_ticks(kHz, sdr->tWC_min - sdr->tWP_min);
502 Tacc = to_ticks(kHz, sdr->tREA_max);
503 Thold = to_ticks(kHz, sdr->tREH_min);
504 Trpw = to_ticks(kHz, sdr->tRC_min - sdr->tREH_min);
505 Textr = to_ticks(kHz, sdr->tRHZ_max);
507 tchip->timing1 = TIMING(Trdy, Textw, Twc, Twpw);
508 tchip->timing2 = TIMING(Tacc, Thold, Trpw, Textr);
513 static int tango_attach_chip(struct nand_chip *chip)
515 struct nand_ecc_ctrl *ecc = &chip->ecc;
517 ecc->mode = NAND_ECC_HW;
518 ecc->algo = NAND_ECC_BCH;
519 ecc->bytes = DIV_ROUND_UP(ecc->strength * FIELD_ORDER, BITS_PER_BYTE);
521 ecc->read_page_raw = tango_read_page_raw;
522 ecc->write_page_raw = tango_write_page_raw;
523 ecc->read_page = tango_read_page;
524 ecc->write_page = tango_write_page;
525 ecc->read_oob = tango_read_oob;
526 ecc->write_oob = tango_write_oob;
531 static const struct nand_controller_ops tango_controller_ops = {
532 .attach_chip = tango_attach_chip,
535 static int chip_init(struct device *dev, struct device_node *np)
539 struct mtd_info *mtd;
540 struct nand_chip *chip;
541 struct tango_chip *tchip;
542 struct nand_ecc_ctrl *ecc;
543 struct tango_nfc *nfc = dev_get_drvdata(dev);
545 tchip = devm_kzalloc(dev, sizeof(*tchip), GFP_KERNEL);
549 res = of_property_count_u32_elems(np, "reg");
554 return -ENOTSUPP; /* Multi-CS chips are not supported */
556 err = of_property_read_u32_index(np, "reg", 0, &cs);
563 chip = &tchip->nand_chip;
565 mtd = nand_to_mtd(chip);
567 chip->legacy.read_byte = tango_read_byte;
568 chip->legacy.write_buf = tango_write_buf;
569 chip->legacy.read_buf = tango_read_buf;
570 chip->select_chip = tango_select_chip;
571 chip->legacy.cmd_ctrl = tango_cmd_ctrl;
572 chip->legacy.dev_ready = tango_dev_ready;
573 chip->setup_data_interface = tango_set_timings;
574 chip->options = NAND_USE_BOUNCE_BUFFER |
575 NAND_NO_SUBPAGE_WRITE |
577 chip->controller = &nfc->hw;
578 tchip->base = nfc->pbus_base + (cs * 256);
580 nand_set_flash_node(chip, np);
581 mtd_set_ooblayout(mtd, &tango_nand_ooblayout_ops);
582 mtd->dev.parent = dev;
584 err = nand_scan(chip, 1);
588 tchip->xfer_cfg = XFER_CFG(cs, 1, ecc->steps, METADATA_SIZE);
589 tchip->pkt_0_cfg = PKT_CFG(ecc->size + METADATA_SIZE, ecc->strength);
590 tchip->pkt_n_cfg = PKT_CFG(ecc->size, ecc->strength);
591 tchip->bb_cfg = BB_CFG(mtd->writesize, BBM_SIZE);
593 err = mtd_device_register(mtd, NULL, 0);
599 nfc->chips[cs] = tchip;
604 static int tango_nand_remove(struct platform_device *pdev)
607 struct tango_nfc *nfc = platform_get_drvdata(pdev);
609 dma_release_channel(nfc->chan);
611 for (cs = 0; cs < MAX_CS; ++cs) {
613 nand_release(&nfc->chips[cs]->nand_chip);
619 static int tango_nand_probe(struct platform_device *pdev)
623 struct resource *res;
624 struct tango_nfc *nfc;
625 struct device_node *np;
627 nfc = devm_kzalloc(&pdev->dev, sizeof(*nfc), GFP_KERNEL);
631 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
632 nfc->reg_base = devm_ioremap_resource(&pdev->dev, res);
633 if (IS_ERR(nfc->reg_base))
634 return PTR_ERR(nfc->reg_base);
636 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
637 nfc->mem_base = devm_ioremap_resource(&pdev->dev, res);
638 if (IS_ERR(nfc->mem_base))
639 return PTR_ERR(nfc->mem_base);
641 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
642 nfc->pbus_base = devm_ioremap_resource(&pdev->dev, res);
643 if (IS_ERR(nfc->pbus_base))
644 return PTR_ERR(nfc->pbus_base);
646 writel_relaxed(MODE_RAW, nfc->pbus_base + PBUS_PAD_MODE);
648 clk = devm_clk_get(&pdev->dev, NULL);
652 nfc->chan = dma_request_chan(&pdev->dev, "rxtx");
653 if (IS_ERR(nfc->chan))
654 return PTR_ERR(nfc->chan);
656 platform_set_drvdata(pdev, nfc);
657 nand_controller_init(&nfc->hw);
658 nfc->hw.ops = &tango_controller_ops;
659 nfc->freq_kHz = clk_get_rate(clk) / 1000;
661 for_each_child_of_node(pdev->dev.of_node, np) {
662 err = chip_init(&pdev->dev, np);
664 tango_nand_remove(pdev);
672 static const struct of_device_id tango_nand_ids[] = {
673 { .compatible = "sigma,smp8758-nand" },
676 MODULE_DEVICE_TABLE(of, tango_nand_ids);
678 static struct platform_driver tango_nand_driver = {
679 .probe = tango_nand_probe,
680 .remove = tango_nand_remove,
682 .name = "tango-nand",
683 .of_match_table = tango_nand_ids,
687 module_platform_driver(tango_nand_driver);
689 MODULE_LICENSE("GPL");
690 MODULE_AUTHOR("Sigma Designs");
691 MODULE_DESCRIPTION("Tango4 NAND Flash controller driver");